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authorDavid Woods <dwoods@ezchip.com>2015-12-17 14:31:26 -0500
committerWill Deacon <will.deacon@arm.com>2015-12-21 12:26:00 -0500
commit66b3923a1a0f77a563b43f43f6ad091354abbfe9 (patch)
treeb380eb7da866452ff697dfb588309184b86f1ef1 /arch/arm64/mm
parent0a28714c53fd4f7aea709be7577dfbe0095c8c3e (diff)
arm64: hugetlb: add support for PTE contiguous bit
The arm64 MMU supports a Contiguous bit which is a hint that the TTE is one of a set of contiguous entries which can be cached in a single TLB entry. Supporting this bit adds new intermediate huge page sizes. The set of huge page sizes available depends on the base page size. Without using contiguous pages the huge page sizes are as follows. 4KB: 2MB 1GB 64KB: 512MB With a 4KB granule, the contiguous bit groups together sets of 16 pages and with a 64KB granule it groups sets of 32 pages. This enables two new huge page sizes in each case, so that the full set of available sizes is as follows. 4KB: 64KB 2MB 32MB 1GB 64KB: 2MB 512MB 16GB If a 16KB granule is used then the contiguous bit groups 128 pages at the PTE level and 32 pages at the PMD level. If the base page size is set to 64KB then 2MB pages are enabled by default. It is possible in the future to make 2MB the default huge page size for both 4KB and 64KB granules. Reviewed-by: Chris Metcalf <cmetcalf@ezchip.com> Reviewed-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: David Woods <dwoods@ezchip.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r--arch/arm64/mm/hugetlbpage.c274
1 files changed, 273 insertions, 1 deletions
diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
index 383b03ff38f8..82d607c3614e 100644
--- a/arch/arm64/mm/hugetlbpage.c
+++ b/arch/arm64/mm/hugetlbpage.c
@@ -41,17 +41,289 @@ int pud_huge(pud_t pud)
41#endif 41#endif
42} 42}
43 43
44static int find_num_contig(struct mm_struct *mm, unsigned long addr,
45 pte_t *ptep, pte_t pte, size_t *pgsize)
46{
47 pgd_t *pgd = pgd_offset(mm, addr);
48 pud_t *pud;
49 pmd_t *pmd;
50
51 *pgsize = PAGE_SIZE;
52 if (!pte_cont(pte))
53 return 1;
54 if (!pgd_present(*pgd)) {
55 VM_BUG_ON(!pgd_present(*pgd));
56 return 1;
57 }
58 pud = pud_offset(pgd, addr);
59 if (!pud_present(*pud)) {
60 VM_BUG_ON(!pud_present(*pud));
61 return 1;
62 }
63 pmd = pmd_offset(pud, addr);
64 if (!pmd_present(*pmd)) {
65 VM_BUG_ON(!pmd_present(*pmd));
66 return 1;
67 }
68 if ((pte_t *)pmd == ptep) {
69 *pgsize = PMD_SIZE;
70 return CONT_PMDS;
71 }
72 return CONT_PTES;
73}
74
75void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
76 pte_t *ptep, pte_t pte)
77{
78 size_t pgsize;
79 int i;
80 int ncontig = find_num_contig(mm, addr, ptep, pte, &pgsize);
81 unsigned long pfn;
82 pgprot_t hugeprot;
83
84 if (ncontig == 1) {
85 set_pte_at(mm, addr, ptep, pte);
86 return;
87 }
88
89 pfn = pte_pfn(pte);
90 hugeprot = __pgprot(pte_val(pfn_pte(pfn, __pgprot(0))) ^ pte_val(pte));
91 for (i = 0; i < ncontig; i++) {
92 pr_debug("%s: set pte %p to 0x%llx\n", __func__, ptep,
93 pte_val(pfn_pte(pfn, hugeprot)));
94 set_pte_at(mm, addr, ptep, pfn_pte(pfn, hugeprot));
95 ptep++;
96 pfn += pgsize >> PAGE_SHIFT;
97 addr += pgsize;
98 }
99}
100
101pte_t *huge_pte_alloc(struct mm_struct *mm,
102 unsigned long addr, unsigned long sz)
103{
104 pgd_t *pgd;
105 pud_t *pud;
106 pte_t *pte = NULL;
107
108 pr_debug("%s: addr:0x%lx sz:0x%lx\n", __func__, addr, sz);
109 pgd = pgd_offset(mm, addr);
110 pud = pud_alloc(mm, pgd, addr);
111 if (!pud)
112 return NULL;
113
114 if (sz == PUD_SIZE) {
115 pte = (pte_t *)pud;
116 } else if (sz == (PAGE_SIZE * CONT_PTES)) {
117 pmd_t *pmd = pmd_alloc(mm, pud, addr);
118
119 WARN_ON(addr & (sz - 1));
120 /*
121 * Note that if this code were ever ported to the
122 * 32-bit arm platform then it will cause trouble in
123 * the case where CONFIG_HIGHPTE is set, since there
124 * will be no pte_unmap() to correspond with this
125 * pte_alloc_map().
126 */
127 pte = pte_alloc_map(mm, NULL, pmd, addr);
128 } else if (sz == PMD_SIZE) {
129 if (IS_ENABLED(CONFIG_ARCH_WANT_HUGE_PMD_SHARE) &&
130 pud_none(*pud))
131 pte = huge_pmd_share(mm, addr, pud);
132 else
133 pte = (pte_t *)pmd_alloc(mm, pud, addr);
134 } else if (sz == (PMD_SIZE * CONT_PMDS)) {
135 pmd_t *pmd;
136
137 pmd = pmd_alloc(mm, pud, addr);
138 WARN_ON(addr & (sz - 1));
139 return (pte_t *)pmd;
140 }
141
142 pr_debug("%s: addr:0x%lx sz:0x%lx ret pte=%p/0x%llx\n", __func__, addr,
143 sz, pte, pte_val(*pte));
144 return pte;
145}
146
147pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
148{
149 pgd_t *pgd;
150 pud_t *pud;
151 pmd_t *pmd = NULL;
152 pte_t *pte = NULL;
153
154 pgd = pgd_offset(mm, addr);
155 pr_debug("%s: addr:0x%lx pgd:%p\n", __func__, addr, pgd);
156 if (!pgd_present(*pgd))
157 return NULL;
158 pud = pud_offset(pgd, addr);
159 if (!pud_present(*pud))
160 return NULL;
161
162 if (pud_huge(*pud))
163 return (pte_t *)pud;
164 pmd = pmd_offset(pud, addr);
165 if (!pmd_present(*pmd))
166 return NULL;
167
168 if (pte_cont(pmd_pte(*pmd))) {
169 pmd = pmd_offset(
170 pud, (addr & CONT_PMD_MASK));
171 return (pte_t *)pmd;
172 }
173 if (pmd_huge(*pmd))
174 return (pte_t *)pmd;
175 pte = pte_offset_kernel(pmd, addr);
176 if (pte_present(*pte) && pte_cont(*pte)) {
177 pte = pte_offset_kernel(
178 pmd, (addr & CONT_PTE_MASK));
179 return pte;
180 }
181 return NULL;
182}
183
184pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
185 struct page *page, int writable)
186{
187 size_t pagesize = huge_page_size(hstate_vma(vma));
188
189 if (pagesize == CONT_PTE_SIZE) {
190 entry = pte_mkcont(entry);
191 } else if (pagesize == CONT_PMD_SIZE) {
192 entry = pmd_pte(pmd_mkcont(pte_pmd(entry)));
193 } else if (pagesize != PUD_SIZE && pagesize != PMD_SIZE) {
194 pr_warn("%s: unrecognized huge page size 0x%lx\n",
195 __func__, pagesize);
196 }
197 return entry;
198}
199
200pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
201 unsigned long addr, pte_t *ptep)
202{
203 pte_t pte;
204
205 if (pte_cont(*ptep)) {
206 int ncontig, i;
207 size_t pgsize;
208 pte_t *cpte;
209 bool is_dirty = false;
210
211 cpte = huge_pte_offset(mm, addr);
212 ncontig = find_num_contig(mm, addr, cpte, *cpte, &pgsize);
213 /* save the 1st pte to return */
214 pte = ptep_get_and_clear(mm, addr, cpte);
215 for (i = 1; i < ncontig; ++i) {
216 /*
217 * If HW_AFDBM is enabled, then the HW could
218 * turn on the dirty bit for any of the page
219 * in the set, so check them all.
220 */
221 ++cpte;
222 if (pte_dirty(ptep_get_and_clear(mm, addr, cpte)))
223 is_dirty = true;
224 }
225 if (is_dirty)
226 return pte_mkdirty(pte);
227 else
228 return pte;
229 } else {
230 return ptep_get_and_clear(mm, addr, ptep);
231 }
232}
233
234int huge_ptep_set_access_flags(struct vm_area_struct *vma,
235 unsigned long addr, pte_t *ptep,
236 pte_t pte, int dirty)
237{
238 pte_t *cpte;
239
240 if (pte_cont(pte)) {
241 int ncontig, i, changed = 0;
242 size_t pgsize = 0;
243 unsigned long pfn = pte_pfn(pte);
244 /* Select all bits except the pfn */
245 pgprot_t hugeprot =
246 __pgprot(pte_val(pfn_pte(pfn, __pgprot(0))) ^
247 pte_val(pte));
248
249 cpte = huge_pte_offset(vma->vm_mm, addr);
250 pfn = pte_pfn(*cpte);
251 ncontig = find_num_contig(vma->vm_mm, addr, cpte,
252 *cpte, &pgsize);
253 for (i = 0; i < ncontig; ++i, ++cpte) {
254 changed = ptep_set_access_flags(vma, addr, cpte,
255 pfn_pte(pfn,
256 hugeprot),
257 dirty);
258 pfn += pgsize >> PAGE_SHIFT;
259 }
260 return changed;
261 } else {
262 return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
263 }
264}
265
266void huge_ptep_set_wrprotect(struct mm_struct *mm,
267 unsigned long addr, pte_t *ptep)
268{
269 if (pte_cont(*ptep)) {
270 int ncontig, i;
271 pte_t *cpte;
272 size_t pgsize = 0;
273
274 cpte = huge_pte_offset(mm, addr);
275 ncontig = find_num_contig(mm, addr, cpte, *cpte, &pgsize);
276 for (i = 0; i < ncontig; ++i, ++cpte)
277 ptep_set_wrprotect(mm, addr, cpte);
278 } else {
279 ptep_set_wrprotect(mm, addr, ptep);
280 }
281}
282
283void huge_ptep_clear_flush(struct vm_area_struct *vma,
284 unsigned long addr, pte_t *ptep)
285{
286 if (pte_cont(*ptep)) {
287 int ncontig, i;
288 pte_t *cpte;
289 size_t pgsize = 0;
290
291 cpte = huge_pte_offset(vma->vm_mm, addr);
292 ncontig = find_num_contig(vma->vm_mm, addr, cpte,
293 *cpte, &pgsize);
294 for (i = 0; i < ncontig; ++i, ++cpte)
295 ptep_clear_flush(vma, addr, cpte);
296 } else {
297 ptep_clear_flush(vma, addr, ptep);
298 }
299}
300
44static __init int setup_hugepagesz(char *opt) 301static __init int setup_hugepagesz(char *opt)
45{ 302{
46 unsigned long ps = memparse(opt, &opt); 303 unsigned long ps = memparse(opt, &opt);
304
47 if (ps == PMD_SIZE) { 305 if (ps == PMD_SIZE) {
48 hugetlb_add_hstate(PMD_SHIFT - PAGE_SHIFT); 306 hugetlb_add_hstate(PMD_SHIFT - PAGE_SHIFT);
49 } else if (ps == PUD_SIZE) { 307 } else if (ps == PUD_SIZE) {
50 hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT); 308 hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
309 } else if (ps == (PAGE_SIZE * CONT_PTES)) {
310 hugetlb_add_hstate(CONT_PTE_SHIFT);
311 } else if (ps == (PMD_SIZE * CONT_PMDS)) {
312 hugetlb_add_hstate((PMD_SHIFT + CONT_PMD_SHIFT) - PAGE_SHIFT);
51 } else { 313 } else {
52 pr_err("hugepagesz: Unsupported page size %lu M\n", ps >> 20); 314 pr_err("hugepagesz: Unsupported page size %lu K\n", ps >> 10);
53 return 0; 315 return 0;
54 } 316 }
55 return 1; 317 return 1;
56} 318}
57__setup("hugepagesz=", setup_hugepagesz); 319__setup("hugepagesz=", setup_hugepagesz);
320
321#ifdef CONFIG_ARM64_64K_PAGES
322static __init int add_default_hugepagesz(void)
323{
324 if (size_to_hstate(CONT_PTES * PAGE_SIZE) == NULL)
325 hugetlb_add_hstate(CONT_PMD_SHIFT);
326 return 0;
327}
328arch_initcall(add_default_hugepagesz);
329#endif