arm64: KVM: Configure TCR_EL2.PS at runtime

Setting TCR_EL2.PS to 40 bits is wrong on systems with less that
less than 40 bits of physical addresses. and breaks KVM on systems
where the RAM is above 40 bits.

This patch uses ID_AA64MMFR0_EL1.PARange to set TCR_EL2.PS dynamically,
just like we already do for VTCR_EL2.PS.

[Marc: rewrote commit message, patch tidy up]

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

1 files changed, 7 insertions, 5 deletions

diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S
index 3e568dcd907b..d073b5a216f7 100644
--- a/arch/arm64/kvm/hyp-init.S
+++ b/arch/arm64/kvm/hyp-init.S
@@ -64,7 +64,7 @@ __do_hyp_init:
         mrs     x4, tcr_el1
         ldr     x5, =TCR_EL2_MASK
         and     x4, x4, x5
-        ldr     x5, =TCR_EL2_FLAGS
+        mov     x5, #TCR_EL2_RES1
         orr     x4, x4, x5
 
 #ifndef CONFIG_ARM64_VA_BITS_48
@@ -85,15 +85,17 @@ __do_hyp_init:
         ldr_l   x5, idmap_t0sz
         bfi     x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
 #endif
-        msr     tcr_el2, x4
-
-        ldr     x4, =VTCR_EL2_FLAGS
         /*
          * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
-         * VTCR_EL2.
+         * TCR_EL2 and VTCR_EL2.
          */
         mrs     x5, ID_AA64MMFR0_EL1
         bfi     x4, x5, #16, #3
+
+        msr     tcr_el2, x4
+
+        ldr     x4, =VTCR_EL2_FLAGS
+        bfi     x4, x5, #16, #3
         /*
          * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in
          * VTCR_EL2.