Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull device tree conversions for arm-soc, part 1, from Olof Johansson:
 "The spear3xx, lpc32xx, shmobile and mmp platforms are joining the game
  of booting using device trees, which is a great step forward for them.
  at91 and spear have pretty much completed this process with a huge
  amount of work being put into at91.  The other platforms are
  continuing the process.

  We finally start to see the payback on this investment, as new
  machines are getting supported purely by adding a .dts source file
  that can be completely independent of the kernel source."

Fix up trivial conflict in arch/arm/Kconfig

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: at91: Add ADC driver to at91sam9260/at91sam9g20 dtsi files
  arm/dts: omap4-panda: Add LEDs support
  arm/dts: omap4-sdp: Add LEDs support
  arm/dts: twl4030: Add twl4030-gpio node
  OMAP4: devices: Do not create mcpdm device if the dtb has been provided
  OMAP4: devices: Do not create dmic device if the dtb has been provided
  Documentation: update docs for mmp dt
  ARM: dts: refresh dts file for arch mmp
  ARM: mmp: support pxa910 with device tree
  ARM: mmp: support mmp2 with device tree
  gpio: pxa: parse gpio from DTS file
  ARM: mmp: support DT in timer
  ARM: mmp: support DT in irq
  ARM: mmp: append CONFIG_MACH_MMP2_DT
  ARM: mmp: fix build issue on mmp with device tree
  ARM: ux500: Enable PRCMU Timer 4 (clocksource) for Device Tree
  ARM: ux500: Disable SMSC911x platform code registration when DT is enabled
  ARM: ux500: Fork cpu-db8500 platform_devs for sequential DT enablement
  ARM: ux500: Do not attempt to register non-existent i2c devices on Snowball
  ARM: SPEAr3xx: Correct keyboard data passed from DT
  ...

1 files changed, 0 insertions, 67 deletions

diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
deleted file mode 100644
index 8cfa83fa1296..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/spear320.h
- *
- * SPEAr320 Machine specific definition
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifdef  CONFIG_MACH_SPEAR320
-
-#ifndef __MACH_SPEAR320_H
-#define __MACH_SPEAR320_H
-
-#define SPEAR320_EMI_CTRL_BASE          UL(0x40000000)
-#define SPEAR320_FSMC_BASE              UL(0x4C000000)
-#define SPEAR320_NAND_BASE              UL(0x50000000)
-#define SPEAR320_I2S_BASE               UL(0x60000000)
-#define SPEAR320_SDHCI_BASE             UL(0x70000000)
-#define SPEAR320_CLCD_BASE              UL(0x90000000)
-#define SPEAR320_PAR_PORT_BASE          UL(0xA0000000)
-#define SPEAR320_CAN0_BASE              UL(0xA1000000)
-#define SPEAR320_CAN1_BASE              UL(0xA2000000)
-#define SPEAR320_UART1_BASE             UL(0xA3000000)
-#define SPEAR320_UART2_BASE             UL(0xA4000000)
-#define SPEAR320_SSP0_BASE              UL(0xA5000000)
-#define SPEAR320_SSP1_BASE              UL(0xA6000000)
-#define SPEAR320_I2C_BASE               UL(0xA7000000)
-#define SPEAR320_PWM_BASE               UL(0xA8000000)
-#define SPEAR320_SMII0_BASE             UL(0xAA000000)
-#define SPEAR320_SMII1_BASE             UL(0xAB000000)
-#define SPEAR320_SOC_CONFIG_BASE        UL(0xB3000000)
-
-/* Interrupt registers offsets and masks */
-#define SPEAR320_INT_STS_MASK_REG               0x04
-#define SPEAR320_INT_CLR_MASK_REG               0x04
-#define SPEAR320_INT_ENB_MASK_REG               0x08
-#define SPEAR320_GPIO_IRQ_MASK                  (1 << 0)
-#define SPEAR320_I2S_PLAY_IRQ_MASK              (1 << 1)
-#define SPEAR320_I2S_REC_IRQ_MASK               (1 << 2)
-#define SPEAR320_EMI_IRQ_MASK                   (1 << 7)
-#define SPEAR320_CLCD_IRQ_MASK                  (1 << 8)
-#define SPEAR320_SPP_IRQ_MASK                   (1 << 9)
-#define SPEAR320_SDHCI_IRQ_MASK                 (1 << 10)
-#define SPEAR320_CAN_U_IRQ_MASK                 (1 << 11)
-#define SPEAR320_CAN_L_IRQ_MASK                 (1 << 12)
-#define SPEAR320_UART1_IRQ_MASK                 (1 << 13)
-#define SPEAR320_UART2_IRQ_MASK                 (1 << 14)
-#define SPEAR320_SSP1_IRQ_MASK                  (1 << 15)
-#define SPEAR320_SSP2_IRQ_MASK                  (1 << 16)
-#define SPEAR320_SMII0_IRQ_MASK                 (1 << 17)
-#define SPEAR320_MII1_SMII1_IRQ_MASK            (1 << 18)
-#define SPEAR320_WAKEUP_SMII0_IRQ_MASK          (1 << 19)
-#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK     (1 << 20)
-#define SPEAR320_I2C1_IRQ_MASK                  (1 << 21)
-
-#define SPEAR320_SHIRQ_RAS1_MASK                0x000380
-#define SPEAR320_SHIRQ_RAS3_MASK                0x000007
-#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK        0x3FF800
-
-#endif /* __MACH_SPEAR320_H */
-
-#endif /* CONFIG_MACH_SPEAR320 */