diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2012-07-05 04:29:37 -0400 |
---|---|---|
committer | Rafael J. Wysocki <rjw@sisk.pl> | 2012-07-06 14:53:39 -0400 |
commit | 3aa99a3498403d23fe4a0cfa4fcbbedaf7c8134a (patch) | |
tree | 6eb04338464b72197b6b6c957366f73b66eb74c1 /arch/arm/mach-shmobile/pm-sh7372.c | |
parent | c99cc71efdaecf2e32608fba474bb0fd096b49ea (diff) |
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
Now, all sh7372 platforms are switched over to use pm-rmobile base PM domain,
and no one is using original sh7372_pm_domain APIs.
We can remove these, switching has been fully completed.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm/mach-shmobile/pm-sh7372.c')
-rw-r--r-- | arch/arm/mach-shmobile/pm-sh7372.c | 221 |
1 files changed, 0 insertions, 221 deletions
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 3b131c7a79d0..6a23e7c449ea 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c | |||
@@ -42,13 +42,10 @@ | |||
42 | #define PLLC01STPCR 0xe61500c8 | 42 | #define PLLC01STPCR 0xe61500c8 |
43 | 43 | ||
44 | /* SYSC */ | 44 | /* SYSC */ |
45 | #define SPDCR 0xe6180008 | ||
46 | #define SWUCR 0xe6180014 | ||
47 | #define SBAR 0xe6180020 | 45 | #define SBAR 0xe6180020 |
48 | #define WUPRMSK 0xe6180028 | 46 | #define WUPRMSK 0xe6180028 |
49 | #define WUPSMSK 0xe618002c | 47 | #define WUPSMSK 0xe618002c |
50 | #define WUPSMSK2 0xe6180048 | 48 | #define WUPSMSK2 0xe6180048 |
51 | #define PSTR 0xe6180080 | ||
52 | #define WUPSFAC 0xe6180098 | 49 | #define WUPSFAC 0xe6180098 |
53 | #define IRQCR 0xe618022c | 50 | #define IRQCR 0xe618022c |
54 | #define IRQCR2 0xe6180238 | 51 | #define IRQCR2 0xe6180238 |
@@ -72,226 +69,8 @@ | |||
72 | /* AP-System Core */ | 69 | /* AP-System Core */ |
73 | #define APARMBAREA 0xe6f10020 | 70 | #define APARMBAREA 0xe6f10020 |
74 | 71 | ||
75 | #define PSTR_RETRIES 100 | ||
76 | #define PSTR_DELAY_US 10 | ||
77 | |||
78 | #ifdef CONFIG_PM | 72 | #ifdef CONFIG_PM |
79 | 73 | ||
80 | static int pd_power_down(struct generic_pm_domain *genpd) | ||
81 | { | ||
82 | struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd); | ||
83 | unsigned int mask = 1 << sh7372_pd->bit_shift; | ||
84 | |||
85 | if (sh7372_pd->suspend) { | ||
86 | int ret = sh7372_pd->suspend(); | ||
87 | |||
88 | if (ret) | ||
89 | return ret; | ||
90 | } | ||
91 | |||
92 | if (__raw_readl(PSTR) & mask) { | ||
93 | unsigned int retry_count; | ||
94 | |||
95 | __raw_writel(mask, SPDCR); | ||
96 | |||
97 | for (retry_count = PSTR_RETRIES; retry_count; retry_count--) { | ||
98 | if (!(__raw_readl(SPDCR) & mask)) | ||
99 | break; | ||
100 | cpu_relax(); | ||
101 | } | ||
102 | } | ||
103 | |||
104 | if (!sh7372_pd->no_debug) | ||
105 | pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n", | ||
106 | genpd->name, mask, __raw_readl(PSTR)); | ||
107 | |||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume) | ||
112 | { | ||
113 | unsigned int mask = 1 << sh7372_pd->bit_shift; | ||
114 | unsigned int retry_count; | ||
115 | int ret = 0; | ||
116 | |||
117 | if (__raw_readl(PSTR) & mask) | ||
118 | goto out; | ||
119 | |||
120 | __raw_writel(mask, SWUCR); | ||
121 | |||
122 | for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) { | ||
123 | if (!(__raw_readl(SWUCR) & mask)) | ||
124 | break; | ||
125 | if (retry_count > PSTR_RETRIES) | ||
126 | udelay(PSTR_DELAY_US); | ||
127 | else | ||
128 | cpu_relax(); | ||
129 | } | ||
130 | if (!retry_count) | ||
131 | ret = -EIO; | ||
132 | |||
133 | if (!sh7372_pd->no_debug) | ||
134 | pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n", | ||
135 | sh7372_pd->genpd.name, mask, __raw_readl(PSTR)); | ||
136 | |||
137 | out: | ||
138 | if (ret == 0 && sh7372_pd->resume && do_resume) | ||
139 | sh7372_pd->resume(); | ||
140 | |||
141 | return ret; | ||
142 | } | ||
143 | |||
144 | static int pd_power_up(struct generic_pm_domain *genpd) | ||
145 | { | ||
146 | return __pd_power_up(to_sh7372_pd(genpd), true); | ||
147 | } | ||
148 | |||
149 | static int sh7372_a4r_suspend(void) | ||
150 | { | ||
151 | sh7372_intcs_suspend(); | ||
152 | __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */ | ||
153 | return 0; | ||
154 | } | ||
155 | |||
156 | static bool pd_active_wakeup(struct device *dev) | ||
157 | { | ||
158 | bool (*active_wakeup)(struct device *dev); | ||
159 | |||
160 | active_wakeup = dev_gpd_data(dev)->ops.active_wakeup; | ||
161 | return active_wakeup ? active_wakeup(dev) : true; | ||
162 | } | ||
163 | |||
164 | static int sh7372_stop_dev(struct device *dev) | ||
165 | { | ||
166 | int (*stop)(struct device *dev); | ||
167 | |||
168 | stop = dev_gpd_data(dev)->ops.stop; | ||
169 | if (stop) { | ||
170 | int ret = stop(dev); | ||
171 | if (ret) | ||
172 | return ret; | ||
173 | } | ||
174 | return pm_clk_suspend(dev); | ||
175 | } | ||
176 | |||
177 | static int sh7372_start_dev(struct device *dev) | ||
178 | { | ||
179 | int (*start)(struct device *dev); | ||
180 | int ret; | ||
181 | |||
182 | ret = pm_clk_resume(dev); | ||
183 | if (ret) | ||
184 | return ret; | ||
185 | |||
186 | start = dev_gpd_data(dev)->ops.start; | ||
187 | if (start) | ||
188 | ret = start(dev); | ||
189 | |||
190 | return ret; | ||
191 | } | ||
192 | |||
193 | void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd) | ||
194 | { | ||
195 | struct generic_pm_domain *genpd = &sh7372_pd->genpd; | ||
196 | struct dev_power_governor *gov = sh7372_pd->gov; | ||
197 | |||
198 | pm_genpd_init(genpd, gov ? : &simple_qos_governor, false); | ||
199 | genpd->dev_ops.stop = sh7372_stop_dev; | ||
200 | genpd->dev_ops.start = sh7372_start_dev; | ||
201 | genpd->dev_ops.active_wakeup = pd_active_wakeup; | ||
202 | genpd->dev_irq_safe = true; | ||
203 | genpd->power_off = pd_power_down; | ||
204 | genpd->power_on = pd_power_up; | ||
205 | __pd_power_up(sh7372_pd, false); | ||
206 | } | ||
207 | |||
208 | void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, | ||
209 | struct platform_device *pdev) | ||
210 | { | ||
211 | struct device *dev = &pdev->dev; | ||
212 | |||
213 | pm_genpd_add_device(&sh7372_pd->genpd, dev); | ||
214 | if (pm_clk_no_clocks(dev)) | ||
215 | pm_clk_add(dev, NULL); | ||
216 | } | ||
217 | |||
218 | void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, | ||
219 | struct sh7372_pm_domain *sh7372_sd) | ||
220 | { | ||
221 | pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd); | ||
222 | } | ||
223 | |||
224 | struct sh7372_pm_domain sh7372_a4lc = { | ||
225 | .genpd.name = "A4LC", | ||
226 | .bit_shift = 1, | ||
227 | }; | ||
228 | |||
229 | struct sh7372_pm_domain sh7372_a4mp = { | ||
230 | .genpd.name = "A4MP", | ||
231 | .bit_shift = 2, | ||
232 | }; | ||
233 | |||
234 | struct sh7372_pm_domain sh7372_d4 = { | ||
235 | .genpd.name = "D4", | ||
236 | .bit_shift = 3, | ||
237 | }; | ||
238 | |||
239 | struct sh7372_pm_domain sh7372_a4r = { | ||
240 | .genpd.name = "A4R", | ||
241 | .bit_shift = 5, | ||
242 | .suspend = sh7372_a4r_suspend, | ||
243 | .resume = sh7372_intcs_resume, | ||
244 | }; | ||
245 | |||
246 | struct sh7372_pm_domain sh7372_a3rv = { | ||
247 | .genpd.name = "A3RV", | ||
248 | .bit_shift = 6, | ||
249 | }; | ||
250 | |||
251 | struct sh7372_pm_domain sh7372_a3ri = { | ||
252 | .genpd.name = "A3RI", | ||
253 | .bit_shift = 8, | ||
254 | }; | ||
255 | |||
256 | static int sh7372_a4s_suspend(void) | ||
257 | { | ||
258 | /* | ||
259 | * The A4S domain contains the CPU core and therefore it should | ||
260 | * only be turned off if the CPU is in use. | ||
261 | */ | ||
262 | return -EBUSY; | ||
263 | } | ||
264 | |||
265 | struct sh7372_pm_domain sh7372_a4s = { | ||
266 | .genpd.name = "A4S", | ||
267 | .bit_shift = 10, | ||
268 | .gov = &pm_domain_always_on_gov, | ||
269 | .no_debug = true, | ||
270 | .suspend = sh7372_a4s_suspend, | ||
271 | }; | ||
272 | |||
273 | static int sh7372_a3sp_suspend(void) | ||
274 | { | ||
275 | /* | ||
276 | * Serial consoles make use of SCIF hardware located in A3SP, | ||
277 | * keep such power domain on if "no_console_suspend" is set. | ||
278 | */ | ||
279 | return console_suspend_enabled ? 0 : -EBUSY; | ||
280 | } | ||
281 | |||
282 | struct sh7372_pm_domain sh7372_a3sp = { | ||
283 | .genpd.name = "A3SP", | ||
284 | .bit_shift = 11, | ||
285 | .gov = &pm_domain_always_on_gov, | ||
286 | .no_debug = true, | ||
287 | .suspend = sh7372_a3sp_suspend, | ||
288 | }; | ||
289 | |||
290 | struct sh7372_pm_domain sh7372_a3sg = { | ||
291 | .genpd.name = "A3SG", | ||
292 | .bit_shift = 13, | ||
293 | }; | ||
294 | |||
295 | struct rmobile_pm_domain sh7372_pd_a4lc = { | 74 | struct rmobile_pm_domain sh7372_pd_a4lc = { |
296 | .genpd.name = "A4LC", | 75 | .genpd.name = "A4LC", |
297 | .bit_shift = 1, | 76 | .bit_shift = 1, |