diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2013-11-15 18:26:18 -0500 |
---|---|---|
committer | Kevin Hilman <khilman@linaro.org> | 2013-11-21 18:41:00 -0500 |
commit | f99ba47ccc9f47fbf6ae17e5817d14cc8326d1cc (patch) | |
tree | 9ff080adb4826d25ad67e44e4e2631018655f986 /arch/arm/mach-omap2/timer.c | |
parent | 50f6dca69fbb1ef452e16fae31be54a4f2dce16b (diff) |
ARM: OMAP2+: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r-- | arch/arm/mach-omap2/timer.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 3ca81e0ada5e..ec084d158f64 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -379,7 +379,7 @@ static struct clocksource clocksource_gpt = { | |||
379 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 379 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
380 | }; | 380 | }; |
381 | 381 | ||
382 | static u32 notrace dmtimer_read_sched_clock(void) | 382 | static u64 notrace dmtimer_read_sched_clock(void) |
383 | { | 383 | { |
384 | if (clksrc.reserved) | 384 | if (clksrc.reserved) |
385 | return __omap_dm_timer_read_counter(&clksrc, | 385 | return __omap_dm_timer_read_counter(&clksrc, |
@@ -471,7 +471,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, | |||
471 | __omap_dm_timer_load_start(&clksrc, | 471 | __omap_dm_timer_load_start(&clksrc, |
472 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, | 472 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, |
473 | OMAP_TIMER_NONPOSTED); | 473 | OMAP_TIMER_NONPOSTED); |
474 | setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); | 474 | sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate); |
475 | 475 | ||
476 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | 476 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) |
477 | pr_err("Could not register clocksource %s\n", | 477 | pr_err("Could not register clocksource %s\n", |