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authorAlexander Shiyan <shc_work@mail.ru>2016-06-04 03:09:53 -0400
committerArnd Bergmann <arnd@arndb.de>2016-07-06 11:38:52 -0400
commit32981ea5b98682a70fdd27f2246fcd2c4e10126b (patch)
treed97887df295655ba1fb63d2b5812f5bea79e057c /arch/arm/include/debug
parent553228d073444ac49cb24cafdde3e8a3fc56297a (diff)
ARM: clps711x: Reduce static map size
Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce the map to 48k and align the end of the static at VMALLOC_START. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r--arch/arm/include/debug/clps711x.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S
index abe225436686..c17ac5c9e5f3 100644
--- a/arch/arm/include/debug/clps711x.S
+++ b/arch/arm/include/debug/clps711x.S
@@ -9,10 +9,10 @@
9 9
10#ifndef CONFIG_DEBUG_CLPS711X_UART2 10#ifndef CONFIG_DEBUG_CLPS711X_UART2
11#define CLPS711X_UART_PADDR (0x80000000 + 0x0000) 11#define CLPS711X_UART_PADDR (0x80000000 + 0x0000)
12#define CLPS711X_UART_VADDR (0xfeff0000 + 0x0000) 12#define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000)
13#else 13#else
14#define CLPS711X_UART_PADDR (0x80000000 + 0x1000) 14#define CLPS711X_UART_PADDR (0x80000000 + 0x1000)
15#define CLPS711X_UART_VADDR (0xfeff0000 + 0x1000) 15#define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000)
16#endif 16#endif
17 17
18#define SYSFLG (0x0140) 18#define SYSFLG (0x0140)