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authorNishanth Menon <nm@ti.com>2016-09-02 13:14:44 -0400
committerTony Lindgren <tony@atomide.com>2016-09-13 19:14:19 -0400
commitd20f997b4d1f3fc41703c95e4f4bb4ebca90da42 (patch)
tree02508fb2effd0451b67639d34748df96601a8475 /arch/arm/boot
parente7ee0bc6ae1eb6b3db3c81956e7123ef9a28cd35 (diff)
ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO isolation as part of initial bootloader executed from SRAM. This is done as part of iodelay configuration sequence and is required due to the limitations introduced by erratum ID: i869[1] (IO Glitches can occur when changing IO settings) and elaborated in the Technical Reference Manual[2] 18.4.6.1.7 Isolation Requirements. Only peripheral that is permitted for dynamic pin mux configuration is MMC and DCAN. MMC is permitted to change to accommodate the requirements for varied speeds (which require IO-delay support in kernel as well). DCAN is a result of i893[1] (DCAN initialization sequence). However, since we don't use DCAN on X15, with the exception of MMC, all other pin mux configurations are removed from the dts. [1] http://www.ti.com/lit/pdf/sprz429 [2] http://www.ti.com/lit/pdf/sprui30 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts222
1 files changed, 1 insertions, 221 deletions
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 9067ca092dc5..ef21da558ea3 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -59,8 +59,6 @@
59 59
60 leds { 60 leds {
61 compatible = "gpio-leds"; 61 compatible = "gpio-leds";
62 pinctrl-names = "default";
63 pinctrl-0 = <&leds_pins_default>;
64 62
65 led0 { 63 led0 {
66 label = "beagle-x15:usr0"; 64 label = "beagle-x15:usr0";
@@ -116,9 +114,6 @@
116 tpd12s015: encoder { 114 tpd12s015: encoder {
117 compatible = "ti,tpd12s015"; 115 compatible = "ti,tpd12s015";
118 116
119 pinctrl-names = "default";
120 pinctrl-0 = <&tpd12s015_pins>;
121
122 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ 117 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
123 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */ 118 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
124 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ 119 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
@@ -173,43 +168,6 @@
173}; 168};
174 169
175&dra7_pmx_core { 170&dra7_pmx_core {
176 leds_pins_default: leds_pins_default {
177 pinctrl-single,pins = <
178 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
179 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
180 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
181 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
182 >;
183 };
184
185 i2c1_pins_default: i2c1_pins_default {
186 pinctrl-single,pins = <
187 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
188 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
189 >;
190 };
191
192 hdmi_pins: pinmux_hdmi_pins {
193 pinctrl-single,pins = <
194 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
195 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
196 >;
197 };
198
199 i2c3_pins_default: i2c3_pins_default {
200 pinctrl-single,pins = <
201 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
202 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
203 >;
204 };
205
206 uart3_pins_default: uart3_pins_default {
207 pinctrl-single,pins = <
208 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
209 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
210 >;
211 };
212
213 mmc1_pins_default: mmc1_pins_default { 171 mmc1_pins_default: mmc1_pins_default {
214 pinctrl-single,pins = < 172 pinctrl-single,pins = <
215 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ 173 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
@@ -236,154 +194,9 @@
236 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 194 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
237 >; 195 >;
238 }; 196 };
239
240 cpsw_pins_default: cpsw_pins_default {
241 pinctrl-single,pins = <
242 /* Slave 1 */
243 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
244 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
245 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
246 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
247 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
248 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
249 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
250 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
251 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
252 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
253 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
254 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
255
256 /* Slave 2 */
257 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
258 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
259 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
260 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
261 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
262 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
263 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
264 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
265 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
266 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
267 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
268 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
269 >;
270
271 };
272
273 cpsw_pins_sleep: cpsw_pins_sleep {
274 pinctrl-single,pins = <
275 /* Slave 1 */
276 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
277 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
278 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
279 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
280 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
281 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
282 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
283 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
284 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
285 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
286 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
287 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
288
289 /* Slave 2 */
290 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
291 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
292 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
293 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
294 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
295 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
296 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
297 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
298 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
299 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
300 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
301 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
302 >;
303 };
304
305 davinci_mdio_pins_default: davinci_mdio_pins_default {
306 pinctrl-single,pins = <
307 /* MDIO */
308 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
309 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
310 >;
311 };
312
313 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
314 pinctrl-single,pins = <
315 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
316 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
317 >;
318 };
319
320 tps659038_pins_default: tps659038_pins_default {
321 pinctrl-single,pins = <
322 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
323 >;
324 };
325
326 tmp102_pins_default: tmp102_pins_default {
327 pinctrl-single,pins = <
328 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
329 >;
330 };
331
332 mcp79410_pins_default: mcp79410_pins_default {
333 pinctrl-single,pins = <
334 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
335 >;
336 };
337
338 usb1_pins: pinmux_usb1_pins {
339 pinctrl-single,pins = <
340 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
341 >;
342 };
343
344 tpd12s015_pins: pinmux_tpd12s015_pins {
345 pinctrl-single,pins = <
346 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
347 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
348 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
349 >;
350 };
351
352 clkout2_pins_default: clkout2_pins_default {
353 pinctrl-single,pins = <
354 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
355 >;
356 };
357
358 clkout2_pins_sleep: clkout2_pins_sleep {
359 pinctrl-single,pins = <
360 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
361 >;
362 };
363
364 mcasp3_pins_default: mcasp3_pins_default {
365 pinctrl-single,pins = <
366 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
367 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
368 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
369 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
370 >;
371 };
372
373 mcasp3_pins_sleep: mcasp3_pins_sleep {
374 pinctrl-single,pins = <
375 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
376 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
377 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
378 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
379 >;
380 };
381}; 197};
382
383&i2c1 { 198&i2c1 {
384 status = "okay"; 199 status = "okay";
385 pinctrl-names = "default";
386 pinctrl-0 = <&i2c1_pins_default>;
387 clock-frequency = <400000>; 200 clock-frequency = <400000>;
388 201
389 tps659038: tps659038@58 { 202 tps659038: tps659038@58 {
@@ -392,9 +205,6 @@
392 interrupt-parent = <&gpio1>; 205 interrupt-parent = <&gpio1>;
393 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 206 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
394 207
395 pinctrl-names = "default";
396 pinctrl-0 = <&tps659038_pins_default>;
397
398 #interrupt-cells = <2>; 208 #interrupt-cells = <2>;
399 interrupt-controller; 209 interrupt-controller;
400 210
@@ -556,8 +366,6 @@
556 tmp102: tmp102@48 { 366 tmp102: tmp102@48 {
557 compatible = "ti,tmp102"; 367 compatible = "ti,tmp102";
558 reg = <0x48>; 368 reg = <0x48>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&tmp102_pins_default>;
561 interrupt-parent = <&gpio7>; 369 interrupt-parent = <&gpio7>;
562 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 370 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
563 #thermal-sensor-cells = <1>; 371 #thermal-sensor-cells = <1>;
@@ -567,9 +375,6 @@
567 #sound-dai-cells = <0>; 375 #sound-dai-cells = <0>;
568 compatible = "ti,tlv320aic3104"; 376 compatible = "ti,tlv320aic3104";
569 reg = <0x18>; 377 reg = <0x18>;
570 pinctrl-names = "default", "sleep";
571 pinctrl-0 = <&clkout2_pins_default>;
572 pinctrl-1 = <&clkout2_pins_sleep>;
573 assigned-clocks = <&clkoutmux2_clk_mux>; 378 assigned-clocks = <&clkoutmux2_clk_mux>;
574 assigned-clock-parents = <&sys_clk2_dclk_div>; 379 assigned-clock-parents = <&sys_clk2_dclk_div>;
575 380
@@ -590,8 +395,6 @@
590 395
591&i2c3 { 396&i2c3 {
592 status = "okay"; 397 status = "okay";
593 pinctrl-names = "default";
594 pinctrl-0 = <&i2c3_pins_default>;
595 clock-frequency = <400000>; 398 clock-frequency = <400000>;
596 399
597 mcp_rtc: rtc@6f { 400 mcp_rtc: rtc@6f {
@@ -601,9 +404,6 @@
601 <&dra7_pmx_core 0x424>; 404 <&dra7_pmx_core 0x424>;
602 interrupt-names = "irq", "wakeup"; 405 interrupt-names = "irq", "wakeup";
603 406
604 pinctrl-names = "default";
605 pinctrl-0 = <&mcp79410_pins_default>;
606
607 vcc-supply = <&vdd_3v3>; 407 vcc-supply = <&vdd_3v3>;
608 wakeup-source; 408 wakeup-source;
609 }; 409 };
@@ -623,16 +423,10 @@
623 status = "okay"; 423 status = "okay";
624 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 424 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
625 <&dra7_pmx_core 0x3f8>; 425 <&dra7_pmx_core 0x3f8>;
626
627 pinctrl-names = "default";
628 pinctrl-0 = <&uart3_pins_default>;
629}; 426};
630 427
631&mac { 428&mac {
632 status = "okay"; 429 status = "okay";
633 pinctrl-names = "default", "sleep";
634 pinctrl-0 = <&cpsw_pins_default>;
635 pinctrl-1 = <&cpsw_pins_sleep>;
636 dual_emac; 430 dual_emac;
637}; 431};
638 432
@@ -648,12 +442,6 @@
648 dual_emac_res_vlan = <2>; 442 dual_emac_res_vlan = <2>;
649}; 443};
650 444
651&davinci_mdio {
652 pinctrl-names = "default", "sleep";
653 pinctrl-0 = <&davinci_mdio_pins_default>;
654 pinctrl-1 = <&davinci_mdio_pins_sleep>;
655};
656
657&mmc1 { 445&mmc1 {
658 status = "okay"; 446 status = "okay";
659 447
@@ -669,7 +457,7 @@
669 status = "okay"; 457 status = "okay";
670 458
671 pinctrl-names = "default"; 459 pinctrl-names = "default";
672 pinctrl-0 = <&mmc2_pins_default>; 460 pinctrl-0 = <&mmc1_pins_default>;
673 461
674 vmmc-supply = <&vdd_3v3>; 462 vmmc-supply = <&vdd_3v3>;
675 bus-width = <8>; 463 bus-width = <8>;
@@ -691,8 +479,6 @@
691 479
692&usb1 { 480&usb1 {
693 dr_mode = "host"; 481 dr_mode = "host";
694 pinctrl-names = "default";
695 pinctrl-0 = <&usb1_pins>;
696}; 482};
697 483
698&omap_dwc3_2 { 484&omap_dwc3_2 {
@@ -768,9 +554,6 @@
768 status = "ok"; 554 status = "ok";
769 vdda-supply = <&ldo4_reg>; 555 vdda-supply = <&ldo4_reg>;
770 556
771 pinctrl-names = "default";
772 pinctrl-0 = <&hdmi_pins>;
773
774 port { 557 port {
775 hdmi_out: endpoint { 558 hdmi_out: endpoint {
776 remote-endpoint = <&tpd12s015_in>; 559 remote-endpoint = <&tpd12s015_in>;
@@ -784,9 +567,6 @@
784 567
785&mcasp3 { 568&mcasp3 {
786 #sound-dai-cells = <0>; 569 #sound-dai-cells = <0>;
787 pinctrl-names = "default", "sleep";
788 pinctrl-0 = <&mcasp3_pins_default>;
789 pinctrl-1 = <&mcasp3_pins_sleep>;
790 assigned-clocks = <&mcasp3_ahclkx_mux>; 570 assigned-clocks = <&mcasp3_ahclkx_mux>;
791 assigned-clock-parents = <&sys_clkin2>; 571 assigned-clock-parents = <&sys_clkin2>;
792 status = "okay"; 572 status = "okay";
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-31 17:44:27 -0400