Merge tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull first batch of ARC changes from Vineet Gupta:
 "There's a second bunch to follow next week - which depends on commits
  on other trees (irq/net).  I'd have preferred the accompanying ARC
  change via respective trees, but it didn't workout somehow.

  Highlights of changes:

   - Continuation of ARC MM changes from 3.10 including

       zero page optimization
       Setting pagecache pages dirty by default
       Non executable stack by default
       Reducing dcache flushes for aliasing VIPT config

   - Long overdue rework of pt_regs machinery - removing the unused word
     gutters and adding ECR register to baseline (helps cleanup lot of
     low level code)

   - Support for ARC gcc 4.8

   - Few other preventive fixes, cosmetics, usage of Kconfig helper..

  The diffstat is larger than normal primarily because of arcregs.h
  header split as well as beautification of macros in entry.h"

* tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (32 commits)
  ARC: warn on improper stack unwind FDE entries
  arc: delete __cpuinit usage from all arc files
  ARC: [tlb-miss] Fix bug with CONFIG_ARC_DBG_TLB_MISS_COUNT
  ARC: [tlb-miss] Extraneous PTE bit testing/setting
  ARC: Adjustments for gcc 4.8
  ARC: Setup Vector Table Base in early boot
  ARC: Remove explicit passing around of ECR
  ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth values
  ARC: stop using pt_regs->orig_r8
  ARC: pt_regs update #4: r25 saved/restored unconditionally
  ARC: K/U SP saved from one location in stack switching macro
  ARC: Entry Handler tweaks: Simplify branch for in-kernel preemption
  ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR values
  ARC: Increase readability of entry handlers
  ARC: pt_regs update #3: Remove unused gutter at start of callee_regs
  ARC: pt_regs update #2: Remove unused gutter at start of pt_regs
  ARC: pt_regs update #1: Align pt_regs end with end of kernel stack page
  ARC: pt_regs update #0: remove kernel stack canary
  ARC: [mm] Remove @write argument to do_page_fault()
  ARC: [mm] Make stack/heap Non-executable by default
  ...

20 files changed, 363 insertions, 592 deletions

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 1b907c465666..355cb470c2a4 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -20,7 +20,6 @@
 #define ARC_REG_PERIBASE_BCR    0x69
 #define ARC_REG_FP_BCR          0x6B    /* Single-Precision FPU */
 #define ARC_REG_DPFP_BCR        0x6C    /* Dbl Precision FPU */
-#define ARC_REG_MMU_BCR         0x6f
 #define ARC_REG_DCCM_BCR        0x74    /* DCCM Present + SZ */
 #define ARC_REG_TIMERS_BCR      0x75
 #define ARC_REG_ICCM_BCR        0x78
@@ -34,22 +33,12 @@
 #define ARC_REG_D_UNCACH_BCR    0x6A
 
 /* status32 Bits Positions */
-#define STATUS_H_BIT            0       /* CPU Halted */
-#define STATUS_E1_BIT           1       /* Int 1 enable */
-#define STATUS_E2_BIT           2       /* Int 2 enable */
-#define STATUS_A1_BIT           3       /* Int 1 active */
-#define STATUS_A2_BIT           4       /* Int 2 active */
 #define STATUS_AE_BIT           5       /* Exception active */
 #define STATUS_DE_BIT           6       /* PC is in delay slot */
 #define STATUS_U_BIT            7       /* User/Kernel mode */
 #define STATUS_L_BIT            12      /* Loop inhibit */
 
 /* These masks correspond to the status word(STATUS_32) bits */
-#define STATUS_H_MASK           (1<<STATUS_H_BIT)
-#define STATUS_E1_MASK          (1<<STATUS_E1_BIT)
-#define STATUS_E2_MASK          (1<<STATUS_E2_BIT)
-#define STATUS_A1_MASK          (1<<STATUS_A1_BIT)
-#define STATUS_A2_MASK          (1<<STATUS_A2_BIT)
 #define STATUS_AE_MASK          (1<<STATUS_AE_BIT)
 #define STATUS_DE_MASK          (1<<STATUS_DE_BIT)
 #define STATUS_U_MASK           (1<<STATUS_U_BIT)
@@ -71,6 +60,7 @@
 #define ECR_V_ITLB_MISS                 0x21
 #define ECR_V_DTLB_MISS                 0x22
 #define ECR_V_PROTV                     0x23
+#define ECR_V_TRAP                      0x25
 
 /* Protection Violation Exception Cause Code Values */
 #define ECR_C_PROTV_INST_FETCH          0x00
@@ -79,94 +69,23 @@
 #define ECR_C_PROTV_XCHG                0x03
 #define ECR_C_PROTV_MISALIG_DATA        0x04
 
+#define ECR_C_BIT_PROTV_MISALIG_DATA    10
+
+/* Machine Check Cause Code Values */
+#define ECR_C_MCHK_DUP_TLB              0x01
+
 /* DTLB Miss Exception Cause Code Values */
 #define ECR_C_BIT_DTLB_LD_MISS          8
 #define ECR_C_BIT_DTLB_ST_MISS          9
 
+/* Dummy ECR values for Interrupts */
+#define event_IRQ1              0x0031abcd
+#define event_IRQ2              0x0032abcd
 
 /* Auxiliary registers */
 #define AUX_IDENTITY            4
 #define AUX_INTR_VEC_BASE       0x25
-#define AUX_IRQ_LEV             0x200   /* IRQ Priority: L1 or L2 */
-#define AUX_IRQ_HINT            0x201   /* For generating Soft Interrupts */
-#define AUX_IRQ_LV12            0x43    /* interrupt level register */
-
-#define AUX_IENABLE             0x40c
-#define AUX_ITRIGGER            0x40d
-#define AUX_IPULSE              0x415
-
-/* Timer related Aux registers */
-#define ARC_REG_TIMER0_LIMIT    0x23    /* timer 0 limit */
-#define ARC_REG_TIMER0_CTRL     0x22    /* timer 0 control */
-#define ARC_REG_TIMER0_CNT      0x21    /* timer 0 count */
-#define ARC_REG_TIMER1_LIMIT    0x102   /* timer 1 limit */
-#define ARC_REG_TIMER1_CTRL     0x101   /* timer 1 control */
-#define ARC_REG_TIMER1_CNT      0x100   /* timer 1 count */
-
-#define TIMER_CTRL_IE           (1 << 0) /* Interupt when Count reachs limit */
-#define TIMER_CTRL_NH           (1 << 1) /* Count only when CPU NOT halted */
-
-/* MMU Management regs */
-#define ARC_REG_TLBPD0          0x405
-#define ARC_REG_TLBPD1          0x406
-#define ARC_REG_TLBINDEX        0x407
-#define ARC_REG_TLBCOMMAND      0x408
-#define ARC_REG_PID             0x409
-#define ARC_REG_SCRATCH_DATA0   0x418
-
-/* Bits in MMU PID register */
-#define MMU_ENABLE              (1 << 31)       /* Enable MMU for process */
-
-/* Error code if probe fails */
-#define TLB_LKUP_ERR            0x80000000
-
-/* TLB Commands */
-#define TLBWrite    0x1
-#define TLBRead     0x2
-#define TLBGetIndex 0x3
-#define TLBProbe    0x4
-
-#if (CONFIG_ARC_MMU_VER >= 2)
-#define TLBWriteNI  0x5         /* write JTLB without inv uTLBs */
-#define TLBIVUTLB   0x6         /* explicitly inv uTLBs */
-#else
-#undef TLBWriteNI               /* These cmds don't exist on older MMU */
-#undef TLBIVUTLB
-#endif
 
-/* Instruction cache related Auxiliary registers */
-#define ARC_REG_IC_BCR          0x77    /* Build Config reg */
-#define ARC_REG_IC_IVIC         0x10
-#define ARC_REG_IC_CTRL         0x11
-#define ARC_REG_IC_IVIL         0x19
-#if (CONFIG_ARC_MMU_VER > 2)
-#define ARC_REG_IC_PTAG         0x1E
-#endif
-
-/* Bit val in IC_CTRL */
-#define IC_CTRL_CACHE_DISABLE   0x1
-
-/* Data cache related Auxiliary registers */
-#define ARC_REG_DC_BCR          0x72
-#define ARC_REG_DC_IVDC         0x47
-#define ARC_REG_DC_CTRL         0x48
-#define ARC_REG_DC_IVDL         0x4A
-#define ARC_REG_DC_FLSH         0x4B
-#define ARC_REG_DC_FLDL         0x4C
-#if (CONFIG_ARC_MMU_VER > 2)
-#define ARC_REG_DC_PTAG         0x5C
-#endif
-
-/* Bit val in DC_CTRL */
-#define DC_CTRL_INV_MODE_FLUSH  0x40
-#define DC_CTRL_FLUSH_STATUS    0x100
-
-/* MMU Management regs */
-#define ARC_REG_PID             0x409
-#define ARC_REG_SCRATCH_DATA0   0x418
-
-/* Bits in MMU PID register */
-#define MMU_ENABLE              (1 << 31)       /* Enable MMU for process */
 
 /*
  * Floating Pt Registers
@@ -293,24 +212,6 @@ struct bcr_identity {
 #endif
 };
 
-struct bcr_mmu_1_2 {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-        unsigned int ver:8, ways:4, sets:4, u_itlb:8, u_dtlb:8;
-#else
-        unsigned int u_dtlb:8, u_itlb:8, sets:4, ways:4, ver:8;
-#endif
-};
-
-struct bcr_mmu_3 {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-        unsigned int ver:8, ways:4, sets:4, osm:1, reserv:3, pg_sz:4,
-                     u_itlb:4, u_dtlb:4;
-#else
-        unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, reserv:3, osm:1, sets:4,
-                     ways:4, ver:8;
-#endif
-};
-
 #define EXTN_SWAP_VALID     0x1
 #define EXTN_NORM_VALID     0x2
 #define EXTN_MINMAX_VALID   0x2
@@ -343,14 +244,6 @@ struct bcr_extn_xymem {
 #endif
 };
 
-struct bcr_cache {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-        unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
-#else
-        unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
-#endif
-};
-
 struct bcr_perip {
 #ifdef CONFIG_CPU_BIG_ENDIAN
         unsigned int start:8, pad2:8, sz:8, pad:8;
@@ -403,7 +296,7 @@ struct cpuinfo_arc_mmu {
 };
 
 struct cpuinfo_arc_cache {
-        unsigned int has_aliasing, sz, line_len, assoc, ver;
+        unsigned int sz, line_len, assoc, ver;
 };
 
 struct cpuinfo_arc_ccm {
diff --git a/arch/arc/include/asm/bug.h b/arch/arc/include/asm/bug.h
index 2ad8f9b1c54b..5b18e94c6678 100644
--- a/arch/arc/include/asm/bug.h
+++ b/arch/arc/include/asm/bug.h
@@ -18,9 +18,8 @@ struct task_struct;
 void show_regs(struct pt_regs *regs);
 void show_stacktrace(struct task_struct *tsk, struct pt_regs *regs);
 void show_kernel_fault_diag(const char *str, struct pt_regs *regs,
-                            unsigned long address, unsigned long cause_reg);
-void die(const char *str, struct pt_regs *regs, unsigned long address,
-         unsigned long cause_reg);
+                            unsigned long address);
+void die(const char *str, struct pt_regs *regs, unsigned long address);
 
 #define BUG()   do {                            \
         dump_stack();                                   \
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index d5555fe4742a..5802849a6cae 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -18,21 +18,19 @@
 
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
 
-#define ARC_ICACHE_WAYS 2
-#define ARC_DCACHE_WAYS 4
-
-/* Helpers */
+/* For a rare case where customers have differently config I/D */
 #define ARC_ICACHE_LINE_LEN     L1_CACHE_BYTES
 #define ARC_DCACHE_LINE_LEN     L1_CACHE_BYTES
 
 #define ICACHE_LINE_MASK        (~(ARC_ICACHE_LINE_LEN - 1))
 #define DCACHE_LINE_MASK        (~(ARC_DCACHE_LINE_LEN - 1))
 
-#if ARC_ICACHE_LINE_LEN != ARC_DCACHE_LINE_LEN
-#error "Need to fix some code as I/D cache lines not same"
-#else
-#define is_not_cache_aligned(p) ((unsigned long)p & (~DCACHE_LINE_MASK))
-#endif
+/*
+ * ARC700 doesn't cache any access in top 256M.
+ * Ideal for wiring memory mapped peripherals as we don't need to do
+ * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
+ */
+#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
 
 #ifndef __ASSEMBLY__
 
@@ -57,16 +55,10 @@
 
 #define ARCH_DMA_MINALIGN      L1_CACHE_BYTES
 
-/*
- * ARC700 doesn't cache any access in top 256M.
- * Ideal for wiring memory mapped peripherals as we don't need to do
- * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
- */
-#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
-
 extern void arc_cache_init(void);
 extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
 extern void __init read_decode_cache_bcr(void);
-#endif
+
+#endif  /* !__ASSEMBLY__ */
 
 #endif /* _ASM_CACHE_H */
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index ef62682e8d95..6abc4972bc93 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -81,16 +81,19 @@ void flush_anon_page(struct vm_area_struct *vma,
 #endif  /* CONFIG_ARC_CACHE_VIPT_ALIASING */
 
 /*
+ * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
+ * This works around some PIO based drivers which don't call flush_dcache_page
+ * to record that they dirtied the dcache
+ */
+#define PG_dc_clean     PG_arch_1
+
+/*
  * Simple wrapper over config option
  * Bootup code ensures that hardware matches kernel configuration
  */
 static inline int cache_is_vipt_aliasing(void)
 {
-#ifdef CONFIG_ARC_CACHE_VIPT_ALIASING
-        return 1;
-#else
-        return 0;
-#endif
+        return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);
 }
 
 #define CACHE_COLOR(addr)       (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1)
diff --git a/arch/arc/include/asm/defines.h b/arch/arc/include/asm/defines.h
deleted file mode 100644
index 6097bb439cc5..000000000000
--- a/arch/arc/include/asm/defines.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARC_ASM_DEFINES_H__
-#define __ARC_ASM_DEFINES_H__
-
-#if defined(CONFIG_ARC_MMU_V1)
-#define CONFIG_ARC_MMU_VER 1
-#elif defined(CONFIG_ARC_MMU_V2)
-#define CONFIG_ARC_MMU_VER 2
-#elif defined(CONFIG_ARC_MMU_V3)
-#define CONFIG_ARC_MMU_VER 3
-#endif
-
-#ifdef CONFIG_ARC_HAS_LLSC
-#define __CONFIG_ARC_HAS_LLSC_VAL 1
-#else
-#define __CONFIG_ARC_HAS_LLSC_VAL 0
-#endif
-
-#ifdef CONFIG_ARC_HAS_SWAPE
-#define __CONFIG_ARC_HAS_SWAPE_VAL 1
-#else
-#define __CONFIG_ARC_HAS_SWAPE_VAL 0
-#endif
-
-#ifdef CONFIG_ARC_HAS_RTSC
-#define __CONFIG_ARC_HAS_RTSC_VAL 1
-#else
-#define __CONFIG_ARC_HAS_RTSC_VAL 0
-#endif
-
-#ifdef CONFIG_ARC_MMU_SASID
-#define __CONFIG_ARC_MMU_SASID_VAL 1
-#else
-#define __CONFIG_ARC_MMU_SASID_VAL 0
-#endif
-
-#ifdef CONFIG_ARC_HAS_ICACHE
-#define __CONFIG_ARC_HAS_ICACHE 1
-#else
-#define __CONFIG_ARC_HAS_ICACHE 0
-#endif
-
-#ifdef CONFIG_ARC_HAS_DCACHE
-#define __CONFIG_ARC_HAS_DCACHE 1
-#else
-#define __CONFIG_ARC_HAS_DCACHE 0
-#endif
-
-#endif /* __ARC_ASM_DEFINES_H__ */
diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h
index eb2ae53187d9..8943c028d4bb 100644
--- a/arch/arc/include/asm/entry.h
+++ b/arch/arc/include/asm/entry.h
@@ -50,194 +50,177 @@
  *      Eff Addr for load = [reg2]
  */
 
+.macro PUSH reg
+        st.a    \reg, [sp, -4]
+.endm
+
+.macro PUSHAX aux
+        lr      r9, [\aux]
+        PUSH    r9
+.endm
+
+.macro POP reg
+        ld.ab   \reg, [sp, 4]
+.endm
+
+.macro POPAX aux
+        POP     r9
+        sr      r9, [\aux]
+.endm
+
 /*--------------------------------------------------------------
- * Save caller saved registers (scratch registers) ( r0 - r12 )
- * Registers are pushed / popped in the order defined in struct ptregs
- * in asm/ptrace.h
+ * Helpers to save/restore Scratch Regs:
+ * used by Interrupt/Exception Prologue/Epilogue
  *-------------------------------------------------------------*/
-.macro  SAVE_CALLER_SAVED
-        st.a    r0, [sp, -4]
-        st.a    r1, [sp, -4]
-        st.a    r2, [sp, -4]
-        st.a    r3, [sp, -4]
-        st.a    r4, [sp, -4]
-        st.a    r5, [sp, -4]
-        st.a    r6, [sp, -4]
-        st.a    r7, [sp, -4]
-        st.a    r8, [sp, -4]
-        st.a    r9, [sp, -4]
-        st.a    r10, [sp, -4]
-        st.a    r11, [sp, -4]
-        st.a    r12, [sp, -4]
+.macro  SAVE_R0_TO_R12
+        PUSH    r0
+        PUSH    r1
+        PUSH    r2
+        PUSH    r3
+        PUSH    r4
+        PUSH    r5
+        PUSH    r6
+        PUSH    r7
+        PUSH    r8
+        PUSH    r9
+        PUSH    r10
+        PUSH    r11
+        PUSH    r12
+.endm
+
+.macro RESTORE_R12_TO_R0
+        POP     r12
+        POP     r11
+        POP     r10
+        POP     r9
+        POP     r8
+        POP     r7
+        POP     r6
+        POP     r5
+        POP     r4
+        POP     r3
+        POP     r2
+        POP     r1
+        POP     r0
+
+#ifdef CONFIG_ARC_CURR_IN_REG
+        ld      r25, [sp, 12]
+#endif
 .endm
 
 /*--------------------------------------------------------------
- * Restore caller saved registers (scratch registers)
+ * Helpers to save/restore callee-saved regs:
+ * used by several macros below
  *-------------------------------------------------------------*/
-.macro RESTORE_CALLER_SAVED
-        ld.ab   r12, [sp, 4]
-        ld.ab   r11, [sp, 4]
-        ld.ab   r10, [sp, 4]
-        ld.ab   r9, [sp, 4]
-        ld.ab   r8, [sp, 4]
-        ld.ab   r7, [sp, 4]
-        ld.ab   r6, [sp, 4]
-        ld.ab   r5, [sp, 4]
-        ld.ab   r4, [sp, 4]
-        ld.ab   r3, [sp, 4]
-        ld.ab   r2, [sp, 4]
-        ld.ab   r1, [sp, 4]
-        ld.ab   r0, [sp, 4]
+.macro SAVE_R13_TO_R24
+        PUSH    r13
+        PUSH    r14
+        PUSH    r15
+        PUSH    r16
+        PUSH    r17
+        PUSH    r18
+        PUSH    r19
+        PUSH    r20
+        PUSH    r21
+        PUSH    r22
+        PUSH    r23
+        PUSH    r24
+.endm
+
+.macro RESTORE_R24_TO_R13
+        POP     r24
+        POP     r23
+        POP     r22
+        POP     r21
+        POP     r20
+        POP     r19
+        POP     r18
+        POP     r17
+        POP     r16
+        POP     r15
+        POP     r14
+        POP     r13
 .endm
 
+#define OFF_USER_R25_FROM_R24   (SZ_CALLEE_REGS + SZ_PT_REGS - 8)/4
 
 /*--------------------------------------------------------------
- * Save callee saved registers (non scratch registers) ( r13 - r25 )
- *  on kernel stack.
- * User mode callee regs need to be saved in case of
- *    -fork and friends for replicating from parent to child
- *    -before going into do_signal( ) for ptrace/core-dump
- * Special case handling is required for r25 in case it is used by kernel
- *  for caching task ptr. Low level exception/ISR save user mode r25
- *  into task->thread.user_r25. So it needs to be retrieved from there and
- *  saved into kernel stack with rest of callee reg-file
+ * Collect User Mode callee regs as struct callee_regs - needed by
+ * fork/do_signal/unaligned-access-emulation.
+ * (By default only scratch regs are saved on entry to kernel)
+ *
+ * Special handling for r25 if used for caching Task Pointer.
+ * It would have been saved in task->thread.user_r25 already, but to keep
+ * the interface same it is copied into regular r25 placeholder in
+ * struct callee_regs.
  *-------------------------------------------------------------*/
 .macro SAVE_CALLEE_SAVED_USER
-        st.a    r13, [sp, -4]
-        st.a    r14, [sp, -4]
-        st.a    r15, [sp, -4]
-        st.a    r16, [sp, -4]
-        st.a    r17, [sp, -4]
-        st.a    r18, [sp, -4]
-        st.a    r19, [sp, -4]
-        st.a    r20, [sp, -4]
-        st.a    r21, [sp, -4]
-        st.a    r22, [sp, -4]
-        st.a    r23, [sp, -4]
-        st.a    r24, [sp, -4]
+
+        SAVE_R13_TO_R24
 
 #ifdef CONFIG_ARC_CURR_IN_REG
         ; Retrieve orig r25 and save it on stack
-        ld      r12, [r25, TASK_THREAD + THREAD_USER_R25]
+        ld.as   r12, [sp, OFF_USER_R25_FROM_R24]
         st.a    r12, [sp, -4]
 #else
-        st.a    r25, [sp, -4]
+        PUSH    r25
 #endif
 
-        /* move up by 1 word to "create" callee_regs->"stack_place_holder" */
-        sub sp, sp, 4
 .endm
 
 /*--------------------------------------------------------------
- * Save callee saved registers (non scratch registers) ( r13 - r25 )
- * kernel mode callee regs needed to be saved in case of context switch
- * If r25 is used for caching task pointer then that need not be saved
- * as it can be re-created from current task global
+ * Save kernel Mode callee regs at the time of Contect Switch.
+ *
+ * Special handling for r25 if used for caching Task Pointer.
+ * Kernel simply skips saving it since it will be loaded with
+ * incoming task pointer anyways
  *-------------------------------------------------------------*/
 .macro SAVE_CALLEE_SAVED_KERNEL
-        st.a    r13, [sp, -4]
-        st.a    r14, [sp, -4]
-        st.a    r15, [sp, -4]
-        st.a    r16, [sp, -4]
-        st.a    r17, [sp, -4]
-        st.a    r18, [sp, -4]
-        st.a    r19, [sp, -4]
-        st.a    r20, [sp, -4]
-        st.a    r21, [sp, -4]
-        st.a    r22, [sp, -4]
-        st.a    r23, [sp, -4]
-        st.a    r24, [sp, -4]
+
+        SAVE_R13_TO_R24
+
 #ifdef CONFIG_ARC_CURR_IN_REG
-        sub     sp, sp, 8
-#else
-        st.a    r25, [sp, -4]
         sub     sp, sp, 4
+#else
+        PUSH    r25
 #endif
 .endm
 
 /*--------------------------------------------------------------
- * RESTORE_CALLEE_SAVED_KERNEL:
- * Loads callee (non scratch) Reg File by popping from Kernel mode stack.
- *  This is reverse of SAVE_CALLEE_SAVED,
- *
- * NOTE:
- * Ideally this shd only be called in switch_to for loading
- *  switched-IN task's CALLEE Reg File.
- *  For all other cases RESTORE_CALLEE_SAVED_FAST must be used
- *  which simply pops the stack w/o touching regs.
+ * Opposite of SAVE_CALLEE_SAVED_KERNEL
  *-------------------------------------------------------------*/
 .macro RESTORE_CALLEE_SAVED_KERNEL
 
-
 #ifdef CONFIG_ARC_CURR_IN_REG
-        add     sp, sp, 8  /* skip callee_reg gutter and user r25 placeholder */
+        add     sp, sp, 4  /* skip usual r25 placeholder */
 #else
-        add     sp, sp, 4   /* skip "callee_regs->stack_place_holder" */
-        ld.ab   r25, [sp, 4]
+        POP     r25
 #endif
-
-        ld.ab   r24, [sp, 4]
-        ld.ab   r23, [sp, 4]
-        ld.ab   r22, [sp, 4]
-        ld.ab   r21, [sp, 4]
-        ld.ab   r20, [sp, 4]
-        ld.ab   r19, [sp, 4]
-        ld.ab   r18, [sp, 4]
-        ld.ab   r17, [sp, 4]
-        ld.ab   r16, [sp, 4]
-        ld.ab   r15, [sp, 4]
-        ld.ab   r14, [sp, 4]
-        ld.ab   r13, [sp, 4]
-
+        RESTORE_R24_TO_R13
 .endm
 
 /*--------------------------------------------------------------
- * RESTORE_CALLEE_SAVED_USER:
- * This is called after do_signal where tracer might have changed callee regs
- * thus we need to restore the reg file.
- * Special case handling is required for r25 in case it is used by kernel
- *  for caching task ptr. Ptrace would have modified on-kernel-stack value of
- *  r25, which needs to be shoved back into task->thread.user_r25 where from
- *  Low level exception/ISR return code will retrieve to populate with rest of
- *  callee reg-file.
+ * Opposite of SAVE_CALLEE_SAVED_USER
+ *
+ * ptrace tracer or unaligned-access fixup might have changed a user mode
+ * callee reg which is saved back to usual r25 storage location
  *-------------------------------------------------------------*/
 .macro RESTORE_CALLEE_SAVED_USER
 
-        add     sp, sp, 4   /* skip "callee_regs->stack_place_holder" */
-
 #ifdef CONFIG_ARC_CURR_IN_REG
         ld.ab   r12, [sp, 4]
-        st      r12, [r25, TASK_THREAD + THREAD_USER_R25]
+        st.as   r12, [sp, OFF_USER_R25_FROM_R24]
 #else
-        ld.ab   r25, [sp, 4]
+        POP     r25
 #endif
-
-        ld.ab   r24, [sp, 4]
-        ld.ab   r23, [sp, 4]
-        ld.ab   r22, [sp, 4]
-        ld.ab   r21, [sp, 4]
-        ld.ab   r20, [sp, 4]
-        ld.ab   r19, [sp, 4]
-        ld.ab   r18, [sp, 4]
-        ld.ab   r17, [sp, 4]
-        ld.ab   r16, [sp, 4]
-        ld.ab   r15, [sp, 4]
-        ld.ab   r14, [sp, 4]
-        ld.ab   r13, [sp, 4]
+        RESTORE_R24_TO_R13
 .endm
 
 /*--------------------------------------------------------------
  * Super FAST Restore callee saved regs by simply re-adjusting SP
  *-------------------------------------------------------------*/
 .macro DISCARD_CALLEE_SAVED_USER
-        add     sp, sp, 14 * 4
-.endm
-
-/*--------------------------------------------------------------
- * Restore User mode r25 saved in task_struct->thread.user_r25
- *-------------------------------------------------------------*/
-.macro RESTORE_USER_R25
-        ld  r25, [r25, TASK_THREAD + THREAD_USER_R25]
+        add     sp, sp, SZ_CALLEE_REGS
 .endm
 
 /*-------------------------------------------------------------
@@ -252,7 +235,7 @@
         ld  \out, [\tsk, TASK_THREAD_INFO]
 
         /* Go to end of page where stack begins (grows upwards) */
-        add2 \out, \out, (THREAD_SIZE - 4)/4   /* one word GUTTER */
+        add2 \out, \out, (THREAD_SIZE)/4
 
 .endm
 
@@ -305,33 +288,28 @@
          * safe-keeping not really needed, but it keeps the epilogue code
          * (SP restore) simpler/uniform.
          */
-        b.d     77f
-
-        st.a    sp, [sp, -12]   ; Make room for orig_r0 and orig_r8
+        b.d     66f
+        mov     r9, sp
 
 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
 
         GET_CURR_TASK_ON_CPU   r9
 
-#ifdef CONFIG_ARC_CURR_IN_REG
-
-        /* If current task pointer cached in r25, time to
-         *  -safekeep USER r25 in task->thread_struct->user_r25
-         *  -load r25 with current task ptr
-         */
-        st.as   r25, [r9, (TASK_THREAD + THREAD_USER_R25)/4]
-        mov     r25, r9
-#endif
-
         /* With current tsk in r9, get it's kernel mode stack base */
         GET_TSK_STACK_BASE  r9, r9
 
-#ifdef PT_REGS_CANARY
-        st      0xabcdabcd, [r9, 0]
+66:
+#ifdef CONFIG_ARC_CURR_IN_REG
+        /*
+         * Treat r25 as scratch reg, save it on stack first
+         * Load it with current task pointer
+         */
+        st      r25, [r9, -4]
+        GET_CURR_TASK_ON_CPU   r25
 #endif
 
         /* Save Pre Intr/Exception User SP on kernel stack */
-        st.a    sp, [r9, -12]   ; Make room for orig_r0 and orig_r8
+        st.a    sp, [r9, -16]   ; Make room for orig_r0, ECR, user_r25
 
         /* CAUTION:
          * SP should be set at the very end when we are done with everything
@@ -342,7 +320,7 @@
         /* set SP to point to kernel mode stack */
         mov sp, r9
 
-77: /* ----- Stack Switched to kernel Mode, Now save REG FILE ----- */
+        /* ----- Stack Switched to kernel Mode, Now save REG FILE ----- */
 
 .endm
 
@@ -369,7 +347,7 @@
  * @reg [OUT] &thread_info of "current"
  */
 .macro GET_CURR_THR_INFO_FROM_SP  reg
-        and \reg, sp, ~(THREAD_SIZE - 1)
+        bic \reg, sp, (THREAD_SIZE - 1)
 .endm
 
 /*
@@ -413,62 +391,25 @@
  * Note that syscalls are implemented via TRAP which is also a exception
  * from CPU's point of view
  *-------------------------------------------------------------*/
-.macro SAVE_ALL_EXCEPTION   marker
+.macro SAVE_ALL_SYS
 
-        st      \marker, [sp, 8]        /* orig_r8 */
+        lr      r9, [ecr]
+        st      r9, [sp, 8]    /* ECR */
         st      r0, [sp, 4]    /* orig_r0, needed only for sys calls */
 
         /* Restore r9 used to code the early prologue */
         EXCPN_PROLOG_RESTORE_REG  r9
 
-        SAVE_CALLER_SAVED
-        st.a    r26, [sp, -4]   /* gp */
-        st.a    fp, [sp, -4]
-        st.a    blink, [sp, -4]
-        lr      r9, [eret]
-        st.a    r9, [sp, -4]
-        lr      r9, [erstatus]
-        st.a    r9, [sp, -4]
-        st.a    lp_count, [sp, -4]
-        lr      r9, [lp_end]
-        st.a    r9, [sp, -4]
-        lr      r9, [lp_start]
-        st.a    r9, [sp, -4]
-        lr      r9, [erbta]
-        st.a    r9, [sp, -4]
-
-#ifdef PT_REGS_CANARY
-        mov   r9, 0xdeadbeef
-        st    r9, [sp, -4]
-#endif
-
-        /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
-        sub sp, sp, 4
-.endm
-
-/*--------------------------------------------------------------
- * Save scratch regs for exceptions
- *-------------------------------------------------------------*/
-.macro SAVE_ALL_SYS
-        SAVE_ALL_EXCEPTION  orig_r8_IS_EXCPN
-.endm
-
-/*--------------------------------------------------------------
- * Save scratch regs for sys calls
- *-------------------------------------------------------------*/
-.macro SAVE_ALL_TRAP
-        /*
-         * Setup pt_regs->orig_r8.
-         * Encode syscall number (r8) in upper short word of event type (r9)
-         * N.B. #1: This is already endian safe (see ptrace.h)
-         *      #2: Only r9 can be used as scratch as it is already clobbered
-         *          and it's contents are no longer needed by the latter part
-         *          of exception prologue
-         */
-        lsl  r9, r8, 16
-        or   r9, r9, orig_r8_IS_SCALL
-
-        SAVE_ALL_EXCEPTION  r9
+        SAVE_R0_TO_R12
+        PUSH    gp
+        PUSH    fp
+        PUSH    blink
+        PUSHAX  eret
+        PUSHAX  erstatus
+        PUSH    lp_count
+        PUSHAX  lp_end
+        PUSHAX  lp_start
+        PUSHAX  erbta
 .endm
 
 /*--------------------------------------------------------------
@@ -483,28 +424,22 @@
  * by hardware and that is not good.
  *-------------------------------------------------------------*/
 .macro RESTORE_ALL_SYS
+        POPAX   erbta
+        POPAX   lp_start
+        POPAX   lp_end
+
+        POP     r9
+        mov     lp_count, r9    ;LD to lp_count is not allowed
 
-        add sp, sp, 4       /* hop over unused "pt_regs->stack_place_holder" */
-
-        ld.ab   r9, [sp, 4]
-        sr      r9, [erbta]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_start]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_end]
-        ld.ab   r9, [sp, 4]
-        mov     lp_count, r9
-        ld.ab   r9, [sp, 4]
-        sr      r9, [erstatus]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [eret]
-        ld.ab   blink, [sp, 4]
-        ld.ab   fp, [sp, 4]
-        ld.ab   r26, [sp, 4]    /* gp */
-        RESTORE_CALLER_SAVED
+        POPAX   erstatus
+        POPAX   eret
+        POP     blink
+        POP     fp
+        POP     gp
+        RESTORE_R12_TO_R0
 
         ld  sp, [sp] /* restore original sp */
-        /* orig_r0 and orig_r8 skipped automatically */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 
@@ -513,9 +448,7 @@
  *-------------------------------------------------------------*/
 .macro SAVE_ALL_INT1
 
-        /* restore original r9 , saved in int1_saved_reg
-        * It will be saved on stack in macro: SAVE_CALLER_SAVED
-        */
+        /* restore original r9 to be saved as part of reg-file */
 #ifdef CONFIG_SMP
         lr  r9, [ARC_REG_SCRATCH_DATA0]
 #else
@@ -523,29 +456,19 @@
 #endif
 
         /* now we are ready to save the remaining context :) */
-        st      orig_r8_IS_IRQ1, [sp, 8]    /* Event Type */
+        st      event_IRQ1, [sp, 8]    /* Dummy ECR */
         st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */
-        SAVE_CALLER_SAVED
-        st.a    r26, [sp, -4]   /* gp */
-        st.a    fp, [sp, -4]
-        st.a    blink, [sp, -4]
-        st.a    ilink1, [sp, -4]
-        lr      r9, [status32_l1]
-        st.a    r9, [sp, -4]
-        st.a    lp_count, [sp, -4]
-        lr      r9, [lp_end]
-        st.a    r9, [sp, -4]
-        lr      r9, [lp_start]
-        st.a    r9, [sp, -4]
-        lr      r9, [bta_l1]
-        st.a    r9, [sp, -4]
-
-#ifdef PT_REGS_CANARY
-        mov   r9, 0xdeadbee1
-        st    r9, [sp, -4]
-#endif
-        /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
-        sub sp, sp, 4
+
+        SAVE_R0_TO_R12
+        PUSH    gp
+        PUSH    fp
+        PUSH    blink
+        PUSH    ilink1
+        PUSHAX  status32_l1
+        PUSH    lp_count
+        PUSHAX  lp_end
+        PUSHAX  lp_start
+        PUSHAX  bta_l1
 .endm
 
 .macro SAVE_ALL_INT2
@@ -558,30 +481,19 @@
         ld  r9, [@int2_saved_reg]
 
         /* now we are ready to save the remaining context :) */
-        st      orig_r8_IS_IRQ2, [sp, 8]    /* Event Type */
+        st      event_IRQ2, [sp, 8]    /* Dummy ECR */
         st      0, [sp, 4]    /* orig_r0 , N/A for IRQ */
-        SAVE_CALLER_SAVED
-        st.a    r26, [sp, -4]   /* gp */
-        st.a    fp, [sp, -4]
-        st.a    blink, [sp, -4]
-        st.a    ilink2, [sp, -4]
-        lr      r9, [status32_l2]
-        st.a    r9, [sp, -4]
-        st.a    lp_count, [sp, -4]
-        lr      r9, [lp_end]
-        st.a    r9, [sp, -4]
-        lr      r9, [lp_start]
-        st.a    r9, [sp, -4]
-        lr      r9, [bta_l2]
-        st.a    r9, [sp, -4]
-
-#ifdef PT_REGS_CANARY
-        mov   r9, 0xdeadbee2
-        st    r9, [sp, -4]
-#endif
 
-        /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
-        sub sp, sp, 4
+        SAVE_R0_TO_R12
+        PUSH    gp
+        PUSH    fp
+        PUSH    blink
+        PUSH    ilink2
+        PUSHAX  status32_l2
+        PUSH    lp_count
+        PUSHAX  lp_end
+        PUSHAX  lp_start
+        PUSHAX  bta_l2
 .endm
 
 /*--------------------------------------------------------------
@@ -595,52 +507,41 @@
  *-------------------------------------------------------------*/
 
 .macro RESTORE_ALL_INT1
-        add sp, sp, 4       /* hop over unused "pt_regs->stack_place_holder" */
-
-        ld.ab   r9, [sp, 4] /* Actual reg file */
-        sr      r9, [bta_l1]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_start]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_end]
-        ld.ab   r9, [sp, 4]
-        mov     lp_count, r9
-        ld.ab   r9, [sp, 4]
-        sr      r9, [status32_l1]
-        ld.ab   r9, [sp, 4]
-        mov     ilink1, r9
-        ld.ab   blink, [sp, 4]
-        ld.ab   fp, [sp, 4]
-        ld.ab   r26, [sp, 4]    /* gp */
-        RESTORE_CALLER_SAVED
+        POPAX   bta_l1
+        POPAX   lp_start
+        POPAX   lp_end
+
+        POP     r9
+        mov     lp_count, r9    ;LD to lp_count is not allowed
+
+        POPAX   status32_l1
+        POP     ilink1
+        POP     blink
+        POP     fp
+        POP     gp
+        RESTORE_R12_TO_R0
 
         ld  sp, [sp] /* restore original sp */
-        /* orig_r0 and orig_r8 skipped automatically */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 .macro RESTORE_ALL_INT2
-        add sp, sp, 4       /* hop over unused "pt_regs->stack_place_holder" */
-
-        ld.ab   r9, [sp, 4]
-        sr      r9, [bta_l2]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_start]
-        ld.ab   r9, [sp, 4]
-        sr      r9, [lp_end]
-        ld.ab   r9, [sp, 4]
-        mov     lp_count, r9
-        ld.ab   r9, [sp, 4]
-        sr      r9, [status32_l2]
-        ld.ab   r9, [sp, 4]
-        mov     ilink2, r9
-        ld.ab   blink, [sp, 4]
-        ld.ab   fp, [sp, 4]
-        ld.ab   r26, [sp, 4]    /* gp */
-        RESTORE_CALLER_SAVED
+        POPAX   bta_l2
+        POPAX   lp_start
+        POPAX   lp_end
 
-        ld  sp, [sp] /* restore original sp */
-        /* orig_r0 and orig_r8 skipped automatically */
+        POP     r9
+        mov     lp_count, r9    ;LD to lp_count is not allowed
 
+        POPAX   status32_l2
+        POP     ilink2
+        POP     blink
+        POP     fp
+        POP     gp
+        RESTORE_R12_TO_R0
+
+        ld  sp, [sp] /* restore original sp */
+        /* orig_r0, ECR, user_r25 skipped automatically */
 .endm
 
 
diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 57898a17eb82..c0a72105ee0b 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -21,6 +21,6 @@
 extern void __init arc_init_IRQ(void);
 extern int __init get_hw_config_num_irq(void);
 
-void __cpuinit arc_local_timer_setup(unsigned int cpu);
+void arc_local_timer_setup(unsigned int cpu);
 
 #endif
diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h
index eac071668201..d99f79bcf865 100644
--- a/arch/arc/include/asm/irqflags.h
+++ b/arch/arc/include/asm/irqflags.h
@@ -19,6 +19,26 @@
 
 #include <asm/arcregs.h>
 
+/* status32 Reg bits related to Interrupt Handling */
+#define STATUS_E1_BIT           1       /* Int 1 enable */
+#define STATUS_E2_BIT           2       /* Int 2 enable */
+#define STATUS_A1_BIT           3       /* Int 1 active */
+#define STATUS_A2_BIT           4       /* Int 2 active */
+
+#define STATUS_E1_MASK          (1<<STATUS_E1_BIT)
+#define STATUS_E2_MASK          (1<<STATUS_E2_BIT)
+#define STATUS_A1_MASK          (1<<STATUS_A1_BIT)
+#define STATUS_A2_MASK          (1<<STATUS_A2_BIT)
+
+/* Other Interrupt Handling related Aux regs */
+#define AUX_IRQ_LEV             0x200   /* IRQ Priority: L1 or L2 */
+#define AUX_IRQ_HINT            0x201   /* For generating Soft Interrupts */
+#define AUX_IRQ_LV12            0x43    /* interrupt level register */
+
+#define AUX_IENABLE             0x40c
+#define AUX_ITRIGGER            0x40d
+#define AUX_IPULSE              0x415
+
 #ifndef __ASSEMBLY__
 
 /******************************************************************
diff --git a/arch/arc/include/asm/kgdb.h b/arch/arc/include/asm/kgdb.h
index 4930957ca3d3..b65fca7ffeb5 100644
--- a/arch/arc/include/asm/kgdb.h
+++ b/arch/arc/include/asm/kgdb.h
@@ -31,7 +31,7 @@ static inline void arch_kgdb_breakpoint(void)
         __asm__ __volatile__ ("trap_s   0x4\n");
 }
 
-extern void kgdb_trap(struct pt_regs *regs, int param);
+extern void kgdb_trap(struct pt_regs *regs);
 
 enum arc700_linux_regnums {
         _R0             = 0,
@@ -53,7 +53,7 @@ enum arc700_linux_regnums {
 };
 
 #else
-#define kgdb_trap(regs, param)
+#define kgdb_trap(regs)
 #endif
 
 #endif  /* __ARC_KGDB_H__ */
diff --git a/arch/arc/include/asm/kprobes.h b/arch/arc/include/asm/kprobes.h
index 4d9c211fce70..944dbedb38b5 100644
--- a/arch/arc/include/asm/kprobes.h
+++ b/arch/arc/include/asm/kprobes.h
@@ -50,11 +50,9 @@ struct kprobe_ctlblk {
 
 int kprobe_fault_handler(struct pt_regs *regs, unsigned long cause);
 void kretprobe_trampoline(void);
-void trap_is_kprobe(unsigned long cause, unsigned long address,
-                           struct pt_regs *regs);
+void trap_is_kprobe(unsigned long address, struct pt_regs *regs);
 #else
-static void trap_is_kprobe(unsigned long cause, unsigned long address,
-                           struct pt_regs *regs)
+static void trap_is_kprobe(unsigned long address, struct pt_regs *regs)
 {
 }
 #endif
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index 56b02320f1a9..7c03fe61759c 100644
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -9,6 +9,40 @@
 #ifndef _ASM_ARC_MMU_H
 #define _ASM_ARC_MMU_H
 
+#if defined(CONFIG_ARC_MMU_V1)
+#define CONFIG_ARC_MMU_VER 1
+#elif defined(CONFIG_ARC_MMU_V2)
+#define CONFIG_ARC_MMU_VER 2
+#elif defined(CONFIG_ARC_MMU_V3)
+#define CONFIG_ARC_MMU_VER 3
+#endif
+
+/* MMU Management regs */
+#define ARC_REG_MMU_BCR         0x06f
+#define ARC_REG_TLBPD0          0x405
+#define ARC_REG_TLBPD1          0x406
+#define ARC_REG_TLBINDEX        0x407
+#define ARC_REG_TLBCOMMAND      0x408
+#define ARC_REG_PID             0x409
+#define ARC_REG_SCRATCH_DATA0   0x418
+
+/* Bits in MMU PID register */
+#define MMU_ENABLE              (1 << 31)       /* Enable MMU for process */
+
+/* Error code if probe fails */
+#define TLB_LKUP_ERR            0x80000000
+
+/* TLB Commands */
+#define TLBWrite    0x1
+#define TLBRead     0x2
+#define TLBGetIndex 0x3
+#define TLBProbe    0x4
+
+#if (CONFIG_ARC_MMU_VER >= 2)
+#define TLBWriteNI  0x5         /* write JTLB without inv uTLBs */
+#define TLBIVUTLB   0x6         /* explicitly inv uTLBs */
+#endif
+
 #ifndef __ASSEMBLY__
 
 typedef struct {
@@ -18,6 +52,16 @@ typedef struct {
 #endif
 } mm_context_t;
 
+#ifdef CONFIG_ARC_DBG_TLB_PARANOIA
+void tlb_paranoid_check(unsigned int pid_sw, unsigned long address);
+#else
+#define tlb_paranoid_check(a, b)
 #endif
 
+void arc_mmu_init(void);
+extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
+void __init read_decode_mmu_bcr(void);
+
+#endif  /* !__ASSEMBLY__ */
+
 #endif
diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
index ab84bf131fe1..9c8aa41e45c2 100644
--- a/arch/arc/include/asm/page.h
+++ b/arch/arc/include/asm/page.h
@@ -96,13 +96,8 @@ typedef unsigned long pgtable_t;
 
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
-/* Default Permissions for page, used in mmap.c */
-#ifdef CONFIG_ARC_STACK_NONEXEC
+/* Default Permissions for stack/heaps pages (Non Executable) */
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE)
-#else
-#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
-                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#endif
 
 #define WANT_PAGE_VIRTUAL   1
 
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index c110ac87d22b..4749a0eee1cf 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -135,6 +135,12 @@
 /* ioremap */
 #define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS)
 
+/* Masks for actual TLB "PD"s */
+#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT)
+#define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \
+                         _PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \
+                         _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
+
 /**************************************************************************
  * Mapping of vm_flags (Generic VM) to PTE flags (arch specific)
  *
diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
index 5f26b2c1cba0..15334ab66b56 100644
--- a/arch/arc/include/asm/processor.h
+++ b/arch/arc/include/asm/processor.h
@@ -19,6 +19,7 @@
 #ifndef __ASSEMBLY__
 
 #include <asm/arcregs.h>        /* for STATUS_E1_MASK et all */
+#include <asm/ptrace.h>
 
 /* Arch specific stuff which needs to be saved per task.
  * However these items are not so important so as to earn a place in
@@ -28,10 +29,6 @@ struct thread_struct {
         unsigned long ksp;      /* kernel mode stack pointer */
         unsigned long callee_reg;       /* pointer to callee regs */
         unsigned long fault_address;    /* dbls as brkpt holder as well */
-        unsigned long cause_code;       /* Exception Cause Code (ECR) */
-#ifdef CONFIG_ARC_CURR_IN_REG
-        unsigned long user_r25;
-#endif
 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
         struct arc_fpu fpu;
 #endif
@@ -50,7 +47,7 @@ struct task_struct;
 unsigned long thread_saved_pc(struct task_struct *t);
 
 #define task_pt_regs(p) \
-        ((struct pt_regs *)(THREAD_SIZE - 4 + (void *)task_stack_page(p)) - 1)
+        ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
 
 /* Free all resources held by a thread. */
 #define release_thread(thread) do { } while (0)
@@ -75,11 +72,15 @@ unsigned long thread_saved_pc(struct task_struct *t);
 
 /*
  * Where abouts of Task's sp, fp, blink when it was last seen in kernel mode.
- * These can't be derived from pt_regs as that would give correp user-mode val
+ * Look in process.c for details of kernel stack layout
  */
 #define KSTK_ESP(tsk)   (tsk->thread.ksp)
-#define KSTK_BLINK(tsk) (*((unsigned int *)((KSTK_ESP(tsk)) + (13+1+1)*4)))
-#define KSTK_FP(tsk)    (*((unsigned int *)((KSTK_ESP(tsk)) + (13+1)*4)))
+
+#define KSTK_REG(tsk, off)      (*((unsigned int *)(KSTK_ESP(tsk) + \
+                                        sizeof(struct callee_regs) + off)))
+
+#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4)
+#define KSTK_FP(tsk)    KSTK_REG(tsk, 0)
 
 /*
  * Do necessary setup to start up a newly executed thread.
diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
index 6179de7e07c2..c9938e7a7dbd 100644
--- a/arch/arc/include/asm/ptrace.h
+++ b/arch/arc/include/asm/ptrace.h
@@ -17,12 +17,6 @@
 /* THE pt_regs: Defines how regs are saved during entry into kernel */
 
 struct pt_regs {
-        /*
-         * 1 word gutter after reg-file has been saved
-         * Technically not needed, Since SP always points to a "full" location
-         * (vs. "empty"). But pt_regs is shared with tools....
-         */
-        long res;
 
         /* Real registers */
         long bta;       /* bta_l1, bta_l2, erbta */
@@ -50,22 +44,32 @@ struct pt_regs {
         long sp;        /* user/kernel sp depending on where we came from  */
         long orig_r0;
 
-        /*to distinguish bet excp, syscall, irq */
+        /*
+         * To distinguish bet excp, syscall, irq
+         * For traps and exceptions, Exception Cause Register.
+         *      ECR: <00> <VV> <CC> <PP>
+         *      Last word used by Linux for extra state mgmt (syscall-restart)
+         * For interrupts, use artificial ECR values to note current prio-level
+         */
         union {
+                struct {
 #ifdef CONFIG_CPU_BIG_ENDIAN
-                /* so that assembly code is same for LE/BE */
-                unsigned long orig_r8:16, event:16;
+                        unsigned long state:8, ecr_vec:8,
+                                      ecr_cause:8, ecr_param:8;
 #else
-                unsigned long event:16, orig_r8:16;
+                        unsigned long ecr_param:8, ecr_cause:8,
+                                      ecr_vec:8, state:8;
 #endif
-                long orig_r8_word;
+                };
+                unsigned long event;
         };
+
+        long user_r25;
 };
 
 /* Callee saved registers - need to be saved only when you are scheduled out */
 
 struct callee_regs {
-        long res;       /* Again this is not needed */
         long r25;
         long r24;
         long r23;
@@ -99,18 +103,20 @@ struct callee_regs {
 /* return 1 if PC in delay slot */
 #define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK)
 
-#define in_syscall(regs)    (regs->event & orig_r8_IS_SCALL)
-#define in_brkpt_trap(regs) (regs->event & orig_r8_IS_BRKPT)
+#define in_syscall(regs)    ((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param)
+#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param)
+
+#define STATE_SCALL_RESTARTED   0x01
 
-#define syscall_wont_restart(regs) (regs->event |= orig_r8_IS_SCALL_RESTARTED)
-#define syscall_restartable(regs) !(regs->event &  orig_r8_IS_SCALL_RESTARTED)
+#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)
+#define syscall_restartable(reg) !(reg->state &  STATE_SCALL_RESTARTED)
 
 #define current_pt_regs()                                       \
 ({                                                              \
         /* open-coded current_thread_info() */                  \
         register unsigned long sp asm ("sp");                   \
         unsigned long pg_start = (sp & ~(THREAD_SIZE - 1));     \
-        (struct pt_regs *)(pg_start + THREAD_SIZE - 4) - 1;     \
+        (struct pt_regs *)(pg_start + THREAD_SIZE) - 1; \
 })
 
 static inline long regs_return_value(struct pt_regs *regs)
@@ -120,11 +126,4 @@ static inline long regs_return_value(struct pt_regs *regs)
 
 #endif /* !__ASSEMBLY__ */
 
-#define orig_r8_IS_SCALL                0x0001
-#define orig_r8_IS_SCALL_RESTARTED      0x0002
-#define orig_r8_IS_BRKPT                0x0004
-#define orig_r8_IS_EXCPN                0x0008
-#define orig_r8_IS_IRQ1                 0x0010
-#define orig_r8_IS_IRQ2                 0x0020
-
 #endif /* __ASM_PTRACE_H */
diff --git a/arch/arc/include/asm/syscall.h b/arch/arc/include/asm/syscall.h
index 33ab3048e9b2..29de09804306 100644
--- a/arch/arc/include/asm/syscall.h
+++ b/arch/arc/include/asm/syscall.h
@@ -18,7 +18,7 @@ static inline long
 syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 {
         if (user_mode(regs) && in_syscall(regs))
-                return regs->orig_r8;
+                return regs->r8;
         else
                 return -1;
 }
@@ -26,8 +26,7 @@ syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 static inline void
 syscall_rollback(struct task_struct *task, struct pt_regs *regs)
 {
-        /* XXX: I can't fathom how pt_regs->r8 will be clobbered ? */
-        regs->r8 = regs->orig_r8;
+        regs->r0 = regs->orig_r0;
 }
 
 static inline long
diff --git a/arch/arc/include/asm/tlb-mmu1.h b/arch/arc/include/asm/tlb-mmu1.h
index a5ff961b1efc..8a1ec96012ae 100644
--- a/arch/arc/include/asm/tlb-mmu1.h
+++ b/arch/arc/include/asm/tlb-mmu1.h
@@ -9,9 +9,9 @@
 #ifndef __ASM_TLB_MMU_V1_H__
 #define __ASM_TLB_MMU_V1_H__
 
-#if defined(__ASSEMBLY__) && defined(CONFIG_ARC_MMU_VER == 1)
+#include <asm/mmu.h>
 
-#include <asm/tlb.h>
+#if defined(__ASSEMBLY__) && (CONFIG_ARC_MMU_VER == 1)
 
 .macro TLB_WRITE_HEURISTICS
 
diff --git a/arch/arc/include/asm/tlb.h b/arch/arc/include/asm/tlb.h
index cb0c708ca665..a9db5f62aaf3 100644
--- a/arch/arc/include/asm/tlb.h
+++ b/arch/arc/include/asm/tlb.h
@@ -9,18 +9,6 @@
 #ifndef _ASM_ARC_TLB_H
 #define _ASM_ARC_TLB_H
 
-#ifdef __KERNEL__
-
-#include <asm/pgtable.h>
-
-/* Masks for actual TLB "PD"s */
-#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT)
-#define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \
-                         _PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \
-                         _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
-
-#ifndef __ASSEMBLY__
-
 #define tlb_flush(tlb)                          \
 do {                                            \
         if (tlb->fullmm)                        \
@@ -56,18 +44,4 @@ do {									\
 #include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
-#ifdef CONFIG_ARC_DBG_TLB_PARANOIA
-void tlb_paranoid_check(unsigned int pid_sw, unsigned long address);
-#else
-#define tlb_paranoid_check(a, b)
-#endif
-
-void arc_mmu_init(void);
-extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
-void __init read_decode_mmu_bcr(void);
-
-#endif  /* __ASSEMBLY__ */
-
-#endif  /* __KERNEL__ */
-
 #endif /* _ASM_ARC_TLB_H */
diff --git a/arch/arc/include/asm/unaligned.h b/arch/arc/include/asm/unaligned.h
index 5dbe63f17b66..60702f3751d2 100644
--- a/arch/arc/include/asm/unaligned.h
+++ b/arch/arc/include/asm/unaligned.h
@@ -16,11 +16,11 @@
 
 #ifdef CONFIG_ARC_MISALIGN_ACCESS
 int misaligned_fixup(unsigned long address, struct pt_regs *regs,
-                     unsigned long cause, struct callee_regs *cregs);
+                     struct callee_regs *cregs);
 #else
 static inline int
 misaligned_fixup(unsigned long address, struct pt_regs *regs,
-                 unsigned long cause, struct callee_regs *cregs)
+                 struct callee_regs *cregs)
 {
         return 0;
 }
diff --git a/arch/arc/include/uapi/asm/ptrace.h b/arch/arc/include/uapi/asm/ptrace.h
index 30333cec0fef..2618cc13ba75 100644
--- a/arch/arc/include/uapi/asm/ptrace.h
+++ b/arch/arc/include/uapi/asm/ptrace.h
@@ -20,28 +20,31 @@
  *
  * This is to decouple pt_regs from user-space ABI, to be able to change it
  * w/o affecting the ABI.
- * Although the layout (initial padding) is similar to pt_regs to have some
- * optimizations when copying pt_regs to/from user_regs_struct.
+ *
+ * The intermediate pad,pad2 are relics of initial layout based on pt_regs
+ * for optimizations when copying pt_regs to/from user_regs_struct.
+ * We no longer need them, but can't be changed as they are part of ABI now.
  *
  * Also, sigcontext only care about the scratch regs as that is what we really
- * save/restore for signal handling.
+ * save/restore for signal handling. However gdb also uses the same struct
+ * hence callee regs need to be in there too.
 */
 struct user_regs_struct {
 
+        long pad;
         struct {
-                long pad;
                 long bta, lp_start, lp_end, lp_count;
                 long status32, ret, blink, fp, gp;
                 long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
                 long sp;
         } scratch;
+        long pad2;
         struct {
-                long pad;
                 long r25, r24, r23, r22, r21, r20;
                 long r19, r18, r17, r16, r15, r14, r13;
         } callee;
         long efa;       /* break pt addr, for break points in delay slots */
-        long stop_pc;   /* give dbg stop_pc directly after checking orig_r8 */
+        long stop_pc;   /* give dbg stop_pc after ensuring brkpt trap */
 };
 #endif /* !__ASSEMBLY__ */