diff options
| author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2015-11-24 06:09:54 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-01 13:45:51 -0500 |
| commit | c74732e3c5f02b09ad839238622a8bd4fad75f84 (patch) | |
| tree | 9857c8d2f591df0c0078ff556f03bbace7676f75 /Documentation/devicetree/bindings/usb | |
| parent | 526a240f6145fa54658a4d56327f3e053ac73c48 (diff) | |
dt-bindings: Add a binding for Mediatek xHCI host controller
add a DT binding documentation of xHCI host controller for the
MT8173 SoC from Mediatek.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/usb')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/mt8173-xhci.txt | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt new file mode 100644 index 000000000000..b3a7ffa48852 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt | |||
| @@ -0,0 +1,51 @@ | |||
| 1 | MT8173 xHCI | ||
| 2 | |||
| 3 | The device node for Mediatek SOC USB3.0 host controller | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - compatible : should contain "mediatek,mt8173-xhci" | ||
| 7 | - reg : specifies physical base address and size of the registers, | ||
| 8 | the first one for MAC, the second for IPPC | ||
| 9 | - interrupts : interrupt used by the controller | ||
| 10 | - power-domains : a phandle to USB power domain node to control USB's | ||
| 11 | mtcmos | ||
| 12 | - vusb33-supply : regulator of USB avdd3.3v | ||
| 13 | |||
| 14 | - clocks : a list of phandle + clock-specifier pairs, one for each | ||
| 15 | entry in clock-names | ||
| 16 | - clock-names : must contain | ||
| 17 | "sys_ck": for clock of xHCI MAC | ||
| 18 | "wakeup_deb_p0": for USB wakeup debounce clock of port0 | ||
| 19 | "wakeup_deb_p1": for USB wakeup debounce clock of port1 | ||
| 20 | |||
| 21 | - phys : a list of phandle + phy specifier pairs | ||
| 22 | |||
| 23 | Optional properties: | ||
| 24 | - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup | ||
| 25 | mode; | ||
| 26 | - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup | ||
| 27 | control register, it depends on "mediatek,wakeup-src". | ||
| 28 | - vbus-supply : reference to the VBUS regulator; | ||
| 29 | - usb3-lpm-capable : supports USB3.0 LPM | ||
| 30 | |||
| 31 | Example: | ||
| 32 | usb30: usb@11270000 { | ||
| 33 | compatible = "mediatek,mt8173-xhci"; | ||
| 34 | reg = <0 0x11270000 0 0x1000>, | ||
| 35 | <0 0x11280700 0 0x0100>; | ||
| 36 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; | ||
| 37 | power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; | ||
| 38 | clocks = <&topckgen CLK_TOP_USB30_SEL>, | ||
| 39 | <&pericfg CLK_PERI_USB0>, | ||
| 40 | <&pericfg CLK_PERI_USB1>; | ||
| 41 | clock-names = "sys_ck", | ||
| 42 | "wakeup_deb_p0", | ||
| 43 | "wakeup_deb_p1"; | ||
| 44 | phys = <&phy_port0 PHY_TYPE_USB3>, | ||
| 45 | <&phy_port1 PHY_TYPE_USB2>; | ||
| 46 | vusb33-supply = <&mt6397_vusb_reg>; | ||
| 47 | vbus-supply = <&usb_p1_vbus>; | ||
| 48 | usb3-lpm-capable; | ||
| 49 | mediatek,syscon-wakeup = <&pericfg>; | ||
| 50 | mediatek,wakeup-src = <1>; | ||
| 51 | }; | ||
