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authorAntoine Tenart <antoine.tenart@free-electrons.com>2015-05-15 19:50:34 -0400
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2015-05-18 12:10:13 -0400
commitfd26031ba6356d2b0f7aa214ebff4b12736b6529 (patch)
tree22828ef69c856e5f1236c6aad9691a9c69ad9d85
parenta457b86caec6ff6465e75c6b65e7eab82f74676d (diff)
clk: berlin: drop direct of_iomap of nodes reg property
The Berlin clock driver was sharing a DT node with the pin controller and the reset driver. All these devices are now sub-nodes of the chip controller. This patch rework the Berlin clock driver to allow moving the Berlin clock DT bindings into their own sub-node of the chip controller node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-rw-r--r--drivers/clk/berlin/bg2.c9
-rw-r--r--drivers/clk/berlin/bg2q.c9
2 files changed, 3 insertions, 15 deletions
diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c
index d8e57097518b..73153fc45ee9 100644
--- a/drivers/clk/berlin/bg2.c
+++ b/drivers/clk/berlin/bg2.c
@@ -508,10 +508,7 @@ static void __init berlin2_clock_setup(struct device_node *np)
508 u8 avpll_flags = 0; 508 u8 avpll_flags = 0;
509 int n; 509 int n;
510 510
511 if (of_device_is_compatible(parent_np, "syscon")) 511 gbase = of_iomap(parent_np, 0);
512 np = parent_np;
513
514 gbase = of_iomap(np, 0);
515 if (!gbase) 512 if (!gbase)
516 return; 513 return;
517 514
@@ -689,9 +686,5 @@ static void __init berlin2_clock_setup(struct device_node *np)
689bg2_fail: 686bg2_fail:
690 iounmap(gbase); 687 iounmap(gbase);
691} 688}
692CLK_OF_DECLARE(berlin2_clock, "marvell,berlin2-chip-ctrl",
693 berlin2_clock_setup);
694CLK_OF_DECLARE(berlin2cd_clock, "marvell,berlin2cd-chip-ctrl",
695 berlin2_clock_setup);
696CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk", 689CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk",
697 berlin2_clock_setup); 690 berlin2_clock_setup);
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 638a649ebed7..221f40c2b850 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -295,17 +295,14 @@ static void __init berlin2q_clock_setup(struct device_node *np)
295 struct clk *clk; 295 struct clk *clk;
296 int n; 296 int n;
297 297
298 if (of_device_is_compatible(parent_np, "syscon")) 298 gbase = of_iomap(parent_np, 0);
299 np = parent_np;
300
301 gbase = of_iomap(np, 0);
302 if (!gbase) { 299 if (!gbase) {
303 pr_err("%s: Unable to map global base\n", np->full_name); 300 pr_err("%s: Unable to map global base\n", np->full_name);
304 return; 301 return;
305 } 302 }
306 303
307 /* BG2Q CPU PLL is not part of global registers */ 304 /* BG2Q CPU PLL is not part of global registers */
308 cpupll_base = of_iomap(np, 1); 305 cpupll_base = of_iomap(parent_np, 1);
309 if (!cpupll_base) { 306 if (!cpupll_base) {
310 pr_err("%s: Unable to map cpupll base\n", np->full_name); 307 pr_err("%s: Unable to map cpupll base\n", np->full_name);
311 iounmap(gbase); 308 iounmap(gbase);
@@ -388,7 +385,5 @@ bg2q_fail:
388 iounmap(cpupll_base); 385 iounmap(cpupll_base);
389 iounmap(gbase); 386 iounmap(gbase);
390} 387}
391CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl",
392 berlin2q_clock_setup);
393CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk", 388CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",
394 berlin2q_clock_setup); 389 berlin2q_clock_setup);