diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-05 00:35:12 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-05 00:35:12 -0500 |
| commit | fd0d351de7bbd718bc2b34d5846854831aa2b88c (patch) | |
| tree | b4630c372215deb2e17235707189f06603bee3a3 | |
| parent | 3d6f47801c34e42da26e2b6b29706f0bfe423978 (diff) | |
| parent | e052c6d15c61cc4caff2f06cbca72b183da9f15e (diff) | |
Merge tag 'tty-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH:
"Here is the big tty and serial driver update for 4.4-rc1.
Lots of serial driver updates and a few small tty core changes. Full
details in the shortlog.
All of these have been in linux-next for a while"
* tag 'tty-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (148 commits)
tty: Use unbound workqueue for all input workers
tty: Abstract tty buffer work
tty: Prevent tty teardown during tty_write_message()
tty: core: Use correct spinlock flavor in tiocspgrp()
tty: Combine SIGTTOU/SIGTTIN handling
serial: amba-pl011: fix incorrect integer size in pl011_fifo_to_tty()
ttyFDC: Fix build problems due to use of module_{init,exit}
tty: remove unneeded return statement
serial: 8250_mid: add support for DMA engine handling from UART MMIO
dmaengine: hsu: remove platform data
dmaengine: hsu: introduce stubs for the exported functions
dmaengine: hsu: make the UART driver in control of selecting this driver
serial: fix mctrl helper functions
serial: 8250_pci: Intel MID UART support to its own driver
serial: fsl_lpuart: add earlycon support
tty: disable unbind for old 74xx based serial/mpsc console port
serial: pl011: Spelling s/clocks-names/clock-names/
n_tty: Remove reader wakeups for TTY_BREAK/TTY_PARITY chars
tty: synclink, fix indentation
serial: at91, fix rs485 properties
...
82 files changed, 2600 insertions, 1807 deletions
diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.txt b/Documentation/devicetree/bindings/serial/ingenic,uart.txt index c2d3b3abe7d9..02cb7fe59cb7 100644 --- a/Documentation/devicetree/bindings/serial/ingenic,uart.txt +++ b/Documentation/devicetree/bindings/serial/ingenic,uart.txt | |||
| @@ -1,7 +1,8 @@ | |||
| 1 | * Ingenic SoC UART | 1 | * Ingenic SoC UART |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "ingenic,jz4740-uart" or "ingenic,jz4780-uart" | 4 | - compatible : "ingenic,jz4740-uart", "ingenic,jz4760-uart", |
| 5 | "ingenic,jz4775-uart" or "ingenic,jz4780-uart" | ||
| 5 | - reg : offset and length of the register set for the device. | 6 | - reg : offset and length of the register set for the device. |
| 6 | - interrupts : should contain uart interrupt. | 7 | - interrupts : should contain uart interrupt. |
| 7 | - clocks : phandles to the module & baud clocks. | 8 | - clocks : phandles to the module & baud clocks. |
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt index cbae3d9a0278..77863aefe9ef 100644 --- a/Documentation/devicetree/bindings/serial/pl011.txt +++ b/Documentation/devicetree/bindings/serial/pl011.txt | |||
| @@ -19,7 +19,7 @@ Optional properties: | |||
| 19 | must correspond to the PCLK clocking the internal logic | 19 | must correspond to the PCLK clocking the internal logic |
| 20 | of the block. Just listing one clock (the first one) is | 20 | of the block. Just listing one clock (the first one) is |
| 21 | deprecated. | 21 | deprecated. |
| 22 | - clocks-names: | 22 | - clock-names: |
| 23 | When present, the first clock listed must be named | 23 | When present, the first clock listed must be named |
| 24 | "uartclk" and the second clock listed must be named | 24 | "uartclk" and the second clock listed must be named |
| 25 | "apb_pclk" | 25 | "apb_pclk" |
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt index a2114c217376..182777fac9a2 100644 --- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt | |||
| @@ -26,6 +26,12 @@ Required properties: | |||
| 26 | Optional properties: | 26 | Optional properties: |
| 27 | - dmas: Should contain dma specifiers for transmit and receive channels | 27 | - dmas: Should contain dma specifiers for transmit and receive channels |
| 28 | - dma-names: Should contain "tx" for transmit and "rx" for receive channels | 28 | - dma-names: Should contain "tx" for transmit and "rx" for receive channels |
| 29 | - qcom,tx-crci: Identificator <u32> for Client Rate Control Interface to be | ||
| 30 | used with TX DMA channel. Required when using DMA for transmission | ||
| 31 | with UARTDM v1.3 and bellow. | ||
| 32 | - qcom,rx-crci: Identificator <u32> for Client Rate Control Interface to be | ||
| 33 | used with RX DMA channel. Required when using DMA for reception | ||
| 34 | with UARTDM v1.3 and bellow. | ||
| 29 | 35 | ||
| 30 | Note: Aliases may be defined to ensure the correct ordering of the UARTs. | 36 | Note: Aliases may be defined to ensure the correct ordering of the UARTs. |
| 31 | The alias serialN will result in the UART being assigned port N. If any | 37 | The alias serialN will result in the UART being assigned port N. If any |
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt index e84b13a8eda3..73f825e5e644 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | |||
| @@ -23,6 +23,8 @@ Required properties: | |||
| 23 | - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. | 23 | - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. |
| 24 | - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. | 24 | - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. |
| 25 | - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. | 25 | - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. |
| 26 | - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. | ||
| 27 | - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. | ||
| 26 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. | 28 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. |
| 27 | - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. | 29 | - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. |
| 28 | - "renesas,scif" for generic SCIF compatible UART. | 30 | - "renesas,scif" for generic SCIF compatible UART. |
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt index 289c40ed7470..12bbe9f22560 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt | |||
| @@ -15,6 +15,9 @@ The supplying peripheral clock can also be handled, needing a second property | |||
| 15 | Required elements: "baudclk", "apb_pclk" | 15 | Required elements: "baudclk", "apb_pclk" |
| 16 | 16 | ||
| 17 | Optional properties: | 17 | Optional properties: |
| 18 | - snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE | ||
| 19 | configuration parameter. Define this if your UART does not implement the busy | ||
| 20 | functionality. | ||
| 18 | - resets : phandle to the parent reset controller. | 21 | - resets : phandle to the parent reset controller. |
| 19 | - reg-shift : quantity to shift the register offsets by. If this property is | 22 | - reg-shift : quantity to shift the register offsets by. If this property is |
| 20 | not present then the register offsets are not shifted. | 23 | not present then the register offsets are not shifted. |
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index c76200afb7bb..6263a2da3e2f 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt | |||
| @@ -1024,6 +1024,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. | |||
| 1024 | serial port must already be setup and configured. | 1024 | serial port must already be setup and configured. |
| 1025 | Options are not yet supported. | 1025 | Options are not yet supported. |
| 1026 | 1026 | ||
| 1027 | lpuart,<addr> | ||
| 1028 | lpuart32,<addr> | ||
| 1029 | Use early console provided by Freescale LP UART driver | ||
| 1030 | found on Freescale Vybrid and QorIQ LS1021A processors. | ||
| 1031 | A valid base address must be provided, and the serial | ||
| 1032 | port must already be setup and configured. | ||
| 1033 | |||
| 1027 | earlyprintk= [X86,SH,BLACKFIN,ARM,M68k] | 1034 | earlyprintk= [X86,SH,BLACKFIN,ARM,M68k] |
| 1028 | earlyprintk=vga | 1035 | earlyprintk=vga |
| 1029 | earlyprintk=efi | 1036 | earlyprintk=efi |
diff --git a/Documentation/serial/driver b/Documentation/serial/driver index c415b0ef4493..379468e12680 100644 --- a/Documentation/serial/driver +++ b/Documentation/serial/driver | |||
| @@ -439,11 +439,13 @@ Modem control lines via GPIO | |||
| 439 | 439 | ||
| 440 | Some helpers are provided in order to set/get modem control lines via GPIO. | 440 | Some helpers are provided in order to set/get modem control lines via GPIO. |
| 441 | 441 | ||
| 442 | mctrl_gpio_init(dev, idx): | 442 | mctrl_gpio_init(port, idx): |
| 443 | This will get the {cts,rts,...}-gpios from device tree if they are | 443 | This will get the {cts,rts,...}-gpios from device tree if they are |
| 444 | present and request them, set direction etc, and return an | 444 | present and request them, set direction etc, and return an |
| 445 | allocated structure. devm_* functions are used, so there's no need | 445 | allocated structure. devm_* functions are used, so there's no need |
| 446 | to call mctrl_gpio_free(). | 446 | to call mctrl_gpio_free(). |
| 447 | As this sets up the irq handling make sure to not handle changes to the | ||
| 448 | gpio input lines in your driver, too. | ||
| 447 | 449 | ||
| 448 | mctrl_gpio_free(dev, gpios): | 450 | mctrl_gpio_free(dev, gpios): |
| 449 | This will free the requested gpios in mctrl_gpio_init(). | 451 | This will free the requested gpios in mctrl_gpio_init(). |
| @@ -458,3 +460,9 @@ mctrl_gpio_set(gpios, mctrl): | |||
| 458 | 460 | ||
| 459 | mctrl_gpio_get(gpios, mctrl): | 461 | mctrl_gpio_get(gpios, mctrl): |
| 460 | This will update mctrl with the gpios values. | 462 | This will update mctrl with the gpios values. |
| 463 | |||
| 464 | mctrl_gpio_enable_ms(gpios): | ||
| 465 | Enables irqs and handling of changes to the ms lines. | ||
| 466 | |||
| 467 | mctrl_gpio_disable_ms(gpios): | ||
| 468 | Disables irqs and handling of changes to the ms lines. | ||
diff --git a/Documentation/serial/tty.txt b/Documentation/serial/tty.txt index 973c8ad3f959..bc3842dc323a 100644 --- a/Documentation/serial/tty.txt +++ b/Documentation/serial/tty.txt | |||
| @@ -39,8 +39,13 @@ TTY side interfaces: | |||
| 39 | open() - Called when the line discipline is attached to | 39 | open() - Called when the line discipline is attached to |
| 40 | the terminal. No other call into the line | 40 | the terminal. No other call into the line |
| 41 | discipline for this tty will occur until it | 41 | discipline for this tty will occur until it |
| 42 | completes successfully. Returning an error will | 42 | completes successfully. Should initialize any |
| 43 | prevent the ldisc from being attached. Can sleep. | 43 | state needed by the ldisc, and set receive_room |
| 44 | in the tty_struct to the maximum amount of data | ||
| 45 | the line discipline is willing to accept from the | ||
| 46 | driver with a single call to receive_buf(). | ||
| 47 | Returning an error will prevent the ldisc from | ||
| 48 | being attached. Can sleep. | ||
| 44 | 49 | ||
| 45 | close() - This is called on a terminal when the line | 50 | close() - This is called on a terminal when the line |
| 46 | discipline is being unplugged. At the point of | 51 | discipline is being unplugged. At the point of |
| @@ -52,9 +57,16 @@ hangup() - Called when the tty line is hung up. | |||
| 52 | No further calls into the ldisc code will occur. | 57 | No further calls into the ldisc code will occur. |
| 53 | The return value is ignored. Can sleep. | 58 | The return value is ignored. Can sleep. |
| 54 | 59 | ||
| 55 | write() - A process is writing data through the line | 60 | read() - (optional) A process requests reading data from |
| 56 | discipline. Multiple write calls are serialized | 61 | the line. Multiple read calls may occur in parallel |
| 57 | by the tty layer for the ldisc. May sleep. | 62 | and the ldisc must deal with serialization issues. |
| 63 | If not defined, the process will receive an EIO | ||
| 64 | error. May sleep. | ||
| 65 | |||
| 66 | write() - (optional) A process requests writing data to the | ||
| 67 | line. Multiple write calls are serialized by the | ||
| 68 | tty layer for the ldisc. If not defined, the | ||
| 69 | process will receive an EIO error. May sleep. | ||
| 58 | 70 | ||
| 59 | flush_buffer() - (optional) May be called at any point between | 71 | flush_buffer() - (optional) May be called at any point between |
| 60 | open and close, and instructs the line discipline | 72 | open and close, and instructs the line discipline |
| @@ -69,27 +81,33 @@ set_termios() - (optional) Called on termios structure changes. | |||
| 69 | termios semaphore so allowed to sleep. Serialized | 81 | termios semaphore so allowed to sleep. Serialized |
| 70 | against itself only. | 82 | against itself only. |
| 71 | 83 | ||
| 72 | read() - Move data from the line discipline to the user. | 84 | poll() - (optional) Check the status for the poll/select |
| 73 | Multiple read calls may occur in parallel and the | 85 | calls. Multiple poll calls may occur in parallel. |
| 74 | ldisc must deal with serialization issues. May | 86 | May sleep. |
| 75 | sleep. | ||
| 76 | |||
| 77 | poll() - Check the status for the poll/select calls. Multiple | ||
| 78 | poll calls may occur in parallel. May sleep. | ||
| 79 | 87 | ||
| 80 | ioctl() - Called when an ioctl is handed to the tty layer | 88 | ioctl() - (optional) Called when an ioctl is handed to the |
| 81 | that might be for the ldisc. Multiple ioctl calls | 89 | tty layer that might be for the ldisc. Multiple |
| 82 | may occur in parallel. May sleep. | 90 | ioctl calls may occur in parallel. May sleep. |
| 83 | 91 | ||
| 84 | compat_ioctl() - Called when a 32 bit ioctl is handed to the tty layer | 92 | compat_ioctl() - (optional) Called when a 32 bit ioctl is handed |
| 85 | that might be for the ldisc. Multiple ioctl calls | 93 | to the tty layer that might be for the ldisc. |
| 86 | may occur in parallel. May sleep. | 94 | Multiple ioctl calls may occur in parallel. |
| 95 | May sleep. | ||
| 87 | 96 | ||
| 88 | Driver Side Interfaces: | 97 | Driver Side Interfaces: |
| 89 | 98 | ||
| 90 | receive_buf() - Hand buffers of bytes from the driver to the ldisc | 99 | receive_buf() - (optional) Called by the low-level driver to hand |
| 91 | for processing. Semantics currently rather | 100 | a buffer of received bytes to the ldisc for |
| 92 | mysterious 8( | 101 | processing. The number of bytes is guaranteed not |
| 102 | to exceed the current value of tty->receive_room. | ||
| 103 | All bytes must be processed. | ||
| 104 | |||
| 105 | receive_buf2() - (optional) Called by the low-level driver to hand | ||
| 106 | a buffer of received bytes to the ldisc for | ||
| 107 | processing. Returns the number of bytes processed. | ||
| 108 | |||
| 109 | If both receive_buf() and receive_buf2() are | ||
| 110 | defined, receive_buf2() should be preferred. | ||
| 93 | 111 | ||
| 94 | write_wakeup() - May be called at any point between open and close. | 112 | write_wakeup() - May be called at any point between open and close. |
| 95 | The TTY_DO_WRITE_WAKEUP flag indicates if a call | 113 | The TTY_DO_WRITE_WAKEUP flag indicates if a call |
diff --git a/arch/arm64/include/asm/dcc.h b/arch/arm64/include/asm/dcc.h new file mode 100644 index 000000000000..65e0190e97c8 --- /dev/null +++ b/arch/arm64/include/asm/dcc.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved. | ||
| 2 | * | ||
| 3 | * This program is free software; you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License version 2 and | ||
| 5 | * only version 2 as published by the Free Software Foundation. | ||
| 6 | * | ||
| 7 | * This program is distributed in the hope that it will be useful, | ||
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 10 | * GNU General Public License for more details. | ||
| 11 | * | ||
| 12 | * A call to __dcc_getchar() or __dcc_putchar() is typically followed by | ||
| 13 | * a call to __dcc_getstatus(). We want to make sure that the CPU does | ||
| 14 | * not speculative read the DCC status before executing the read or write | ||
| 15 | * instruction. That's what the ISBs are for. | ||
| 16 | * | ||
| 17 | * The 'volatile' ensures that the compiler does not cache the status bits, | ||
| 18 | * and instead reads the DCC register every time. | ||
| 19 | */ | ||
| 20 | #ifndef __ASM_DCC_H | ||
| 21 | #define __ASM_DCC_H | ||
| 22 | |||
| 23 | #include <asm/barrier.h> | ||
| 24 | |||
| 25 | static inline u32 __dcc_getstatus(void) | ||
| 26 | { | ||
| 27 | u32 ret; | ||
| 28 | |||
| 29 | asm volatile("mrs %0, mdccsr_el0" : "=r" (ret)); | ||
| 30 | |||
| 31 | return ret; | ||
| 32 | } | ||
| 33 | |||
| 34 | static inline char __dcc_getchar(void) | ||
| 35 | { | ||
| 36 | char c; | ||
| 37 | |||
| 38 | asm volatile("mrs %0, dbgdtrrx_el0" : "=r" (c)); | ||
| 39 | isb(); | ||
| 40 | |||
| 41 | return c; | ||
| 42 | } | ||
| 43 | |||
| 44 | static inline void __dcc_putchar(char c) | ||
| 45 | { | ||
| 46 | /* | ||
| 47 | * The typecast is to make absolutely certain that 'c' is | ||
| 48 | * zero-extended. | ||
| 49 | */ | ||
| 50 | asm volatile("msr dbgdtrtx_el0, %0" | ||
| 51 | : : "r" ((unsigned long)(unsigned char)c)); | ||
| 52 | isb(); | ||
| 53 | } | ||
| 54 | |||
| 55 | #endif | ||
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c index 7680d5213ff8..45df4bf914f8 100644 --- a/drivers/char/pcmcia/synclink_cs.c +++ b/drivers/char/pcmcia/synclink_cs.c | |||
| @@ -2507,15 +2507,6 @@ static int mgslpc_open(struct tty_struct *tty, struct file * filp) | |||
| 2507 | printk("%s(%d):mgslpc_open(%s), old ref count = %d\n", | 2507 | printk("%s(%d):mgslpc_open(%s), old ref count = %d\n", |
| 2508 | __FILE__, __LINE__, tty->driver->name, port->count); | 2508 | __FILE__, __LINE__, tty->driver->name, port->count); |
| 2509 | 2509 | ||
| 2510 | /* If port is closing, signal caller to try again */ | ||
| 2511 | if (port->flags & ASYNC_CLOSING){ | ||
| 2512 | wait_event_interruptible_tty(tty, port->close_wait, | ||
| 2513 | !(port->flags & ASYNC_CLOSING)); | ||
| 2514 | retval = ((port->flags & ASYNC_HUP_NOTIFY) ? | ||
| 2515 | -EAGAIN : -ERESTARTSYS); | ||
| 2516 | goto cleanup; | ||
| 2517 | } | ||
| 2518 | |||
| 2519 | port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 2510 | port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
| 2520 | 2511 | ||
| 2521 | spin_lock_irqsave(&info->netlock, flags); | 2512 | spin_lock_irqsave(&info->netlock, flags); |
diff --git a/drivers/dma/hsu/Kconfig b/drivers/dma/hsu/Kconfig index 2810dca70612..c70841731a80 100644 --- a/drivers/dma/hsu/Kconfig +++ b/drivers/dma/hsu/Kconfig | |||
| @@ -5,10 +5,5 @@ config HSU_DMA | |||
| 5 | select DMA_VIRTUAL_CHANNELS | 5 | select DMA_VIRTUAL_CHANNELS |
| 6 | 6 | ||
| 7 | config HSU_DMA_PCI | 7 | config HSU_DMA_PCI |
| 8 | tristate "High Speed UART DMA PCI driver" | 8 | tristate |
| 9 | depends on PCI | 9 | depends on HSU_DMA && PCI |
| 10 | select HSU_DMA | ||
| 11 | help | ||
| 12 | Support the High Speed UART DMA on the platfroms that | ||
| 13 | enumerate it as a PCI device. For example, Intel Medfield | ||
| 14 | has integrated this HSU DMA controller. | ||
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c index 7669c7dd1e34..823ad728aecf 100644 --- a/drivers/dma/hsu/hsu.c +++ b/drivers/dma/hsu/hsu.c | |||
| @@ -146,7 +146,7 @@ irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr) | |||
| 146 | u32 sr; | 146 | u32 sr; |
| 147 | 147 | ||
| 148 | /* Sanity check */ | 148 | /* Sanity check */ |
| 149 | if (nr >= chip->pdata->nr_channels) | 149 | if (nr >= chip->hsu->nr_channels) |
| 150 | return IRQ_NONE; | 150 | return IRQ_NONE; |
| 151 | 151 | ||
| 152 | hsuc = &chip->hsu->chan[nr]; | 152 | hsuc = &chip->hsu->chan[nr]; |
| @@ -375,7 +375,6 @@ static void hsu_dma_free_chan_resources(struct dma_chan *chan) | |||
| 375 | int hsu_dma_probe(struct hsu_dma_chip *chip) | 375 | int hsu_dma_probe(struct hsu_dma_chip *chip) |
| 376 | { | 376 | { |
| 377 | struct hsu_dma *hsu; | 377 | struct hsu_dma *hsu; |
| 378 | struct hsu_dma_platform_data *pdata = chip->pdata; | ||
| 379 | void __iomem *addr = chip->regs + chip->offset; | 378 | void __iomem *addr = chip->regs + chip->offset; |
| 380 | unsigned short i; | 379 | unsigned short i; |
| 381 | int ret; | 380 | int ret; |
| @@ -386,25 +385,16 @@ int hsu_dma_probe(struct hsu_dma_chip *chip) | |||
| 386 | 385 | ||
| 387 | chip->hsu = hsu; | 386 | chip->hsu = hsu; |
| 388 | 387 | ||
| 389 | if (!pdata) { | 388 | /* Calculate nr_channels from the IO space length */ |
| 390 | pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL); | 389 | hsu->nr_channels = (chip->length - chip->offset) / HSU_DMA_CHAN_LENGTH; |
| 391 | if (!pdata) | ||
| 392 | return -ENOMEM; | ||
| 393 | 390 | ||
| 394 | chip->pdata = pdata; | 391 | hsu->chan = devm_kcalloc(chip->dev, hsu->nr_channels, |
| 395 | |||
| 396 | /* Guess nr_channels from the IO space length */ | ||
| 397 | pdata->nr_channels = (chip->length - chip->offset) / | ||
| 398 | HSU_DMA_CHAN_LENGTH; | ||
| 399 | } | ||
| 400 | |||
| 401 | hsu->chan = devm_kcalloc(chip->dev, pdata->nr_channels, | ||
| 402 | sizeof(*hsu->chan), GFP_KERNEL); | 392 | sizeof(*hsu->chan), GFP_KERNEL); |
| 403 | if (!hsu->chan) | 393 | if (!hsu->chan) |
| 404 | return -ENOMEM; | 394 | return -ENOMEM; |
| 405 | 395 | ||
| 406 | INIT_LIST_HEAD(&hsu->dma.channels); | 396 | INIT_LIST_HEAD(&hsu->dma.channels); |
| 407 | for (i = 0; i < pdata->nr_channels; i++) { | 397 | for (i = 0; i < hsu->nr_channels; i++) { |
| 408 | struct hsu_dma_chan *hsuc = &hsu->chan[i]; | 398 | struct hsu_dma_chan *hsuc = &hsu->chan[i]; |
| 409 | 399 | ||
| 410 | hsuc->vchan.desc_free = hsu_dma_desc_free; | 400 | hsuc->vchan.desc_free = hsu_dma_desc_free; |
| @@ -440,7 +430,7 @@ int hsu_dma_probe(struct hsu_dma_chip *chip) | |||
| 440 | if (ret) | 430 | if (ret) |
| 441 | return ret; | 431 | return ret; |
| 442 | 432 | ||
| 443 | dev_info(chip->dev, "Found HSU DMA, %d channels\n", pdata->nr_channels); | 433 | dev_info(chip->dev, "Found HSU DMA, %d channels\n", hsu->nr_channels); |
| 444 | return 0; | 434 | return 0; |
| 445 | } | 435 | } |
| 446 | EXPORT_SYMBOL_GPL(hsu_dma_probe); | 436 | EXPORT_SYMBOL_GPL(hsu_dma_probe); |
| @@ -452,7 +442,7 @@ int hsu_dma_remove(struct hsu_dma_chip *chip) | |||
| 452 | 442 | ||
| 453 | dma_async_device_unregister(&hsu->dma); | 443 | dma_async_device_unregister(&hsu->dma); |
| 454 | 444 | ||
| 455 | for (i = 0; i < chip->pdata->nr_channels; i++) { | 445 | for (i = 0; i < hsu->nr_channels; i++) { |
| 456 | struct hsu_dma_chan *hsuc = &hsu->chan[i]; | 446 | struct hsu_dma_chan *hsuc = &hsu->chan[i]; |
| 457 | 447 | ||
| 458 | tasklet_kill(&hsuc->vchan.task); | 448 | tasklet_kill(&hsuc->vchan.task); |
diff --git a/drivers/dma/hsu/hsu.h b/drivers/dma/hsu/hsu.h index eeb9fff66967..f06579c6d548 100644 --- a/drivers/dma/hsu/hsu.h +++ b/drivers/dma/hsu/hsu.h | |||
| @@ -107,6 +107,7 @@ struct hsu_dma { | |||
| 107 | 107 | ||
| 108 | /* channels */ | 108 | /* channels */ |
| 109 | struct hsu_dma_chan *chan; | 109 | struct hsu_dma_chan *chan; |
| 110 | unsigned short nr_channels; | ||
| 110 | }; | 111 | }; |
| 111 | 112 | ||
| 112 | static inline struct hsu_dma *to_hsu_dma(struct dma_device *ddev) | 113 | static inline struct hsu_dma *to_hsu_dma(struct dma_device *ddev) |
diff --git a/drivers/dma/hsu/pci.c b/drivers/dma/hsu/pci.c index 77879e6ddc4c..e2db76bd56d8 100644 --- a/drivers/dma/hsu/pci.c +++ b/drivers/dma/hsu/pci.c | |||
| @@ -31,7 +31,7 @@ static irqreturn_t hsu_pci_irq(int irq, void *dev) | |||
| 31 | irqreturn_t ret = IRQ_NONE; | 31 | irqreturn_t ret = IRQ_NONE; |
| 32 | 32 | ||
| 33 | dmaisr = readl(chip->regs + HSU_PCI_DMAISR); | 33 | dmaisr = readl(chip->regs + HSU_PCI_DMAISR); |
| 34 | for (i = 0; i < chip->pdata->nr_channels; i++) { | 34 | for (i = 0; i < chip->hsu->nr_channels; i++) { |
| 35 | if (dmaisr & 0x1) | 35 | if (dmaisr & 0x1) |
| 36 | ret |= hsu_dma_irq(chip, i); | 36 | ret |= hsu_dma_irq(chip, i); |
| 37 | dmaisr >>= 1; | 37 | dmaisr >>= 1; |
diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c index bc912611fe09..2175225af742 100644 --- a/drivers/isdn/i4l/isdn_tty.c +++ b/drivers/isdn/i4l/isdn_tty.c | |||
| @@ -1582,7 +1582,7 @@ isdn_tty_close(struct tty_struct *tty, struct file *filp) | |||
| 1582 | * line status register. | 1582 | * line status register. |
| 1583 | */ | 1583 | */ |
| 1584 | if (port->flags & ASYNC_INITIALIZED) { | 1584 | if (port->flags & ASYNC_INITIALIZED) { |
| 1585 | tty_wait_until_sent_from_close(tty, 3000); /* 30 seconds timeout */ | 1585 | tty_wait_until_sent(tty, 3000); /* 30 seconds timeout */ |
| 1586 | /* | 1586 | /* |
| 1587 | * Before we drop DTR, make sure the UART transmitter | 1587 | * Before we drop DTR, make sure the UART transmitter |
| 1588 | * has completely drained; this is especially | 1588 | * has completely drained; this is especially |
diff --git a/drivers/tty/cyclades.c b/drivers/tty/cyclades.c index 87f6578c6f4a..d4a1331675ed 100644 --- a/drivers/tty/cyclades.c +++ b/drivers/tty/cyclades.c | |||
| @@ -1577,15 +1577,6 @@ static int cy_open(struct tty_struct *tty, struct file *filp) | |||
| 1577 | #endif | 1577 | #endif |
| 1578 | 1578 | ||
| 1579 | /* | 1579 | /* |
| 1580 | * If the port is the middle of closing, bail out now | ||
| 1581 | */ | ||
| 1582 | if (info->port.flags & ASYNC_CLOSING) { | ||
| 1583 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 1584 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 1585 | return (info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN: -ERESTARTSYS; | ||
| 1586 | } | ||
| 1587 | |||
| 1588 | /* | ||
| 1589 | * Start up serial port | 1580 | * Start up serial port |
| 1590 | */ | 1581 | */ |
| 1591 | retval = cy_startup(info, tty); | 1582 | retval = cy_startup(info, tty); |
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig index 2509d057b99c..574da15fe618 100644 --- a/drivers/tty/hvc/Kconfig +++ b/drivers/tty/hvc/Kconfig | |||
| @@ -81,7 +81,7 @@ config HVC_UDBG | |||
| 81 | 81 | ||
| 82 | config HVC_DCC | 82 | config HVC_DCC |
| 83 | bool "ARM JTAG DCC console" | 83 | bool "ARM JTAG DCC console" |
| 84 | depends on ARM | 84 | depends on ARM || ARM64 |
| 85 | select HVC_DRIVER | 85 | select HVC_DRIVER |
| 86 | help | 86 | help |
| 87 | This console uses the JTAG DCC on ARM to create a console under the HVC | 87 | This console uses the JTAG DCC on ARM to create a console under the HVC |
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c index 4e9c4cc9e1b5..e46d628998f5 100644 --- a/drivers/tty/hvc/hvc_console.c +++ b/drivers/tty/hvc/hvc_console.c | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #include <linux/kernel.h> | 29 | #include <linux/kernel.h> |
| 30 | #include <linux/kthread.h> | 30 | #include <linux/kthread.h> |
| 31 | #include <linux/list.h> | 31 | #include <linux/list.h> |
| 32 | #include <linux/module.h> | 32 | #include <linux/init.h> |
| 33 | #include <linux/major.h> | 33 | #include <linux/major.h> |
| 34 | #include <linux/atomic.h> | 34 | #include <linux/atomic.h> |
| 35 | #include <linux/sysrq.h> | 35 | #include <linux/sysrq.h> |
| @@ -418,7 +418,7 @@ static void hvc_close(struct tty_struct *tty, struct file * filp) | |||
| 418 | * there is no buffered data otherwise sleeps on a wait queue | 418 | * there is no buffered data otherwise sleeps on a wait queue |
| 419 | * waking periodically to check chars_in_buffer(). | 419 | * waking periodically to check chars_in_buffer(). |
| 420 | */ | 420 | */ |
| 421 | tty_wait_until_sent_from_close(tty, HVC_CLOSE_WAIT); | 421 | tty_wait_until_sent(tty, HVC_CLOSE_WAIT); |
| 422 | } else { | 422 | } else { |
| 423 | if (hp->port.count < 0) | 423 | if (hp->port.count < 0) |
| 424 | printk(KERN_ERR "hvc_close %X: oops, count is %d\n", | 424 | printk(KERN_ERR "hvc_close %X: oops, count is %d\n", |
| @@ -1005,19 +1005,3 @@ put_tty: | |||
| 1005 | out: | 1005 | out: |
| 1006 | return err; | 1006 | return err; |
| 1007 | } | 1007 | } |
| 1008 | |||
| 1009 | /* This isn't particularly necessary due to this being a console driver | ||
| 1010 | * but it is nice to be thorough. | ||
| 1011 | */ | ||
| 1012 | static void __exit hvc_exit(void) | ||
| 1013 | { | ||
| 1014 | if (hvc_driver) { | ||
| 1015 | kthread_stop(hvc_task); | ||
| 1016 | |||
| 1017 | tty_unregister_driver(hvc_driver); | ||
| 1018 | /* return tty_struct instances allocated in hvc_init(). */ | ||
| 1019 | put_tty_driver(hvc_driver); | ||
| 1020 | unregister_console(&hvc_console); | ||
| 1021 | } | ||
| 1022 | } | ||
| 1023 | module_exit(hvc_exit); | ||
diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c index 809920d80a66..82f240fb98f0 100644 --- a/drivers/tty/hvc/hvc_dcc.c +++ b/drivers/tty/hvc/hvc_dcc.c | |||
| @@ -70,20 +70,27 @@ static const struct hv_ops hvc_dcc_get_put_ops = { | |||
| 70 | 70 | ||
| 71 | static int __init hvc_dcc_console_init(void) | 71 | static int __init hvc_dcc_console_init(void) |
| 72 | { | 72 | { |
| 73 | int ret; | ||
| 74 | |||
| 73 | if (!hvc_dcc_check()) | 75 | if (!hvc_dcc_check()) |
| 74 | return -ENODEV; | 76 | return -ENODEV; |
| 75 | 77 | ||
| 76 | hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); | 78 | /* Returns -1 if error */ |
| 77 | return 0; | 79 | ret = hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); |
| 80 | |||
| 81 | return ret < 0 ? -ENODEV : 0; | ||
| 78 | } | 82 | } |
| 79 | console_initcall(hvc_dcc_console_init); | 83 | console_initcall(hvc_dcc_console_init); |
| 80 | 84 | ||
| 81 | static int __init hvc_dcc_init(void) | 85 | static int __init hvc_dcc_init(void) |
| 82 | { | 86 | { |
| 87 | struct hvc_struct *p; | ||
| 88 | |||
| 83 | if (!hvc_dcc_check()) | 89 | if (!hvc_dcc_check()) |
| 84 | return -ENODEV; | 90 | return -ENODEV; |
| 85 | 91 | ||
| 86 | hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); | 92 | p = hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); |
| 87 | return 0; | 93 | |
| 94 | return PTR_ERR_OR_ZERO(p); | ||
| 88 | } | 95 | } |
| 89 | device_initcall(hvc_dcc_init); | 96 | device_initcall(hvc_dcc_init); |
diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c index f7ff97c0ad34..5997b1731111 100644 --- a/drivers/tty/hvc/hvcs.c +++ b/drivers/tty/hvc/hvcs.c | |||
| @@ -1230,7 +1230,7 @@ static void hvcs_close(struct tty_struct *tty, struct file *filp) | |||
| 1230 | irq = hvcsd->vdev->irq; | 1230 | irq = hvcsd->vdev->irq; |
| 1231 | spin_unlock_irqrestore(&hvcsd->lock, flags); | 1231 | spin_unlock_irqrestore(&hvcsd->lock, flags); |
| 1232 | 1232 | ||
| 1233 | tty_wait_until_sent_from_close(tty, HVCS_CLOSE_WAIT); | 1233 | tty_wait_until_sent(tty, HVCS_CLOSE_WAIT); |
| 1234 | 1234 | ||
| 1235 | /* | 1235 | /* |
| 1236 | * This line is important because it tells hvcs_open that this | 1236 | * This line is important because it tells hvcs_open that this |
diff --git a/drivers/tty/mips_ejtag_fdc.c b/drivers/tty/mips_ejtag_fdc.c index a8c8cfd52a23..a119176a1855 100644 --- a/drivers/tty/mips_ejtag_fdc.c +++ b/drivers/tty/mips_ejtag_fdc.c | |||
| @@ -977,7 +977,7 @@ static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev) | |||
| 977 | /* Try requesting the IRQ */ | 977 | /* Try requesting the IRQ */ |
| 978 | if (priv->irq >= 0) { | 978 | if (priv->irq >= 0) { |
| 979 | /* | 979 | /* |
| 980 | * IRQF_SHARED, IRQF_NO_SUSPEND: The FDC IRQ may be shared with | 980 | * IRQF_SHARED, IRQF_COND_SUSPEND: The FDC IRQ may be shared with |
| 981 | * other local interrupts such as the timer which sets | 981 | * other local interrupts such as the timer which sets |
| 982 | * IRQF_TIMER (including IRQF_NO_SUSPEND). | 982 | * IRQF_TIMER (including IRQF_NO_SUSPEND). |
| 983 | * | 983 | * |
| @@ -987,7 +987,7 @@ static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev) | |||
| 987 | */ | 987 | */ |
| 988 | ret = devm_request_irq(priv->dev, priv->irq, mips_ejtag_fdc_isr, | 988 | ret = devm_request_irq(priv->dev, priv->irq, mips_ejtag_fdc_isr, |
| 989 | IRQF_PERCPU | IRQF_SHARED | | 989 | IRQF_PERCPU | IRQF_SHARED | |
| 990 | IRQF_NO_THREAD | IRQF_NO_SUSPEND, | 990 | IRQF_NO_THREAD | IRQF_COND_SUSPEND, |
| 991 | priv->fdc_name, priv); | 991 | priv->fdc_name, priv); |
| 992 | if (ret) | 992 | if (ret) |
| 993 | priv->irq = -1; | 993 | priv->irq = -1; |
| @@ -1048,38 +1048,6 @@ err_destroy_ports: | |||
| 1048 | return ret; | 1048 | return ret; |
| 1049 | } | 1049 | } |
| 1050 | 1050 | ||
| 1051 | static int mips_ejtag_fdc_tty_remove(struct mips_cdmm_device *dev) | ||
| 1052 | { | ||
| 1053 | struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev); | ||
| 1054 | struct mips_ejtag_fdc_tty_port *dport; | ||
| 1055 | int nport; | ||
| 1056 | unsigned int cfg; | ||
| 1057 | |||
| 1058 | if (priv->irq >= 0) { | ||
| 1059 | raw_spin_lock_irq(&priv->lock); | ||
| 1060 | cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); | ||
| 1061 | /* Disable interrupts */ | ||
| 1062 | cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); | ||
| 1063 | cfg |= REG_FDCFG_TXINTTHRES_DISABLED; | ||
| 1064 | cfg |= REG_FDCFG_RXINTTHRES_DISABLED; | ||
| 1065 | mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); | ||
| 1066 | raw_spin_unlock_irq(&priv->lock); | ||
| 1067 | } else { | ||
| 1068 | priv->removing = true; | ||
| 1069 | del_timer_sync(&priv->poll_timer); | ||
| 1070 | } | ||
| 1071 | kthread_stop(priv->thread); | ||
| 1072 | if (dev->cpu == 0) | ||
| 1073 | mips_ejtag_fdc_con.tty_drv = NULL; | ||
| 1074 | tty_unregister_driver(priv->driver); | ||
| 1075 | for (nport = 0; nport < NUM_TTY_CHANNELS; nport++) { | ||
| 1076 | dport = &priv->ports[nport]; | ||
| 1077 | tty_port_destroy(&dport->port); | ||
| 1078 | } | ||
| 1079 | put_tty_driver(priv->driver); | ||
| 1080 | return 0; | ||
| 1081 | } | ||
| 1082 | |||
| 1083 | static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev) | 1051 | static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev) |
| 1084 | { | 1052 | { |
| 1085 | struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev); | 1053 | struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev); |
| @@ -1152,12 +1120,11 @@ static struct mips_cdmm_driver mips_ejtag_fdc_tty_driver = { | |||
| 1152 | .name = "mips_ejtag_fdc", | 1120 | .name = "mips_ejtag_fdc", |
| 1153 | }, | 1121 | }, |
| 1154 | .probe = mips_ejtag_fdc_tty_probe, | 1122 | .probe = mips_ejtag_fdc_tty_probe, |
| 1155 | .remove = mips_ejtag_fdc_tty_remove, | ||
| 1156 | .cpu_down = mips_ejtag_fdc_tty_cpu_down, | 1123 | .cpu_down = mips_ejtag_fdc_tty_cpu_down, |
| 1157 | .cpu_up = mips_ejtag_fdc_tty_cpu_up, | 1124 | .cpu_up = mips_ejtag_fdc_tty_cpu_up, |
| 1158 | .id_table = mips_ejtag_fdc_tty_ids, | 1125 | .id_table = mips_ejtag_fdc_tty_ids, |
| 1159 | }; | 1126 | }; |
| 1160 | module_mips_cdmm_driver(mips_ejtag_fdc_tty_driver); | 1127 | builtin_mips_cdmm_driver(mips_ejtag_fdc_tty_driver); |
| 1161 | 1128 | ||
| 1162 | static int __init mips_ejtag_fdc_init_console(void) | 1129 | static int __init mips_ejtag_fdc_init_console(void) |
| 1163 | { | 1130 | { |
diff --git a/drivers/tty/n_r3964.c b/drivers/tty/n_r3964.c index 8b157d68a03e..345111467b85 100644 --- a/drivers/tty/n_r3964.c +++ b/drivers/tty/n_r3964.c | |||
| @@ -276,7 +276,7 @@ static void remove_from_tx_queue(struct r3964_info *pInfo, int error_code) | |||
| 276 | add_msg(pHeader->owner, R3964_MSG_ACK, pHeader->length, | 276 | add_msg(pHeader->owner, R3964_MSG_ACK, pHeader->length, |
| 277 | error_code, NULL); | 277 | error_code, NULL); |
| 278 | } | 278 | } |
| 279 | wake_up_interruptible(&pInfo->read_wait); | 279 | wake_up_interruptible(&pInfo->tty->read_wait); |
| 280 | } | 280 | } |
| 281 | 281 | ||
| 282 | spin_lock_irqsave(&pInfo->lock, flags); | 282 | spin_lock_irqsave(&pInfo->lock, flags); |
| @@ -542,7 +542,7 @@ static void on_receive_block(struct r3964_info *pInfo) | |||
| 542 | pBlock); | 542 | pBlock); |
| 543 | } | 543 | } |
| 544 | } | 544 | } |
| 545 | wake_up_interruptible(&pInfo->read_wait); | 545 | wake_up_interruptible(&pInfo->tty->read_wait); |
| 546 | 546 | ||
| 547 | pInfo->state = R3964_IDLE; | 547 | pInfo->state = R3964_IDLE; |
| 548 | 548 | ||
| @@ -978,8 +978,8 @@ static int r3964_open(struct tty_struct *tty) | |||
| 978 | } | 978 | } |
| 979 | 979 | ||
| 980 | spin_lock_init(&pInfo->lock); | 980 | spin_lock_init(&pInfo->lock); |
| 981 | mutex_init(&pInfo->read_lock); | ||
| 981 | pInfo->tty = tty; | 982 | pInfo->tty = tty; |
| 982 | init_waitqueue_head(&pInfo->read_wait); | ||
| 983 | pInfo->priority = R3964_MASTER; | 983 | pInfo->priority = R3964_MASTER; |
| 984 | pInfo->rx_first = pInfo->rx_last = NULL; | 984 | pInfo->rx_first = pInfo->rx_last = NULL; |
| 985 | pInfo->tx_first = pInfo->tx_last = NULL; | 985 | pInfo->tx_first = pInfo->tx_last = NULL; |
| @@ -1045,7 +1045,6 @@ static void r3964_close(struct tty_struct *tty) | |||
| 1045 | } | 1045 | } |
| 1046 | 1046 | ||
| 1047 | /* Free buffers: */ | 1047 | /* Free buffers: */ |
| 1048 | wake_up_interruptible(&pInfo->read_wait); | ||
| 1049 | kfree(pInfo->rx_buf); | 1048 | kfree(pInfo->rx_buf); |
| 1050 | TRACE_M("r3964_close - rx_buf kfree %p", pInfo->rx_buf); | 1049 | TRACE_M("r3964_close - rx_buf kfree %p", pInfo->rx_buf); |
| 1051 | kfree(pInfo->tx_buf); | 1050 | kfree(pInfo->tx_buf); |
| @@ -1065,7 +1064,16 @@ static ssize_t r3964_read(struct tty_struct *tty, struct file *file, | |||
| 1065 | 1064 | ||
| 1066 | TRACE_L("read()"); | 1065 | TRACE_L("read()"); |
| 1067 | 1066 | ||
| 1068 | tty_lock(tty); | 1067 | /* |
| 1068 | * Internal serialization of reads. | ||
| 1069 | */ | ||
| 1070 | if (file->f_flags & O_NONBLOCK) { | ||
| 1071 | if (!mutex_trylock(&pInfo->read_lock)) | ||
| 1072 | return -EAGAIN; | ||
| 1073 | } else { | ||
| 1074 | if (mutex_lock_interruptible(&pInfo->read_lock)) | ||
| 1075 | return -ERESTARTSYS; | ||
| 1076 | } | ||
| 1069 | 1077 | ||
| 1070 | pClient = findClient(pInfo, task_pid(current)); | 1078 | pClient = findClient(pInfo, task_pid(current)); |
| 1071 | if (pClient) { | 1079 | if (pClient) { |
| @@ -1077,7 +1085,7 @@ static ssize_t r3964_read(struct tty_struct *tty, struct file *file, | |||
| 1077 | goto unlock; | 1085 | goto unlock; |
| 1078 | } | 1086 | } |
| 1079 | /* block until there is a message: */ | 1087 | /* block until there is a message: */ |
| 1080 | wait_event_interruptible_tty(tty, pInfo->read_wait, | 1088 | wait_event_interruptible(tty->read_wait, |
| 1081 | (pMsg = remove_msg(pInfo, pClient))); | 1089 | (pMsg = remove_msg(pInfo, pClient))); |
| 1082 | } | 1090 | } |
| 1083 | 1091 | ||
| @@ -1107,7 +1115,7 @@ static ssize_t r3964_read(struct tty_struct *tty, struct file *file, | |||
| 1107 | } | 1115 | } |
| 1108 | ret = -EPERM; | 1116 | ret = -EPERM; |
| 1109 | unlock: | 1117 | unlock: |
| 1110 | tty_unlock(tty); | 1118 | mutex_unlock(&pInfo->read_lock); |
| 1111 | return ret; | 1119 | return ret; |
| 1112 | } | 1120 | } |
| 1113 | 1121 | ||
| @@ -1156,8 +1164,6 @@ static ssize_t r3964_write(struct tty_struct *tty, struct file *file, | |||
| 1156 | pHeader->locks = 0; | 1164 | pHeader->locks = 0; |
| 1157 | pHeader->owner = NULL; | 1165 | pHeader->owner = NULL; |
| 1158 | 1166 | ||
| 1159 | tty_lock(tty); | ||
| 1160 | |||
| 1161 | pClient = findClient(pInfo, task_pid(current)); | 1167 | pClient = findClient(pInfo, task_pid(current)); |
| 1162 | if (pClient) { | 1168 | if (pClient) { |
| 1163 | pHeader->owner = pClient; | 1169 | pHeader->owner = pClient; |
| @@ -1175,8 +1181,6 @@ static ssize_t r3964_write(struct tty_struct *tty, struct file *file, | |||
| 1175 | add_tx_queue(pInfo, pHeader); | 1181 | add_tx_queue(pInfo, pHeader); |
| 1176 | trigger_transmit(pInfo); | 1182 | trigger_transmit(pInfo); |
| 1177 | 1183 | ||
| 1178 | tty_unlock(tty); | ||
| 1179 | |||
| 1180 | return 0; | 1184 | return 0; |
| 1181 | } | 1185 | } |
| 1182 | 1186 | ||
| @@ -1227,7 +1231,7 @@ static unsigned int r3964_poll(struct tty_struct *tty, struct file *file, | |||
| 1227 | 1231 | ||
| 1228 | pClient = findClient(pInfo, task_pid(current)); | 1232 | pClient = findClient(pInfo, task_pid(current)); |
| 1229 | if (pClient) { | 1233 | if (pClient) { |
| 1230 | poll_wait(file, &pInfo->read_wait, wait); | 1234 | poll_wait(file, &tty->read_wait, wait); |
| 1231 | spin_lock_irqsave(&pInfo->lock, flags); | 1235 | spin_lock_irqsave(&pInfo->lock, flags); |
| 1232 | pMsg = pClient->first_msg; | 1236 | pMsg = pClient->first_msg; |
| 1233 | spin_unlock_irqrestore(&pInfo->lock, flags); | 1237 | spin_unlock_irqrestore(&pInfo->lock, flags); |
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c index b09023b07169..13844261cd5f 100644 --- a/drivers/tty/n_tty.c +++ b/drivers/tty/n_tty.c | |||
| @@ -201,7 +201,7 @@ static void n_tty_kick_worker(struct tty_struct *tty) | |||
| 201 | */ | 201 | */ |
| 202 | WARN_RATELIMIT(test_bit(TTY_LDISC_HALTED, &tty->flags), | 202 | WARN_RATELIMIT(test_bit(TTY_LDISC_HALTED, &tty->flags), |
| 203 | "scheduling buffer work for halted ldisc\n"); | 203 | "scheduling buffer work for halted ldisc\n"); |
| 204 | queue_work(system_unbound_wq, &tty->port->buf.work); | 204 | tty_buffer_restart_work(tty->port); |
| 205 | } | 205 | } |
| 206 | } | 206 | } |
| 207 | 207 | ||
| @@ -1179,8 +1179,6 @@ static void n_tty_receive_break(struct tty_struct *tty) | |||
| 1179 | put_tty_queue('\0', ldata); | 1179 | put_tty_queue('\0', ldata); |
| 1180 | } | 1180 | } |
| 1181 | put_tty_queue('\0', ldata); | 1181 | put_tty_queue('\0', ldata); |
| 1182 | if (waitqueue_active(&tty->read_wait)) | ||
| 1183 | wake_up_interruptible_poll(&tty->read_wait, POLLIN); | ||
| 1184 | } | 1182 | } |
| 1185 | 1183 | ||
| 1186 | /** | 1184 | /** |
| @@ -1237,8 +1235,6 @@ static void n_tty_receive_parity_error(struct tty_struct *tty, unsigned char c) | |||
| 1237 | put_tty_queue('\0', ldata); | 1235 | put_tty_queue('\0', ldata); |
| 1238 | } else | 1236 | } else |
| 1239 | put_tty_queue(c, ldata); | 1237 | put_tty_queue(c, ldata); |
| 1240 | if (waitqueue_active(&tty->read_wait)) | ||
| 1241 | wake_up_interruptible_poll(&tty->read_wait, POLLIN); | ||
| 1242 | } | 1238 | } |
| 1243 | 1239 | ||
| 1244 | static void | 1240 | static void |
| @@ -2142,37 +2138,15 @@ extern ssize_t redirected_tty_write(struct file *, const char __user *, | |||
| 2142 | 2138 | ||
| 2143 | static int job_control(struct tty_struct *tty, struct file *file) | 2139 | static int job_control(struct tty_struct *tty, struct file *file) |
| 2144 | { | 2140 | { |
| 2145 | struct pid *pgrp; | ||
| 2146 | |||
| 2147 | /* Job control check -- must be done at start and after | 2141 | /* Job control check -- must be done at start and after |
| 2148 | every sleep (POSIX.1 7.1.1.4). */ | 2142 | every sleep (POSIX.1 7.1.1.4). */ |
| 2149 | /* NOTE: not yet done after every sleep pending a thorough | 2143 | /* NOTE: not yet done after every sleep pending a thorough |
| 2150 | check of the logic of this change. -- jlc */ | 2144 | check of the logic of this change. -- jlc */ |
| 2151 | /* don't stop on /dev/console */ | 2145 | /* don't stop on /dev/console */ |
| 2152 | if (file->f_op->write == redirected_tty_write || | 2146 | if (file->f_op->write == redirected_tty_write) |
| 2153 | current->signal->tty != tty) | ||
| 2154 | return 0; | 2147 | return 0; |
| 2155 | 2148 | ||
| 2156 | rcu_read_lock(); | 2149 | return __tty_check_change(tty, SIGTTIN); |
| 2157 | pgrp = task_pgrp(current); | ||
| 2158 | |||
| 2159 | spin_lock_irq(&tty->ctrl_lock); | ||
| 2160 | if (!tty->pgrp) | ||
| 2161 | printk(KERN_ERR "n_tty_read: no tty->pgrp!\n"); | ||
| 2162 | else if (pgrp != tty->pgrp) { | ||
| 2163 | spin_unlock_irq(&tty->ctrl_lock); | ||
| 2164 | if (is_ignored(SIGTTIN) || is_current_pgrp_orphaned()) { | ||
| 2165 | rcu_read_unlock(); | ||
| 2166 | return -EIO; | ||
| 2167 | } | ||
| 2168 | kill_pgrp(pgrp, SIGTTIN, 1); | ||
| 2169 | rcu_read_unlock(); | ||
| 2170 | set_thread_flag(TIF_SIGPENDING); | ||
| 2171 | return -ERESTARTSYS; | ||
| 2172 | } | ||
| 2173 | spin_unlock_irq(&tty->ctrl_lock); | ||
| 2174 | rcu_read_unlock(); | ||
| 2175 | return 0; | ||
| 2176 | } | 2150 | } |
| 2177 | 2151 | ||
| 2178 | 2152 | ||
diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c index 4d5937c185c1..a45660f62db5 100644 --- a/drivers/tty/pty.c +++ b/drivers/tty/pty.c | |||
| @@ -7,7 +7,6 @@ | |||
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #include <linux/module.h> | 9 | #include <linux/module.h> |
| 10 | |||
| 11 | #include <linux/errno.h> | 10 | #include <linux/errno.h> |
| 12 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
| 13 | #include <linux/tty.h> | 12 | #include <linux/tty.h> |
| @@ -501,6 +500,10 @@ static int pty_bsd_ioctl(struct tty_struct *tty, | |||
| 501 | } | 500 | } |
| 502 | 501 | ||
| 503 | static int legacy_count = CONFIG_LEGACY_PTY_COUNT; | 502 | static int legacy_count = CONFIG_LEGACY_PTY_COUNT; |
| 503 | /* | ||
| 504 | * not really modular, but the easiest way to keep compat with existing | ||
| 505 | * bootargs behaviour is to continue using module_param here. | ||
| 506 | */ | ||
| 504 | module_param(legacy_count, int, 0); | 507 | module_param(legacy_count, int, 0); |
| 505 | 508 | ||
| 506 | /* | 509 | /* |
| @@ -877,4 +880,4 @@ static int __init pty_init(void) | |||
| 877 | unix98_pty_init(); | 880 | unix98_pty_init(); |
| 878 | return 0; | 881 | return 0; |
| 879 | } | 882 | } |
| 880 | module_init(pty_init); | 883 | device_initcall(pty_init); |
diff --git a/drivers/tty/rocket.c b/drivers/tty/rocket.c index c8dd8dc31086..802eac7e561b 100644 --- a/drivers/tty/rocket.c +++ b/drivers/tty/rocket.c | |||
| @@ -895,14 +895,6 @@ static int rp_open(struct tty_struct *tty, struct file *filp) | |||
| 895 | if (!page) | 895 | if (!page) |
| 896 | return -ENOMEM; | 896 | return -ENOMEM; |
| 897 | 897 | ||
| 898 | if (port->flags & ASYNC_CLOSING) { | ||
| 899 | retval = wait_for_completion_interruptible(&info->close_wait); | ||
| 900 | free_page(page); | ||
| 901 | if (retval) | ||
| 902 | return retval; | ||
| 903 | return ((port->flags & ASYNC_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS); | ||
| 904 | } | ||
| 905 | |||
| 906 | /* | 898 | /* |
| 907 | * We must not sleep from here until the port is marked fully in use. | 899 | * We must not sleep from here until the port is marked fully in use. |
| 908 | */ | 900 | */ |
| @@ -1057,7 +1049,6 @@ static void rp_close(struct tty_struct *tty, struct file *filp) | |||
| 1057 | mutex_unlock(&port->mutex); | 1049 | mutex_unlock(&port->mutex); |
| 1058 | tty_port_tty_set(port, NULL); | 1050 | tty_port_tty_set(port, NULL); |
| 1059 | 1051 | ||
| 1060 | wake_up_interruptible(&port->close_wait); | ||
| 1061 | complete_all(&info->close_wait); | 1052 | complete_all(&info->close_wait); |
| 1062 | atomic_dec(&rp_num_ports_open); | 1053 | atomic_dec(&rp_num_ports_open); |
| 1063 | 1054 | ||
| @@ -1511,10 +1502,6 @@ static void rp_hangup(struct tty_struct *tty) | |||
| 1511 | #endif | 1502 | #endif |
| 1512 | rp_flush_buffer(tty); | 1503 | rp_flush_buffer(tty); |
| 1513 | spin_lock_irqsave(&info->port.lock, flags); | 1504 | spin_lock_irqsave(&info->port.lock, flags); |
| 1514 | if (info->port.flags & ASYNC_CLOSING) { | ||
| 1515 | spin_unlock_irqrestore(&info->port.lock, flags); | ||
| 1516 | return; | ||
| 1517 | } | ||
| 1518 | if (info->port.count) | 1505 | if (info->port.count) |
| 1519 | atomic_dec(&rp_num_ports_open); | 1506 | atomic_dec(&rp_num_ports_open); |
| 1520 | clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); | 1507 | clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]); |
diff --git a/drivers/tty/serial/68328serial.c b/drivers/tty/serial/68328serial.c index 748c18f8c8cd..0140ba4aacde 100644 --- a/drivers/tty/serial/68328serial.c +++ b/drivers/tty/serial/68328serial.c | |||
| @@ -560,8 +560,8 @@ static void rs_fair_output(void) | |||
| 560 | struct m68k_serial *info = &m68k_soft[0]; | 560 | struct m68k_serial *info = &m68k_soft[0]; |
| 561 | char c; | 561 | char c; |
| 562 | 562 | ||
| 563 | if (info == 0) return; | 563 | if (info == NULL) return; |
| 564 | if (info->xmit_buf == 0) return; | 564 | if (info->xmit_buf == NULL) return; |
| 565 | 565 | ||
| 566 | local_irq_save(flags); | 566 | local_irq_save(flags); |
| 567 | left = info->xmit_cnt; | 567 | left = info->xmit_cnt; |
| @@ -1071,7 +1071,6 @@ static void rs_close(struct tty_struct *tty, struct file * filp) | |||
| 1071 | wake_up_interruptible(&port->open_wait); | 1071 | wake_up_interruptible(&port->open_wait); |
| 1072 | } | 1072 | } |
| 1073 | port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | 1073 | port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); |
| 1074 | wake_up_interruptible(&port->close_wait); | ||
| 1075 | local_irq_restore(flags); | 1074 | local_irq_restore(flags); |
| 1076 | } | 1075 | } |
| 1077 | 1076 | ||
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index 271d12137649..39126460c1f5 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c | |||
| @@ -569,6 +569,9 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev) | |||
| 569 | for (i = 0; i < nr_uarts; i++) { | 569 | for (i = 0; i < nr_uarts; i++) { |
| 570 | struct uart_8250_port *up = &serial8250_ports[i]; | 570 | struct uart_8250_port *up = &serial8250_ports[i]; |
| 571 | 571 | ||
| 572 | if (up->port.type == PORT_8250_CIR) | ||
| 573 | continue; | ||
| 574 | |||
| 572 | if (up->port.dev) | 575 | if (up->port.dev) |
| 573 | continue; | 576 | continue; |
| 574 | 577 | ||
| @@ -1027,13 +1030,24 @@ int serial8250_register_8250_port(struct uart_8250_port *up) | |||
| 1027 | if (up->dl_write) | 1030 | if (up->dl_write) |
| 1028 | uart->dl_write = up->dl_write; | 1031 | uart->dl_write = up->dl_write; |
| 1029 | 1032 | ||
| 1030 | if (serial8250_isa_config != NULL) | 1033 | if (uart->port.type != PORT_8250_CIR) { |
| 1031 | serial8250_isa_config(0, &uart->port, | 1034 | if (serial8250_isa_config != NULL) |
| 1032 | &uart->capabilities); | 1035 | serial8250_isa_config(0, &uart->port, |
| 1036 | &uart->capabilities); | ||
| 1037 | |||
| 1038 | ret = uart_add_one_port(&serial8250_reg, | ||
| 1039 | &uart->port); | ||
| 1040 | if (ret == 0) | ||
| 1041 | ret = uart->port.line; | ||
| 1042 | } else { | ||
| 1043 | dev_info(uart->port.dev, | ||
| 1044 | "skipping CIR port at 0x%lx / 0x%llx, IRQ %d\n", | ||
| 1045 | uart->port.iobase, | ||
| 1046 | (unsigned long long)uart->port.mapbase, | ||
| 1047 | uart->port.irq); | ||
| 1033 | 1048 | ||
| 1034 | ret = uart_add_one_port(&serial8250_reg, &uart->port); | 1049 | ret = 0; |
| 1035 | if (ret == 0) | 1050 | } |
| 1036 | ret = uart->port.line; | ||
| 1037 | } | 1051 | } |
| 1038 | mutex_unlock(&serial_mutex); | 1052 | mutex_unlock(&serial_mutex); |
| 1039 | 1053 | ||
diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index e508939daea3..78259d3c6a55 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c | |||
| @@ -54,9 +54,6 @@ static void __dma_rx_complete(void *param) | |||
| 54 | struct dma_tx_state state; | 54 | struct dma_tx_state state; |
| 55 | int count; | 55 | int count; |
| 56 | 56 | ||
| 57 | dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, | ||
| 58 | dma->rx_size, DMA_FROM_DEVICE); | ||
| 59 | |||
| 60 | dma->rx_running = 0; | 57 | dma->rx_running = 0; |
| 61 | dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); | 58 | dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); |
| 62 | 59 | ||
| @@ -152,9 +149,6 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) | |||
| 152 | 149 | ||
| 153 | dma->rx_cookie = dmaengine_submit(desc); | 150 | dma->rx_cookie = dmaengine_submit(desc); |
| 154 | 151 | ||
| 155 | dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, | ||
| 156 | dma->rx_size, DMA_FROM_DEVICE); | ||
| 157 | |||
| 158 | dma_async_issue_pending(dma->rxchan); | 152 | dma_async_issue_pending(dma->rxchan); |
| 159 | 153 | ||
| 160 | return 0; | 154 | return 0; |
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 06324f17a0cb..a0cdbf35dcb1 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c | |||
| @@ -63,6 +63,9 @@ struct dw8250_data { | |||
| 63 | struct clk *pclk; | 63 | struct clk *pclk; |
| 64 | struct reset_control *rst; | 64 | struct reset_control *rst; |
| 65 | struct uart_8250_dma dma; | 65 | struct uart_8250_dma dma; |
| 66 | |||
| 67 | unsigned int skip_autocfg:1; | ||
| 68 | unsigned int uart_16550_compatible:1; | ||
| 66 | }; | 69 | }; |
| 67 | 70 | ||
| 68 | #define BYT_PRV_CLK 0x800 | 71 | #define BYT_PRV_CLK 0x800 |
| @@ -244,24 +247,77 @@ out: | |||
| 244 | serial8250_do_set_termios(p, termios, old); | 247 | serial8250_do_set_termios(p, termios, old); |
| 245 | } | 248 | } |
| 246 | 249 | ||
| 247 | static bool dw8250_dma_filter(struct dma_chan *chan, void *param) | 250 | /* |
| 251 | * dw8250_fallback_dma_filter will prevent the UART from getting just any free | ||
| 252 | * channel on platforms that have DMA engines, but don't have any channels | ||
| 253 | * assigned to the UART. | ||
| 254 | * | ||
| 255 | * REVISIT: This is a work around for limitation in the DMA Engine API. Once the | ||
| 256 | * core problem is fixed, this function is no longer needed. | ||
| 257 | */ | ||
| 258 | static bool dw8250_fallback_dma_filter(struct dma_chan *chan, void *param) | ||
| 248 | { | 259 | { |
| 249 | return false; | 260 | return false; |
| 250 | } | 261 | } |
| 251 | 262 | ||
| 252 | static void dw8250_setup_port(struct uart_8250_port *up) | 263 | static bool dw8250_idma_filter(struct dma_chan *chan, void *param) |
| 264 | { | ||
| 265 | return param == chan->device->dev->parent; | ||
| 266 | } | ||
| 267 | |||
| 268 | static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) | ||
| 253 | { | 269 | { |
| 254 | struct uart_port *p = &up->port; | 270 | if (p->dev->of_node) { |
| 255 | u32 reg = readl(p->membase + DW_UART_UCV); | 271 | struct device_node *np = p->dev->of_node; |
| 272 | int id; | ||
| 273 | |||
| 274 | /* get index of serial line, if found in DT aliases */ | ||
| 275 | id = of_alias_get_id(np, "serial"); | ||
| 276 | if (id >= 0) | ||
| 277 | p->line = id; | ||
| 278 | #ifdef CONFIG_64BIT | ||
| 279 | if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { | ||
| 280 | p->serial_in = dw8250_serial_inq; | ||
| 281 | p->serial_out = dw8250_serial_outq; | ||
| 282 | p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; | ||
| 283 | p->type = PORT_OCTEON; | ||
| 284 | data->usr_reg = 0x27; | ||
| 285 | data->skip_autocfg = true; | ||
| 286 | } | ||
| 287 | #endif | ||
| 288 | } else if (has_acpi_companion(p->dev)) { | ||
| 289 | p->iotype = UPIO_MEM32; | ||
| 290 | p->regshift = 2; | ||
| 291 | p->serial_in = dw8250_serial_in32; | ||
| 292 | p->set_termios = dw8250_set_termios; | ||
| 293 | /* So far none of there implement the Busy Functionality */ | ||
| 294 | data->uart_16550_compatible = true; | ||
| 295 | } | ||
| 296 | |||
| 297 | /* Platforms with iDMA */ | ||
| 298 | if (platform_get_resource_byname(to_platform_device(p->dev), | ||
| 299 | IORESOURCE_MEM, "lpss_priv")) { | ||
| 300 | p->set_termios = dw8250_set_termios; | ||
| 301 | data->dma.rx_param = p->dev->parent; | ||
| 302 | data->dma.tx_param = p->dev->parent; | ||
| 303 | data->dma.fn = dw8250_idma_filter; | ||
| 304 | } | ||
| 305 | } | ||
| 306 | |||
| 307 | static void dw8250_setup_port(struct uart_port *p) | ||
| 308 | { | ||
| 309 | struct uart_8250_port *up = up_to_u8250p(p); | ||
| 310 | u32 reg; | ||
| 256 | 311 | ||
| 257 | /* | 312 | /* |
| 258 | * If the Component Version Register returns zero, we know that | 313 | * If the Component Version Register returns zero, we know that |
| 259 | * ADDITIONAL_FEATURES are not enabled. No need to go any further. | 314 | * ADDITIONAL_FEATURES are not enabled. No need to go any further. |
| 260 | */ | 315 | */ |
| 316 | reg = readl(p->membase + DW_UART_UCV); | ||
| 261 | if (!reg) | 317 | if (!reg) |
| 262 | return; | 318 | return; |
| 263 | 319 | ||
| 264 | dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n", | 320 | dev_dbg(p->dev, "Designware UART version %c.%c%c\n", |
| 265 | (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); | 321 | (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); |
| 266 | 322 | ||
| 267 | reg = readl(p->membase + DW_UART_CPR); | 323 | reg = readl(p->membase + DW_UART_CPR); |
| @@ -273,7 +329,6 @@ static void dw8250_setup_port(struct uart_8250_port *up) | |||
| 273 | p->type = PORT_16550A; | 329 | p->type = PORT_16550A; |
| 274 | p->flags |= UPF_FIXED_TYPE; | 330 | p->flags |= UPF_FIXED_TYPE; |
| 275 | p->fifosize = DW_UART_CPR_FIFO_SIZE(reg); | 331 | p->fifosize = DW_UART_CPR_FIFO_SIZE(reg); |
| 276 | up->tx_loadsz = p->fifosize; | ||
| 277 | up->capabilities = UART_CAP_FIFO; | 332 | up->capabilities = UART_CAP_FIFO; |
| 278 | } | 333 | } |
| 279 | 334 | ||
| @@ -281,166 +336,91 @@ static void dw8250_setup_port(struct uart_8250_port *up) | |||
| 281 | up->capabilities |= UART_CAP_AFE; | 336 | up->capabilities |= UART_CAP_AFE; |
| 282 | } | 337 | } |
| 283 | 338 | ||
| 284 | static int dw8250_probe_of(struct uart_port *p, | 339 | static int dw8250_probe(struct platform_device *pdev) |
| 285 | struct dw8250_data *data) | ||
| 286 | { | 340 | { |
| 287 | struct device_node *np = p->dev->of_node; | 341 | struct uart_8250_port uart = {}; |
| 288 | struct uart_8250_port *up = up_to_u8250p(p); | 342 | struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 289 | u32 val; | 343 | int irq = platform_get_irq(pdev, 0); |
| 290 | bool has_ucv = true; | 344 | struct uart_port *p = &uart.port; |
| 291 | int id; | 345 | struct dw8250_data *data; |
| 346 | int err; | ||
| 347 | u32 val; | ||
| 292 | 348 | ||
| 293 | #ifdef CONFIG_64BIT | 349 | if (!regs) { |
| 294 | if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { | 350 | dev_err(&pdev->dev, "no registers defined\n"); |
| 295 | p->serial_in = dw8250_serial_inq; | 351 | return -EINVAL; |
| 296 | p->serial_out = dw8250_serial_outq; | ||
| 297 | p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; | ||
| 298 | p->type = PORT_OCTEON; | ||
| 299 | data->usr_reg = 0x27; | ||
| 300 | has_ucv = false; | ||
| 301 | } else | ||
| 302 | #endif | ||
| 303 | if (!of_property_read_u32(np, "reg-io-width", &val)) { | ||
| 304 | switch (val) { | ||
| 305 | case 1: | ||
| 306 | break; | ||
| 307 | case 4: | ||
| 308 | p->iotype = UPIO_MEM32; | ||
| 309 | p->serial_in = dw8250_serial_in32; | ||
| 310 | p->serial_out = dw8250_serial_out32; | ||
| 311 | break; | ||
| 312 | default: | ||
| 313 | dev_err(p->dev, "unsupported reg-io-width (%u)\n", val); | ||
| 314 | return -EINVAL; | ||
| 315 | } | ||
| 316 | } | 352 | } |
| 317 | if (has_ucv) | ||
| 318 | dw8250_setup_port(up); | ||
| 319 | 353 | ||
| 320 | /* if we have a valid fifosize, try hooking up DMA here */ | 354 | if (irq < 0) { |
| 321 | if (p->fifosize) { | 355 | if (irq != -EPROBE_DEFER) |
| 322 | up->dma = &data->dma; | 356 | dev_err(&pdev->dev, "cannot get irq\n"); |
| 323 | 357 | return irq; | |
| 324 | up->dma->rxconf.src_maxburst = p->fifosize / 4; | ||
| 325 | up->dma->txconf.dst_maxburst = p->fifosize / 4; | ||
| 326 | } | 358 | } |
| 327 | 359 | ||
| 328 | if (!of_property_read_u32(np, "reg-shift", &val)) | 360 | spin_lock_init(&p->lock); |
| 361 | p->mapbase = regs->start; | ||
| 362 | p->irq = irq; | ||
| 363 | p->handle_irq = dw8250_handle_irq; | ||
| 364 | p->pm = dw8250_do_pm; | ||
| 365 | p->type = PORT_8250; | ||
| 366 | p->flags = UPF_SHARE_IRQ | UPF_FIXED_PORT; | ||
| 367 | p->dev = &pdev->dev; | ||
| 368 | p->iotype = UPIO_MEM; | ||
| 369 | p->serial_in = dw8250_serial_in; | ||
| 370 | p->serial_out = dw8250_serial_out; | ||
| 371 | |||
| 372 | p->membase = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); | ||
| 373 | if (!p->membase) | ||
| 374 | return -ENOMEM; | ||
| 375 | |||
| 376 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | ||
| 377 | if (!data) | ||
| 378 | return -ENOMEM; | ||
| 379 | |||
| 380 | data->dma.fn = dw8250_fallback_dma_filter; | ||
| 381 | data->usr_reg = DW_UART_USR; | ||
| 382 | p->private_data = data; | ||
| 383 | |||
| 384 | data->uart_16550_compatible = device_property_read_bool(p->dev, | ||
| 385 | "snps,uart-16550-compatible"); | ||
| 386 | |||
| 387 | err = device_property_read_u32(p->dev, "reg-shift", &val); | ||
| 388 | if (!err) | ||
| 329 | p->regshift = val; | 389 | p->regshift = val; |
| 330 | 390 | ||
| 331 | /* get index of serial line, if found in DT aliases */ | 391 | err = device_property_read_u32(p->dev, "reg-io-width", &val); |
| 332 | id = of_alias_get_id(np, "serial"); | 392 | if (!err && val == 4) { |
| 333 | if (id >= 0) | 393 | p->iotype = UPIO_MEM32; |
| 334 | p->line = id; | 394 | p->serial_in = dw8250_serial_in32; |
| 395 | p->serial_out = dw8250_serial_out32; | ||
| 396 | } | ||
| 335 | 397 | ||
| 336 | if (of_property_read_bool(np, "dcd-override")) { | 398 | if (device_property_read_bool(p->dev, "dcd-override")) { |
| 337 | /* Always report DCD as active */ | 399 | /* Always report DCD as active */ |
| 338 | data->msr_mask_on |= UART_MSR_DCD; | 400 | data->msr_mask_on |= UART_MSR_DCD; |
| 339 | data->msr_mask_off |= UART_MSR_DDCD; | 401 | data->msr_mask_off |= UART_MSR_DDCD; |
| 340 | } | 402 | } |
| 341 | 403 | ||
| 342 | if (of_property_read_bool(np, "dsr-override")) { | 404 | if (device_property_read_bool(p->dev, "dsr-override")) { |
| 343 | /* Always report DSR as active */ | 405 | /* Always report DSR as active */ |
| 344 | data->msr_mask_on |= UART_MSR_DSR; | 406 | data->msr_mask_on |= UART_MSR_DSR; |
| 345 | data->msr_mask_off |= UART_MSR_DDSR; | 407 | data->msr_mask_off |= UART_MSR_DDSR; |
| 346 | } | 408 | } |
| 347 | 409 | ||
| 348 | if (of_property_read_bool(np, "cts-override")) { | 410 | if (device_property_read_bool(p->dev, "cts-override")) { |
| 349 | /* Always report CTS as active */ | 411 | /* Always report CTS as active */ |
| 350 | data->msr_mask_on |= UART_MSR_CTS; | 412 | data->msr_mask_on |= UART_MSR_CTS; |
| 351 | data->msr_mask_off |= UART_MSR_DCTS; | 413 | data->msr_mask_off |= UART_MSR_DCTS; |
| 352 | } | 414 | } |
| 353 | 415 | ||
| 354 | if (of_property_read_bool(np, "ri-override")) { | 416 | if (device_property_read_bool(p->dev, "ri-override")) { |
| 355 | /* Always report Ring indicator as inactive */ | 417 | /* Always report Ring indicator as inactive */ |
| 356 | data->msr_mask_off |= UART_MSR_RI; | 418 | data->msr_mask_off |= UART_MSR_RI; |
| 357 | data->msr_mask_off |= UART_MSR_TERI; | 419 | data->msr_mask_off |= UART_MSR_TERI; |
| 358 | } | 420 | } |
| 359 | 421 | ||
| 360 | return 0; | ||
| 361 | } | ||
| 362 | |||
| 363 | static bool dw8250_idma_filter(struct dma_chan *chan, void *param) | ||
| 364 | { | ||
| 365 | struct device *dev = param; | ||
| 366 | |||
| 367 | if (dev != chan->device->dev->parent) | ||
| 368 | return false; | ||
| 369 | |||
| 370 | return true; | ||
| 371 | } | ||
| 372 | |||
| 373 | static int dw8250_probe_acpi(struct uart_8250_port *up, | ||
| 374 | struct dw8250_data *data) | ||
| 375 | { | ||
| 376 | struct uart_port *p = &up->port; | ||
| 377 | |||
| 378 | dw8250_setup_port(up); | ||
| 379 | |||
| 380 | p->iotype = UPIO_MEM32; | ||
| 381 | p->serial_in = dw8250_serial_in32; | ||
| 382 | p->serial_out = dw8250_serial_out32; | ||
| 383 | p->regshift = 2; | ||
| 384 | |||
| 385 | /* Platforms with iDMA */ | ||
| 386 | if (platform_get_resource_byname(to_platform_device(up->port.dev), | ||
| 387 | IORESOURCE_MEM, "lpss_priv")) { | ||
| 388 | data->dma.rx_param = up->port.dev->parent; | ||
| 389 | data->dma.tx_param = up->port.dev->parent; | ||
| 390 | data->dma.fn = dw8250_idma_filter; | ||
| 391 | } | ||
| 392 | |||
| 393 | up->dma = &data->dma; | ||
| 394 | up->dma->rxconf.src_maxburst = p->fifosize / 4; | ||
| 395 | up->dma->txconf.dst_maxburst = p->fifosize / 4; | ||
| 396 | |||
| 397 | up->port.set_termios = dw8250_set_termios; | ||
| 398 | |||
| 399 | return 0; | ||
| 400 | } | ||
| 401 | |||
| 402 | static int dw8250_probe(struct platform_device *pdev) | ||
| 403 | { | ||
| 404 | struct uart_8250_port uart = {}; | ||
| 405 | struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 406 | int irq = platform_get_irq(pdev, 0); | ||
| 407 | struct dw8250_data *data; | ||
| 408 | int err; | ||
| 409 | |||
| 410 | if (!regs) { | ||
| 411 | dev_err(&pdev->dev, "no registers defined\n"); | ||
| 412 | return -EINVAL; | ||
| 413 | } | ||
| 414 | |||
| 415 | if (irq < 0) { | ||
| 416 | if (irq != -EPROBE_DEFER) | ||
| 417 | dev_err(&pdev->dev, "cannot get irq\n"); | ||
| 418 | return irq; | ||
| 419 | } | ||
| 420 | |||
| 421 | spin_lock_init(&uart.port.lock); | ||
| 422 | uart.port.mapbase = regs->start; | ||
| 423 | uart.port.irq = irq; | ||
| 424 | uart.port.handle_irq = dw8250_handle_irq; | ||
| 425 | uart.port.pm = dw8250_do_pm; | ||
| 426 | uart.port.type = PORT_8250; | ||
| 427 | uart.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; | ||
| 428 | uart.port.dev = &pdev->dev; | ||
| 429 | |||
| 430 | uart.port.membase = devm_ioremap(&pdev->dev, regs->start, | ||
| 431 | resource_size(regs)); | ||
| 432 | if (!uart.port.membase) | ||
| 433 | return -ENOMEM; | ||
| 434 | |||
| 435 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | ||
| 436 | if (!data) | ||
| 437 | return -ENOMEM; | ||
| 438 | |||
| 439 | data->usr_reg = DW_UART_USR; | ||
| 440 | |||
| 441 | /* Always ask for fixed clock rate from a property. */ | 422 | /* Always ask for fixed clock rate from a property. */ |
| 442 | device_property_read_u32(&pdev->dev, "clock-frequency", | 423 | device_property_read_u32(p->dev, "clock-frequency", &p->uartclk); |
| 443 | &uart.port.uartclk); | ||
| 444 | 424 | ||
| 445 | /* If there is separate baudclk, get the rate from it. */ | 425 | /* If there is separate baudclk, get the rate from it. */ |
| 446 | data->clk = devm_clk_get(&pdev->dev, "baudclk"); | 426 | data->clk = devm_clk_get(&pdev->dev, "baudclk"); |
| @@ -454,11 +434,11 @@ static int dw8250_probe(struct platform_device *pdev) | |||
| 454 | dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n", | 434 | dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n", |
| 455 | err); | 435 | err); |
| 456 | else | 436 | else |
| 457 | uart.port.uartclk = clk_get_rate(data->clk); | 437 | p->uartclk = clk_get_rate(data->clk); |
| 458 | } | 438 | } |
| 459 | 439 | ||
| 460 | /* If no clock rate is defined, fail. */ | 440 | /* If no clock rate is defined, fail. */ |
| 461 | if (!uart.port.uartclk) { | 441 | if (!p->uartclk) { |
| 462 | dev_err(&pdev->dev, "clock rate not defined\n"); | 442 | dev_err(&pdev->dev, "clock rate not defined\n"); |
| 463 | return -EINVAL; | 443 | return -EINVAL; |
| 464 | } | 444 | } |
| @@ -484,26 +464,22 @@ static int dw8250_probe(struct platform_device *pdev) | |||
| 484 | if (!IS_ERR(data->rst)) | 464 | if (!IS_ERR(data->rst)) |
| 485 | reset_control_deassert(data->rst); | 465 | reset_control_deassert(data->rst); |
| 486 | 466 | ||
| 487 | data->dma.rx_param = data; | 467 | dw8250_quirks(p, data); |
| 488 | data->dma.tx_param = data; | ||
| 489 | data->dma.fn = dw8250_dma_filter; | ||
| 490 | 468 | ||
| 491 | uart.port.iotype = UPIO_MEM; | 469 | /* If the Busy Functionality is not implemented, don't handle it */ |
| 492 | uart.port.serial_in = dw8250_serial_in; | 470 | if (data->uart_16550_compatible) { |
| 493 | uart.port.serial_out = dw8250_serial_out; | 471 | p->serial_out = NULL; |
| 494 | uart.port.private_data = data; | 472 | p->handle_irq = NULL; |
| 473 | } | ||
| 495 | 474 | ||
| 496 | if (pdev->dev.of_node) { | 475 | if (!data->skip_autocfg) |
| 497 | err = dw8250_probe_of(&uart.port, data); | 476 | dw8250_setup_port(p); |
| 498 | if (err) | 477 | |
| 499 | goto err_reset; | 478 | /* If we have a valid fifosize, try hooking up DMA */ |
| 500 | } else if (ACPI_HANDLE(&pdev->dev)) { | 479 | if (p->fifosize) { |
| 501 | err = dw8250_probe_acpi(&uart, data); | 480 | data->dma.rxconf.src_maxburst = p->fifosize / 4; |
| 502 | if (err) | 481 | data->dma.txconf.dst_maxburst = p->fifosize / 4; |
| 503 | goto err_reset; | 482 | uart.dma = &data->dma; |
| 504 | } else { | ||
| 505 | err = -ENODEV; | ||
| 506 | goto err_reset; | ||
| 507 | } | 483 | } |
| 508 | 484 | ||
| 509 | data->line = serial8250_register_8250_port(&uart); | 485 | data->line = serial8250_register_8250_port(&uart); |
diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c index faed05f25bc2..ceb85792a5cf 100644 --- a/drivers/tty/serial/8250/8250_early.c +++ b/drivers/tty/serial/8250/8250_early.c | |||
| @@ -29,6 +29,8 @@ | |||
| 29 | #include <linux/tty.h> | 29 | #include <linux/tty.h> |
| 30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
| 31 | #include <linux/console.h> | 31 | #include <linux/console.h> |
| 32 | #include <linux/of.h> | ||
| 33 | #include <linux/of_device.h> | ||
| 32 | #include <linux/serial_reg.h> | 34 | #include <linux/serial_reg.h> |
| 33 | #include <linux/serial.h> | 35 | #include <linux/serial.h> |
| 34 | #include <linux/serial_8250.h> | 36 | #include <linux/serial_8250.h> |
| @@ -152,3 +154,5 @@ int __init early_serial8250_setup(struct earlycon_device *device, | |||
| 152 | } | 154 | } |
| 153 | EARLYCON_DECLARE(uart8250, early_serial8250_setup); | 155 | EARLYCON_DECLARE(uart8250, early_serial8250_setup); |
| 154 | EARLYCON_DECLARE(uart, early_serial8250_setup); | 156 | EARLYCON_DECLARE(uart, early_serial8250_setup); |
| 157 | OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup); | ||
| 158 | OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup); | ||
diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c index 7c1e4be48e7b..49394b4c5cfd 100644 --- a/drivers/tty/serial/8250/8250_ingenic.c +++ b/drivers/tty/serial/8250/8250_ingenic.c | |||
| @@ -21,19 +21,33 @@ | |||
| 21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
| 22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
| 23 | #include <linux/of_fdt.h> | 23 | #include <linux/of_fdt.h> |
| 24 | #include <linux/of_device.h> | ||
| 24 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
| 25 | #include <linux/serial_8250.h> | 26 | #include <linux/serial_8250.h> |
| 26 | #include <linux/serial_core.h> | 27 | #include <linux/serial_core.h> |
| 27 | #include <linux/serial_reg.h> | 28 | #include <linux/serial_reg.h> |
| 28 | 29 | ||
| 30 | #include "8250.h" | ||
| 31 | |||
| 32 | /** ingenic_uart_config: SOC specific config data. */ | ||
| 33 | struct ingenic_uart_config { | ||
| 34 | int tx_loadsz; | ||
| 35 | int fifosize; | ||
| 36 | }; | ||
| 37 | |||
| 29 | struct ingenic_uart_data { | 38 | struct ingenic_uart_data { |
| 30 | struct clk *clk_module; | 39 | struct clk *clk_module; |
| 31 | struct clk *clk_baud; | 40 | struct clk *clk_baud; |
| 32 | int line; | 41 | int line; |
| 33 | }; | 42 | }; |
| 34 | 43 | ||
| 44 | static const struct of_device_id of_match[]; | ||
| 45 | |||
| 35 | #define UART_FCR_UME BIT(4) | 46 | #define UART_FCR_UME BIT(4) |
| 36 | 47 | ||
| 48 | #define UART_MCR_MDCE BIT(7) | ||
| 49 | #define UART_MCR_FCM BIT(6) | ||
| 50 | |||
| 37 | static struct earlycon_device *early_device; | 51 | static struct earlycon_device *early_device; |
| 38 | 52 | ||
| 39 | static uint8_t __init early_in(struct uart_port *port, int offset) | 53 | static uint8_t __init early_in(struct uart_port *port, int offset) |
| @@ -129,6 +143,8 @@ OF_EARLYCON_DECLARE(jz4780_uart, "ingenic,jz4780-uart", | |||
| 129 | 143 | ||
| 130 | static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) | 144 | static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) |
| 131 | { | 145 | { |
| 146 | int ier; | ||
| 147 | |||
| 132 | switch (offset) { | 148 | switch (offset) { |
| 133 | case UART_FCR: | 149 | case UART_FCR: |
| 134 | /* UART module enable */ | 150 | /* UART module enable */ |
| @@ -136,9 +152,22 @@ static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) | |||
| 136 | break; | 152 | break; |
| 137 | 153 | ||
| 138 | case UART_IER: | 154 | case UART_IER: |
| 155 | /* Enable receive timeout interrupt with the | ||
| 156 | * receive line status interrupt */ | ||
| 139 | value |= (value & 0x4) << 2; | 157 | value |= (value & 0x4) << 2; |
| 140 | break; | 158 | break; |
| 141 | 159 | ||
| 160 | case UART_MCR: | ||
| 161 | /* If we have enabled modem status IRQs we should enable modem | ||
| 162 | * mode. */ | ||
| 163 | ier = p->serial_in(p, UART_IER); | ||
| 164 | |||
| 165 | if (ier & UART_IER_MSI) | ||
| 166 | value |= UART_MCR_MDCE | UART_MCR_FCM; | ||
| 167 | else | ||
| 168 | value &= ~(UART_MCR_MDCE | UART_MCR_FCM); | ||
| 169 | break; | ||
| 170 | |||
| 142 | default: | 171 | default: |
| 143 | break; | 172 | break; |
| 144 | } | 173 | } |
| @@ -146,14 +175,45 @@ static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) | |||
| 146 | writeb(value, p->membase + (offset << p->regshift)); | 175 | writeb(value, p->membase + (offset << p->regshift)); |
| 147 | } | 176 | } |
| 148 | 177 | ||
| 178 | static unsigned int ingenic_uart_serial_in(struct uart_port *p, int offset) | ||
| 179 | { | ||
| 180 | unsigned int value; | ||
| 181 | |||
| 182 | value = readb(p->membase + (offset << p->regshift)); | ||
| 183 | |||
| 184 | /* Hide non-16550 compliant bits from higher levels */ | ||
| 185 | switch (offset) { | ||
| 186 | case UART_FCR: | ||
| 187 | value &= ~UART_FCR_UME; | ||
| 188 | break; | ||
| 189 | |||
| 190 | case UART_MCR: | ||
| 191 | value &= ~(UART_MCR_MDCE | UART_MCR_FCM); | ||
| 192 | break; | ||
| 193 | |||
| 194 | default: | ||
| 195 | break; | ||
| 196 | } | ||
| 197 | return value; | ||
| 198 | } | ||
| 199 | |||
| 149 | static int ingenic_uart_probe(struct platform_device *pdev) | 200 | static int ingenic_uart_probe(struct platform_device *pdev) |
| 150 | { | 201 | { |
| 151 | struct uart_8250_port uart = {}; | 202 | struct uart_8250_port uart = {}; |
| 152 | struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 203 | struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 153 | struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 204 | struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 154 | struct ingenic_uart_data *data; | 205 | struct ingenic_uart_data *data; |
| 206 | const struct ingenic_uart_config *cdata; | ||
| 207 | const struct of_device_id *match; | ||
| 155 | int err, line; | 208 | int err, line; |
| 156 | 209 | ||
| 210 | match = of_match_device(of_match, &pdev->dev); | ||
| 211 | if (!match) { | ||
| 212 | dev_err(&pdev->dev, "Error: No device match found\n"); | ||
| 213 | return -ENODEV; | ||
| 214 | } | ||
| 215 | cdata = match->data; | ||
| 216 | |||
| 157 | if (!regs || !irq) { | 217 | if (!regs || !irq) { |
| 158 | dev_err(&pdev->dev, "no registers/irq defined\n"); | 218 | dev_err(&pdev->dev, "no registers/irq defined\n"); |
| 159 | return -EINVAL; | 219 | return -EINVAL; |
| @@ -164,14 +224,18 @@ static int ingenic_uart_probe(struct platform_device *pdev) | |||
| 164 | return -ENOMEM; | 224 | return -ENOMEM; |
| 165 | 225 | ||
| 166 | spin_lock_init(&uart.port.lock); | 226 | spin_lock_init(&uart.port.lock); |
| 167 | uart.port.type = PORT_16550; | 227 | uart.port.type = PORT_16550A; |
| 168 | uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE; | 228 | uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE; |
| 169 | uart.port.iotype = UPIO_MEM; | 229 | uart.port.iotype = UPIO_MEM; |
| 170 | uart.port.mapbase = regs->start; | 230 | uart.port.mapbase = regs->start; |
| 171 | uart.port.regshift = 2; | 231 | uart.port.regshift = 2; |
| 172 | uart.port.serial_out = ingenic_uart_serial_out; | 232 | uart.port.serial_out = ingenic_uart_serial_out; |
| 233 | uart.port.serial_in = ingenic_uart_serial_in; | ||
| 173 | uart.port.irq = irq->start; | 234 | uart.port.irq = irq->start; |
| 174 | uart.port.dev = &pdev->dev; | 235 | uart.port.dev = &pdev->dev; |
| 236 | uart.port.fifosize = cdata->fifosize; | ||
| 237 | uart.tx_loadsz = cdata->tx_loadsz; | ||
| 238 | uart.capabilities = UART_CAP_FIFO | UART_CAP_RTOIE; | ||
| 175 | 239 | ||
| 176 | /* Check for a fixed line number */ | 240 | /* Check for a fixed line number */ |
| 177 | line = of_alias_get_id(pdev->dev.of_node, "serial"); | 241 | line = of_alias_get_id(pdev->dev.of_node, "serial"); |
| @@ -241,10 +305,26 @@ static int ingenic_uart_remove(struct platform_device *pdev) | |||
| 241 | return 0; | 305 | return 0; |
| 242 | } | 306 | } |
| 243 | 307 | ||
| 308 | static const struct ingenic_uart_config jz4740_uart_config = { | ||
| 309 | .tx_loadsz = 8, | ||
| 310 | .fifosize = 16, | ||
| 311 | }; | ||
| 312 | |||
| 313 | static const struct ingenic_uart_config jz4760_uart_config = { | ||
| 314 | .tx_loadsz = 16, | ||
| 315 | .fifosize = 32, | ||
| 316 | }; | ||
| 317 | |||
| 318 | static const struct ingenic_uart_config jz4780_uart_config = { | ||
| 319 | .tx_loadsz = 32, | ||
| 320 | .fifosize = 64, | ||
| 321 | }; | ||
| 322 | |||
| 244 | static const struct of_device_id of_match[] = { | 323 | static const struct of_device_id of_match[] = { |
| 245 | { .compatible = "ingenic,jz4740-uart" }, | 324 | { .compatible = "ingenic,jz4740-uart", .data = &jz4740_uart_config }, |
| 246 | { .compatible = "ingenic,jz4775-uart" }, | 325 | { .compatible = "ingenic,jz4760-uart", .data = &jz4760_uart_config }, |
| 247 | { .compatible = "ingenic,jz4780-uart" }, | 326 | { .compatible = "ingenic,jz4775-uart", .data = &jz4760_uart_config }, |
| 327 | { .compatible = "ingenic,jz4780-uart", .data = &jz4780_uart_config }, | ||
| 248 | { /* sentinel */ } | 328 | { /* sentinel */ } |
| 249 | }; | 329 | }; |
| 250 | MODULE_DEVICE_TABLE(of, of_match); | 330 | MODULE_DEVICE_TABLE(of, of_match); |
diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c new file mode 100644 index 000000000000..88531a36b69c --- /dev/null +++ b/drivers/tty/serial/8250/8250_mid.c | |||
| @@ -0,0 +1,326 @@ | |||
| 1 | /* | ||
| 2 | * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs | ||
| 3 | * | ||
| 4 | * Copyright (C) 2015 Intel Corporation | ||
| 5 | * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/rational.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/pci.h> | ||
| 15 | |||
| 16 | #include <linux/dma/hsu.h> | ||
| 17 | |||
| 18 | #include "8250.h" | ||
| 19 | |||
| 20 | #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b | ||
| 21 | #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c | ||
| 22 | #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d | ||
| 23 | #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191 | ||
| 24 | #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8 | ||
| 25 | |||
| 26 | /* Intel MID Specific registers */ | ||
| 27 | #define INTEL_MID_UART_PS 0x30 | ||
| 28 | #define INTEL_MID_UART_MUL 0x34 | ||
| 29 | #define INTEL_MID_UART_DIV 0x38 | ||
| 30 | |||
| 31 | struct mid8250; | ||
| 32 | |||
| 33 | struct mid8250_board { | ||
| 34 | unsigned long freq; | ||
| 35 | unsigned int base_baud; | ||
| 36 | int (*setup)(struct mid8250 *, struct uart_port *p); | ||
| 37 | void (*exit)(struct mid8250 *); | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct mid8250 { | ||
| 41 | int line; | ||
| 42 | int dma_index; | ||
| 43 | struct pci_dev *dma_dev; | ||
| 44 | struct uart_8250_dma dma; | ||
| 45 | struct mid8250_board *board; | ||
| 46 | struct hsu_dma_chip dma_chip; | ||
| 47 | }; | ||
| 48 | |||
| 49 | /*****************************************************************************/ | ||
| 50 | |||
| 51 | static int pnw_setup(struct mid8250 *mid, struct uart_port *p) | ||
| 52 | { | ||
| 53 | struct pci_dev *pdev = to_pci_dev(p->dev); | ||
| 54 | |||
| 55 | switch (pdev->device) { | ||
| 56 | case PCI_DEVICE_ID_INTEL_PNW_UART1: | ||
| 57 | mid->dma_index = 0; | ||
| 58 | break; | ||
| 59 | case PCI_DEVICE_ID_INTEL_PNW_UART2: | ||
| 60 | mid->dma_index = 1; | ||
| 61 | break; | ||
| 62 | case PCI_DEVICE_ID_INTEL_PNW_UART3: | ||
| 63 | mid->dma_index = 2; | ||
| 64 | break; | ||
| 65 | default: | ||
| 66 | return -EINVAL; | ||
| 67 | } | ||
| 68 | |||
| 69 | mid->dma_dev = pci_get_slot(pdev->bus, | ||
| 70 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 3)); | ||
| 71 | return 0; | ||
| 72 | } | ||
| 73 | |||
| 74 | static int tng_setup(struct mid8250 *mid, struct uart_port *p) | ||
| 75 | { | ||
| 76 | struct pci_dev *pdev = to_pci_dev(p->dev); | ||
| 77 | int index = PCI_FUNC(pdev->devfn); | ||
| 78 | |||
| 79 | /* Currently no support for HSU port0 */ | ||
| 80 | if (index-- == 0) | ||
| 81 | return -ENODEV; | ||
| 82 | |||
| 83 | mid->dma_index = index; | ||
| 84 | mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0)); | ||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | |||
| 88 | static int dnv_handle_irq(struct uart_port *p) | ||
| 89 | { | ||
| 90 | struct mid8250 *mid = p->private_data; | ||
| 91 | int ret; | ||
| 92 | |||
| 93 | ret = hsu_dma_irq(&mid->dma_chip, 0); | ||
| 94 | ret |= hsu_dma_irq(&mid->dma_chip, 1); | ||
| 95 | |||
| 96 | /* For now, letting the HW generate separate interrupt for the UART */ | ||
| 97 | if (ret) | ||
| 98 | return ret; | ||
| 99 | |||
| 100 | return serial8250_handle_irq(p, serial_port_in(p, UART_IIR)); | ||
| 101 | } | ||
| 102 | |||
| 103 | #define DNV_DMA_CHAN_OFFSET 0x80 | ||
| 104 | |||
| 105 | static int dnv_setup(struct mid8250 *mid, struct uart_port *p) | ||
| 106 | { | ||
| 107 | struct hsu_dma_chip *chip = &mid->dma_chip; | ||
| 108 | struct pci_dev *pdev = to_pci_dev(p->dev); | ||
| 109 | int ret; | ||
| 110 | |||
| 111 | chip->dev = &pdev->dev; | ||
| 112 | chip->irq = pdev->irq; | ||
| 113 | chip->regs = p->membase; | ||
| 114 | chip->length = pci_resource_len(pdev, 0); | ||
| 115 | chip->offset = DNV_DMA_CHAN_OFFSET; | ||
| 116 | |||
| 117 | /* Falling back to PIO mode if DMA probing fails */ | ||
| 118 | ret = hsu_dma_probe(chip); | ||
| 119 | if (ret) | ||
| 120 | return 0; | ||
| 121 | |||
| 122 | mid->dma_dev = pdev; | ||
| 123 | |||
| 124 | p->handle_irq = dnv_handle_irq; | ||
| 125 | return 0; | ||
| 126 | } | ||
| 127 | |||
| 128 | static void dnv_exit(struct mid8250 *mid) | ||
| 129 | { | ||
| 130 | if (!mid->dma_dev) | ||
| 131 | return; | ||
| 132 | hsu_dma_remove(&mid->dma_chip); | ||
| 133 | } | ||
| 134 | |||
| 135 | /*****************************************************************************/ | ||
| 136 | |||
| 137 | static void mid8250_set_termios(struct uart_port *p, | ||
| 138 | struct ktermios *termios, | ||
| 139 | struct ktermios *old) | ||
| 140 | { | ||
| 141 | unsigned int baud = tty_termios_baud_rate(termios); | ||
| 142 | struct mid8250 *mid = p->private_data; | ||
| 143 | unsigned short ps = 16; | ||
| 144 | unsigned long fuart = baud * ps; | ||
| 145 | unsigned long w = BIT(24) - 1; | ||
| 146 | unsigned long mul, div; | ||
| 147 | |||
| 148 | if (mid->board->freq < fuart) { | ||
| 149 | /* Find prescaler value that satisfies Fuart < Fref */ | ||
| 150 | if (mid->board->freq > baud) | ||
| 151 | ps = mid->board->freq / baud; /* baud rate too high */ | ||
| 152 | else | ||
| 153 | ps = 1; /* PLL case */ | ||
| 154 | fuart = baud * ps; | ||
| 155 | } else { | ||
| 156 | /* Get Fuart closer to Fref */ | ||
| 157 | fuart *= rounddown_pow_of_two(mid->board->freq / fuart); | ||
| 158 | } | ||
| 159 | |||
| 160 | rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div); | ||
| 161 | p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */ | ||
| 162 | |||
| 163 | writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */ | ||
| 164 | writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */ | ||
| 165 | writel(div, p->membase + INTEL_MID_UART_DIV); | ||
| 166 | |||
| 167 | serial8250_do_set_termios(p, termios, old); | ||
| 168 | } | ||
| 169 | |||
| 170 | static bool mid8250_dma_filter(struct dma_chan *chan, void *param) | ||
| 171 | { | ||
| 172 | struct hsu_dma_slave *s = param; | ||
| 173 | |||
| 174 | if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id) | ||
| 175 | return false; | ||
| 176 | |||
| 177 | chan->private = s; | ||
| 178 | return true; | ||
| 179 | } | ||
| 180 | |||
| 181 | static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port) | ||
| 182 | { | ||
| 183 | struct uart_8250_dma *dma = &mid->dma; | ||
| 184 | struct device *dev = port->port.dev; | ||
| 185 | struct hsu_dma_slave *rx_param; | ||
| 186 | struct hsu_dma_slave *tx_param; | ||
| 187 | |||
| 188 | if (!mid->dma_dev) | ||
| 189 | return 0; | ||
| 190 | |||
| 191 | rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); | ||
| 192 | if (!rx_param) | ||
| 193 | return -ENOMEM; | ||
| 194 | |||
| 195 | tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); | ||
| 196 | if (!tx_param) | ||
| 197 | return -ENOMEM; | ||
| 198 | |||
| 199 | rx_param->chan_id = mid->dma_index * 2 + 1; | ||
| 200 | tx_param->chan_id = mid->dma_index * 2; | ||
| 201 | |||
| 202 | dma->rxconf.src_maxburst = 64; | ||
| 203 | dma->txconf.dst_maxburst = 64; | ||
| 204 | |||
| 205 | rx_param->dma_dev = &mid->dma_dev->dev; | ||
| 206 | tx_param->dma_dev = &mid->dma_dev->dev; | ||
| 207 | |||
| 208 | dma->fn = mid8250_dma_filter; | ||
| 209 | dma->rx_param = rx_param; | ||
| 210 | dma->tx_param = tx_param; | ||
| 211 | |||
| 212 | port->dma = dma; | ||
| 213 | return 0; | ||
| 214 | } | ||
| 215 | |||
| 216 | static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) | ||
| 217 | { | ||
| 218 | struct uart_8250_port uart; | ||
| 219 | struct mid8250 *mid; | ||
| 220 | int ret; | ||
| 221 | |||
| 222 | ret = pcim_enable_device(pdev); | ||
| 223 | if (ret) | ||
| 224 | return ret; | ||
| 225 | |||
| 226 | pci_set_master(pdev); | ||
| 227 | |||
| 228 | mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL); | ||
| 229 | if (!mid) | ||
| 230 | return -ENOMEM; | ||
| 231 | |||
| 232 | mid->board = (struct mid8250_board *)id->driver_data; | ||
| 233 | |||
| 234 | memset(&uart, 0, sizeof(struct uart_8250_port)); | ||
| 235 | |||
| 236 | uart.port.dev = &pdev->dev; | ||
| 237 | uart.port.irq = pdev->irq; | ||
| 238 | uart.port.private_data = mid; | ||
| 239 | uart.port.type = PORT_16750; | ||
| 240 | uart.port.iotype = UPIO_MEM; | ||
| 241 | uart.port.uartclk = mid->board->base_baud * 16; | ||
| 242 | uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; | ||
| 243 | uart.port.set_termios = mid8250_set_termios; | ||
| 244 | |||
| 245 | uart.port.mapbase = pci_resource_start(pdev, 0); | ||
| 246 | uart.port.membase = pcim_iomap(pdev, 0, 0); | ||
| 247 | if (!uart.port.membase) | ||
| 248 | return -ENOMEM; | ||
| 249 | |||
| 250 | if (mid->board->setup) { | ||
| 251 | ret = mid->board->setup(mid, &uart.port); | ||
| 252 | if (ret) | ||
| 253 | return ret; | ||
| 254 | } | ||
| 255 | |||
| 256 | ret = mid8250_dma_setup(mid, &uart); | ||
| 257 | if (ret) | ||
| 258 | goto err; | ||
| 259 | |||
| 260 | ret = serial8250_register_8250_port(&uart); | ||
| 261 | if (ret < 0) | ||
| 262 | goto err; | ||
| 263 | |||
| 264 | mid->line = ret; | ||
| 265 | |||
| 266 | pci_set_drvdata(pdev, mid); | ||
| 267 | return 0; | ||
| 268 | err: | ||
| 269 | if (mid->board->exit) | ||
| 270 | mid->board->exit(mid); | ||
| 271 | return ret; | ||
| 272 | } | ||
| 273 | |||
| 274 | static void mid8250_remove(struct pci_dev *pdev) | ||
| 275 | { | ||
| 276 | struct mid8250 *mid = pci_get_drvdata(pdev); | ||
| 277 | |||
| 278 | if (mid->board->exit) | ||
| 279 | mid->board->exit(mid); | ||
| 280 | |||
| 281 | serial8250_unregister_port(mid->line); | ||
| 282 | } | ||
| 283 | |||
| 284 | static const struct mid8250_board pnw_board = { | ||
| 285 | .freq = 50000000, | ||
| 286 | .base_baud = 115200, | ||
| 287 | .setup = pnw_setup, | ||
| 288 | }; | ||
| 289 | |||
| 290 | static const struct mid8250_board tng_board = { | ||
| 291 | .freq = 38400000, | ||
| 292 | .base_baud = 1843200, | ||
| 293 | .setup = tng_setup, | ||
| 294 | }; | ||
| 295 | |||
| 296 | static const struct mid8250_board dnv_board = { | ||
| 297 | .freq = 133333333, | ||
| 298 | .base_baud = 115200, | ||
| 299 | .setup = dnv_setup, | ||
| 300 | .exit = dnv_exit, | ||
| 301 | }; | ||
| 302 | |||
| 303 | #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board } | ||
| 304 | |||
| 305 | static const struct pci_device_id pci_ids[] = { | ||
| 306 | MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board), | ||
| 307 | MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board), | ||
| 308 | MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board), | ||
| 309 | MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board), | ||
| 310 | MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board), | ||
| 311 | { }, | ||
| 312 | }; | ||
| 313 | MODULE_DEVICE_TABLE(pci, pci_ids); | ||
| 314 | |||
| 315 | static struct pci_driver mid8250_pci_driver = { | ||
| 316 | .name = "8250_mid", | ||
| 317 | .id_table = pci_ids, | ||
| 318 | .probe = mid8250_probe, | ||
| 319 | .remove = mid8250_remove, | ||
| 320 | }; | ||
| 321 | |||
| 322 | module_pci_driver(mid8250_pci_driver); | ||
| 323 | |||
| 324 | MODULE_AUTHOR("Intel Corporation"); | ||
| 325 | MODULE_LICENSE("GPL v2"); | ||
| 326 | MODULE_DESCRIPTION("Intel MID UART driver"); | ||
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c index 826c5c4a2103..a2c0734c76e2 100644 --- a/drivers/tty/serial/8250/8250_omap.c +++ b/drivers/tty/serial/8250/8250_omap.c | |||
| @@ -439,7 +439,6 @@ static void omap_8250_set_termios(struct uart_port *port, | |||
| 439 | priv->xoff = termios->c_cc[VSTOP]; | 439 | priv->xoff = termios->c_cc[VSTOP]; |
| 440 | 440 | ||
| 441 | priv->efr = 0; | 441 | priv->efr = 0; |
| 442 | up->mcr &= ~(UART_MCR_RTS | UART_MCR_XONANY); | ||
| 443 | up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); | 442 | up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); |
| 444 | 443 | ||
| 445 | if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { | 444 | if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { |
| @@ -726,6 +725,7 @@ static void __dma_rx_do_complete(struct uart_8250_port *p, bool error) | |||
| 726 | struct dma_tx_state state; | 725 | struct dma_tx_state state; |
| 727 | int count; | 726 | int count; |
| 728 | unsigned long flags; | 727 | unsigned long flags; |
| 728 | int ret; | ||
| 729 | 729 | ||
| 730 | dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, | 730 | dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, |
| 731 | dma->rx_size, DMA_FROM_DEVICE); | 731 | dma->rx_size, DMA_FROM_DEVICE); |
| @@ -741,8 +741,10 @@ static void __dma_rx_do_complete(struct uart_8250_port *p, bool error) | |||
| 741 | 741 | ||
| 742 | count = dma->rx_size - state.residue; | 742 | count = dma->rx_size - state.residue; |
| 743 | 743 | ||
| 744 | tty_insert_flip_string(tty_port, dma->rx_buf, count); | 744 | ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); |
| 745 | p->port.icount.rx += count; | 745 | |
| 746 | p->port.icount.rx += ret; | ||
| 747 | p->port.icount.buf_overrun += count - ret; | ||
| 746 | unlock: | 748 | unlock: |
| 747 | spin_unlock_irqrestore(&priv->rx_dma_lock, flags); | 749 | spin_unlock_irqrestore(&priv->rx_dma_lock, flags); |
| 748 | 750 | ||
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 68042dd1c525..4097f3f65b3b 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c | |||
| @@ -28,7 +28,6 @@ | |||
| 28 | 28 | ||
| 29 | #include <linux/dmaengine.h> | 29 | #include <linux/dmaengine.h> |
| 30 | #include <linux/platform_data/dma-dw.h> | 30 | #include <linux/platform_data/dma-dw.h> |
| 31 | #include <linux/platform_data/dma-hsu.h> | ||
| 32 | 31 | ||
| 33 | #include "8250.h" | 32 | #include "8250.h" |
| 34 | 33 | ||
| @@ -1508,167 +1507,6 @@ byt_serial_setup(struct serial_private *priv, | |||
| 1508 | return ret; | 1507 | return ret; |
| 1509 | } | 1508 | } |
| 1510 | 1509 | ||
| 1511 | #define INTEL_MID_UART_PS 0x30 | ||
| 1512 | #define INTEL_MID_UART_MUL 0x34 | ||
| 1513 | #define INTEL_MID_UART_DIV 0x38 | ||
| 1514 | |||
| 1515 | static void intel_mid_set_termios(struct uart_port *p, | ||
| 1516 | struct ktermios *termios, | ||
| 1517 | struct ktermios *old, | ||
| 1518 | unsigned long fref) | ||
| 1519 | { | ||
| 1520 | unsigned int baud = tty_termios_baud_rate(termios); | ||
| 1521 | unsigned short ps = 16; | ||
| 1522 | unsigned long fuart = baud * ps; | ||
| 1523 | unsigned long w = BIT(24) - 1; | ||
| 1524 | unsigned long mul, div; | ||
| 1525 | |||
| 1526 | if (fref < fuart) { | ||
| 1527 | /* Find prescaler value that satisfies Fuart < Fref */ | ||
| 1528 | if (fref > baud) | ||
| 1529 | ps = fref / baud; /* baud rate too high */ | ||
| 1530 | else | ||
| 1531 | ps = 1; /* PLL case */ | ||
| 1532 | fuart = baud * ps; | ||
| 1533 | } else { | ||
| 1534 | /* Get Fuart closer to Fref */ | ||
| 1535 | fuart *= rounddown_pow_of_two(fref / fuart); | ||
| 1536 | } | ||
| 1537 | |||
| 1538 | rational_best_approximation(fuart, fref, w, w, &mul, &div); | ||
| 1539 | p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */ | ||
| 1540 | |||
| 1541 | writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */ | ||
| 1542 | writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */ | ||
| 1543 | writel(div, p->membase + INTEL_MID_UART_DIV); | ||
| 1544 | |||
| 1545 | serial8250_do_set_termios(p, termios, old); | ||
| 1546 | } | ||
| 1547 | |||
| 1548 | static void intel_mid_set_termios_38_4M(struct uart_port *p, | ||
| 1549 | struct ktermios *termios, | ||
| 1550 | struct ktermios *old) | ||
| 1551 | { | ||
| 1552 | intel_mid_set_termios(p, termios, old, 38400000); | ||
| 1553 | } | ||
| 1554 | |||
| 1555 | static void intel_mid_set_termios_50M(struct uart_port *p, | ||
| 1556 | struct ktermios *termios, | ||
| 1557 | struct ktermios *old) | ||
| 1558 | { | ||
| 1559 | /* | ||
| 1560 | * The uart clk is 50Mhz, and the baud rate come from: | ||
| 1561 | * baud = 50M * MUL / (DIV * PS * DLAB) | ||
| 1562 | */ | ||
| 1563 | intel_mid_set_termios(p, termios, old, 50000000); | ||
| 1564 | } | ||
| 1565 | |||
| 1566 | static bool intel_mid_dma_filter(struct dma_chan *chan, void *param) | ||
| 1567 | { | ||
| 1568 | struct hsu_dma_slave *s = param; | ||
| 1569 | |||
| 1570 | if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id) | ||
| 1571 | return false; | ||
| 1572 | |||
| 1573 | chan->private = s; | ||
| 1574 | return true; | ||
| 1575 | } | ||
| 1576 | |||
| 1577 | static int intel_mid_serial_setup(struct serial_private *priv, | ||
| 1578 | const struct pciserial_board *board, | ||
| 1579 | struct uart_8250_port *port, int idx, | ||
| 1580 | int index, struct pci_dev *dma_dev) | ||
| 1581 | { | ||
| 1582 | struct device *dev = port->port.dev; | ||
| 1583 | struct uart_8250_dma *dma; | ||
| 1584 | struct hsu_dma_slave *tx_param, *rx_param; | ||
| 1585 | |||
| 1586 | dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); | ||
| 1587 | if (!dma) | ||
| 1588 | return -ENOMEM; | ||
| 1589 | |||
| 1590 | tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); | ||
| 1591 | if (!tx_param) | ||
| 1592 | return -ENOMEM; | ||
| 1593 | |||
| 1594 | rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); | ||
| 1595 | if (!rx_param) | ||
| 1596 | return -ENOMEM; | ||
| 1597 | |||
| 1598 | rx_param->chan_id = index * 2 + 1; | ||
| 1599 | tx_param->chan_id = index * 2; | ||
| 1600 | |||
| 1601 | dma->rxconf.src_maxburst = 64; | ||
| 1602 | dma->txconf.dst_maxburst = 64; | ||
| 1603 | |||
| 1604 | rx_param->dma_dev = &dma_dev->dev; | ||
| 1605 | tx_param->dma_dev = &dma_dev->dev; | ||
| 1606 | |||
| 1607 | dma->fn = intel_mid_dma_filter; | ||
| 1608 | dma->rx_param = rx_param; | ||
| 1609 | dma->tx_param = tx_param; | ||
| 1610 | |||
| 1611 | port->port.type = PORT_16750; | ||
| 1612 | port->port.flags |= UPF_FIXED_PORT | UPF_FIXED_TYPE; | ||
| 1613 | port->dma = dma; | ||
| 1614 | |||
| 1615 | return pci_default_setup(priv, board, port, idx); | ||
| 1616 | } | ||
| 1617 | |||
| 1618 | #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b | ||
| 1619 | #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c | ||
| 1620 | #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d | ||
| 1621 | |||
| 1622 | static int pnw_serial_setup(struct serial_private *priv, | ||
| 1623 | const struct pciserial_board *board, | ||
| 1624 | struct uart_8250_port *port, int idx) | ||
| 1625 | { | ||
| 1626 | struct pci_dev *pdev = priv->dev; | ||
| 1627 | struct pci_dev *dma_dev; | ||
| 1628 | int index; | ||
| 1629 | |||
| 1630 | switch (pdev->device) { | ||
| 1631 | case PCI_DEVICE_ID_INTEL_PNW_UART1: | ||
| 1632 | index = 0; | ||
| 1633 | break; | ||
| 1634 | case PCI_DEVICE_ID_INTEL_PNW_UART2: | ||
| 1635 | index = 1; | ||
| 1636 | break; | ||
| 1637 | case PCI_DEVICE_ID_INTEL_PNW_UART3: | ||
| 1638 | index = 2; | ||
| 1639 | break; | ||
| 1640 | default: | ||
| 1641 | return -EINVAL; | ||
| 1642 | } | ||
| 1643 | |||
| 1644 | dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 3)); | ||
| 1645 | |||
| 1646 | port->port.set_termios = intel_mid_set_termios_50M; | ||
| 1647 | |||
| 1648 | return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev); | ||
| 1649 | } | ||
| 1650 | |||
| 1651 | #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191 | ||
| 1652 | |||
| 1653 | static int tng_serial_setup(struct serial_private *priv, | ||
| 1654 | const struct pciserial_board *board, | ||
| 1655 | struct uart_8250_port *port, int idx) | ||
| 1656 | { | ||
| 1657 | struct pci_dev *pdev = priv->dev; | ||
| 1658 | struct pci_dev *dma_dev; | ||
| 1659 | int index = PCI_FUNC(pdev->devfn); | ||
| 1660 | |||
| 1661 | /* Currently no support for HSU port0 */ | ||
| 1662 | if (index-- == 0) | ||
| 1663 | return -ENODEV; | ||
| 1664 | |||
| 1665 | dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0)); | ||
| 1666 | |||
| 1667 | port->port.set_termios = intel_mid_set_termios_38_4M; | ||
| 1668 | |||
| 1669 | return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev); | ||
| 1670 | } | ||
| 1671 | |||
| 1672 | static int | 1510 | static int |
| 1673 | pci_omegapci_setup(struct serial_private *priv, | 1511 | pci_omegapci_setup(struct serial_private *priv, |
| 1674 | const struct pciserial_board *board, | 1512 | const struct pciserial_board *board, |
| @@ -2212,34 +2050,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { | |||
| 2212 | }, | 2050 | }, |
| 2213 | { | 2051 | { |
| 2214 | .vendor = PCI_VENDOR_ID_INTEL, | 2052 | .vendor = PCI_VENDOR_ID_INTEL, |
| 2215 | .device = PCI_DEVICE_ID_INTEL_PNW_UART1, | ||
| 2216 | .subvendor = PCI_ANY_ID, | ||
| 2217 | .subdevice = PCI_ANY_ID, | ||
| 2218 | .setup = pnw_serial_setup, | ||
| 2219 | }, | ||
| 2220 | { | ||
| 2221 | .vendor = PCI_VENDOR_ID_INTEL, | ||
| 2222 | .device = PCI_DEVICE_ID_INTEL_PNW_UART2, | ||
| 2223 | .subvendor = PCI_ANY_ID, | ||
| 2224 | .subdevice = PCI_ANY_ID, | ||
| 2225 | .setup = pnw_serial_setup, | ||
| 2226 | }, | ||
| 2227 | { | ||
| 2228 | .vendor = PCI_VENDOR_ID_INTEL, | ||
| 2229 | .device = PCI_DEVICE_ID_INTEL_PNW_UART3, | ||
| 2230 | .subvendor = PCI_ANY_ID, | ||
| 2231 | .subdevice = PCI_ANY_ID, | ||
| 2232 | .setup = pnw_serial_setup, | ||
| 2233 | }, | ||
| 2234 | { | ||
| 2235 | .vendor = PCI_VENDOR_ID_INTEL, | ||
| 2236 | .device = PCI_DEVICE_ID_INTEL_TNG_UART, | ||
| 2237 | .subvendor = PCI_ANY_ID, | ||
| 2238 | .subdevice = PCI_ANY_ID, | ||
| 2239 | .setup = tng_serial_setup, | ||
| 2240 | }, | ||
| 2241 | { | ||
| 2242 | .vendor = PCI_VENDOR_ID_INTEL, | ||
| 2243 | .device = PCI_DEVICE_ID_INTEL_BSW_UART1, | 2053 | .device = PCI_DEVICE_ID_INTEL_BSW_UART1, |
| 2244 | .subvendor = PCI_ANY_ID, | 2054 | .subvendor = PCI_ANY_ID, |
| 2245 | .subdevice = PCI_ANY_ID, | 2055 | .subdevice = PCI_ANY_ID, |
| @@ -3119,8 +2929,6 @@ enum pci_board_num_t { | |||
| 3119 | pbn_ADDIDATA_PCIe_8_3906250, | 2929 | pbn_ADDIDATA_PCIe_8_3906250, |
| 3120 | pbn_ce4100_1_115200, | 2930 | pbn_ce4100_1_115200, |
| 3121 | pbn_byt, | 2931 | pbn_byt, |
| 3122 | pbn_pnw, | ||
| 3123 | pbn_tng, | ||
| 3124 | pbn_qrk, | 2932 | pbn_qrk, |
| 3125 | pbn_omegapci, | 2933 | pbn_omegapci, |
| 3126 | pbn_NETMOS9900_2s_115200, | 2934 | pbn_NETMOS9900_2s_115200, |
| @@ -3907,16 +3715,6 @@ static struct pciserial_board pci_boards[] = { | |||
| 3907 | .uart_offset = 0x80, | 3715 | .uart_offset = 0x80, |
| 3908 | .reg_shift = 2, | 3716 | .reg_shift = 2, |
| 3909 | }, | 3717 | }, |
| 3910 | [pbn_pnw] = { | ||
| 3911 | .flags = FL_BASE0, | ||
| 3912 | .num_ports = 1, | ||
| 3913 | .base_baud = 115200, | ||
| 3914 | }, | ||
| 3915 | [pbn_tng] = { | ||
| 3916 | .flags = FL_BASE0, | ||
| 3917 | .num_ports = 1, | ||
| 3918 | .base_baud = 1843200, | ||
| 3919 | }, | ||
| 3920 | [pbn_qrk] = { | 3718 | [pbn_qrk] = { |
| 3921 | .flags = FL_BASE0, | 3719 | .flags = FL_BASE0, |
| 3922 | .num_ports = 1, | 3720 | .num_ports = 1, |
| @@ -4005,6 +3803,13 @@ static const struct pci_device_id blacklist[] = { | |||
| 4005 | { PCI_DEVICE(0x4348, 0x5053), }, /* WCH CH353 1S1P */ | 3803 | { PCI_DEVICE(0x4348, 0x5053), }, /* WCH CH353 1S1P */ |
| 4006 | { PCI_DEVICE(0x1c00, 0x3250), }, /* WCH CH382 2S1P */ | 3804 | { PCI_DEVICE(0x1c00, 0x3250), }, /* WCH CH382 2S1P */ |
| 4007 | { PCI_DEVICE(0x1c00, 0x3470), }, /* WCH CH384 4S */ | 3805 | { PCI_DEVICE(0x1c00, 0x3470), }, /* WCH CH384 4S */ |
| 3806 | |||
| 3807 | /* Intel platforms with MID UART */ | ||
| 3808 | { PCI_VDEVICE(INTEL, 0x081b), }, | ||
| 3809 | { PCI_VDEVICE(INTEL, 0x081c), }, | ||
| 3810 | { PCI_VDEVICE(INTEL, 0x081d), }, | ||
| 3811 | { PCI_VDEVICE(INTEL, 0x1191), }, | ||
| 3812 | { PCI_VDEVICE(INTEL, 0x19d8), }, | ||
| 4008 | }; | 3813 | }; |
| 4009 | 3814 | ||
| 4010 | /* | 3815 | /* |
| @@ -5702,26 +5507,6 @@ static struct pci_device_id serial_pci_tbl[] = { | |||
| 5702 | pbn_byt }, | 5507 | pbn_byt }, |
| 5703 | 5508 | ||
| 5704 | /* | 5509 | /* |
| 5705 | * Intel Penwell | ||
| 5706 | */ | ||
| 5707 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART1, | ||
| 5708 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 5709 | pbn_pnw}, | ||
| 5710 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART2, | ||
| 5711 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 5712 | pbn_pnw}, | ||
| 5713 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART3, | ||
| 5714 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 5715 | pbn_pnw}, | ||
| 5716 | |||
| 5717 | /* | ||
| 5718 | * Intel Tangier | ||
| 5719 | */ | ||
| 5720 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TNG_UART, | ||
| 5721 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 5722 | pbn_tng}, | ||
| 5723 | |||
| 5724 | /* | ||
| 5725 | * Intel Quark x1000 | 5510 | * Intel Quark x1000 |
| 5726 | */ | 5511 | */ |
| 5727 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART, | 5512 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART, |
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 0bbf34035d6a..52d82d2ac726 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c | |||
| @@ -284,7 +284,7 @@ static void default_serial_dl_write(struct uart_8250_port *up, int value) | |||
| 284 | serial_out(up, UART_DLM, value >> 8 & 0xff); | 284 | serial_out(up, UART_DLM, value >> 8 & 0xff); |
| 285 | } | 285 | } |
| 286 | 286 | ||
| 287 | #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X) | 287 | #ifdef CONFIG_SERIAL_8250_RT288X |
| 288 | 288 | ||
| 289 | /* Au1x00/RT288x UART hardware has a weird register layout */ | 289 | /* Au1x00/RT288x UART hardware has a weird register layout */ |
| 290 | static const s8 au_io_in_map[8] = { | 290 | static const s8 au_io_in_map[8] = { |
| @@ -435,7 +435,7 @@ static void set_io_from_upio(struct uart_port *p) | |||
| 435 | p->serial_out = mem32be_serial_out; | 435 | p->serial_out = mem32be_serial_out; |
| 436 | break; | 436 | break; |
| 437 | 437 | ||
| 438 | #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X) | 438 | #ifdef CONFIG_SERIAL_8250_RT288X |
| 439 | case UPIO_AU: | 439 | case UPIO_AU: |
| 440 | p->serial_in = au_serial_in; | 440 | p->serial_in = au_serial_in; |
| 441 | p->serial_out = au_serial_out; | 441 | p->serial_out = au_serial_out; |
| @@ -1246,6 +1246,9 @@ static void autoconfig_irq(struct uart_8250_port *up) | |||
| 1246 | inb_p(ICP); | 1246 | inb_p(ICP); |
| 1247 | } | 1247 | } |
| 1248 | 1248 | ||
| 1249 | if (uart_console(port)) | ||
| 1250 | console_lock(); | ||
| 1251 | |||
| 1249 | /* forget possible initially masked and pending IRQ */ | 1252 | /* forget possible initially masked and pending IRQ */ |
| 1250 | probe_irq_off(probe_irq_on()); | 1253 | probe_irq_off(probe_irq_on()); |
| 1251 | save_mcr = serial_in(up, UART_MCR); | 1254 | save_mcr = serial_in(up, UART_MCR); |
| @@ -1277,6 +1280,9 @@ static void autoconfig_irq(struct uart_8250_port *up) | |||
| 1277 | if (port->flags & UPF_FOURPORT) | 1280 | if (port->flags & UPF_FOURPORT) |
| 1278 | outb_p(save_ICP, ICP); | 1281 | outb_p(save_ICP, ICP); |
| 1279 | 1282 | ||
| 1283 | if (uart_console(port)) | ||
| 1284 | console_unlock(); | ||
| 1285 | |||
| 1280 | port->irq = (irq > 0) ? irq : 0; | 1286 | port->irq = (irq > 0) ? irq : 0; |
| 1281 | } | 1287 | } |
| 1282 | 1288 | ||
| @@ -1807,9 +1813,6 @@ int serial8250_do_startup(struct uart_port *port) | |||
| 1807 | unsigned char lsr, iir; | 1813 | unsigned char lsr, iir; |
| 1808 | int retval; | 1814 | int retval; |
| 1809 | 1815 | ||
| 1810 | if (port->type == PORT_8250_CIR) | ||
| 1811 | return -ENODEV; | ||
| 1812 | |||
| 1813 | if (!port->fifosize) | 1816 | if (!port->fifosize) |
| 1814 | port->fifosize = uart_config[port->type].fifo_size; | 1817 | port->fifosize = uart_config[port->type].fifo_size; |
| 1815 | if (!up->tx_loadsz) | 1818 | if (!up->tx_loadsz) |
| @@ -2230,6 +2233,23 @@ static void serial8250_set_divisor(struct uart_port *port, unsigned int baud, | |||
| 2230 | serial_port_out(port, 0x2, quot_frac); | 2233 | serial_port_out(port, 0x2, quot_frac); |
| 2231 | } | 2234 | } |
| 2232 | 2235 | ||
| 2236 | static unsigned int | ||
| 2237 | serial8250_get_baud_rate(struct uart_port *port, struct ktermios *termios, | ||
| 2238 | struct ktermios *old) | ||
| 2239 | { | ||
| 2240 | unsigned int tolerance = port->uartclk / 100; | ||
| 2241 | |||
| 2242 | /* | ||
| 2243 | * Ask the core to calculate the divisor for us. | ||
| 2244 | * Allow 1% tolerance at the upper limit so uart clks marginally | ||
| 2245 | * slower than nominal still match standard baud rates without | ||
| 2246 | * causing transmission errors. | ||
| 2247 | */ | ||
| 2248 | return uart_get_baud_rate(port, termios, old, | ||
| 2249 | port->uartclk / 16 / 0xffff, | ||
| 2250 | (port->uartclk + tolerance) / 16); | ||
| 2251 | } | ||
| 2252 | |||
| 2233 | void | 2253 | void |
| 2234 | serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, | 2254 | serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, |
| 2235 | struct ktermios *old) | 2255 | struct ktermios *old) |
| @@ -2241,12 +2261,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 2241 | 2261 | ||
| 2242 | cval = serial8250_compute_lcr(up, termios->c_cflag); | 2262 | cval = serial8250_compute_lcr(up, termios->c_cflag); |
| 2243 | 2263 | ||
| 2244 | /* | 2264 | baud = serial8250_get_baud_rate(port, termios, old); |
| 2245 | * Ask the core to calculate the divisor for us. | ||
| 2246 | */ | ||
| 2247 | baud = uart_get_baud_rate(port, termios, old, | ||
| 2248 | port->uartclk / 16 / 0xffff, | ||
| 2249 | port->uartclk / 16); | ||
| 2250 | quot = serial8250_get_divisor(up, baud, &frac); | 2265 | quot = serial8250_get_divisor(up, baud, &frac); |
| 2251 | 2266 | ||
| 2252 | /* | 2267 | /* |
| @@ -2513,14 +2528,8 @@ static void serial8250_release_port(struct uart_port *port) | |||
| 2513 | static int serial8250_request_port(struct uart_port *port) | 2528 | static int serial8250_request_port(struct uart_port *port) |
| 2514 | { | 2529 | { |
| 2515 | struct uart_8250_port *up = up_to_u8250p(port); | 2530 | struct uart_8250_port *up = up_to_u8250p(port); |
| 2516 | int ret; | ||
| 2517 | |||
| 2518 | if (port->type == PORT_8250_CIR) | ||
| 2519 | return -ENODEV; | ||
| 2520 | |||
| 2521 | ret = serial8250_request_std_resource(up); | ||
| 2522 | 2531 | ||
| 2523 | return ret; | 2532 | return serial8250_request_std_resource(up); |
| 2524 | } | 2533 | } |
| 2525 | 2534 | ||
| 2526 | static int fcr_get_rxtrig_bytes(struct uart_8250_port *up) | 2535 | static int fcr_get_rxtrig_bytes(struct uart_8250_port *up) |
| @@ -2668,9 +2677,6 @@ static void serial8250_config_port(struct uart_port *port, int flags) | |||
| 2668 | struct uart_8250_port *up = up_to_u8250p(port); | 2677 | struct uart_8250_port *up = up_to_u8250p(port); |
| 2669 | int ret; | 2678 | int ret; |
| 2670 | 2679 | ||
| 2671 | if (port->type == PORT_8250_CIR) | ||
| 2672 | return; | ||
| 2673 | |||
| 2674 | /* | 2680 | /* |
| 2675 | * Find the region that we can probe for. This in turn | 2681 | * Find the region that we can probe for. This in turn |
| 2676 | * tells us whether we can probe for the type of port. | 2682 | * tells us whether we can probe for the type of port. |
| @@ -2805,6 +2811,27 @@ static void serial8250_console_putchar(struct uart_port *port, int ch) | |||
| 2805 | } | 2811 | } |
| 2806 | 2812 | ||
| 2807 | /* | 2813 | /* |
| 2814 | * Restore serial console when h/w power-off detected | ||
| 2815 | */ | ||
| 2816 | static void serial8250_console_restore(struct uart_8250_port *up) | ||
| 2817 | { | ||
| 2818 | struct uart_port *port = &up->port; | ||
| 2819 | struct ktermios termios; | ||
| 2820 | unsigned int baud, quot, frac = 0; | ||
| 2821 | |||
| 2822 | termios.c_cflag = port->cons->cflag; | ||
| 2823 | if (port->state->port.tty && termios.c_cflag == 0) | ||
| 2824 | termios.c_cflag = port->state->port.tty->termios.c_cflag; | ||
| 2825 | |||
| 2826 | baud = serial8250_get_baud_rate(port, &termios, NULL); | ||
| 2827 | quot = serial8250_get_divisor(up, baud, &frac); | ||
| 2828 | |||
| 2829 | serial8250_set_divisor(port, baud, quot, frac); | ||
| 2830 | serial_port_out(port, UART_LCR, up->lcr); | ||
| 2831 | serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS); | ||
| 2832 | } | ||
| 2833 | |||
| 2834 | /* | ||
| 2808 | * Print a string to the serial port trying not to disturb | 2835 | * Print a string to the serial port trying not to disturb |
| 2809 | * any possible real use of the port... | 2836 | * any possible real use of the port... |
| 2810 | * | 2837 | * |
| @@ -2841,22 +2868,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, | |||
| 2841 | 2868 | ||
| 2842 | /* check scratch reg to see if port powered off during system sleep */ | 2869 | /* check scratch reg to see if port powered off during system sleep */ |
| 2843 | if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { | 2870 | if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { |
| 2844 | struct ktermios termios; | 2871 | serial8250_console_restore(up); |
| 2845 | unsigned int baud, quot, frac = 0; | ||
| 2846 | |||
| 2847 | termios.c_cflag = port->cons->cflag; | ||
| 2848 | if (port->state->port.tty && termios.c_cflag == 0) | ||
| 2849 | termios.c_cflag = port->state->port.tty->termios.c_cflag; | ||
| 2850 | |||
| 2851 | baud = uart_get_baud_rate(port, &termios, NULL, | ||
| 2852 | port->uartclk / 16 / 0xffff, | ||
| 2853 | port->uartclk / 16); | ||
| 2854 | quot = serial8250_get_divisor(up, baud, &frac); | ||
| 2855 | |||
| 2856 | serial8250_set_divisor(port, baud, quot, frac); | ||
| 2857 | serial_port_out(port, UART_LCR, up->lcr); | ||
| 2858 | serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS); | ||
| 2859 | |||
| 2860 | up->canary = 0; | 2872 | up->canary = 0; |
| 2861 | } | 2873 | } |
| 2862 | 2874 | ||
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig index e1de1181b322..e6f5e12a2d83 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig | |||
| @@ -274,8 +274,8 @@ config SERIAL_8250_ACORN | |||
| 274 | 274 | ||
| 275 | config SERIAL_8250_FSL | 275 | config SERIAL_8250_FSL |
| 276 | bool | 276 | bool |
| 277 | depends on SERIAL_8250_CONSOLE && PPC_UDBG_16550 | 277 | depends on SERIAL_8250_CONSOLE |
| 278 | default PPC | 278 | default PPC || ARM || ARM64 |
| 279 | 279 | ||
| 280 | config SERIAL_8250_DW | 280 | config SERIAL_8250_DW |
| 281 | tristate "Support for Synopsys DesignWare 8250 quirks" | 281 | tristate "Support for Synopsys DesignWare 8250 quirks" |
| @@ -294,11 +294,12 @@ config SERIAL_8250_EM | |||
| 294 | 294 | ||
| 295 | config SERIAL_8250_RT288X | 295 | config SERIAL_8250_RT288X |
| 296 | bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support" | 296 | bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support" |
| 297 | depends on SERIAL_8250 && (SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620) | 297 | depends on SERIAL_8250 |
| 298 | default y if MIPS_ALCHEMY || SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620 | ||
| 298 | help | 299 | help |
| 299 | If you have a Ralink RT288x/RT305x SoC based board and want to use the | 300 | Selecting this option will add support for the alternate register |
| 300 | serial port, say Y to this option. The driver can handle up to 2 serial | 301 | layout used by Ralink RT288x/RT305x, Alchemy Au1xxx, and some others. |
| 301 | ports. If unsure, say N. | 302 | If unsure, say N. |
| 302 | 303 | ||
| 303 | config SERIAL_8250_OMAP | 304 | config SERIAL_8250_OMAP |
| 304 | tristate "Support for OMAP internal UART (8250 based driver)" | 305 | tristate "Support for OMAP internal UART (8250 based driver)" |
| @@ -337,7 +338,7 @@ config SERIAL_8250_FINTEK | |||
| 337 | through the PNP driver. If unsure, say N. | 338 | through the PNP driver. If unsure, say N. |
| 338 | 339 | ||
| 339 | config SERIAL_8250_LPC18XX | 340 | config SERIAL_8250_LPC18XX |
| 340 | bool "NXP LPC18xx/43xx serial port support" | 341 | tristate "NXP LPC18xx/43xx serial port support" |
| 341 | depends on SERIAL_8250 && OF && (ARCH_LPC18XX || COMPILE_TEST) | 342 | depends on SERIAL_8250 && OF && (ARCH_LPC18XX || COMPILE_TEST) |
| 342 | default ARCH_LPC18XX | 343 | default ARCH_LPC18XX |
| 343 | help | 344 | help |
| @@ -366,3 +367,13 @@ config SERIAL_8250_INGENIC | |||
| 366 | help | 367 | help |
| 367 | If you have a system using an Ingenic SoC and wish to make use of | 368 | If you have a system using an Ingenic SoC and wish to make use of |
| 368 | its UARTs, say Y to this option. If unsure, say N. | 369 | its UARTs, say Y to this option. If unsure, say N. |
| 370 | |||
| 371 | config SERIAL_8250_MID | ||
| 372 | tristate "Support for serial ports on Intel MID platforms" | ||
| 373 | depends on SERIAL_8250 && PCI | ||
| 374 | select HSU_DMA if SERIAL_8250_DMA | ||
| 375 | select HSU_DMA_PCI if X86_INTEL_MID | ||
| 376 | help | ||
| 377 | Selecting this option will enable handling of the extra features | ||
| 378 | present on the UART found on Intel Medfield SOC and various other | ||
| 379 | Intel platforms. | ||
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile index 39c6d2277570..e177f8681ada 100644 --- a/drivers/tty/serial/8250/Makefile +++ b/drivers/tty/serial/8250/Makefile | |||
| @@ -27,5 +27,6 @@ obj-$(CONFIG_SERIAL_8250_LPC18XX) += 8250_lpc18xx.o | |||
| 27 | obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o | 27 | obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o |
| 28 | obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o | 28 | obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o |
| 29 | obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o | 29 | obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o |
| 30 | obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o | ||
| 30 | 31 | ||
| 31 | CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt | 32 | CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt |
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 687b1ea294b7..1aec4404062d 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig | |||
| @@ -115,9 +115,9 @@ config SERIAL_SB1250_DUART_CONSOLE | |||
| 115 | 115 | ||
| 116 | config SERIAL_ATMEL | 116 | config SERIAL_ATMEL |
| 117 | bool "AT91 / AT32 on-chip serial port support" | 117 | bool "AT91 / AT32 on-chip serial port support" |
| 118 | depends on ARCH_AT91 || AVR32 | 118 | depends on ARCH_AT91 || AVR32 || COMPILE_TEST |
| 119 | select SERIAL_CORE | 119 | select SERIAL_CORE |
| 120 | select SERIAL_MCTRL_GPIO | 120 | select SERIAL_MCTRL_GPIO if GPIOLIB |
| 121 | help | 121 | help |
| 122 | This enables the driver for the on-chip UARTs of the Atmel | 122 | This enables the driver for the on-chip UARTs of the Atmel |
| 123 | AT91 and AT32 processors. | 123 | AT91 and AT32 processors. |
| @@ -571,7 +571,7 @@ config BFIN_UART3_CTSRTS | |||
| 571 | 571 | ||
| 572 | config SERIAL_IMX | 572 | config SERIAL_IMX |
| 573 | tristate "IMX serial port support" | 573 | tristate "IMX serial port support" |
| 574 | depends on ARCH_MXC | 574 | depends on ARCH_MXC || COMPILE_TEST |
| 575 | select SERIAL_CORE | 575 | select SERIAL_CORE |
| 576 | select RATIONAL | 576 | select RATIONAL |
| 577 | help | 577 | help |
| @@ -582,6 +582,7 @@ config SERIAL_IMX_CONSOLE | |||
| 582 | bool "Console on IMX serial port" | 582 | bool "Console on IMX serial port" |
| 583 | depends on SERIAL_IMX=y | 583 | depends on SERIAL_IMX=y |
| 584 | select SERIAL_CORE_CONSOLE | 584 | select SERIAL_CORE_CONSOLE |
| 585 | select SERIAL_EARLYCON if OF | ||
| 585 | help | 586 | help |
| 586 | If you have enabled the serial port on the Freescale IMX | 587 | If you have enabled the serial port on the Freescale IMX |
| 587 | CPU you can make it the console by answering Y to this option. | 588 | CPU you can make it the console by answering Y to this option. |
| @@ -743,7 +744,7 @@ config SERIAL_SH_SCI_CONSOLE | |||
| 743 | 744 | ||
| 744 | config SERIAL_SH_SCI_DMA | 745 | config SERIAL_SH_SCI_DMA |
| 745 | bool "DMA support" | 746 | bool "DMA support" |
| 746 | depends on SERIAL_SH_SCI && SH_DMAE | 747 | depends on SERIAL_SH_SCI && DMA_ENGINE |
| 747 | 748 | ||
| 748 | config SERIAL_PNX8XXX | 749 | config SERIAL_PNX8XXX |
| 749 | bool "Enable PNX8XXX SoCs' UART Support" | 750 | bool "Enable PNX8XXX SoCs' UART Support" |
| @@ -1408,7 +1409,7 @@ config SERIAL_PCH_UART_CONSOLE | |||
| 1408 | warnings and which allows logins in single user mode). | 1409 | warnings and which allows logins in single user mode). |
| 1409 | 1410 | ||
| 1410 | config SERIAL_MXS_AUART | 1411 | config SERIAL_MXS_AUART |
| 1411 | depends on ARCH_MXS | 1412 | depends on ARCH_MXS || COMPILE_TEST |
| 1412 | tristate "MXS AUART support" | 1413 | tristate "MXS AUART support" |
| 1413 | select SERIAL_CORE | 1414 | select SERIAL_CORE |
| 1414 | select SERIAL_MCTRL_GPIO if GPIOLIB | 1415 | select SERIAL_MCTRL_GPIO if GPIOLIB |
| @@ -1538,6 +1539,7 @@ config SERIAL_FSL_LPUART | |||
| 1538 | tristate "Freescale lpuart serial port support" | 1539 | tristate "Freescale lpuart serial port support" |
| 1539 | depends on HAS_DMA | 1540 | depends on HAS_DMA |
| 1540 | select SERIAL_CORE | 1541 | select SERIAL_CORE |
| 1542 | select SERIAL_EARLYCON | ||
| 1541 | help | 1543 | help |
| 1542 | Support for the on-chip lpuart on some Freescale SOCs. | 1544 | Support for the on-chip lpuart on some Freescale SOCs. |
| 1543 | 1545 | ||
diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c index fd87a6f574e3..61b607f2488e 100644 --- a/drivers/tty/serial/altera_uart.c +++ b/drivers/tty/serial/altera_uart.c | |||
| @@ -508,29 +508,6 @@ static struct uart_driver altera_uart_driver = { | |||
| 508 | .cons = ALTERA_UART_CONSOLE, | 508 | .cons = ALTERA_UART_CONSOLE, |
| 509 | }; | 509 | }; |
| 510 | 510 | ||
| 511 | #ifdef CONFIG_OF | ||
| 512 | static int altera_uart_get_of_uartclk(struct platform_device *pdev, | ||
| 513 | struct uart_port *port) | ||
| 514 | { | ||
| 515 | int len; | ||
| 516 | const __be32 *clk; | ||
| 517 | |||
| 518 | clk = of_get_property(pdev->dev.of_node, "clock-frequency", &len); | ||
| 519 | if (!clk || len < sizeof(__be32)) | ||
| 520 | return -ENODEV; | ||
| 521 | |||
| 522 | port->uartclk = be32_to_cpup(clk); | ||
| 523 | |||
| 524 | return 0; | ||
| 525 | } | ||
| 526 | #else | ||
| 527 | static int altera_uart_get_of_uartclk(struct platform_device *pdev, | ||
| 528 | struct uart_port *port) | ||
| 529 | { | ||
| 530 | return -ENODEV; | ||
| 531 | } | ||
| 532 | #endif /* CONFIG_OF */ | ||
| 533 | |||
| 534 | static int altera_uart_probe(struct platform_device *pdev) | 511 | static int altera_uart_probe(struct platform_device *pdev) |
| 535 | { | 512 | { |
| 536 | struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); | 513 | struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); |
| @@ -570,7 +547,8 @@ static int altera_uart_probe(struct platform_device *pdev) | |||
| 570 | if (platp) | 547 | if (platp) |
| 571 | port->uartclk = platp->uartclk; | 548 | port->uartclk = platp->uartclk; |
| 572 | else { | 549 | else { |
| 573 | ret = altera_uart_get_of_uartclk(pdev, port); | 550 | ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
| 551 | &port->uartclk); | ||
| 574 | if (ret) | 552 | if (ret) |
| 575 | return ret; | 553 | return ret; |
| 576 | } | 554 | } |
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index fd27e986b1dd..899a77187bde 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c | |||
| @@ -191,8 +191,8 @@ struct uart_amba_port { | |||
| 191 | */ | 191 | */ |
| 192 | static int pl011_fifo_to_tty(struct uart_amba_port *uap) | 192 | static int pl011_fifo_to_tty(struct uart_amba_port *uap) |
| 193 | { | 193 | { |
| 194 | u16 status, ch; | 194 | u16 status; |
| 195 | unsigned int flag, max_count = 256; | 195 | unsigned int ch, flag, max_count = 256; |
| 196 | int fifotaken = 0; | 196 | int fifotaken = 0; |
| 197 | 197 | ||
| 198 | while (max_count--) { | 198 | while (max_count--) { |
diff --git a/drivers/tty/serial/apbuart.c b/drivers/tty/serial/apbuart.c index f3af317131ac..75eb083b3361 100644 --- a/drivers/tty/serial/apbuart.c +++ b/drivers/tty/serial/apbuart.c | |||
| @@ -581,6 +581,7 @@ static const struct of_device_id apbuart_match[] = { | |||
| 581 | }, | 581 | }, |
| 582 | {}, | 582 | {}, |
| 583 | }; | 583 | }; |
| 584 | MODULE_DEVICE_TABLE(of, apbuart_match); | ||
| 584 | 585 | ||
| 585 | static struct platform_driver grlib_apbuart_of_driver = { | 586 | static struct platform_driver grlib_apbuart_of_driver = { |
| 586 | .probe = apbuart_probe, | 587 | .probe = apbuart_probe, |
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 538ea03bc101..94294558943c 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c | |||
| @@ -112,6 +112,12 @@ struct atmel_uart_char { | |||
| 112 | #define ATMEL_SERIAL_RINGSIZE 1024 | 112 | #define ATMEL_SERIAL_RINGSIZE 1024 |
| 113 | 113 | ||
| 114 | /* | 114 | /* |
| 115 | * at91: 6 USARTs and one DBGU port (SAM9260) | ||
| 116 | * avr32: 4 | ||
| 117 | */ | ||
| 118 | #define ATMEL_MAX_UART 7 | ||
| 119 | |||
| 120 | /* | ||
| 115 | * We wrap our port structure around the generic uart_port. | 121 | * We wrap our port structure around the generic uart_port. |
| 116 | */ | 122 | */ |
| 117 | struct atmel_uart_port { | 123 | struct atmel_uart_port { |
| @@ -921,7 +927,7 @@ static int atmel_prepare_tx_dma(struct uart_port *port) | |||
| 921 | sg_set_page(&atmel_port->sg_tx, | 927 | sg_set_page(&atmel_port->sg_tx, |
| 922 | virt_to_page(port->state->xmit.buf), | 928 | virt_to_page(port->state->xmit.buf), |
| 923 | UART_XMIT_SIZE, | 929 | UART_XMIT_SIZE, |
| 924 | (int)port->state->xmit.buf & ~PAGE_MASK); | 930 | (unsigned long)port->state->xmit.buf & ~PAGE_MASK); |
| 925 | nent = dma_map_sg(port->dev, | 931 | nent = dma_map_sg(port->dev, |
| 926 | &atmel_port->sg_tx, | 932 | &atmel_port->sg_tx, |
| 927 | 1, | 933 | 1, |
| @@ -931,10 +937,10 @@ static int atmel_prepare_tx_dma(struct uart_port *port) | |||
| 931 | dev_dbg(port->dev, "need to release resource of dma\n"); | 937 | dev_dbg(port->dev, "need to release resource of dma\n"); |
| 932 | goto chan_err; | 938 | goto chan_err; |
| 933 | } else { | 939 | } else { |
| 934 | dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__, | 940 | dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__, |
| 935 | sg_dma_len(&atmel_port->sg_tx), | 941 | sg_dma_len(&atmel_port->sg_tx), |
| 936 | port->state->xmit.buf, | 942 | port->state->xmit.buf, |
| 937 | sg_dma_address(&atmel_port->sg_tx)); | 943 | &sg_dma_address(&atmel_port->sg_tx)); |
| 938 | } | 944 | } |
| 939 | 945 | ||
| 940 | /* Configure the slave DMA */ | 946 | /* Configure the slave DMA */ |
| @@ -1103,7 +1109,7 @@ static int atmel_prepare_rx_dma(struct uart_port *port) | |||
| 1103 | sg_set_page(&atmel_port->sg_rx, | 1109 | sg_set_page(&atmel_port->sg_rx, |
| 1104 | virt_to_page(ring->buf), | 1110 | virt_to_page(ring->buf), |
| 1105 | sizeof(struct atmel_uart_char) * ATMEL_SERIAL_RINGSIZE, | 1111 | sizeof(struct atmel_uart_char) * ATMEL_SERIAL_RINGSIZE, |
| 1106 | (int)ring->buf & ~PAGE_MASK); | 1112 | (unsigned long)ring->buf & ~PAGE_MASK); |
| 1107 | nent = dma_map_sg(port->dev, | 1113 | nent = dma_map_sg(port->dev, |
| 1108 | &atmel_port->sg_rx, | 1114 | &atmel_port->sg_rx, |
| 1109 | 1, | 1115 | 1, |
| @@ -1113,10 +1119,10 @@ static int atmel_prepare_rx_dma(struct uart_port *port) | |||
| 1113 | dev_dbg(port->dev, "need to release resource of dma\n"); | 1119 | dev_dbg(port->dev, "need to release resource of dma\n"); |
| 1114 | goto chan_err; | 1120 | goto chan_err; |
| 1115 | } else { | 1121 | } else { |
| 1116 | dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__, | 1122 | dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__, |
| 1117 | sg_dma_len(&atmel_port->sg_rx), | 1123 | sg_dma_len(&atmel_port->sg_rx), |
| 1118 | ring->buf, | 1124 | ring->buf, |
| 1119 | sg_dma_address(&atmel_port->sg_rx)); | 1125 | &sg_dma_address(&atmel_port->sg_rx)); |
| 1120 | } | 1126 | } |
| 1121 | 1127 | ||
| 1122 | /* Configure the slave DMA */ | 1128 | /* Configure the slave DMA */ |
| @@ -1676,15 +1682,15 @@ static void atmel_init_rs485(struct uart_port *port, | |||
| 1676 | struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev); | 1682 | struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev); |
| 1677 | 1683 | ||
| 1678 | if (np) { | 1684 | if (np) { |
| 1685 | struct serial_rs485 *rs485conf = &port->rs485; | ||
| 1679 | u32 rs485_delay[2]; | 1686 | u32 rs485_delay[2]; |
| 1680 | /* rs485 properties */ | 1687 | /* rs485 properties */ |
| 1681 | if (of_property_read_u32_array(np, "rs485-rts-delay", | 1688 | if (of_property_read_u32_array(np, "rs485-rts-delay", |
| 1682 | rs485_delay, 2) == 0) { | 1689 | rs485_delay, 2) == 0) { |
| 1683 | struct serial_rs485 *rs485conf = &port->rs485; | ||
| 1684 | |||
| 1685 | rs485conf->delay_rts_before_send = rs485_delay[0]; | 1690 | rs485conf->delay_rts_before_send = rs485_delay[0]; |
| 1686 | rs485conf->delay_rts_after_send = rs485_delay[1]; | 1691 | rs485conf->delay_rts_after_send = rs485_delay[1]; |
| 1687 | rs485conf->flags = 0; | 1692 | rs485conf->flags = 0; |
| 1693 | } | ||
| 1688 | 1694 | ||
| 1689 | if (of_get_property(np, "rs485-rx-during-tx", NULL)) | 1695 | if (of_get_property(np, "rs485-rx-during-tx", NULL)) |
| 1690 | rs485conf->flags |= SER_RS485_RX_DURING_TX; | 1696 | rs485conf->flags |= SER_RS485_RX_DURING_TX; |
| @@ -1692,7 +1698,6 @@ static void atmel_init_rs485(struct uart_port *port, | |||
| 1692 | if (of_get_property(np, "linux,rs485-enabled-at-boot-time", | 1698 | if (of_get_property(np, "linux,rs485-enabled-at-boot-time", |
| 1693 | NULL)) | 1699 | NULL)) |
| 1694 | rs485conf->flags |= SER_RS485_ENABLED; | 1700 | rs485conf->flags |= SER_RS485_ENABLED; |
| 1695 | } | ||
| 1696 | } else { | 1701 | } else { |
| 1697 | port->rs485 = pdata->rs485; | 1702 | port->rs485 = pdata->rs485; |
| 1698 | } | 1703 | } |
| @@ -2296,7 +2301,7 @@ static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) | |||
| 2296 | ret = -EINVAL; | 2301 | ret = -EINVAL; |
| 2297 | if (port->uartclk / 16 != ser->baud_base) | 2302 | if (port->uartclk / 16 != ser->baud_base) |
| 2298 | ret = -EINVAL; | 2303 | ret = -EINVAL; |
| 2299 | if ((void *)port->mapbase != ser->iomem_base) | 2304 | if (port->mapbase != (unsigned long)ser->iomem_base) |
| 2300 | ret = -EINVAL; | 2305 | ret = -EINVAL; |
| 2301 | if (port->iobase != ser->port) | 2306 | if (port->iobase != ser->port) |
| 2302 | ret = -EINVAL; | 2307 | ret = -EINVAL; |
| @@ -2686,7 +2691,7 @@ static int atmel_init_gpios(struct atmel_uart_port *p, struct device *dev) | |||
| 2686 | enum mctrl_gpio_idx i; | 2691 | enum mctrl_gpio_idx i; |
| 2687 | struct gpio_desc *gpiod; | 2692 | struct gpio_desc *gpiod; |
| 2688 | 2693 | ||
| 2689 | p->gpios = mctrl_gpio_init(dev, 0); | 2694 | p->gpios = mctrl_gpio_init_noauto(dev, 0); |
| 2690 | if (IS_ERR(p->gpios)) | 2695 | if (IS_ERR(p->gpios)) |
| 2691 | return PTR_ERR(p->gpios); | 2696 | return PTR_ERR(p->gpios); |
| 2692 | 2697 | ||
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c index d5d2dd7c7917..b3a4e0cdddaa 100644 --- a/drivers/tty/serial/clps711x.c +++ b/drivers/tty/serial/clps711x.c | |||
| @@ -500,7 +500,7 @@ static int uart_clps711x_probe(struct platform_device *pdev) | |||
| 500 | 500 | ||
| 501 | platform_set_drvdata(pdev, s); | 501 | platform_set_drvdata(pdev, s); |
| 502 | 502 | ||
| 503 | s->gpios = mctrl_gpio_init(&pdev->dev, 0); | 503 | s->gpios = mctrl_gpio_init_noauto(&pdev->dev, 0); |
| 504 | if (IS_ERR(s->gpios)) | 504 | if (IS_ERR(s->gpios)) |
| 505 | return PTR_ERR(s->gpios); | 505 | return PTR_ERR(s->gpios); |
| 506 | 506 | ||
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c index 08431adeacd5..d3e3d42c0c12 100644 --- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c | |||
| @@ -1450,6 +1450,7 @@ static const struct of_device_id cpm_uart_match[] = { | |||
| 1450 | }, | 1450 | }, |
| 1451 | {} | 1451 | {} |
| 1452 | }; | 1452 | }; |
| 1453 | MODULE_DEVICE_TABLE(of, cpm_uart_match); | ||
| 1453 | 1454 | ||
| 1454 | static struct platform_driver cpm_uart_driver = { | 1455 | static struct platform_driver cpm_uart_driver = { |
| 1455 | .driver = { | 1456 | .driver = { |
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c index 3e4470af5c50..f13f2ebd215b 100644 --- a/drivers/tty/serial/crisv10.c +++ b/drivers/tty/serial/crisv10.c | |||
| @@ -3655,7 +3655,6 @@ rs_close(struct tty_struct *tty, struct file * filp) | |||
| 3655 | wake_up_interruptible(&info->port.open_wait); | 3655 | wake_up_interruptible(&info->port.open_wait); |
| 3656 | } | 3656 | } |
| 3657 | info->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | 3657 | info->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); |
| 3658 | wake_up_interruptible(&info->port.close_wait); | ||
| 3659 | local_irq_restore(flags); | 3658 | local_irq_restore(flags); |
| 3660 | 3659 | ||
| 3661 | /* port closed */ | 3660 | /* port closed */ |
| @@ -3759,23 +3758,6 @@ block_til_ready(struct tty_struct *tty, struct file * filp, | |||
| 3759 | int do_clocal = 0; | 3758 | int do_clocal = 0; |
| 3760 | 3759 | ||
| 3761 | /* | 3760 | /* |
| 3762 | * If the device is in the middle of being closed, then block | ||
| 3763 | * until it's done, and then try again. | ||
| 3764 | */ | ||
| 3765 | if (info->port.flags & ASYNC_CLOSING) { | ||
| 3766 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 3767 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 3768 | #ifdef SERIAL_DO_RESTART | ||
| 3769 | if (info->port.flags & ASYNC_HUP_NOTIFY) | ||
| 3770 | return -EAGAIN; | ||
| 3771 | else | ||
| 3772 | return -ERESTARTSYS; | ||
| 3773 | #else | ||
| 3774 | return -EAGAIN; | ||
| 3775 | #endif | ||
| 3776 | } | ||
| 3777 | |||
| 3778 | /* | ||
| 3779 | * If non-blocking mode is set, or the port is not enabled, | 3761 | * If non-blocking mode is set, or the port is not enabled, |
| 3780 | * then make the check up front and then exit. | 3762 | * then make the check up front and then exit. |
| 3781 | */ | 3763 | */ |
| @@ -3825,7 +3807,7 @@ block_til_ready(struct tty_struct *tty, struct file * filp, | |||
| 3825 | #endif | 3807 | #endif |
| 3826 | break; | 3808 | break; |
| 3827 | } | 3809 | } |
| 3828 | if (!(info->port.flags & ASYNC_CLOSING) && do_clocal) | 3810 | if (do_clocal) |
| 3829 | /* && (do_clocal || DCD_IS_ASSERTED) */ | 3811 | /* && (do_clocal || DCD_IS_ASSERTED) */ |
| 3830 | break; | 3812 | break; |
| 3831 | if (signal_pending(current)) { | 3813 | if (signal_pending(current)) { |
| @@ -3895,20 +3877,6 @@ rs_open(struct tty_struct *tty, struct file * filp) | |||
| 3895 | info->port.low_latency = !!(info->port.flags & ASYNC_LOW_LATENCY); | 3877 | info->port.low_latency = !!(info->port.flags & ASYNC_LOW_LATENCY); |
| 3896 | 3878 | ||
| 3897 | /* | 3879 | /* |
| 3898 | * If the port is in the middle of closing, bail out now | ||
| 3899 | */ | ||
| 3900 | if (info->port.flags & ASYNC_CLOSING) { | ||
| 3901 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 3902 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 3903 | #ifdef SERIAL_DO_RESTART | ||
| 3904 | return ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 3905 | -EAGAIN : -ERESTARTSYS); | ||
| 3906 | #else | ||
| 3907 | return -EAGAIN; | ||
| 3908 | #endif | ||
| 3909 | } | ||
| 3910 | |||
| 3911 | /* | ||
| 3912 | * If DMA is enabled try to allocate the irq's. | 3880 | * If DMA is enabled try to allocate the irq's. |
| 3913 | */ | 3881 | */ |
| 3914 | if (info->port.count == 1) { | 3882 | if (info->port.count == 1) { |
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 08ce76f4f261..3d790033744e 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c | |||
| @@ -1746,6 +1746,45 @@ static struct console lpuart32_console = { | |||
| 1746 | .data = &lpuart_reg, | 1746 | .data = &lpuart_reg, |
| 1747 | }; | 1747 | }; |
| 1748 | 1748 | ||
| 1749 | static void lpuart_early_write(struct console *con, const char *s, unsigned n) | ||
| 1750 | { | ||
| 1751 | struct earlycon_device *dev = con->data; | ||
| 1752 | |||
| 1753 | uart_console_write(&dev->port, s, n, lpuart_console_putchar); | ||
| 1754 | } | ||
| 1755 | |||
| 1756 | static void lpuart32_early_write(struct console *con, const char *s, unsigned n) | ||
| 1757 | { | ||
| 1758 | struct earlycon_device *dev = con->data; | ||
| 1759 | |||
| 1760 | uart_console_write(&dev->port, s, n, lpuart32_console_putchar); | ||
| 1761 | } | ||
| 1762 | |||
| 1763 | static int __init lpuart_early_console_setup(struct earlycon_device *device, | ||
| 1764 | const char *opt) | ||
| 1765 | { | ||
| 1766 | if (!device->port.membase) | ||
| 1767 | return -ENODEV; | ||
| 1768 | |||
| 1769 | device->con->write = lpuart_early_write; | ||
| 1770 | return 0; | ||
| 1771 | } | ||
| 1772 | |||
| 1773 | static int __init lpuart32_early_console_setup(struct earlycon_device *device, | ||
| 1774 | const char *opt) | ||
| 1775 | { | ||
| 1776 | if (!device->port.membase) | ||
| 1777 | return -ENODEV; | ||
| 1778 | |||
| 1779 | device->con->write = lpuart32_early_write; | ||
| 1780 | return 0; | ||
| 1781 | } | ||
| 1782 | |||
| 1783 | OF_EARLYCON_DECLARE(lpuart, "fsl,vf610-lpuart", lpuart_early_console_setup); | ||
| 1784 | OF_EARLYCON_DECLARE(lpuart32, "fsl,ls1021a-lpuart", lpuart32_early_console_setup); | ||
| 1785 | EARLYCON_DECLARE(lpuart, lpuart_early_console_setup); | ||
| 1786 | EARLYCON_DECLARE(lpuart32, lpuart32_early_console_setup); | ||
| 1787 | |||
| 1749 | #define LPUART_CONSOLE (&lpuart_console) | 1788 | #define LPUART_CONSOLE (&lpuart_console) |
| 1750 | #define LPUART32_CONSOLE (&lpuart32_console) | 1789 | #define LPUART32_CONSOLE (&lpuart32_console) |
| 1751 | #else | 1790 | #else |
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index d0388a071ba1..016e4be05cec 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c | |||
| @@ -139,6 +139,7 @@ | |||
| 139 | #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ | 139 | #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ |
| 140 | #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ | 140 | #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ |
| 141 | #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ | 141 | #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ |
| 142 | #define USR1_AGTIM (1<<8) /* Ageing timer interrupt flag */ | ||
| 142 | #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ | 143 | #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ |
| 143 | #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ | 144 | #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ |
| 144 | #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ | 145 | #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ |
| @@ -728,11 +729,15 @@ static void imx_dma_rxint(struct imx_port *sport) | |||
| 728 | if ((temp & USR2_RDR) && !sport->dma_is_rxing) { | 729 | if ((temp & USR2_RDR) && !sport->dma_is_rxing) { |
| 729 | sport->dma_is_rxing = 1; | 730 | sport->dma_is_rxing = 1; |
| 730 | 731 | ||
| 731 | /* disable the `Recerver Ready Interrrupt` */ | 732 | /* disable the receiver ready and aging timer interrupts */ |
| 732 | temp = readl(sport->port.membase + UCR1); | 733 | temp = readl(sport->port.membase + UCR1); |
| 733 | temp &= ~(UCR1_RRDYEN); | 734 | temp &= ~(UCR1_RRDYEN); |
| 734 | writel(temp, sport->port.membase + UCR1); | 735 | writel(temp, sport->port.membase + UCR1); |
| 735 | 736 | ||
| 737 | temp = readl(sport->port.membase + UCR2); | ||
| 738 | temp &= ~(UCR2_ATEN); | ||
| 739 | writel(temp, sport->port.membase + UCR2); | ||
| 740 | |||
| 736 | /* tell the DMA to receive the data. */ | 741 | /* tell the DMA to receive the data. */ |
| 737 | start_rx_dma(sport); | 742 | start_rx_dma(sport); |
| 738 | } | 743 | } |
| @@ -749,7 +754,7 @@ static irqreturn_t imx_int(int irq, void *dev_id) | |||
| 749 | sts = readl(sport->port.membase + USR1); | 754 | sts = readl(sport->port.membase + USR1); |
| 750 | sts2 = readl(sport->port.membase + USR2); | 755 | sts2 = readl(sport->port.membase + USR2); |
| 751 | 756 | ||
| 752 | if (sts & USR1_RRDY) { | 757 | if (sts & (USR1_RRDY | USR1_AGTIM)) { |
| 753 | if (sport->dma_is_enabled) | 758 | if (sport->dma_is_enabled) |
| 754 | imx_dma_rxint(sport); | 759 | imx_dma_rxint(sport); |
| 755 | else | 760 | else |
| @@ -852,19 +857,6 @@ static void imx_break_ctl(struct uart_port *port, int break_state) | |||
| 852 | spin_unlock_irqrestore(&sport->port.lock, flags); | 857 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| 853 | } | 858 | } |
| 854 | 859 | ||
| 855 | #define TXTL 2 /* reset default */ | ||
| 856 | #define RXTL 1 /* reset default */ | ||
| 857 | |||
| 858 | static void imx_setup_ufcr(struct imx_port *sport, unsigned int mode) | ||
| 859 | { | ||
| 860 | unsigned int val; | ||
| 861 | |||
| 862 | /* set receiver / transmitter trigger level */ | ||
| 863 | val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); | ||
| 864 | val |= TXTL << UFCR_TXTL_SHF | RXTL; | ||
| 865 | writel(val, sport->port.membase + UFCR); | ||
| 866 | } | ||
| 867 | |||
| 868 | #define RX_BUF_SIZE (PAGE_SIZE) | 860 | #define RX_BUF_SIZE (PAGE_SIZE) |
| 869 | static void imx_rx_dma_done(struct imx_port *sport) | 861 | static void imx_rx_dma_done(struct imx_port *sport) |
| 870 | { | 862 | { |
| @@ -873,11 +865,15 @@ static void imx_rx_dma_done(struct imx_port *sport) | |||
| 873 | 865 | ||
| 874 | spin_lock_irqsave(&sport->port.lock, flags); | 866 | spin_lock_irqsave(&sport->port.lock, flags); |
| 875 | 867 | ||
| 876 | /* Enable this interrupt when the RXFIFO is empty. */ | 868 | /* re-enable interrupts to get notified when new symbols are incoming */ |
| 877 | temp = readl(sport->port.membase + UCR1); | 869 | temp = readl(sport->port.membase + UCR1); |
| 878 | temp |= UCR1_RRDYEN; | 870 | temp |= UCR1_RRDYEN; |
| 879 | writel(temp, sport->port.membase + UCR1); | 871 | writel(temp, sport->port.membase + UCR1); |
| 880 | 872 | ||
| 873 | temp = readl(sport->port.membase + UCR2); | ||
| 874 | temp |= UCR2_ATEN; | ||
| 875 | writel(temp, sport->port.membase + UCR2); | ||
| 876 | |||
| 881 | sport->dma_is_rxing = 0; | 877 | sport->dma_is_rxing = 0; |
| 882 | 878 | ||
| 883 | /* Is the shutdown waiting for us? */ | 879 | /* Is the shutdown waiting for us? */ |
| @@ -888,14 +884,12 @@ static void imx_rx_dma_done(struct imx_port *sport) | |||
| 888 | } | 884 | } |
| 889 | 885 | ||
| 890 | /* | 886 | /* |
| 891 | * There are three kinds of RX DMA interrupts(such as in the MX6Q): | 887 | * There are two kinds of RX DMA interrupts(such as in the MX6Q): |
| 892 | * [1] the RX DMA buffer is full. | 888 | * [1] the RX DMA buffer is full. |
| 893 | * [2] the Aging timer expires(wait for 8 bytes long) | 889 | * [2] the aging timer expires |
| 894 | * [3] the Idle Condition Detect(enabled the UCR4_IDDMAEN). | ||
| 895 | * | 890 | * |
| 896 | * The [2] is trigger when a character was been sitting in the FIFO | 891 | * Condition [2] is triggered when a character has been sitting in the FIFO |
| 897 | * meanwhile [3] can wait for 32 bytes long when the RX line is | 892 | * for at least 8 byte durations. |
| 898 | * on IDLE state and RxFIFO is empty. | ||
| 899 | */ | 893 | */ |
| 900 | static void dma_rx_callback(void *data) | 894 | static void dma_rx_callback(void *data) |
| 901 | { | 895 | { |
| @@ -913,13 +907,6 @@ static void dma_rx_callback(void *data) | |||
| 913 | status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state); | 907 | status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state); |
| 914 | count = RX_BUF_SIZE - state.residue; | 908 | count = RX_BUF_SIZE - state.residue; |
| 915 | 909 | ||
| 916 | if (readl(sport->port.membase + USR2) & USR2_IDLE) { | ||
| 917 | /* In condition [3] the SDMA counted up too early */ | ||
| 918 | count--; | ||
| 919 | |||
| 920 | writel(USR2_IDLE, sport->port.membase + USR2); | ||
| 921 | } | ||
| 922 | |||
| 923 | dev_dbg(sport->port.dev, "We get %d bytes.\n", count); | 910 | dev_dbg(sport->port.dev, "We get %d bytes.\n", count); |
| 924 | 911 | ||
| 925 | if (count) { | 912 | if (count) { |
| @@ -931,23 +918,21 @@ static void dma_rx_callback(void *data) | |||
| 931 | sport->port.icount.buf_overrun++; | 918 | sport->port.icount.buf_overrun++; |
| 932 | } | 919 | } |
| 933 | tty_flip_buffer_push(port); | 920 | tty_flip_buffer_push(port); |
| 921 | sport->port.icount.rx += count; | ||
| 922 | } | ||
| 934 | 923 | ||
| 924 | /* | ||
| 925 | * Restart RX DMA directly if more data is available in order to skip | ||
| 926 | * the roundtrip through the IRQ handler. If there is some data already | ||
| 927 | * in the FIFO, DMA needs to be restarted soon anyways. | ||
| 928 | * | ||
| 929 | * Otherwise stop the DMA and reactivate FIFO IRQs to restart DMA once | ||
| 930 | * data starts to arrive again. | ||
| 931 | */ | ||
| 932 | if (readl(sport->port.membase + USR2) & USR2_RDR) | ||
| 935 | start_rx_dma(sport); | 933 | start_rx_dma(sport); |
| 936 | } else if (readl(sport->port.membase + USR2) & USR2_RDR) { | 934 | else |
| 937 | /* | ||
| 938 | * start rx_dma directly once data in RXFIFO, more efficient | ||
| 939 | * than before: | ||
| 940 | * 1. call imx_rx_dma_done to stop dma if no data received | ||
| 941 | * 2. wait next RDR interrupt to start dma transfer. | ||
| 942 | */ | ||
| 943 | start_rx_dma(sport); | ||
| 944 | } else { | ||
| 945 | /* | ||
| 946 | * stop dma to prevent too many IDLE event trigged if no data | ||
| 947 | * in RXFIFO | ||
| 948 | */ | ||
| 949 | imx_rx_dma_done(sport); | 935 | imx_rx_dma_done(sport); |
| 950 | } | ||
| 951 | } | 936 | } |
| 952 | 937 | ||
| 953 | static int start_rx_dma(struct imx_port *sport) | 938 | static int start_rx_dma(struct imx_port *sport) |
| @@ -980,6 +965,22 @@ static int start_rx_dma(struct imx_port *sport) | |||
| 980 | return 0; | 965 | return 0; |
| 981 | } | 966 | } |
| 982 | 967 | ||
| 968 | #define TXTL_DEFAULT 2 /* reset default */ | ||
| 969 | #define RXTL_DEFAULT 1 /* reset default */ | ||
| 970 | #define TXTL_DMA 8 /* DMA burst setting */ | ||
| 971 | #define RXTL_DMA 9 /* DMA burst setting */ | ||
| 972 | |||
| 973 | static void imx_setup_ufcr(struct imx_port *sport, | ||
| 974 | unsigned char txwl, unsigned char rxwl) | ||
| 975 | { | ||
| 976 | unsigned int val; | ||
| 977 | |||
| 978 | /* set receiver / transmitter trigger level */ | ||
| 979 | val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); | ||
| 980 | val |= txwl << UFCR_TXTL_SHF | rxwl; | ||
| 981 | writel(val, sport->port.membase + UFCR); | ||
| 982 | } | ||
| 983 | |||
| 983 | static void imx_uart_dma_exit(struct imx_port *sport) | 984 | static void imx_uart_dma_exit(struct imx_port *sport) |
| 984 | { | 985 | { |
| 985 | if (sport->dma_chan_rx) { | 986 | if (sport->dma_chan_rx) { |
| @@ -1015,7 +1016,8 @@ static int imx_uart_dma_init(struct imx_port *sport) | |||
| 1015 | slave_config.direction = DMA_DEV_TO_MEM; | 1016 | slave_config.direction = DMA_DEV_TO_MEM; |
| 1016 | slave_config.src_addr = sport->port.mapbase + URXD0; | 1017 | slave_config.src_addr = sport->port.mapbase + URXD0; |
| 1017 | slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; | 1018 | slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 1018 | slave_config.src_maxburst = RXTL; | 1019 | /* one byte less than the watermark level to enable the aging timer */ |
| 1020 | slave_config.src_maxburst = RXTL_DMA - 1; | ||
| 1019 | ret = dmaengine_slave_config(sport->dma_chan_rx, &slave_config); | 1021 | ret = dmaengine_slave_config(sport->dma_chan_rx, &slave_config); |
| 1020 | if (ret) { | 1022 | if (ret) { |
| 1021 | dev_err(dev, "error in RX dma configuration.\n"); | 1023 | dev_err(dev, "error in RX dma configuration.\n"); |
| @@ -1039,7 +1041,7 @@ static int imx_uart_dma_init(struct imx_port *sport) | |||
| 1039 | slave_config.direction = DMA_MEM_TO_DEV; | 1041 | slave_config.direction = DMA_MEM_TO_DEV; |
| 1040 | slave_config.dst_addr = sport->port.mapbase + URTX0; | 1042 | slave_config.dst_addr = sport->port.mapbase + URTX0; |
| 1041 | slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; | 1043 | slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 1042 | slave_config.dst_maxburst = TXTL; | 1044 | slave_config.dst_maxburst = TXTL_DMA; |
| 1043 | ret = dmaengine_slave_config(sport->dma_chan_tx, &slave_config); | 1045 | ret = dmaengine_slave_config(sport->dma_chan_tx, &slave_config); |
| 1044 | if (ret) { | 1046 | if (ret) { |
| 1045 | dev_err(dev, "error in TX dma configuration."); | 1047 | dev_err(dev, "error in TX dma configuration."); |
| @@ -1062,15 +1064,14 @@ static void imx_enable_dma(struct imx_port *sport) | |||
| 1062 | 1064 | ||
| 1063 | /* set UCR1 */ | 1065 | /* set UCR1 */ |
| 1064 | temp = readl(sport->port.membase + UCR1); | 1066 | temp = readl(sport->port.membase + UCR1); |
| 1065 | temp |= UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN | | 1067 | temp |= UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN; |
| 1066 | /* wait for 32 idle frames for IDDMA interrupt */ | ||
| 1067 | UCR1_ICD_REG(3); | ||
| 1068 | writel(temp, sport->port.membase + UCR1); | 1068 | writel(temp, sport->port.membase + UCR1); |
| 1069 | 1069 | ||
| 1070 | /* set UCR4 */ | 1070 | temp = readl(sport->port.membase + UCR2); |
| 1071 | temp = readl(sport->port.membase + UCR4); | 1071 | temp |= UCR2_ATEN; |
| 1072 | temp |= UCR4_IDDMAEN; | 1072 | writel(temp, sport->port.membase + UCR2); |
| 1073 | writel(temp, sport->port.membase + UCR4); | 1073 | |
| 1074 | imx_setup_ufcr(sport, TXTL_DMA, RXTL_DMA); | ||
| 1074 | 1075 | ||
| 1075 | sport->dma_is_enabled = 1; | 1076 | sport->dma_is_enabled = 1; |
| 1076 | } | 1077 | } |
| @@ -1086,13 +1087,10 @@ static void imx_disable_dma(struct imx_port *sport) | |||
| 1086 | 1087 | ||
| 1087 | /* clear UCR2 */ | 1088 | /* clear UCR2 */ |
| 1088 | temp = readl(sport->port.membase + UCR2); | 1089 | temp = readl(sport->port.membase + UCR2); |
| 1089 | temp &= ~(UCR2_CTSC | UCR2_CTS); | 1090 | temp &= ~(UCR2_CTSC | UCR2_CTS | UCR2_ATEN); |
| 1090 | writel(temp, sport->port.membase + UCR2); | 1091 | writel(temp, sport->port.membase + UCR2); |
| 1091 | 1092 | ||
| 1092 | /* clear UCR4 */ | 1093 | imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); |
| 1093 | temp = readl(sport->port.membase + UCR4); | ||
| 1094 | temp &= ~UCR4_IDDMAEN; | ||
| 1095 | writel(temp, sport->port.membase + UCR4); | ||
| 1096 | 1094 | ||
| 1097 | sport->dma_is_enabled = 0; | 1095 | sport->dma_is_enabled = 0; |
| 1098 | } | 1096 | } |
| @@ -1115,7 +1113,7 @@ static int imx_startup(struct uart_port *port) | |||
| 1115 | return retval; | 1113 | return retval; |
| 1116 | } | 1114 | } |
| 1117 | 1115 | ||
| 1118 | imx_setup_ufcr(sport, 0); | 1116 | imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); |
| 1119 | 1117 | ||
| 1120 | /* disable the DREN bit (Data Ready interrupt enable) before | 1118 | /* disable the DREN bit (Data Ready interrupt enable) before |
| 1121 | * requesting IRQs | 1119 | * requesting IRQs |
| @@ -1128,6 +1126,11 @@ static int imx_startup(struct uart_port *port) | |||
| 1128 | 1126 | ||
| 1129 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); | 1127 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); |
| 1130 | 1128 | ||
| 1129 | /* Can we enable the DMA support? */ | ||
| 1130 | if (is_imx6q_uart(sport) && !uart_console(port) && | ||
| 1131 | !sport->dma_is_inited) | ||
| 1132 | imx_uart_dma_init(sport); | ||
| 1133 | |||
| 1131 | spin_lock_irqsave(&sport->port.lock, flags); | 1134 | spin_lock_irqsave(&sport->port.lock, flags); |
| 1132 | /* Reset fifo's and state machines */ | 1135 | /* Reset fifo's and state machines */ |
| 1133 | i = 100; | 1136 | i = 100; |
| @@ -1145,6 +1148,9 @@ static int imx_startup(struct uart_port *port) | |||
| 1145 | writel(USR1_RTSD, sport->port.membase + USR1); | 1148 | writel(USR1_RTSD, sport->port.membase + USR1); |
| 1146 | writel(USR2_ORE, sport->port.membase + USR2); | 1149 | writel(USR2_ORE, sport->port.membase + USR2); |
| 1147 | 1150 | ||
| 1151 | if (sport->dma_is_inited && !sport->dma_is_enabled) | ||
| 1152 | imx_enable_dma(sport); | ||
| 1153 | |||
| 1148 | temp = readl(sport->port.membase + UCR1); | 1154 | temp = readl(sport->port.membase + UCR1); |
| 1149 | temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; | 1155 | temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; |
| 1150 | 1156 | ||
| @@ -1278,7 +1284,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1278 | { | 1284 | { |
| 1279 | struct imx_port *sport = (struct imx_port *)port; | 1285 | struct imx_port *sport = (struct imx_port *)port; |
| 1280 | unsigned long flags; | 1286 | unsigned long flags; |
| 1281 | unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; | 1287 | unsigned int ucr2, old_ucr1, old_ucr2, baud, quot; |
| 1282 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; | 1288 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; |
| 1283 | unsigned int div, ufcr; | 1289 | unsigned int div, ufcr; |
| 1284 | unsigned long num, denom; | 1290 | unsigned long num, denom; |
| @@ -1315,11 +1321,6 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1315 | } else { | 1321 | } else { |
| 1316 | ucr2 |= UCR2_CTSC; | 1322 | ucr2 |= UCR2_CTSC; |
| 1317 | } | 1323 | } |
| 1318 | |||
| 1319 | /* Can we enable the DMA support? */ | ||
| 1320 | if (is_imx6q_uart(sport) && !uart_console(port) | ||
| 1321 | && !sport->dma_is_inited) | ||
| 1322 | imx_uart_dma_init(sport); | ||
| 1323 | } else { | 1324 | } else { |
| 1324 | termios->c_cflag &= ~CRTSCTS; | 1325 | termios->c_cflag &= ~CRTSCTS; |
| 1325 | } | 1326 | } |
| @@ -1387,10 +1388,10 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1387 | barrier(); | 1388 | barrier(); |
| 1388 | 1389 | ||
| 1389 | /* then, disable everything */ | 1390 | /* then, disable everything */ |
| 1390 | old_txrxen = readl(sport->port.membase + UCR2); | 1391 | old_ucr2 = readl(sport->port.membase + UCR2); |
| 1391 | writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN), | 1392 | writel(old_ucr2 & ~(UCR2_TXEN | UCR2_RXEN), |
| 1392 | sport->port.membase + UCR2); | 1393 | sport->port.membase + UCR2); |
| 1393 | old_txrxen &= (UCR2_TXEN | UCR2_RXEN); | 1394 | old_ucr2 &= (UCR2_TXEN | UCR2_RXEN | UCR2_ATEN); |
| 1394 | 1395 | ||
| 1395 | /* custom-baudrate handling */ | 1396 | /* custom-baudrate handling */ |
| 1396 | div = sport->port.uartclk / (baud * 16); | 1397 | div = sport->port.uartclk / (baud * 16); |
| @@ -1431,13 +1432,11 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1431 | writel(old_ucr1, sport->port.membase + UCR1); | 1432 | writel(old_ucr1, sport->port.membase + UCR1); |
| 1432 | 1433 | ||
| 1433 | /* set the parity, stop bits and data size */ | 1434 | /* set the parity, stop bits and data size */ |
| 1434 | writel(ucr2 | old_txrxen, sport->port.membase + UCR2); | 1435 | writel(ucr2 | old_ucr2, sport->port.membase + UCR2); |
| 1435 | 1436 | ||
| 1436 | if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) | 1437 | if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) |
| 1437 | imx_enable_ms(&sport->port); | 1438 | imx_enable_ms(&sport->port); |
| 1438 | 1439 | ||
| 1439 | if (sport->dma_is_inited && !sport->dma_is_enabled) | ||
| 1440 | imx_enable_dma(sport); | ||
| 1441 | spin_unlock_irqrestore(&sport->port.lock, flags); | 1440 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| 1442 | } | 1441 | } |
| 1443 | 1442 | ||
| @@ -1503,7 +1502,7 @@ static int imx_poll_init(struct uart_port *port) | |||
| 1503 | if (retval) | 1502 | if (retval) |
| 1504 | clk_disable_unprepare(sport->clk_ipg); | 1503 | clk_disable_unprepare(sport->clk_ipg); |
| 1505 | 1504 | ||
| 1506 | imx_setup_ufcr(sport, 0); | 1505 | imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); |
| 1507 | 1506 | ||
| 1508 | spin_lock_irqsave(&sport->port.lock, flags); | 1507 | spin_lock_irqsave(&sport->port.lock, flags); |
| 1509 | 1508 | ||
| @@ -1773,7 +1772,7 @@ imx_console_setup(struct console *co, char *options) | |||
| 1773 | else | 1772 | else |
| 1774 | imx_console_get_options(sport, &baud, &parity, &bits); | 1773 | imx_console_get_options(sport, &baud, &parity, &bits); |
| 1775 | 1774 | ||
| 1776 | imx_setup_ufcr(sport, 0); | 1775 | imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); |
| 1777 | 1776 | ||
| 1778 | retval = uart_set_options(&sport->port, co, baud, parity, bits, flow); | 1777 | retval = uart_set_options(&sport->port, co, baud, parity, bits, flow); |
| 1779 | 1778 | ||
| @@ -1803,6 +1802,38 @@ static struct console imx_console = { | |||
| 1803 | }; | 1802 | }; |
| 1804 | 1803 | ||
| 1805 | #define IMX_CONSOLE &imx_console | 1804 | #define IMX_CONSOLE &imx_console |
| 1805 | |||
| 1806 | #ifdef CONFIG_OF | ||
| 1807 | static void imx_console_early_putchar(struct uart_port *port, int ch) | ||
| 1808 | { | ||
| 1809 | while (readl_relaxed(port->membase + IMX21_UTS) & UTS_TXFULL) | ||
| 1810 | cpu_relax(); | ||
| 1811 | |||
| 1812 | writel_relaxed(ch, port->membase + URTX0); | ||
| 1813 | } | ||
| 1814 | |||
| 1815 | static void imx_console_early_write(struct console *con, const char *s, | ||
| 1816 | unsigned count) | ||
| 1817 | { | ||
| 1818 | struct earlycon_device *dev = con->data; | ||
| 1819 | |||
| 1820 | uart_console_write(&dev->port, s, count, imx_console_early_putchar); | ||
| 1821 | } | ||
| 1822 | |||
| 1823 | static int __init | ||
| 1824 | imx_console_early_setup(struct earlycon_device *dev, const char *opt) | ||
| 1825 | { | ||
| 1826 | if (!dev->port.membase) | ||
| 1827 | return -ENODEV; | ||
| 1828 | |||
| 1829 | dev->con->write = imx_console_early_write; | ||
| 1830 | |||
| 1831 | return 0; | ||
| 1832 | } | ||
| 1833 | OF_EARLYCON_DECLARE(ec_imx6q, "fsl,imx6q-uart", imx_console_early_setup); | ||
| 1834 | OF_EARLYCON_DECLARE(ec_imx21, "fsl,imx21-uart", imx_console_early_setup); | ||
| 1835 | #endif | ||
| 1836 | |||
| 1806 | #else | 1837 | #else |
| 1807 | #define IMX_CONSOLE NULL | 1838 | #define IMX_CONSOLE NULL |
| 1808 | #endif | 1839 | #endif |
diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c index e92d7ebe9e77..7eb04ae71cc8 100644 --- a/drivers/tty/serial/lpc32xx_hs.c +++ b/drivers/tty/serial/lpc32xx_hs.c | |||
| @@ -691,12 +691,13 @@ static int serial_hs_lpc32xx_probe(struct platform_device *pdev) | |||
| 691 | p->port.mapbase = res->start; | 691 | p->port.mapbase = res->start; |
| 692 | p->port.membase = NULL; | 692 | p->port.membase = NULL; |
| 693 | 693 | ||
| 694 | p->port.irq = platform_get_irq(pdev, 0); | 694 | ret = platform_get_irq(pdev, 0); |
| 695 | if (p->port.irq < 0) { | 695 | if (ret < 0) { |
| 696 | dev_err(&pdev->dev, "Error getting irq for HS UART port %d\n", | 696 | dev_err(&pdev->dev, "Error getting irq for HS UART port %d\n", |
| 697 | uarts_registered); | 697 | uarts_registered); |
| 698 | return p->port.irq; | 698 | return ret; |
| 699 | } | 699 | } |
| 700 | p->port.irq = ret; | ||
| 700 | 701 | ||
| 701 | p->port.iotype = UPIO_MEM32; | 702 | p->port.iotype = UPIO_MEM32; |
| 702 | p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; | 703 | p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; |
diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c index b90e7b30468b..3141aa20843d 100644 --- a/drivers/tty/serial/men_z135_uart.c +++ b/drivers/tty/serial/men_z135_uart.c | |||
| @@ -35,8 +35,6 @@ | |||
| 35 | #define MEN_Z135_BAUD_REG 0x810 | 35 | #define MEN_Z135_BAUD_REG 0x810 |
| 36 | #define MEN_Z135_TIMEOUT 0x814 | 36 | #define MEN_Z135_TIMEOUT 0x814 |
| 37 | 37 | ||
| 38 | #define MEN_Z135_MEM_SIZE 0x818 | ||
| 39 | |||
| 40 | #define IRQ_ID(x) ((x) & 0x1f) | 38 | #define IRQ_ID(x) ((x) & 0x1f) |
| 41 | 39 | ||
| 42 | #define MEN_Z135_IER_RXCIEN BIT(0) /* RX Space IRQ */ | 40 | #define MEN_Z135_IER_RXCIEN BIT(0) /* RX Space IRQ */ |
| @@ -124,6 +122,7 @@ MODULE_PARM_DESC(rx_timeout, "RX timeout. " | |||
| 124 | struct men_z135_port { | 122 | struct men_z135_port { |
| 125 | struct uart_port port; | 123 | struct uart_port port; |
| 126 | struct mcb_device *mdev; | 124 | struct mcb_device *mdev; |
| 125 | struct resource *mem; | ||
| 127 | unsigned char *rxbuf; | 126 | unsigned char *rxbuf; |
| 128 | u32 stat_reg; | 127 | u32 stat_reg; |
| 129 | spinlock_t lock; | 128 | spinlock_t lock; |
| @@ -734,22 +733,30 @@ static const char *men_z135_type(struct uart_port *port) | |||
| 734 | 733 | ||
| 735 | static void men_z135_release_port(struct uart_port *port) | 734 | static void men_z135_release_port(struct uart_port *port) |
| 736 | { | 735 | { |
| 736 | struct men_z135_port *uart = to_men_z135(port); | ||
| 737 | |||
| 737 | iounmap(port->membase); | 738 | iounmap(port->membase); |
| 738 | port->membase = NULL; | 739 | port->membase = NULL; |
| 739 | 740 | ||
| 740 | release_mem_region(port->mapbase, MEN_Z135_MEM_SIZE); | 741 | mcb_release_mem(uart->mem); |
| 741 | } | 742 | } |
| 742 | 743 | ||
| 743 | static int men_z135_request_port(struct uart_port *port) | 744 | static int men_z135_request_port(struct uart_port *port) |
| 744 | { | 745 | { |
| 745 | int size = MEN_Z135_MEM_SIZE; | 746 | struct men_z135_port *uart = to_men_z135(port); |
| 747 | struct mcb_device *mdev = uart->mdev; | ||
| 748 | struct resource *mem; | ||
| 749 | |||
| 750 | mem = mcb_request_mem(uart->mdev, dev_name(&mdev->dev)); | ||
| 751 | if (IS_ERR(mem)) | ||
| 752 | return PTR_ERR(mem); | ||
| 746 | 753 | ||
| 747 | if (!request_mem_region(port->mapbase, size, "men_z135_port")) | 754 | port->mapbase = mem->start; |
| 748 | return -EBUSY; | 755 | uart->mem = mem; |
| 749 | 756 | ||
| 750 | port->membase = ioremap(port->mapbase, MEN_Z135_MEM_SIZE); | 757 | port->membase = ioremap(mem->start, resource_size(mem)); |
| 751 | if (port->membase == NULL) { | 758 | if (port->membase == NULL) { |
| 752 | release_mem_region(port->mapbase, MEN_Z135_MEM_SIZE); | 759 | mcb_release_mem(mem); |
| 753 | return -ENOMEM; | 760 | return -ENOMEM; |
| 754 | } | 761 | } |
| 755 | 762 | ||
diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c index 41de374d9784..8c3e51314470 100644 --- a/drivers/tty/serial/mpc52xx_uart.c +++ b/drivers/tty/serial/mpc52xx_uart.c | |||
| @@ -1135,6 +1135,13 @@ mpc52xx_uart_startup(struct uart_port *port) | |||
| 1135 | psc_ops->command(port, MPC52xx_PSC_RST_RX); | 1135 | psc_ops->command(port, MPC52xx_PSC_RST_RX); |
| 1136 | psc_ops->command(port, MPC52xx_PSC_RST_TX); | 1136 | psc_ops->command(port, MPC52xx_PSC_RST_TX); |
| 1137 | 1137 | ||
| 1138 | /* | ||
| 1139 | * According to Freescale's support the RST_TX command can produce a | ||
| 1140 | * spike on the TX pin. So they recommend to delay "for one character". | ||
| 1141 | * One millisecond should be enough for everyone. | ||
| 1142 | */ | ||
| 1143 | msleep(1); | ||
| 1144 | |||
| 1138 | psc_ops->set_sicr(port, 0); /* UART mode DCD ignored */ | 1145 | psc_ops->set_sicr(port, 0); /* UART mode DCD ignored */ |
| 1139 | 1146 | ||
| 1140 | psc_ops->fifo_init(port); | 1147 | psc_ops->fifo_init(port); |
diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c index 82bb6d1fe23b..cadfd1cfae2b 100644 --- a/drivers/tty/serial/mpsc.c +++ b/drivers/tty/serial/mpsc.c | |||
| @@ -55,8 +55,6 @@ | |||
| 55 | #define SUPPORT_SYSRQ | 55 | #define SUPPORT_SYSRQ |
| 56 | #endif | 56 | #endif |
| 57 | 57 | ||
| 58 | #include <linux/module.h> | ||
| 59 | #include <linux/moduleparam.h> | ||
| 60 | #include <linux/tty.h> | 58 | #include <linux/tty.h> |
| 61 | #include <linux/tty_flip.h> | 59 | #include <linux/tty_flip.h> |
| 62 | #include <linux/ioport.h> | 60 | #include <linux/ioport.h> |
| @@ -755,7 +753,7 @@ static int mpsc_alloc_ring_mem(struct mpsc_port_info *pi) | |||
| 755 | pi->port.line); | 753 | pi->port.line); |
| 756 | 754 | ||
| 757 | if (!pi->dma_region) { | 755 | if (!pi->dma_region) { |
| 758 | if (!dma_supported(pi->port.dev, 0xffffffff)) { | 756 | if (!dma_set_mask(pi->port.dev, 0xffffffff)) { |
| 759 | printk(KERN_ERR "MPSC: Inadequate DMA support\n"); | 757 | printk(KERN_ERR "MPSC: Inadequate DMA support\n"); |
| 760 | rc = -ENXIO; | 758 | rc = -ENXIO; |
| 761 | } else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, | 759 | } else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, |
| @@ -2108,26 +2106,11 @@ static int mpsc_drv_probe(struct platform_device *dev) | |||
| 2108 | return rc; | 2106 | return rc; |
| 2109 | } | 2107 | } |
| 2110 | 2108 | ||
| 2111 | static int mpsc_drv_remove(struct platform_device *dev) | ||
| 2112 | { | ||
| 2113 | pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id); | ||
| 2114 | |||
| 2115 | if (dev->id < MPSC_NUM_CTLRS) { | ||
| 2116 | uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port); | ||
| 2117 | mpsc_release_port((struct uart_port *) | ||
| 2118 | &mpsc_ports[dev->id].port); | ||
| 2119 | mpsc_drv_unmap_regs(&mpsc_ports[dev->id]); | ||
| 2120 | return 0; | ||
| 2121 | } else { | ||
| 2122 | return -ENODEV; | ||
| 2123 | } | ||
| 2124 | } | ||
| 2125 | |||
| 2126 | static struct platform_driver mpsc_driver = { | 2109 | static struct platform_driver mpsc_driver = { |
| 2127 | .probe = mpsc_drv_probe, | 2110 | .probe = mpsc_drv_probe, |
| 2128 | .remove = mpsc_drv_remove, | ||
| 2129 | .driver = { | 2111 | .driver = { |
| 2130 | .name = MPSC_CTLR_NAME, | 2112 | .name = MPSC_CTLR_NAME, |
| 2113 | .suppress_bind_attrs = true, | ||
| 2131 | }, | 2114 | }, |
| 2132 | }; | 2115 | }; |
| 2133 | 2116 | ||
| @@ -2156,22 +2139,10 @@ static int __init mpsc_drv_init(void) | |||
| 2156 | 2139 | ||
| 2157 | return rc; | 2140 | return rc; |
| 2158 | } | 2141 | } |
| 2142 | device_initcall(mpsc_drv_init); | ||
| 2159 | 2143 | ||
| 2160 | static void __exit mpsc_drv_exit(void) | 2144 | /* |
| 2161 | { | ||
| 2162 | platform_driver_unregister(&mpsc_driver); | ||
| 2163 | platform_driver_unregister(&mpsc_shared_driver); | ||
| 2164 | uart_unregister_driver(&mpsc_reg); | ||
| 2165 | memset(mpsc_ports, 0, sizeof(mpsc_ports)); | ||
| 2166 | memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); | ||
| 2167 | } | ||
| 2168 | |||
| 2169 | module_init(mpsc_drv_init); | ||
| 2170 | module_exit(mpsc_drv_exit); | ||
| 2171 | |||
| 2172 | MODULE_AUTHOR("Mark A. Greer <mgreer@mvista.com>"); | 2145 | MODULE_AUTHOR("Mark A. Greer <mgreer@mvista.com>"); |
| 2173 | MODULE_DESCRIPTION("Generic Marvell MPSC serial/UART driver"); | 2146 | MODULE_DESCRIPTION("Generic Marvell MPSC serial/UART driver"); |
| 2174 | MODULE_VERSION(MPSC_VERSION); | ||
| 2175 | MODULE_LICENSE("GPL"); | 2147 | MODULE_LICENSE("GPL"); |
| 2176 | MODULE_ALIAS_CHARDEV_MAJOR(MPSC_MAJOR); | 2148 | */ |
| 2177 | MODULE_ALIAS("platform:" MPSC_CTLR_NAME); | ||
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index b73889c8ed4b..dcde955475dc 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c | |||
| @@ -20,6 +20,8 @@ | |||
| 20 | #endif | 20 | #endif |
| 21 | 21 | ||
| 22 | #include <linux/atomic.h> | 22 | #include <linux/atomic.h> |
| 23 | #include <linux/dma-mapping.h> | ||
| 24 | #include <linux/dmaengine.h> | ||
| 23 | #include <linux/hrtimer.h> | 25 | #include <linux/hrtimer.h> |
| 24 | #include <linux/module.h> | 26 | #include <linux/module.h> |
| 25 | #include <linux/io.h> | 27 | #include <linux/io.h> |
| @@ -31,6 +33,7 @@ | |||
| 31 | #include <linux/tty_flip.h> | 33 | #include <linux/tty_flip.h> |
| 32 | #include <linux/serial_core.h> | 34 | #include <linux/serial_core.h> |
| 33 | #include <linux/serial.h> | 35 | #include <linux/serial.h> |
| 36 | #include <linux/slab.h> | ||
| 34 | #include <linux/clk.h> | 37 | #include <linux/clk.h> |
| 35 | #include <linux/platform_device.h> | 38 | #include <linux/platform_device.h> |
| 36 | #include <linux/delay.h> | 39 | #include <linux/delay.h> |
| @@ -39,6 +42,11 @@ | |||
| 39 | 42 | ||
| 40 | #include "msm_serial.h" | 43 | #include "msm_serial.h" |
| 41 | 44 | ||
| 45 | #define UARTDM_BURST_SIZE 16 /* in bytes */ | ||
| 46 | #define UARTDM_TX_AIGN(x) ((x) & ~0x3) /* valid for > 1p3 */ | ||
| 47 | #define UARTDM_TX_MAX 256 /* in bytes, valid for <= 1p3 */ | ||
| 48 | #define UARTDM_RX_SIZE (UART_XMIT_SIZE / 4) | ||
| 49 | |||
| 42 | enum { | 50 | enum { |
| 43 | UARTDM_1P1 = 1, | 51 | UARTDM_1P1 = 1, |
| 44 | UARTDM_1P2, | 52 | UARTDM_1P2, |
| @@ -46,6 +54,17 @@ enum { | |||
| 46 | UARTDM_1P4, | 54 | UARTDM_1P4, |
| 47 | }; | 55 | }; |
| 48 | 56 | ||
| 57 | struct msm_dma { | ||
| 58 | struct dma_chan *chan; | ||
| 59 | enum dma_data_direction dir; | ||
| 60 | dma_addr_t phys; | ||
| 61 | unsigned char *virt; | ||
| 62 | dma_cookie_t cookie; | ||
| 63 | u32 enable_bit; | ||
| 64 | unsigned int count; | ||
| 65 | struct dma_async_tx_descriptor *desc; | ||
| 66 | }; | ||
| 67 | |||
| 49 | struct msm_port { | 68 | struct msm_port { |
| 50 | struct uart_port uart; | 69 | struct uart_port uart; |
| 51 | char name[16]; | 70 | char name[16]; |
| @@ -55,9 +74,153 @@ struct msm_port { | |||
| 55 | int is_uartdm; | 74 | int is_uartdm; |
| 56 | unsigned int old_snap_state; | 75 | unsigned int old_snap_state; |
| 57 | bool break_detected; | 76 | bool break_detected; |
| 77 | struct msm_dma tx_dma; | ||
| 78 | struct msm_dma rx_dma; | ||
| 58 | }; | 79 | }; |
| 59 | 80 | ||
| 60 | static inline void wait_for_xmitr(struct uart_port *port) | 81 | static void msm_handle_tx(struct uart_port *port); |
| 82 | static void msm_start_rx_dma(struct msm_port *msm_port); | ||
| 83 | |||
| 84 | void msm_stop_dma(struct uart_port *port, struct msm_dma *dma) | ||
| 85 | { | ||
| 86 | struct device *dev = port->dev; | ||
| 87 | unsigned int mapped; | ||
| 88 | u32 val; | ||
| 89 | |||
| 90 | mapped = dma->count; | ||
| 91 | dma->count = 0; | ||
| 92 | |||
| 93 | dmaengine_terminate_all(dma->chan); | ||
| 94 | |||
| 95 | /* | ||
| 96 | * DMA Stall happens if enqueue and flush command happens concurrently. | ||
| 97 | * For example before changing the baud rate/protocol configuration and | ||
| 98 | * sending flush command to ADM, disable the channel of UARTDM. | ||
| 99 | * Note: should not reset the receiver here immediately as it is not | ||
| 100 | * suggested to do disable/reset or reset/disable at the same time. | ||
| 101 | */ | ||
| 102 | val = msm_read(port, UARTDM_DMEN); | ||
| 103 | val &= ~dma->enable_bit; | ||
| 104 | msm_write(port, val, UARTDM_DMEN); | ||
| 105 | |||
| 106 | if (mapped) | ||
| 107 | dma_unmap_single(dev, dma->phys, mapped, dma->dir); | ||
| 108 | } | ||
| 109 | |||
| 110 | static void msm_release_dma(struct msm_port *msm_port) | ||
| 111 | { | ||
| 112 | struct msm_dma *dma; | ||
| 113 | |||
| 114 | dma = &msm_port->tx_dma; | ||
| 115 | if (dma->chan) { | ||
| 116 | msm_stop_dma(&msm_port->uart, dma); | ||
| 117 | dma_release_channel(dma->chan); | ||
| 118 | } | ||
| 119 | |||
| 120 | memset(dma, 0, sizeof(*dma)); | ||
| 121 | |||
| 122 | dma = &msm_port->rx_dma; | ||
| 123 | if (dma->chan) { | ||
| 124 | msm_stop_dma(&msm_port->uart, dma); | ||
| 125 | dma_release_channel(dma->chan); | ||
| 126 | kfree(dma->virt); | ||
| 127 | } | ||
| 128 | |||
| 129 | memset(dma, 0, sizeof(*dma)); | ||
| 130 | } | ||
| 131 | |||
| 132 | static void msm_request_tx_dma(struct msm_port *msm_port, resource_size_t base) | ||
| 133 | { | ||
| 134 | struct device *dev = msm_port->uart.dev; | ||
| 135 | struct dma_slave_config conf; | ||
| 136 | struct msm_dma *dma; | ||
| 137 | u32 crci = 0; | ||
| 138 | int ret; | ||
| 139 | |||
| 140 | dma = &msm_port->tx_dma; | ||
| 141 | |||
| 142 | /* allocate DMA resources, if available */ | ||
| 143 | dma->chan = dma_request_slave_channel_reason(dev, "tx"); | ||
| 144 | if (IS_ERR(dma->chan)) | ||
| 145 | goto no_tx; | ||
| 146 | |||
| 147 | of_property_read_u32(dev->of_node, "qcom,tx-crci", &crci); | ||
| 148 | |||
| 149 | memset(&conf, 0, sizeof(conf)); | ||
| 150 | conf.direction = DMA_MEM_TO_DEV; | ||
| 151 | conf.device_fc = true; | ||
| 152 | conf.dst_addr = base + UARTDM_TF; | ||
| 153 | conf.dst_maxburst = UARTDM_BURST_SIZE; | ||
| 154 | conf.slave_id = crci; | ||
| 155 | |||
| 156 | ret = dmaengine_slave_config(dma->chan, &conf); | ||
| 157 | if (ret) | ||
| 158 | goto rel_tx; | ||
| 159 | |||
| 160 | dma->dir = DMA_TO_DEVICE; | ||
| 161 | |||
| 162 | if (msm_port->is_uartdm < UARTDM_1P4) | ||
| 163 | dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE; | ||
| 164 | else | ||
| 165 | dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE; | ||
| 166 | |||
| 167 | return; | ||
| 168 | |||
| 169 | rel_tx: | ||
| 170 | dma_release_channel(dma->chan); | ||
| 171 | no_tx: | ||
| 172 | memset(dma, 0, sizeof(*dma)); | ||
| 173 | } | ||
| 174 | |||
| 175 | static void msm_request_rx_dma(struct msm_port *msm_port, resource_size_t base) | ||
| 176 | { | ||
| 177 | struct device *dev = msm_port->uart.dev; | ||
| 178 | struct dma_slave_config conf; | ||
| 179 | struct msm_dma *dma; | ||
| 180 | u32 crci = 0; | ||
| 181 | int ret; | ||
| 182 | |||
| 183 | dma = &msm_port->rx_dma; | ||
| 184 | |||
| 185 | /* allocate DMA resources, if available */ | ||
| 186 | dma->chan = dma_request_slave_channel_reason(dev, "rx"); | ||
| 187 | if (IS_ERR(dma->chan)) | ||
| 188 | goto no_rx; | ||
| 189 | |||
| 190 | of_property_read_u32(dev->of_node, "qcom,rx-crci", &crci); | ||
| 191 | |||
| 192 | dma->virt = kzalloc(UARTDM_RX_SIZE, GFP_KERNEL); | ||
| 193 | if (!dma->virt) | ||
| 194 | goto rel_rx; | ||
| 195 | |||
| 196 | memset(&conf, 0, sizeof(conf)); | ||
| 197 | conf.direction = DMA_DEV_TO_MEM; | ||
| 198 | conf.device_fc = true; | ||
| 199 | conf.src_addr = base + UARTDM_RF; | ||
| 200 | conf.src_maxburst = UARTDM_BURST_SIZE; | ||
| 201 | conf.slave_id = crci; | ||
| 202 | |||
| 203 | ret = dmaengine_slave_config(dma->chan, &conf); | ||
| 204 | if (ret) | ||
| 205 | goto err; | ||
| 206 | |||
| 207 | dma->dir = DMA_FROM_DEVICE; | ||
| 208 | |||
| 209 | if (msm_port->is_uartdm < UARTDM_1P4) | ||
| 210 | dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE; | ||
| 211 | else | ||
| 212 | dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE; | ||
| 213 | |||
| 214 | return; | ||
| 215 | err: | ||
| 216 | kfree(dma->virt); | ||
| 217 | rel_rx: | ||
| 218 | dma_release_channel(dma->chan); | ||
| 219 | no_rx: | ||
| 220 | memset(dma, 0, sizeof(*dma)); | ||
| 221 | } | ||
| 222 | |||
| 223 | static inline void msm_wait_for_xmitr(struct uart_port *port) | ||
| 61 | { | 224 | { |
| 62 | while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) { | 225 | while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) { |
| 63 | if (msm_read(port, UART_ISR) & UART_ISR_TX_READY) | 226 | if (msm_read(port, UART_ISR) & UART_ISR_TX_READY) |
| @@ -78,17 +241,277 @@ static void msm_stop_tx(struct uart_port *port) | |||
| 78 | static void msm_start_tx(struct uart_port *port) | 241 | static void msm_start_tx(struct uart_port *port) |
| 79 | { | 242 | { |
| 80 | struct msm_port *msm_port = UART_TO_MSM(port); | 243 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 244 | struct msm_dma *dma = &msm_port->tx_dma; | ||
| 245 | |||
| 246 | /* Already started in DMA mode */ | ||
| 247 | if (dma->count) | ||
| 248 | return; | ||
| 249 | |||
| 250 | msm_port->imr |= UART_IMR_TXLEV; | ||
| 251 | msm_write(port, msm_port->imr, UART_IMR); | ||
| 252 | } | ||
| 253 | |||
| 254 | static void msm_reset_dm_count(struct uart_port *port, int count) | ||
| 255 | { | ||
| 256 | msm_wait_for_xmitr(port); | ||
| 257 | msm_write(port, count, UARTDM_NCF_TX); | ||
| 258 | msm_read(port, UARTDM_NCF_TX); | ||
| 259 | } | ||
| 260 | |||
| 261 | static void msm_complete_tx_dma(void *args) | ||
| 262 | { | ||
| 263 | struct msm_port *msm_port = args; | ||
| 264 | struct uart_port *port = &msm_port->uart; | ||
| 265 | struct circ_buf *xmit = &port->state->xmit; | ||
| 266 | struct msm_dma *dma = &msm_port->tx_dma; | ||
| 267 | struct dma_tx_state state; | ||
| 268 | enum dma_status status; | ||
| 269 | unsigned long flags; | ||
| 270 | unsigned int count; | ||
| 271 | u32 val; | ||
| 272 | |||
| 273 | spin_lock_irqsave(&port->lock, flags); | ||
| 274 | |||
| 275 | /* Already stopped */ | ||
| 276 | if (!dma->count) | ||
| 277 | goto done; | ||
| 278 | |||
| 279 | status = dmaengine_tx_status(dma->chan, dma->cookie, &state); | ||
| 280 | |||
| 281 | dma_unmap_single(port->dev, dma->phys, dma->count, dma->dir); | ||
| 81 | 282 | ||
| 283 | val = msm_read(port, UARTDM_DMEN); | ||
| 284 | val &= ~dma->enable_bit; | ||
| 285 | msm_write(port, val, UARTDM_DMEN); | ||
| 286 | |||
| 287 | if (msm_port->is_uartdm > UARTDM_1P3) { | ||
| 288 | msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); | ||
| 289 | msm_write(port, UART_CR_TX_ENABLE, UART_CR); | ||
| 290 | } | ||
| 291 | |||
| 292 | count = dma->count - state.residue; | ||
| 293 | port->icount.tx += count; | ||
| 294 | dma->count = 0; | ||
| 295 | |||
| 296 | xmit->tail += count; | ||
| 297 | xmit->tail &= UART_XMIT_SIZE - 1; | ||
| 298 | |||
| 299 | /* Restore "Tx FIFO below watermark" interrupt */ | ||
| 82 | msm_port->imr |= UART_IMR_TXLEV; | 300 | msm_port->imr |= UART_IMR_TXLEV; |
| 83 | msm_write(port, msm_port->imr, UART_IMR); | 301 | msm_write(port, msm_port->imr, UART_IMR); |
| 302 | |||
| 303 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
| 304 | uart_write_wakeup(port); | ||
| 305 | |||
| 306 | msm_handle_tx(port); | ||
| 307 | done: | ||
| 308 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 309 | } | ||
| 310 | |||
| 311 | static int msm_handle_tx_dma(struct msm_port *msm_port, unsigned int count) | ||
| 312 | { | ||
| 313 | struct circ_buf *xmit = &msm_port->uart.state->xmit; | ||
| 314 | struct uart_port *port = &msm_port->uart; | ||
| 315 | struct msm_dma *dma = &msm_port->tx_dma; | ||
| 316 | void *cpu_addr; | ||
| 317 | int ret; | ||
| 318 | u32 val; | ||
| 319 | |||
| 320 | cpu_addr = &xmit->buf[xmit->tail]; | ||
| 321 | |||
| 322 | dma->phys = dma_map_single(port->dev, cpu_addr, count, dma->dir); | ||
| 323 | ret = dma_mapping_error(port->dev, dma->phys); | ||
| 324 | if (ret) | ||
| 325 | return ret; | ||
| 326 | |||
| 327 | dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, | ||
| 328 | count, DMA_MEM_TO_DEV, | ||
| 329 | DMA_PREP_INTERRUPT | | ||
| 330 | DMA_PREP_FENCE); | ||
| 331 | if (!dma->desc) { | ||
| 332 | ret = -EIO; | ||
| 333 | goto unmap; | ||
| 334 | } | ||
| 335 | |||
| 336 | dma->desc->callback = msm_complete_tx_dma; | ||
| 337 | dma->desc->callback_param = msm_port; | ||
| 338 | |||
| 339 | dma->cookie = dmaengine_submit(dma->desc); | ||
| 340 | ret = dma_submit_error(dma->cookie); | ||
| 341 | if (ret) | ||
| 342 | goto unmap; | ||
| 343 | |||
| 344 | /* | ||
| 345 | * Using DMA complete for Tx FIFO reload, no need for | ||
| 346 | * "Tx FIFO below watermark" one, disable it | ||
| 347 | */ | ||
| 348 | msm_port->imr &= ~UART_IMR_TXLEV; | ||
| 349 | msm_write(port, msm_port->imr, UART_IMR); | ||
| 350 | |||
| 351 | dma->count = count; | ||
| 352 | |||
| 353 | val = msm_read(port, UARTDM_DMEN); | ||
| 354 | val |= dma->enable_bit; | ||
| 355 | |||
| 356 | if (msm_port->is_uartdm < UARTDM_1P4) | ||
| 357 | msm_write(port, val, UARTDM_DMEN); | ||
| 358 | |||
| 359 | msm_reset_dm_count(port, count); | ||
| 360 | |||
| 361 | if (msm_port->is_uartdm > UARTDM_1P3) | ||
| 362 | msm_write(port, val, UARTDM_DMEN); | ||
| 363 | |||
| 364 | dma_async_issue_pending(dma->chan); | ||
| 365 | return 0; | ||
| 366 | unmap: | ||
| 367 | dma_unmap_single(port->dev, dma->phys, count, dma->dir); | ||
| 368 | return ret; | ||
| 369 | } | ||
| 370 | |||
| 371 | static void msm_complete_rx_dma(void *args) | ||
| 372 | { | ||
| 373 | struct msm_port *msm_port = args; | ||
| 374 | struct uart_port *port = &msm_port->uart; | ||
| 375 | struct tty_port *tport = &port->state->port; | ||
| 376 | struct msm_dma *dma = &msm_port->rx_dma; | ||
| 377 | int count = 0, i, sysrq; | ||
| 378 | unsigned long flags; | ||
| 379 | u32 val; | ||
| 380 | |||
| 381 | spin_lock_irqsave(&port->lock, flags); | ||
| 382 | |||
| 383 | /* Already stopped */ | ||
| 384 | if (!dma->count) | ||
| 385 | goto done; | ||
| 386 | |||
| 387 | val = msm_read(port, UARTDM_DMEN); | ||
| 388 | val &= ~dma->enable_bit; | ||
| 389 | msm_write(port, val, UARTDM_DMEN); | ||
| 390 | |||
| 391 | /* Restore interrupts */ | ||
| 392 | msm_port->imr |= UART_IMR_RXLEV | UART_IMR_RXSTALE; | ||
| 393 | msm_write(port, msm_port->imr, UART_IMR); | ||
| 394 | |||
| 395 | if (msm_read(port, UART_SR) & UART_SR_OVERRUN) { | ||
| 396 | port->icount.overrun++; | ||
| 397 | tty_insert_flip_char(tport, 0, TTY_OVERRUN); | ||
| 398 | msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); | ||
| 399 | } | ||
| 400 | |||
| 401 | count = msm_read(port, UARTDM_RX_TOTAL_SNAP); | ||
| 402 | |||
| 403 | port->icount.rx += count; | ||
| 404 | |||
| 405 | dma->count = 0; | ||
| 406 | |||
| 407 | dma_unmap_single(port->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); | ||
| 408 | |||
| 409 | for (i = 0; i < count; i++) { | ||
| 410 | char flag = TTY_NORMAL; | ||
| 411 | |||
| 412 | if (msm_port->break_detected && dma->virt[i] == 0) { | ||
| 413 | port->icount.brk++; | ||
| 414 | flag = TTY_BREAK; | ||
| 415 | msm_port->break_detected = false; | ||
| 416 | if (uart_handle_break(port)) | ||
| 417 | continue; | ||
| 418 | } | ||
| 419 | |||
| 420 | if (!(port->read_status_mask & UART_SR_RX_BREAK)) | ||
| 421 | flag = TTY_NORMAL; | ||
| 422 | |||
| 423 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 424 | sysrq = uart_handle_sysrq_char(port, dma->virt[i]); | ||
| 425 | spin_lock_irqsave(&port->lock, flags); | ||
| 426 | if (!sysrq) | ||
| 427 | tty_insert_flip_char(tport, dma->virt[i], flag); | ||
| 428 | } | ||
| 429 | |||
| 430 | msm_start_rx_dma(msm_port); | ||
| 431 | done: | ||
| 432 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 433 | |||
| 434 | if (count) | ||
| 435 | tty_flip_buffer_push(tport); | ||
| 436 | } | ||
| 437 | |||
| 438 | static void msm_start_rx_dma(struct msm_port *msm_port) | ||
| 439 | { | ||
| 440 | struct msm_dma *dma = &msm_port->rx_dma; | ||
| 441 | struct uart_port *uart = &msm_port->uart; | ||
| 442 | u32 val; | ||
| 443 | int ret; | ||
| 444 | |||
| 445 | if (!dma->chan) | ||
| 446 | return; | ||
| 447 | |||
| 448 | dma->phys = dma_map_single(uart->dev, dma->virt, | ||
| 449 | UARTDM_RX_SIZE, dma->dir); | ||
| 450 | ret = dma_mapping_error(uart->dev, dma->phys); | ||
| 451 | if (ret) | ||
| 452 | return; | ||
| 453 | |||
| 454 | dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, | ||
| 455 | UARTDM_RX_SIZE, DMA_DEV_TO_MEM, | ||
| 456 | DMA_PREP_INTERRUPT); | ||
| 457 | if (!dma->desc) | ||
| 458 | goto unmap; | ||
| 459 | |||
| 460 | dma->desc->callback = msm_complete_rx_dma; | ||
| 461 | dma->desc->callback_param = msm_port; | ||
| 462 | |||
| 463 | dma->cookie = dmaengine_submit(dma->desc); | ||
| 464 | ret = dma_submit_error(dma->cookie); | ||
| 465 | if (ret) | ||
| 466 | goto unmap; | ||
| 467 | /* | ||
| 468 | * Using DMA for FIFO off-load, no need for "Rx FIFO over | ||
| 469 | * watermark" or "stale" interrupts, disable them | ||
| 470 | */ | ||
| 471 | msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); | ||
| 472 | |||
| 473 | /* | ||
| 474 | * Well, when DMA is ADM3 engine(implied by <= UARTDM v1.3), | ||
| 475 | * we need RXSTALE to flush input DMA fifo to memory | ||
| 476 | */ | ||
| 477 | if (msm_port->is_uartdm < UARTDM_1P4) | ||
| 478 | msm_port->imr |= UART_IMR_RXSTALE; | ||
| 479 | |||
| 480 | msm_write(uart, msm_port->imr, UART_IMR); | ||
| 481 | |||
| 482 | dma->count = UARTDM_RX_SIZE; | ||
| 483 | |||
| 484 | dma_async_issue_pending(dma->chan); | ||
| 485 | |||
| 486 | msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR); | ||
| 487 | msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); | ||
| 488 | |||
| 489 | val = msm_read(uart, UARTDM_DMEN); | ||
| 490 | val |= dma->enable_bit; | ||
| 491 | |||
| 492 | if (msm_port->is_uartdm < UARTDM_1P4) | ||
| 493 | msm_write(uart, val, UARTDM_DMEN); | ||
| 494 | |||
| 495 | msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX); | ||
| 496 | |||
| 497 | if (msm_port->is_uartdm > UARTDM_1P3) | ||
| 498 | msm_write(uart, val, UARTDM_DMEN); | ||
| 499 | |||
| 500 | return; | ||
| 501 | unmap: | ||
| 502 | dma_unmap_single(uart->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); | ||
| 84 | } | 503 | } |
| 85 | 504 | ||
| 86 | static void msm_stop_rx(struct uart_port *port) | 505 | static void msm_stop_rx(struct uart_port *port) |
| 87 | { | 506 | { |
| 88 | struct msm_port *msm_port = UART_TO_MSM(port); | 507 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 508 | struct msm_dma *dma = &msm_port->rx_dma; | ||
| 89 | 509 | ||
| 90 | msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); | 510 | msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); |
| 91 | msm_write(port, msm_port->imr, UART_IMR); | 511 | msm_write(port, msm_port->imr, UART_IMR); |
| 512 | |||
| 513 | if (dma->chan) | ||
| 514 | msm_stop_dma(port, dma); | ||
| 92 | } | 515 | } |
| 93 | 516 | ||
| 94 | static void msm_enable_ms(struct uart_port *port) | 517 | static void msm_enable_ms(struct uart_port *port) |
| @@ -99,7 +522,7 @@ static void msm_enable_ms(struct uart_port *port) | |||
| 99 | msm_write(port, msm_port->imr, UART_IMR); | 522 | msm_write(port, msm_port->imr, UART_IMR); |
| 100 | } | 523 | } |
| 101 | 524 | ||
| 102 | static void handle_rx_dm(struct uart_port *port, unsigned int misr) | 525 | static void msm_handle_rx_dm(struct uart_port *port, unsigned int misr) |
| 103 | { | 526 | { |
| 104 | struct tty_port *tport = &port->state->port; | 527 | struct tty_port *tport = &port->state->port; |
| 105 | unsigned int sr; | 528 | unsigned int sr; |
| @@ -169,9 +592,12 @@ static void handle_rx_dm(struct uart_port *port, unsigned int misr) | |||
| 169 | msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); | 592 | msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); |
| 170 | msm_write(port, 0xFFFFFF, UARTDM_DMRX); | 593 | msm_write(port, 0xFFFFFF, UARTDM_DMRX); |
| 171 | msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); | 594 | msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); |
| 595 | |||
| 596 | /* Try to use DMA */ | ||
| 597 | msm_start_rx_dma(msm_port); | ||
| 172 | } | 598 | } |
| 173 | 599 | ||
| 174 | static void handle_rx(struct uart_port *port) | 600 | static void msm_handle_rx(struct uart_port *port) |
| 175 | { | 601 | { |
| 176 | struct tty_port *tport = &port->state->port; | 602 | struct tty_port *tport = &port->state->port; |
| 177 | unsigned int sr; | 603 | unsigned int sr; |
| @@ -224,18 +650,11 @@ static void handle_rx(struct uart_port *port) | |||
| 224 | spin_lock(&port->lock); | 650 | spin_lock(&port->lock); |
| 225 | } | 651 | } |
| 226 | 652 | ||
| 227 | static void reset_dm_count(struct uart_port *port, int count) | 653 | static void msm_handle_tx_pio(struct uart_port *port, unsigned int tx_count) |
| 228 | { | ||
| 229 | wait_for_xmitr(port); | ||
| 230 | msm_write(port, count, UARTDM_NCF_TX); | ||
| 231 | msm_read(port, UARTDM_NCF_TX); | ||
| 232 | } | ||
| 233 | |||
| 234 | static void handle_tx(struct uart_port *port) | ||
| 235 | { | 654 | { |
| 236 | struct circ_buf *xmit = &port->state->xmit; | 655 | struct circ_buf *xmit = &port->state->xmit; |
| 237 | struct msm_port *msm_port = UART_TO_MSM(port); | 656 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 238 | unsigned int tx_count, num_chars; | 657 | unsigned int num_chars; |
| 239 | unsigned int tf_pointer = 0; | 658 | unsigned int tf_pointer = 0; |
| 240 | void __iomem *tf; | 659 | void __iomem *tf; |
| 241 | 660 | ||
| @@ -244,20 +663,8 @@ static void handle_tx(struct uart_port *port) | |||
| 244 | else | 663 | else |
| 245 | tf = port->membase + UART_TF; | 664 | tf = port->membase + UART_TF; |
| 246 | 665 | ||
| 247 | tx_count = uart_circ_chars_pending(xmit); | 666 | if (tx_count && msm_port->is_uartdm) |
| 248 | tx_count = min3(tx_count, (unsigned int)UART_XMIT_SIZE - xmit->tail, | 667 | msm_reset_dm_count(port, tx_count); |
| 249 | port->fifosize); | ||
| 250 | |||
| 251 | if (port->x_char) { | ||
| 252 | if (msm_port->is_uartdm) | ||
| 253 | reset_dm_count(port, tx_count + 1); | ||
| 254 | |||
| 255 | iowrite8_rep(tf, &port->x_char, 1); | ||
| 256 | port->icount.tx++; | ||
| 257 | port->x_char = 0; | ||
| 258 | } else if (tx_count && msm_port->is_uartdm) { | ||
| 259 | reset_dm_count(port, tx_count); | ||
| 260 | } | ||
| 261 | 668 | ||
| 262 | while (tf_pointer < tx_count) { | 669 | while (tf_pointer < tx_count) { |
| 263 | int i; | 670 | int i; |
| @@ -290,20 +697,76 @@ static void handle_tx(struct uart_port *port) | |||
| 290 | uart_write_wakeup(port); | 697 | uart_write_wakeup(port); |
| 291 | } | 698 | } |
| 292 | 699 | ||
| 293 | static void handle_delta_cts(struct uart_port *port) | 700 | static void msm_handle_tx(struct uart_port *port) |
| 701 | { | ||
| 702 | struct msm_port *msm_port = UART_TO_MSM(port); | ||
| 703 | struct circ_buf *xmit = &msm_port->uart.state->xmit; | ||
| 704 | struct msm_dma *dma = &msm_port->tx_dma; | ||
| 705 | unsigned int pio_count, dma_count, dma_min; | ||
| 706 | void __iomem *tf; | ||
| 707 | int err = 0; | ||
| 708 | |||
| 709 | if (port->x_char) { | ||
| 710 | if (msm_port->is_uartdm) | ||
| 711 | tf = port->membase + UARTDM_TF; | ||
| 712 | else | ||
| 713 | tf = port->membase + UART_TF; | ||
| 714 | |||
| 715 | if (msm_port->is_uartdm) | ||
| 716 | msm_reset_dm_count(port, 1); | ||
| 717 | |||
| 718 | iowrite8_rep(tf, &port->x_char, 1); | ||
| 719 | port->icount.tx++; | ||
| 720 | port->x_char = 0; | ||
| 721 | return; | ||
| 722 | } | ||
| 723 | |||
| 724 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | ||
| 725 | msm_stop_tx(port); | ||
| 726 | return; | ||
| 727 | } | ||
| 728 | |||
| 729 | pio_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE); | ||
| 730 | dma_count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); | ||
| 731 | |||
| 732 | dma_min = 1; /* Always DMA */ | ||
| 733 | if (msm_port->is_uartdm > UARTDM_1P3) { | ||
| 734 | dma_count = UARTDM_TX_AIGN(dma_count); | ||
| 735 | dma_min = UARTDM_BURST_SIZE; | ||
| 736 | } else { | ||
| 737 | if (dma_count > UARTDM_TX_MAX) | ||
| 738 | dma_count = UARTDM_TX_MAX; | ||
| 739 | } | ||
| 740 | |||
| 741 | if (pio_count > port->fifosize) | ||
| 742 | pio_count = port->fifosize; | ||
| 743 | |||
| 744 | if (!dma->chan || dma_count < dma_min) | ||
| 745 | msm_handle_tx_pio(port, pio_count); | ||
| 746 | else | ||
| 747 | err = msm_handle_tx_dma(msm_port, dma_count); | ||
| 748 | |||
| 749 | if (err) /* fall back to PIO mode */ | ||
| 750 | msm_handle_tx_pio(port, pio_count); | ||
| 751 | } | ||
| 752 | |||
| 753 | static void msm_handle_delta_cts(struct uart_port *port) | ||
| 294 | { | 754 | { |
| 295 | msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); | 755 | msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); |
| 296 | port->icount.cts++; | 756 | port->icount.cts++; |
| 297 | wake_up_interruptible(&port->state->port.delta_msr_wait); | 757 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 298 | } | 758 | } |
| 299 | 759 | ||
| 300 | static irqreturn_t msm_irq(int irq, void *dev_id) | 760 | static irqreturn_t msm_uart_irq(int irq, void *dev_id) |
| 301 | { | 761 | { |
| 302 | struct uart_port *port = dev_id; | 762 | struct uart_port *port = dev_id; |
| 303 | struct msm_port *msm_port = UART_TO_MSM(port); | 763 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 764 | struct msm_dma *dma = &msm_port->rx_dma; | ||
| 765 | unsigned long flags; | ||
| 304 | unsigned int misr; | 766 | unsigned int misr; |
| 767 | u32 val; | ||
| 305 | 768 | ||
| 306 | spin_lock(&port->lock); | 769 | spin_lock_irqsave(&port->lock, flags); |
| 307 | misr = msm_read(port, UART_MISR); | 770 | misr = msm_read(port, UART_MISR); |
| 308 | msm_write(port, 0, UART_IMR); /* disable interrupt */ | 771 | msm_write(port, 0, UART_IMR); /* disable interrupt */ |
| 309 | 772 | ||
| @@ -313,18 +776,29 @@ static irqreturn_t msm_irq(int irq, void *dev_id) | |||
| 313 | } | 776 | } |
| 314 | 777 | ||
| 315 | if (misr & (UART_IMR_RXLEV | UART_IMR_RXSTALE)) { | 778 | if (misr & (UART_IMR_RXLEV | UART_IMR_RXSTALE)) { |
| 316 | if (msm_port->is_uartdm) | 779 | if (dma->count) { |
| 317 | handle_rx_dm(port, misr); | 780 | val = UART_CR_CMD_STALE_EVENT_DISABLE; |
| 318 | else | 781 | msm_write(port, val, UART_CR); |
| 319 | handle_rx(port); | 782 | val = UART_CR_CMD_RESET_STALE_INT; |
| 783 | msm_write(port, val, UART_CR); | ||
| 784 | /* | ||
| 785 | * Flush DMA input fifo to memory, this will also | ||
| 786 | * trigger DMA RX completion | ||
| 787 | */ | ||
| 788 | dmaengine_terminate_all(dma->chan); | ||
| 789 | } else if (msm_port->is_uartdm) { | ||
| 790 | msm_handle_rx_dm(port, misr); | ||
| 791 | } else { | ||
| 792 | msm_handle_rx(port); | ||
| 793 | } | ||
| 320 | } | 794 | } |
| 321 | if (misr & UART_IMR_TXLEV) | 795 | if (misr & UART_IMR_TXLEV) |
| 322 | handle_tx(port); | 796 | msm_handle_tx(port); |
| 323 | if (misr & UART_IMR_DELTA_CTS) | 797 | if (misr & UART_IMR_DELTA_CTS) |
| 324 | handle_delta_cts(port); | 798 | msm_handle_delta_cts(port); |
| 325 | 799 | ||
| 326 | msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */ | 800 | msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */ |
| 327 | spin_unlock(&port->lock); | 801 | spin_unlock_irqrestore(&port->lock, flags); |
| 328 | 802 | ||
| 329 | return IRQ_HANDLED; | 803 | return IRQ_HANDLED; |
| 330 | } | 804 | } |
| @@ -408,6 +882,7 @@ msm_find_best_baud(struct uart_port *port, unsigned int baud) | |||
| 408 | { 3, 0xdd, 8 }, | 882 | { 3, 0xdd, 8 }, |
| 409 | { 2, 0xee, 16 }, | 883 | { 2, 0xee, 16 }, |
| 410 | { 1, 0xff, 31 }, | 884 | { 1, 0xff, 31 }, |
| 885 | { 0, 0xff, 31 }, | ||
| 411 | }; | 886 | }; |
| 412 | 887 | ||
| 413 | divisor = uart_get_divisor(port, baud); | 888 | divisor = uart_get_divisor(port, baud); |
| @@ -419,21 +894,41 @@ msm_find_best_baud(struct uart_port *port, unsigned int baud) | |||
| 419 | return entry; /* Default to smallest divider */ | 894 | return entry; /* Default to smallest divider */ |
| 420 | } | 895 | } |
| 421 | 896 | ||
| 422 | static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) | 897 | static int msm_set_baud_rate(struct uart_port *port, unsigned int baud, |
| 898 | unsigned long *saved_flags) | ||
| 423 | { | 899 | { |
| 424 | unsigned int rxstale, watermark; | 900 | unsigned int rxstale, watermark, mask; |
| 425 | struct msm_port *msm_port = UART_TO_MSM(port); | 901 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 426 | const struct msm_baud_map *entry; | 902 | const struct msm_baud_map *entry; |
| 903 | unsigned long flags; | ||
| 427 | 904 | ||
| 428 | entry = msm_find_best_baud(port, baud); | 905 | entry = msm_find_best_baud(port, baud); |
| 429 | 906 | ||
| 430 | msm_write(port, entry->code, UART_CSR); | 907 | msm_write(port, entry->code, UART_CSR); |
| 431 | 908 | ||
| 909 | if (baud > 460800) | ||
| 910 | port->uartclk = baud * 16; | ||
| 911 | |||
| 912 | flags = *saved_flags; | ||
| 913 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 914 | |||
| 915 | clk_set_rate(msm_port->clk, port->uartclk); | ||
| 916 | |||
| 917 | spin_lock_irqsave(&port->lock, flags); | ||
| 918 | *saved_flags = flags; | ||
| 919 | |||
| 432 | /* RX stale watermark */ | 920 | /* RX stale watermark */ |
| 433 | rxstale = entry->rxstale; | 921 | rxstale = entry->rxstale; |
| 434 | watermark = UART_IPR_STALE_LSB & rxstale; | 922 | watermark = UART_IPR_STALE_LSB & rxstale; |
| 435 | watermark |= UART_IPR_RXSTALE_LAST; | 923 | if (msm_port->is_uartdm) { |
| 436 | watermark |= UART_IPR_STALE_TIMEOUT_MSB & (rxstale << 2); | 924 | mask = UART_DM_IPR_STALE_TIMEOUT_MSB; |
| 925 | } else { | ||
| 926 | watermark |= UART_IPR_RXSTALE_LAST; | ||
| 927 | mask = UART_IPR_STALE_TIMEOUT_MSB; | ||
| 928 | } | ||
| 929 | |||
| 930 | watermark |= mask & (rxstale << 2); | ||
| 931 | |||
| 437 | msm_write(port, watermark, UART_IPR); | 932 | msm_write(port, watermark, UART_IPR); |
| 438 | 933 | ||
| 439 | /* set RX watermark */ | 934 | /* set RX watermark */ |
| @@ -476,13 +971,13 @@ static void msm_init_clock(struct uart_port *port) | |||
| 476 | static int msm_startup(struct uart_port *port) | 971 | static int msm_startup(struct uart_port *port) |
| 477 | { | 972 | { |
| 478 | struct msm_port *msm_port = UART_TO_MSM(port); | 973 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 479 | unsigned int data, rfr_level; | 974 | unsigned int data, rfr_level, mask; |
| 480 | int ret; | 975 | int ret; |
| 481 | 976 | ||
| 482 | snprintf(msm_port->name, sizeof(msm_port->name), | 977 | snprintf(msm_port->name, sizeof(msm_port->name), |
| 483 | "msm_serial%d", port->line); | 978 | "msm_serial%d", port->line); |
| 484 | 979 | ||
| 485 | ret = request_irq(port->irq, msm_irq, IRQF_TRIGGER_HIGH, | 980 | ret = request_irq(port->irq, msm_uart_irq, IRQF_TRIGGER_HIGH, |
| 486 | msm_port->name, port); | 981 | msm_port->name, port); |
| 487 | if (unlikely(ret)) | 982 | if (unlikely(ret)) |
| 488 | return ret; | 983 | return ret; |
| @@ -496,11 +991,23 @@ static int msm_startup(struct uart_port *port) | |||
| 496 | 991 | ||
| 497 | /* set automatic RFR level */ | 992 | /* set automatic RFR level */ |
| 498 | data = msm_read(port, UART_MR1); | 993 | data = msm_read(port, UART_MR1); |
| 499 | data &= ~UART_MR1_AUTO_RFR_LEVEL1; | 994 | |
| 995 | if (msm_port->is_uartdm) | ||
| 996 | mask = UART_DM_MR1_AUTO_RFR_LEVEL1; | ||
| 997 | else | ||
| 998 | mask = UART_MR1_AUTO_RFR_LEVEL1; | ||
| 999 | |||
| 1000 | data &= ~mask; | ||
| 500 | data &= ~UART_MR1_AUTO_RFR_LEVEL0; | 1001 | data &= ~UART_MR1_AUTO_RFR_LEVEL0; |
| 501 | data |= UART_MR1_AUTO_RFR_LEVEL1 & (rfr_level << 2); | 1002 | data |= mask & (rfr_level << 2); |
| 502 | data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; | 1003 | data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; |
| 503 | msm_write(port, data, UART_MR1); | 1004 | msm_write(port, data, UART_MR1); |
| 1005 | |||
| 1006 | if (msm_port->is_uartdm) { | ||
| 1007 | msm_request_tx_dma(msm_port, msm_port->uart.mapbase); | ||
| 1008 | msm_request_rx_dma(msm_port, msm_port->uart.mapbase); | ||
| 1009 | } | ||
| 1010 | |||
| 504 | return 0; | 1011 | return 0; |
| 505 | } | 1012 | } |
| 506 | 1013 | ||
| @@ -511,6 +1018,9 @@ static void msm_shutdown(struct uart_port *port) | |||
| 511 | msm_port->imr = 0; | 1018 | msm_port->imr = 0; |
| 512 | msm_write(port, 0, UART_IMR); /* disable interrupts */ | 1019 | msm_write(port, 0, UART_IMR); /* disable interrupts */ |
| 513 | 1020 | ||
| 1021 | if (msm_port->is_uartdm) | ||
| 1022 | msm_release_dma(msm_port); | ||
| 1023 | |||
| 514 | clk_disable_unprepare(msm_port->clk); | 1024 | clk_disable_unprepare(msm_port->clk); |
| 515 | 1025 | ||
| 516 | free_irq(port->irq, port); | 1026 | free_irq(port->irq, port); |
| @@ -519,14 +1029,19 @@ static void msm_shutdown(struct uart_port *port) | |||
| 519 | static void msm_set_termios(struct uart_port *port, struct ktermios *termios, | 1029 | static void msm_set_termios(struct uart_port *port, struct ktermios *termios, |
| 520 | struct ktermios *old) | 1030 | struct ktermios *old) |
| 521 | { | 1031 | { |
| 1032 | struct msm_port *msm_port = UART_TO_MSM(port); | ||
| 1033 | struct msm_dma *dma = &msm_port->rx_dma; | ||
| 522 | unsigned long flags; | 1034 | unsigned long flags; |
| 523 | unsigned int baud, mr; | 1035 | unsigned int baud, mr; |
| 524 | 1036 | ||
| 525 | spin_lock_irqsave(&port->lock, flags); | 1037 | spin_lock_irqsave(&port->lock, flags); |
| 526 | 1038 | ||
| 1039 | if (dma->chan) /* Terminate if any */ | ||
| 1040 | msm_stop_dma(port, dma); | ||
| 1041 | |||
| 527 | /* calculate and set baud rate */ | 1042 | /* calculate and set baud rate */ |
| 528 | baud = uart_get_baud_rate(port, termios, old, 300, 115200); | 1043 | baud = uart_get_baud_rate(port, termios, old, 300, 4000000); |
| 529 | baud = msm_set_baud_rate(port, baud); | 1044 | baud = msm_set_baud_rate(port, baud, &flags); |
| 530 | if (tty_termios_baud_rate(termios)) | 1045 | if (tty_termios_baud_rate(termios)) |
| 531 | tty_termios_encode_baud_rate(termios, baud, baud); | 1046 | tty_termios_encode_baud_rate(termios, baud, baud); |
| 532 | 1047 | ||
| @@ -588,6 +1103,9 @@ static void msm_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 588 | 1103 | ||
| 589 | uart_update_timeout(port, termios->c_cflag, baud); | 1104 | uart_update_timeout(port, termios->c_cflag, baud); |
| 590 | 1105 | ||
| 1106 | /* Try to use DMA */ | ||
| 1107 | msm_start_rx_dma(msm_port); | ||
| 1108 | |||
| 591 | spin_unlock_irqrestore(&port->lock, flags); | 1109 | spin_unlock_irqrestore(&port->lock, flags); |
| 592 | } | 1110 | } |
| 593 | 1111 | ||
| @@ -765,7 +1283,7 @@ static void msm_poll_put_char(struct uart_port *port, unsigned char c) | |||
| 765 | msm_write(port, 0, UART_IMR); | 1283 | msm_write(port, 0, UART_IMR); |
| 766 | 1284 | ||
| 767 | if (msm_port->is_uartdm) | 1285 | if (msm_port->is_uartdm) |
| 768 | reset_dm_count(port, 1); | 1286 | msm_reset_dm_count(port, 1); |
| 769 | 1287 | ||
| 770 | /* Wait until FIFO is empty */ | 1288 | /* Wait until FIFO is empty */ |
| 771 | while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) | 1289 | while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) |
| @@ -839,7 +1357,7 @@ static struct msm_port msm_uart_ports[] = { | |||
| 839 | 1357 | ||
| 840 | #define UART_NR ARRAY_SIZE(msm_uart_ports) | 1358 | #define UART_NR ARRAY_SIZE(msm_uart_ports) |
| 841 | 1359 | ||
| 842 | static inline struct uart_port *get_port_from_line(unsigned int line) | 1360 | static inline struct uart_port *msm_get_port_from_line(unsigned int line) |
| 843 | { | 1361 | { |
| 844 | return &msm_uart_ports[line].uart; | 1362 | return &msm_uart_ports[line].uart; |
| 845 | } | 1363 | } |
| @@ -866,7 +1384,7 @@ static void __msm_console_write(struct uart_port *port, const char *s, | |||
| 866 | 1384 | ||
| 867 | spin_lock(&port->lock); | 1385 | spin_lock(&port->lock); |
| 868 | if (is_uartdm) | 1386 | if (is_uartdm) |
| 869 | reset_dm_count(port, count); | 1387 | msm_reset_dm_count(port, count); |
| 870 | 1388 | ||
| 871 | i = 0; | 1389 | i = 0; |
| 872 | while (i < count) { | 1390 | while (i < count) { |
| @@ -911,7 +1429,7 @@ static void msm_console_write(struct console *co, const char *s, | |||
| 911 | 1429 | ||
| 912 | BUG_ON(co->index < 0 || co->index >= UART_NR); | 1430 | BUG_ON(co->index < 0 || co->index >= UART_NR); |
| 913 | 1431 | ||
| 914 | port = get_port_from_line(co->index); | 1432 | port = msm_get_port_from_line(co->index); |
| 915 | msm_port = UART_TO_MSM(port); | 1433 | msm_port = UART_TO_MSM(port); |
| 916 | 1434 | ||
| 917 | __msm_console_write(port, s, count, msm_port->is_uartdm); | 1435 | __msm_console_write(port, s, count, msm_port->is_uartdm); |
| @@ -928,7 +1446,7 @@ static int __init msm_console_setup(struct console *co, char *options) | |||
| 928 | if (unlikely(co->index >= UART_NR || co->index < 0)) | 1446 | if (unlikely(co->index >= UART_NR || co->index < 0)) |
| 929 | return -ENXIO; | 1447 | return -ENXIO; |
| 930 | 1448 | ||
| 931 | port = get_port_from_line(co->index); | 1449 | port = msm_get_port_from_line(co->index); |
| 932 | 1450 | ||
| 933 | if (unlikely(!port->membase)) | 1451 | if (unlikely(!port->membase)) |
| 934 | return -ENXIO; | 1452 | return -ENXIO; |
| @@ -1043,7 +1561,7 @@ static int msm_serial_probe(struct platform_device *pdev) | |||
| 1043 | 1561 | ||
| 1044 | dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); | 1562 | dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); |
| 1045 | 1563 | ||
| 1046 | port = get_port_from_line(line); | 1564 | port = msm_get_port_from_line(line); |
| 1047 | port->dev = &pdev->dev; | 1565 | port->dev = &pdev->dev; |
| 1048 | msm_port = UART_TO_MSM(port); | 1566 | msm_port = UART_TO_MSM(port); |
| 1049 | 1567 | ||
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h index 737f69fe7113..178645826f16 100644 --- a/drivers/tty/serial/msm_serial.h +++ b/drivers/tty/serial/msm_serial.h | |||
| @@ -20,11 +20,12 @@ | |||
| 20 | 20 | ||
| 21 | #define UART_MR1_AUTO_RFR_LEVEL0 0x3F | 21 | #define UART_MR1_AUTO_RFR_LEVEL0 0x3F |
| 22 | #define UART_MR1_AUTO_RFR_LEVEL1 0x3FF00 | 22 | #define UART_MR1_AUTO_RFR_LEVEL1 0x3FF00 |
| 23 | #define UART_MR1_RX_RDY_CTL (1 << 7) | 23 | #define UART_DM_MR1_AUTO_RFR_LEVEL1 0xFFFFFF00 |
| 24 | #define UART_MR1_CTS_CTL (1 << 6) | 24 | #define UART_MR1_RX_RDY_CTL BIT(7) |
| 25 | #define UART_MR1_CTS_CTL BIT(6) | ||
| 25 | 26 | ||
| 26 | #define UART_MR2 0x0004 | 27 | #define UART_MR2 0x0004 |
| 27 | #define UART_MR2_ERROR_MODE (1 << 6) | 28 | #define UART_MR2_ERROR_MODE BIT(6) |
| 28 | #define UART_MR2_BITS_PER_CHAR 0x30 | 29 | #define UART_MR2_BITS_PER_CHAR 0x30 |
| 29 | #define UART_MR2_BITS_PER_CHAR_5 (0x0 << 4) | 30 | #define UART_MR2_BITS_PER_CHAR_5 (0x0 << 4) |
| 30 | #define UART_MR2_BITS_PER_CHAR_6 (0x1 << 4) | 31 | #define UART_MR2_BITS_PER_CHAR_6 (0x1 << 4) |
| @@ -58,26 +59,28 @@ | |||
| 58 | #define UART_CR_CMD_SET_RFR (13 << 4) | 59 | #define UART_CR_CMD_SET_RFR (13 << 4) |
| 59 | #define UART_CR_CMD_RESET_RFR (14 << 4) | 60 | #define UART_CR_CMD_RESET_RFR (14 << 4) |
| 60 | #define UART_CR_CMD_PROTECTION_EN (16 << 4) | 61 | #define UART_CR_CMD_PROTECTION_EN (16 << 4) |
| 62 | #define UART_CR_CMD_STALE_EVENT_DISABLE (6 << 8) | ||
| 61 | #define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4) | 63 | #define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4) |
| 62 | #define UART_CR_CMD_FORCE_STALE (4 << 8) | 64 | #define UART_CR_CMD_FORCE_STALE (4 << 8) |
| 63 | #define UART_CR_CMD_RESET_TX_READY (3 << 8) | 65 | #define UART_CR_CMD_RESET_TX_READY (3 << 8) |
| 64 | #define UART_CR_TX_DISABLE (1 << 3) | 66 | #define UART_CR_TX_DISABLE BIT(3) |
| 65 | #define UART_CR_TX_ENABLE (1 << 2) | 67 | #define UART_CR_TX_ENABLE BIT(2) |
| 66 | #define UART_CR_RX_DISABLE (1 << 1) | 68 | #define UART_CR_RX_DISABLE BIT(1) |
| 67 | #define UART_CR_RX_ENABLE (1 << 0) | 69 | #define UART_CR_RX_ENABLE BIT(0) |
| 68 | #define UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4)) | 70 | #define UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4)) |
| 69 | 71 | ||
| 70 | #define UART_IMR 0x0014 | 72 | #define UART_IMR 0x0014 |
| 71 | #define UART_IMR_TXLEV (1 << 0) | 73 | #define UART_IMR_TXLEV BIT(0) |
| 72 | #define UART_IMR_RXSTALE (1 << 3) | 74 | #define UART_IMR_RXSTALE BIT(3) |
| 73 | #define UART_IMR_RXLEV (1 << 4) | 75 | #define UART_IMR_RXLEV BIT(4) |
| 74 | #define UART_IMR_DELTA_CTS (1 << 5) | 76 | #define UART_IMR_DELTA_CTS BIT(5) |
| 75 | #define UART_IMR_CURRENT_CTS (1 << 6) | 77 | #define UART_IMR_CURRENT_CTS BIT(6) |
| 76 | #define UART_IMR_RXBREAK_START (1 << 10) | 78 | #define UART_IMR_RXBREAK_START BIT(10) |
| 77 | 79 | ||
| 78 | #define UART_IPR_RXSTALE_LAST 0x20 | 80 | #define UART_IPR_RXSTALE_LAST 0x20 |
| 79 | #define UART_IPR_STALE_LSB 0x1F | 81 | #define UART_IPR_STALE_LSB 0x1F |
| 80 | #define UART_IPR_STALE_TIMEOUT_MSB 0x3FF80 | 82 | #define UART_IPR_STALE_TIMEOUT_MSB 0x3FF80 |
| 83 | #define UART_DM_IPR_STALE_TIMEOUT_MSB 0xFFFFFF80 | ||
| 81 | 84 | ||
| 82 | #define UART_IPR 0x0018 | 85 | #define UART_IPR 0x0018 |
| 83 | #define UART_TFWR 0x001C | 86 | #define UART_TFWR 0x001C |
| @@ -96,20 +99,20 @@ | |||
| 96 | #define UART_TEST_CTRL 0x0050 | 99 | #define UART_TEST_CTRL 0x0050 |
| 97 | 100 | ||
| 98 | #define UART_SR 0x0008 | 101 | #define UART_SR 0x0008 |
| 99 | #define UART_SR_HUNT_CHAR (1 << 7) | 102 | #define UART_SR_HUNT_CHAR BIT(7) |
| 100 | #define UART_SR_RX_BREAK (1 << 6) | 103 | #define UART_SR_RX_BREAK BIT(6) |
| 101 | #define UART_SR_PAR_FRAME_ERR (1 << 5) | 104 | #define UART_SR_PAR_FRAME_ERR BIT(5) |
| 102 | #define UART_SR_OVERRUN (1 << 4) | 105 | #define UART_SR_OVERRUN BIT(4) |
| 103 | #define UART_SR_TX_EMPTY (1 << 3) | 106 | #define UART_SR_TX_EMPTY BIT(3) |
| 104 | #define UART_SR_TX_READY (1 << 2) | 107 | #define UART_SR_TX_READY BIT(2) |
| 105 | #define UART_SR_RX_FULL (1 << 1) | 108 | #define UART_SR_RX_FULL BIT(1) |
| 106 | #define UART_SR_RX_READY (1 << 0) | 109 | #define UART_SR_RX_READY BIT(0) |
| 107 | 110 | ||
| 108 | #define UART_RF 0x000C | 111 | #define UART_RF 0x000C |
| 109 | #define UARTDM_RF 0x0070 | 112 | #define UARTDM_RF 0x0070 |
| 110 | #define UART_MISR 0x0010 | 113 | #define UART_MISR 0x0010 |
| 111 | #define UART_ISR 0x0014 | 114 | #define UART_ISR 0x0014 |
| 112 | #define UART_ISR_TX_READY (1 << 7) | 115 | #define UART_ISR_TX_READY BIT(7) |
| 113 | 116 | ||
| 114 | #define UARTDM_RXFS 0x50 | 117 | #define UARTDM_RXFS 0x50 |
| 115 | #define UARTDM_RXFS_BUF_SHIFT 0x7 | 118 | #define UARTDM_RXFS_BUF_SHIFT 0x7 |
| @@ -119,6 +122,12 @@ | |||
| 119 | #define UARTDM_DMEN_RX_SC_ENABLE BIT(5) | 122 | #define UARTDM_DMEN_RX_SC_ENABLE BIT(5) |
| 120 | #define UARTDM_DMEN_TX_SC_ENABLE BIT(4) | 123 | #define UARTDM_DMEN_TX_SC_ENABLE BIT(4) |
| 121 | 124 | ||
| 125 | #define UARTDM_DMEN_TX_BAM_ENABLE BIT(2) /* UARTDM_1P4 */ | ||
| 126 | #define UARTDM_DMEN_TX_DM_ENABLE BIT(0) /* < UARTDM_1P4 */ | ||
| 127 | |||
| 128 | #define UARTDM_DMEN_RX_BAM_ENABLE BIT(3) /* UARTDM_1P4 */ | ||
| 129 | #define UARTDM_DMEN_RX_DM_ENABLE BIT(1) /* < UARTDM_1P4 */ | ||
| 130 | |||
| 122 | #define UARTDM_DMRX 0x34 | 131 | #define UARTDM_DMRX 0x34 |
| 123 | #define UARTDM_NCF_TX 0x40 | 132 | #define UARTDM_NCF_TX 0x40 |
| 124 | #define UARTDM_RX_TOTAL_SNAP 0x38 | 133 | #define UARTDM_RX_TOTAL_SNAP 0x38 |
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c index 7c7f30809849..cd0414bbe094 100644 --- a/drivers/tty/serial/mxs-auart.c +++ b/drivers/tty/serial/mxs-auart.c | |||
| @@ -1196,7 +1196,7 @@ static int mxs_auart_init_gpios(struct mxs_auart_port *s, struct device *dev) | |||
| 1196 | enum mctrl_gpio_idx i; | 1196 | enum mctrl_gpio_idx i; |
| 1197 | struct gpio_desc *gpiod; | 1197 | struct gpio_desc *gpiod; |
| 1198 | 1198 | ||
| 1199 | s->gpios = mctrl_gpio_init(dev, 0); | 1199 | s->gpios = mctrl_gpio_init_noauto(dev, 0); |
| 1200 | if (IS_ERR(s->gpios)) | 1200 | if (IS_ERR(s->gpios)) |
| 1201 | return PTR_ERR(s->gpios); | 1201 | return PTR_ERR(s->gpios); |
| 1202 | 1202 | ||
diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c index 6823df99bd76..de5029649795 100644 --- a/drivers/tty/serial/of_serial.c +++ b/drivers/tty/serial/of_serial.c | |||
| @@ -21,6 +21,10 @@ | |||
| 21 | #include <linux/nwpserial.h> | 21 | #include <linux/nwpserial.h> |
| 22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
| 23 | 23 | ||
| 24 | #ifdef CONFIG_SERIAL_8250_MODULE | ||
| 25 | #define CONFIG_SERIAL_8250 CONFIG_SERIAL_8250_MODULE | ||
| 26 | #endif | ||
| 27 | |||
| 24 | #include "8250/8250.h" | 28 | #include "8250/8250.h" |
| 25 | 29 | ||
| 26 | struct of_serial_info { | 30 | struct of_serial_info { |
| @@ -150,6 +154,11 @@ static int of_platform_serial_setup(struct platform_device *ofdev, | |||
| 150 | break; | 154 | break; |
| 151 | } | 155 | } |
| 152 | 156 | ||
| 157 | if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) && | ||
| 158 | (of_device_is_compatible(np, "fsl,ns16550") || | ||
| 159 | of_device_is_compatible(np, "fsl,16550-FIFO64"))) | ||
| 160 | port->handle_irq = fsl8250_handle_irq; | ||
| 161 | |||
| 153 | return 0; | 162 | return 0; |
| 154 | out: | 163 | out: |
| 155 | if (info->clk) | 164 | if (info->clk) |
| @@ -350,6 +359,7 @@ static const struct of_device_id of_platform_serial_table[] = { | |||
| 350 | #endif | 359 | #endif |
| 351 | { /* end of list */ }, | 360 | { /* end of list */ }, |
| 352 | }; | 361 | }; |
| 362 | MODULE_DEVICE_TABLE(of, of_platform_serial_table); | ||
| 353 | 363 | ||
| 354 | static struct platform_driver of_platform_serial_driver = { | 364 | static struct platform_driver of_platform_serial_driver = { |
| 355 | .driver = { | 365 | .driver = { |
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 7a2172b5e93c..9d4c84f7485f 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c | |||
| @@ -199,6 +199,7 @@ static inline void serial_omap_clear_fifos(struct uart_omap_port *up) | |||
| 199 | serial_out(up, UART_FCR, 0); | 199 | serial_out(up, UART_FCR, 0); |
| 200 | } | 200 | } |
| 201 | 201 | ||
| 202 | #ifdef CONFIG_PM | ||
| 202 | static int serial_omap_get_context_loss_count(struct uart_omap_port *up) | 203 | static int serial_omap_get_context_loss_count(struct uart_omap_port *up) |
| 203 | { | 204 | { |
| 204 | struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); | 205 | struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); |
| @@ -219,6 +220,7 @@ static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) | |||
| 219 | 220 | ||
| 220 | pdata->enable_wakeup(up->dev, enable); | 221 | pdata->enable_wakeup(up->dev, enable); |
| 221 | } | 222 | } |
| 223 | #endif /* CONFIG_PM */ | ||
| 222 | 224 | ||
| 223 | /* | 225 | /* |
| 224 | * Calculate the absolute difference between the desired and actual baud | 226 | * Calculate the absolute difference between the desired and actual baud |
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 856686d6dcdb..d72cd736bdc6 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c | |||
| @@ -385,32 +385,6 @@ static void s3c24xx_uart_copy_rx_to_tty(struct s3c24xx_uart_port *ourport, | |||
| 385 | } | 385 | } |
| 386 | } | 386 | } |
| 387 | 387 | ||
| 388 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, | ||
| 389 | unsigned long ufstat); | ||
| 390 | |||
| 391 | static void uart_rx_drain_fifo(struct s3c24xx_uart_port *ourport) | ||
| 392 | { | ||
| 393 | struct uart_port *port = &ourport->port; | ||
| 394 | struct tty_port *tty = &port->state->port; | ||
| 395 | unsigned int ch, ufstat; | ||
| 396 | unsigned int count; | ||
| 397 | |||
| 398 | ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
| 399 | count = s3c24xx_serial_rx_fifocnt(ourport, ufstat); | ||
| 400 | |||
| 401 | if (!count) | ||
| 402 | return; | ||
| 403 | |||
| 404 | while (count-- > 0) { | ||
| 405 | ch = rd_regb(port, S3C2410_URXH); | ||
| 406 | |||
| 407 | ourport->port.icount.rx++; | ||
| 408 | tty_insert_flip_char(tty, ch, TTY_NORMAL); | ||
| 409 | } | ||
| 410 | |||
| 411 | tty_flip_buffer_push(tty); | ||
| 412 | } | ||
| 413 | |||
| 414 | static void s3c24xx_serial_stop_rx(struct uart_port *port) | 388 | static void s3c24xx_serial_stop_rx(struct uart_port *port) |
| 415 | { | 389 | { |
| 416 | struct s3c24xx_uart_port *ourport = to_ourport(port); | 390 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
| @@ -573,7 +547,9 @@ static void enable_rx_pio(struct s3c24xx_uart_port *ourport) | |||
| 573 | ourport->rx_mode = S3C24XX_RX_PIO; | 547 | ourport->rx_mode = S3C24XX_RX_PIO; |
| 574 | } | 548 | } |
| 575 | 549 | ||
| 576 | static irqreturn_t s3c24xx_serial_rx_chars_dma(int irq, void *dev_id) | 550 | static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport); |
| 551 | |||
| 552 | static irqreturn_t s3c24xx_serial_rx_chars_dma(void *dev_id) | ||
| 577 | { | 553 | { |
| 578 | unsigned int utrstat, ufstat, received; | 554 | unsigned int utrstat, ufstat, received; |
| 579 | struct s3c24xx_uart_port *ourport = dev_id; | 555 | struct s3c24xx_uart_port *ourport = dev_id; |
| @@ -606,7 +582,7 @@ static irqreturn_t s3c24xx_serial_rx_chars_dma(int irq, void *dev_id) | |||
| 606 | enable_rx_pio(ourport); | 582 | enable_rx_pio(ourport); |
| 607 | } | 583 | } |
| 608 | 584 | ||
| 609 | uart_rx_drain_fifo(ourport); | 585 | s3c24xx_serial_rx_drain_fifo(ourport); |
| 610 | 586 | ||
| 611 | if (tty) { | 587 | if (tty) { |
| 612 | tty_flip_buffer_push(t); | 588 | tty_flip_buffer_push(t); |
| @@ -621,16 +597,12 @@ finish: | |||
| 621 | return IRQ_HANDLED; | 597 | return IRQ_HANDLED; |
| 622 | } | 598 | } |
| 623 | 599 | ||
| 624 | static irqreturn_t s3c24xx_serial_rx_chars_pio(int irq, void *dev_id) | 600 | static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) |
| 625 | { | 601 | { |
| 626 | struct s3c24xx_uart_port *ourport = dev_id; | ||
| 627 | struct uart_port *port = &ourport->port; | 602 | struct uart_port *port = &ourport->port; |
| 628 | unsigned int ufcon, ch, flag, ufstat, uerstat; | 603 | unsigned int ufcon, ch, flag, ufstat, uerstat; |
| 629 | unsigned long flags; | ||
| 630 | int max_count = port->fifosize; | 604 | int max_count = port->fifosize; |
| 631 | 605 | ||
| 632 | spin_lock_irqsave(&port->lock, flags); | ||
| 633 | |||
| 634 | while (max_count-- > 0) { | 606 | while (max_count-- > 0) { |
| 635 | ufcon = rd_regl(port, S3C2410_UFCON); | 607 | ufcon = rd_regl(port, S3C2410_UFCON); |
| 636 | ufstat = rd_regl(port, S3C2410_UFSTAT); | 608 | ufstat = rd_regl(port, S3C2410_UFSTAT); |
| @@ -654,9 +626,7 @@ static irqreturn_t s3c24xx_serial_rx_chars_pio(int irq, void *dev_id) | |||
| 654 | ufcon |= S3C2410_UFCON_RESETRX; | 626 | ufcon |= S3C2410_UFCON_RESETRX; |
| 655 | wr_regl(port, S3C2410_UFCON, ufcon); | 627 | wr_regl(port, S3C2410_UFCON, ufcon); |
| 656 | rx_enabled(port) = 1; | 628 | rx_enabled(port) = 1; |
| 657 | spin_unlock_irqrestore(&port->lock, | 629 | return; |
| 658 | flags); | ||
| 659 | goto out; | ||
| 660 | } | 630 | } |
| 661 | continue; | 631 | continue; |
| 662 | } | 632 | } |
| @@ -676,7 +646,7 @@ static irqreturn_t s3c24xx_serial_rx_chars_pio(int irq, void *dev_id) | |||
| 676 | dbg("break!\n"); | 646 | dbg("break!\n"); |
| 677 | port->icount.brk++; | 647 | port->icount.brk++; |
| 678 | if (uart_handle_break(port)) | 648 | if (uart_handle_break(port)) |
| 679 | goto ignore_char; | 649 | continue; /* Ignore character */ |
| 680 | } | 650 | } |
| 681 | 651 | ||
| 682 | if (uerstat & S3C2410_UERSTAT_FRAME) | 652 | if (uerstat & S3C2410_UERSTAT_FRAME) |
| @@ -696,19 +666,25 @@ static irqreturn_t s3c24xx_serial_rx_chars_pio(int irq, void *dev_id) | |||
| 696 | } | 666 | } |
| 697 | 667 | ||
| 698 | if (uart_handle_sysrq_char(port, ch)) | 668 | if (uart_handle_sysrq_char(port, ch)) |
| 699 | goto ignore_char; | 669 | continue; /* Ignore character */ |
| 700 | 670 | ||
| 701 | uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, | 671 | uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, |
| 702 | ch, flag); | 672 | ch, flag); |
| 703 | |||
| 704 | ignore_char: | ||
| 705 | continue; | ||
| 706 | } | 673 | } |
| 707 | 674 | ||
| 708 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 709 | tty_flip_buffer_push(&port->state->port); | 675 | tty_flip_buffer_push(&port->state->port); |
| 676 | } | ||
| 677 | |||
| 678 | static irqreturn_t s3c24xx_serial_rx_chars_pio(void *dev_id) | ||
| 679 | { | ||
| 680 | struct s3c24xx_uart_port *ourport = dev_id; | ||
| 681 | struct uart_port *port = &ourport->port; | ||
| 682 | unsigned long flags; | ||
| 683 | |||
| 684 | spin_lock_irqsave(&port->lock, flags); | ||
| 685 | s3c24xx_serial_rx_drain_fifo(ourport); | ||
| 686 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 710 | 687 | ||
| 711 | out: | ||
| 712 | return IRQ_HANDLED; | 688 | return IRQ_HANDLED; |
| 713 | } | 689 | } |
| 714 | 690 | ||
| @@ -718,8 +694,8 @@ static irqreturn_t s3c24xx_serial_rx_chars(int irq, void *dev_id) | |||
| 718 | struct s3c24xx_uart_port *ourport = dev_id; | 694 | struct s3c24xx_uart_port *ourport = dev_id; |
| 719 | 695 | ||
| 720 | if (ourport->dma && ourport->dma->rx_chan) | 696 | if (ourport->dma && ourport->dma->rx_chan) |
| 721 | return s3c24xx_serial_rx_chars_dma(irq, dev_id); | 697 | return s3c24xx_serial_rx_chars_dma(dev_id); |
| 722 | return s3c24xx_serial_rx_chars_pio(irq, dev_id); | 698 | return s3c24xx_serial_rx_chars_pio(dev_id); |
| 723 | } | 699 | } |
| 724 | 700 | ||
| 725 | static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) | 701 | static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) |
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 72ffd0dcab78..1ae8aa698fcb 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c | |||
| @@ -1321,6 +1321,9 @@ static int sc16is7xx_spi_probe(struct spi_device *spi) | |||
| 1321 | const struct of_device_id *of_id = | 1321 | const struct of_device_id *of_id = |
| 1322 | of_match_device(sc16is7xx_dt_ids, &spi->dev); | 1322 | of_match_device(sc16is7xx_dt_ids, &spi->dev); |
| 1323 | 1323 | ||
| 1324 | if (!of_id) | ||
| 1325 | return -ENODEV; | ||
| 1326 | |||
| 1324 | devtype = (struct sc16is7xx_devtype *)of_id->data; | 1327 | devtype = (struct sc16is7xx_devtype *)of_id->data; |
| 1325 | } else { | 1328 | } else { |
| 1326 | const struct spi_device_id *id_entry = spi_get_device_id(spi); | 1329 | const struct spi_device_id *id_entry = spi_get_device_id(spi); |
| @@ -1380,6 +1383,9 @@ static int sc16is7xx_i2c_probe(struct i2c_client *i2c, | |||
| 1380 | const struct of_device_id *of_id = | 1383 | const struct of_device_id *of_id = |
| 1381 | of_match_device(sc16is7xx_dt_ids, &i2c->dev); | 1384 | of_match_device(sc16is7xx_dt_ids, &i2c->dev); |
| 1382 | 1385 | ||
| 1386 | if (!of_id) | ||
| 1387 | return -ENODEV; | ||
| 1388 | |||
| 1383 | devtype = (struct sc16is7xx_devtype *)of_id->data; | 1389 | devtype = (struct sc16is7xx_devtype *)of_id->data; |
| 1384 | } else { | 1390 | } else { |
| 1385 | devtype = (struct sc16is7xx_devtype *)id->driver_data; | 1391 | devtype = (struct sc16is7xx_devtype *)id->driver_data; |
| @@ -1420,7 +1426,6 @@ static struct i2c_driver sc16is7xx_i2c_uart_driver = { | |||
| 1420 | .id_table = sc16is7xx_i2c_id_table, | 1426 | .id_table = sc16is7xx_i2c_id_table, |
| 1421 | }; | 1427 | }; |
| 1422 | 1428 | ||
| 1423 | MODULE_ALIAS("i2c:sc16is7xx"); | ||
| 1424 | #endif | 1429 | #endif |
| 1425 | 1430 | ||
| 1426 | static int __init sc16is7xx_init(void) | 1431 | static int __init sc16is7xx_init(void) |
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index cf0133ae762d..1d6fc60ed013 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c | |||
| @@ -186,7 +186,6 @@ static void set_rts(struct tegra_uart_port *tup, bool active) | |||
| 186 | tegra_uart_write(tup, mcr, UART_MCR); | 186 | tegra_uart_write(tup, mcr, UART_MCR); |
| 187 | tup->mcr_shadow = mcr; | 187 | tup->mcr_shadow = mcr; |
| 188 | } | 188 | } |
| 189 | return; | ||
| 190 | } | 189 | } |
| 191 | 190 | ||
| 192 | static void set_dtr(struct tegra_uart_port *tup, bool active) | 191 | static void set_dtr(struct tegra_uart_port *tup, bool active) |
| @@ -202,7 +201,6 @@ static void set_dtr(struct tegra_uart_port *tup, bool active) | |||
| 202 | tegra_uart_write(tup, mcr, UART_MCR); | 201 | tegra_uart_write(tup, mcr, UART_MCR); |
| 203 | tup->mcr_shadow = mcr; | 202 | tup->mcr_shadow = mcr; |
| 204 | } | 203 | } |
| 205 | return; | ||
| 206 | } | 204 | } |
| 207 | 205 | ||
| 208 | static void tegra_uart_set_mctrl(struct uart_port *u, unsigned int mctrl) | 206 | static void tegra_uart_set_mctrl(struct uart_port *u, unsigned int mctrl) |
| @@ -217,7 +215,6 @@ static void tegra_uart_set_mctrl(struct uart_port *u, unsigned int mctrl) | |||
| 217 | 215 | ||
| 218 | dtr_enable = !!(mctrl & TIOCM_DTR); | 216 | dtr_enable = !!(mctrl & TIOCM_DTR); |
| 219 | set_dtr(tup, dtr_enable); | 217 | set_dtr(tup, dtr_enable); |
| 220 | return; | ||
| 221 | } | 218 | } |
| 222 | 219 | ||
| 223 | static void tegra_uart_break_ctl(struct uart_port *u, int break_ctl) | 220 | static void tegra_uart_break_ctl(struct uart_port *u, int break_ctl) |
| @@ -511,7 +508,6 @@ static void tegra_uart_stop_tx(struct uart_port *u) | |||
| 511 | async_tx_ack(tup->tx_dma_desc); | 508 | async_tx_ack(tup->tx_dma_desc); |
| 512 | xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); | 509 | xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); |
| 513 | tup->tx_in_progress = 0; | 510 | tup->tx_in_progress = 0; |
| 514 | return; | ||
| 515 | } | 511 | } |
| 516 | 512 | ||
| 517 | static void tegra_uart_handle_tx_pio(struct tegra_uart_port *tup) | 513 | static void tegra_uart_handle_tx_pio(struct tegra_uart_port *tup) |
| @@ -523,7 +519,6 @@ static void tegra_uart_handle_tx_pio(struct tegra_uart_port *tup) | |||
| 523 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 519 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 524 | uart_write_wakeup(&tup->uport); | 520 | uart_write_wakeup(&tup->uport); |
| 525 | tegra_uart_start_next_tx(tup); | 521 | tegra_uart_start_next_tx(tup); |
| 526 | return; | ||
| 527 | } | 522 | } |
| 528 | 523 | ||
| 529 | static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup, | 524 | static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup, |
| @@ -545,8 +540,6 @@ static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup, | |||
| 545 | if (!uart_handle_sysrq_char(&tup->uport, ch) && tty) | 540 | if (!uart_handle_sysrq_char(&tup->uport, ch) && tty) |
| 546 | tty_insert_flip_char(tty, ch, flag); | 541 | tty_insert_flip_char(tty, ch, flag); |
| 547 | } while (1); | 542 | } while (1); |
| 548 | |||
| 549 | return; | ||
| 550 | } | 543 | } |
| 551 | 544 | ||
| 552 | static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup, | 545 | static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup, |
| @@ -576,13 +569,30 @@ static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup, | |||
| 576 | TEGRA_UART_RX_DMA_BUFFER_SIZE, DMA_TO_DEVICE); | 569 | TEGRA_UART_RX_DMA_BUFFER_SIZE, DMA_TO_DEVICE); |
| 577 | } | 570 | } |
| 578 | 571 | ||
| 572 | static void tegra_uart_rx_buffer_push(struct tegra_uart_port *tup, | ||
| 573 | unsigned int residue) | ||
| 574 | { | ||
| 575 | struct tty_port *port = &tup->uport.state->port; | ||
| 576 | struct tty_struct *tty = tty_port_tty_get(port); | ||
| 577 | unsigned int count; | ||
| 578 | |||
| 579 | async_tx_ack(tup->rx_dma_desc); | ||
| 580 | count = tup->rx_bytes_requested - residue; | ||
| 581 | |||
| 582 | /* If we are here, DMA is stopped */ | ||
| 583 | tegra_uart_copy_rx_to_tty(tup, port, count); | ||
| 584 | |||
| 585 | tegra_uart_handle_rx_pio(tup, port); | ||
| 586 | if (tty) { | ||
| 587 | tty_flip_buffer_push(port); | ||
| 588 | tty_kref_put(tty); | ||
| 589 | } | ||
| 590 | } | ||
| 591 | |||
| 579 | static void tegra_uart_rx_dma_complete(void *args) | 592 | static void tegra_uart_rx_dma_complete(void *args) |
| 580 | { | 593 | { |
| 581 | struct tegra_uart_port *tup = args; | 594 | struct tegra_uart_port *tup = args; |
| 582 | struct uart_port *u = &tup->uport; | 595 | struct uart_port *u = &tup->uport; |
| 583 | unsigned int count = tup->rx_bytes_requested; | ||
| 584 | struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port); | ||
| 585 | struct tty_port *port = &u->state->port; | ||
| 586 | unsigned long flags; | 596 | unsigned long flags; |
| 587 | struct dma_tx_state state; | 597 | struct dma_tx_state state; |
| 588 | enum dma_status status; | 598 | enum dma_status status; |
| @@ -596,22 +606,11 @@ static void tegra_uart_rx_dma_complete(void *args) | |||
| 596 | goto done; | 606 | goto done; |
| 597 | } | 607 | } |
| 598 | 608 | ||
| 599 | async_tx_ack(tup->rx_dma_desc); | ||
| 600 | |||
| 601 | /* Deactivate flow control to stop sender */ | 609 | /* Deactivate flow control to stop sender */ |
| 602 | if (tup->rts_active) | 610 | if (tup->rts_active) |
| 603 | set_rts(tup, false); | 611 | set_rts(tup, false); |
| 604 | 612 | ||
| 605 | /* If we are here, DMA is stopped */ | 613 | tegra_uart_rx_buffer_push(tup, 0); |
| 606 | tegra_uart_copy_rx_to_tty(tup, port, count); | ||
| 607 | |||
| 608 | tegra_uart_handle_rx_pio(tup, port); | ||
| 609 | if (tty) { | ||
| 610 | spin_unlock_irqrestore(&u->lock, flags); | ||
| 611 | tty_flip_buffer_push(port); | ||
| 612 | spin_lock_irqsave(&u->lock, flags); | ||
| 613 | tty_kref_put(tty); | ||
| 614 | } | ||
| 615 | tegra_uart_start_rx_dma(tup); | 614 | tegra_uart_start_rx_dma(tup); |
| 616 | 615 | ||
| 617 | /* Activate flow control to start transfer */ | 616 | /* Activate flow control to start transfer */ |
| @@ -622,34 +621,17 @@ done: | |||
| 622 | spin_unlock_irqrestore(&u->lock, flags); | 621 | spin_unlock_irqrestore(&u->lock, flags); |
| 623 | } | 622 | } |
| 624 | 623 | ||
| 625 | static void tegra_uart_handle_rx_dma(struct tegra_uart_port *tup, | 624 | static void tegra_uart_handle_rx_dma(struct tegra_uart_port *tup) |
| 626 | unsigned long *flags) | ||
| 627 | { | 625 | { |
| 628 | struct dma_tx_state state; | 626 | struct dma_tx_state state; |
| 629 | struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port); | ||
| 630 | struct tty_port *port = &tup->uport.state->port; | ||
| 631 | struct uart_port *u = &tup->uport; | ||
| 632 | unsigned int count; | ||
| 633 | 627 | ||
| 634 | /* Deactivate flow control to stop sender */ | 628 | /* Deactivate flow control to stop sender */ |
| 635 | if (tup->rts_active) | 629 | if (tup->rts_active) |
| 636 | set_rts(tup, false); | 630 | set_rts(tup, false); |
| 637 | 631 | ||
| 638 | dmaengine_terminate_all(tup->rx_dma_chan); | 632 | dmaengine_terminate_all(tup->rx_dma_chan); |
| 639 | dmaengine_tx_status(tup->rx_dma_chan, tup->rx_cookie, &state); | 633 | dmaengine_tx_status(tup->rx_dma_chan, tup->rx_cookie, &state); |
| 640 | async_tx_ack(tup->rx_dma_desc); | 634 | tegra_uart_rx_buffer_push(tup, state.residue); |
| 641 | count = tup->rx_bytes_requested - state.residue; | ||
| 642 | |||
| 643 | /* If we are here, DMA is stopped */ | ||
| 644 | tegra_uart_copy_rx_to_tty(tup, port, count); | ||
| 645 | |||
| 646 | tegra_uart_handle_rx_pio(tup, port); | ||
| 647 | if (tty) { | ||
| 648 | spin_unlock_irqrestore(&u->lock, *flags); | ||
| 649 | tty_flip_buffer_push(port); | ||
| 650 | spin_lock_irqsave(&u->lock, *flags); | ||
| 651 | tty_kref_put(tty); | ||
| 652 | } | ||
| 653 | tegra_uart_start_rx_dma(tup); | 635 | tegra_uart_start_rx_dma(tup); |
| 654 | 636 | ||
| 655 | if (tup->rts_active) | 637 | if (tup->rts_active) |
| @@ -697,7 +679,6 @@ static void tegra_uart_handle_modem_signal_change(struct uart_port *u) | |||
| 697 | /* Will start/stop_tx accordingly */ | 679 | /* Will start/stop_tx accordingly */ |
| 698 | if (msr & UART_MSR_DCTS) | 680 | if (msr & UART_MSR_DCTS) |
| 699 | uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS); | 681 | uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS); |
| 700 | return; | ||
| 701 | } | 682 | } |
| 702 | 683 | ||
| 703 | static irqreturn_t tegra_uart_isr(int irq, void *data) | 684 | static irqreturn_t tegra_uart_isr(int irq, void *data) |
| @@ -714,7 +695,7 @@ static irqreturn_t tegra_uart_isr(int irq, void *data) | |||
| 714 | iir = tegra_uart_read(tup, UART_IIR); | 695 | iir = tegra_uart_read(tup, UART_IIR); |
| 715 | if (iir & UART_IIR_NO_INT) { | 696 | if (iir & UART_IIR_NO_INT) { |
| 716 | if (is_rx_int) { | 697 | if (is_rx_int) { |
| 717 | tegra_uart_handle_rx_dma(tup, &flags); | 698 | tegra_uart_handle_rx_dma(tup); |
| 718 | if (tup->rx_in_progress) { | 699 | if (tup->rx_in_progress) { |
| 719 | ier = tup->ier_shadow; | 700 | ier = tup->ier_shadow; |
| 720 | ier |= (UART_IER_RLSI | UART_IER_RTOIE | | 701 | ier |= (UART_IER_RLSI | UART_IER_RTOIE | |
| @@ -769,11 +750,8 @@ static irqreturn_t tegra_uart_isr(int irq, void *data) | |||
| 769 | static void tegra_uart_stop_rx(struct uart_port *u) | 750 | static void tegra_uart_stop_rx(struct uart_port *u) |
| 770 | { | 751 | { |
| 771 | struct tegra_uart_port *tup = to_tegra_uport(u); | 752 | struct tegra_uart_port *tup = to_tegra_uport(u); |
| 772 | struct tty_struct *tty; | ||
| 773 | struct tty_port *port = &u->state->port; | ||
| 774 | struct dma_tx_state state; | 753 | struct dma_tx_state state; |
| 775 | unsigned long ier; | 754 | unsigned long ier; |
| 776 | int count; | ||
| 777 | 755 | ||
| 778 | if (tup->rts_active) | 756 | if (tup->rts_active) |
| 779 | set_rts(tup, false); | 757 | set_rts(tup, false); |
| @@ -781,8 +759,6 @@ static void tegra_uart_stop_rx(struct uart_port *u) | |||
| 781 | if (!tup->rx_in_progress) | 759 | if (!tup->rx_in_progress) |
| 782 | return; | 760 | return; |
| 783 | 761 | ||
| 784 | tty = tty_port_tty_get(&tup->uport.state->port); | ||
| 785 | |||
| 786 | tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */ | 762 | tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */ |
| 787 | 763 | ||
| 788 | ier = tup->ier_shadow; | 764 | ier = tup->ier_shadow; |
| @@ -791,21 +767,9 @@ static void tegra_uart_stop_rx(struct uart_port *u) | |||
| 791 | tup->ier_shadow = ier; | 767 | tup->ier_shadow = ier; |
| 792 | tegra_uart_write(tup, ier, UART_IER); | 768 | tegra_uart_write(tup, ier, UART_IER); |
| 793 | tup->rx_in_progress = 0; | 769 | tup->rx_in_progress = 0; |
| 794 | if (tup->rx_dma_chan) { | 770 | dmaengine_terminate_all(tup->rx_dma_chan); |
| 795 | dmaengine_terminate_all(tup->rx_dma_chan); | 771 | dmaengine_tx_status(tup->rx_dma_chan, tup->rx_cookie, &state); |
| 796 | dmaengine_tx_status(tup->rx_dma_chan, tup->rx_cookie, &state); | 772 | tegra_uart_rx_buffer_push(tup, state.residue); |
| 797 | async_tx_ack(tup->rx_dma_desc); | ||
| 798 | count = tup->rx_bytes_requested - state.residue; | ||
| 799 | tegra_uart_copy_rx_to_tty(tup, port, count); | ||
| 800 | tegra_uart_handle_rx_pio(tup, port); | ||
| 801 | } else { | ||
| 802 | tegra_uart_handle_rx_pio(tup, port); | ||
| 803 | } | ||
| 804 | if (tty) { | ||
| 805 | tty_flip_buffer_push(port); | ||
| 806 | tty_kref_put(tty); | ||
| 807 | } | ||
| 808 | return; | ||
| 809 | } | 773 | } |
| 810 | 774 | ||
| 811 | static void tegra_uart_hw_deinit(struct tegra_uart_port *tup) | 775 | static void tegra_uart_hw_deinit(struct tegra_uart_port *tup) |
| @@ -1083,7 +1047,6 @@ static void tegra_uart_flush_buffer(struct uart_port *u) | |||
| 1083 | tup->tx_bytes = 0; | 1047 | tup->tx_bytes = 0; |
| 1084 | if (tup->tx_dma_chan) | 1048 | if (tup->tx_dma_chan) |
| 1085 | dmaengine_terminate_all(tup->tx_dma_chan); | 1049 | dmaengine_terminate_all(tup->tx_dma_chan); |
| 1086 | return; | ||
| 1087 | } | 1050 | } |
| 1088 | 1051 | ||
| 1089 | static void tegra_uart_shutdown(struct uart_port *u) | 1052 | static void tegra_uart_shutdown(struct uart_port *u) |
| @@ -1223,7 +1186,6 @@ static void tegra_uart_set_termios(struct uart_port *u, | |||
| 1223 | tegra_uart_read(tup, UART_IER); | 1186 | tegra_uart_read(tup, UART_IER); |
| 1224 | 1187 | ||
| 1225 | spin_unlock_irqrestore(&u->lock, flags); | 1188 | spin_unlock_irqrestore(&u->lock, flags); |
| 1226 | return; | ||
| 1227 | } | 1189 | } |
| 1228 | 1190 | ||
| 1229 | static const char *tegra_uart_type(struct uart_port *u) | 1191 | static const char *tegra_uart_type(struct uart_port *u) |
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 603d2cc3f424..def5199ca004 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c | |||
| @@ -1437,7 +1437,6 @@ static void uart_close(struct tty_struct *tty, struct file *filp) | |||
| 1437 | clear_bit(ASYNCB_CLOSING, &port->flags); | 1437 | clear_bit(ASYNCB_CLOSING, &port->flags); |
| 1438 | spin_unlock_irq(&port->lock); | 1438 | spin_unlock_irq(&port->lock); |
| 1439 | wake_up_interruptible(&port->open_wait); | 1439 | wake_up_interruptible(&port->open_wait); |
| 1440 | wake_up_interruptible(&port->close_wait); | ||
| 1441 | 1440 | ||
| 1442 | mutex_unlock(&port->mutex); | 1441 | mutex_unlock(&port->mutex); |
| 1443 | 1442 | ||
| @@ -1819,8 +1818,8 @@ uart_get_console(struct uart_port *ports, int nr, struct console *co) | |||
| 1819 | * @options: ptr for <options> field; NULL if not present (out) | 1818 | * @options: ptr for <options> field; NULL if not present (out) |
| 1820 | * | 1819 | * |
| 1821 | * Decodes earlycon kernel command line parameters of the form | 1820 | * Decodes earlycon kernel command line parameters of the form |
| 1822 | * earlycon=<name>,io|mmio|mmio32|mmio32be,<addr>,<options> | 1821 | * earlycon=<name>,io|mmio|mmio32|mmio32be|mmio32native,<addr>,<options> |
| 1823 | * console=<name>,io|mmio|mmio32|mmio32be,<addr>,<options> | 1822 | * console=<name>,io|mmio|mmio32|mmio32be|mmio32native,<addr>,<options> |
| 1824 | * | 1823 | * |
| 1825 | * The optional form | 1824 | * The optional form |
| 1826 | * earlycon=<name>,0x<addr>,<options> | 1825 | * earlycon=<name>,0x<addr>,<options> |
| @@ -1841,6 +1840,10 @@ int uart_parse_earlycon(char *p, unsigned char *iotype, unsigned long *addr, | |||
| 1841 | } else if (strncmp(p, "mmio32be,", 9) == 0) { | 1840 | } else if (strncmp(p, "mmio32be,", 9) == 0) { |
| 1842 | *iotype = UPIO_MEM32BE; | 1841 | *iotype = UPIO_MEM32BE; |
| 1843 | p += 9; | 1842 | p += 9; |
| 1843 | } else if (strncmp(p, "mmio32native,", 13) == 0) { | ||
| 1844 | *iotype = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ? | ||
| 1845 | UPIO_MEM32BE : UPIO_MEM32; | ||
| 1846 | p += 13; | ||
| 1844 | } else if (strncmp(p, "io,", 3) == 0) { | 1847 | } else if (strncmp(p, "io,", 3) == 0) { |
| 1845 | *iotype = UPIO_PORT; | 1848 | *iotype = UPIO_PORT; |
| 1846 | p += 3; | 1849 | p += 3; |
diff --git a/drivers/tty/serial/serial_mctrl_gpio.c b/drivers/tty/serial/serial_mctrl_gpio.c index 402f7fb54133..3eb57eb532f1 100644 --- a/drivers/tty/serial/serial_mctrl_gpio.c +++ b/drivers/tty/serial/serial_mctrl_gpio.c | |||
| @@ -12,18 +12,23 @@ | |||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. | 14 | * GNU General Public License for more details. |
| 15 | * | ||
| 16 | */ | 15 | */ |
| 17 | 16 | ||
| 18 | #include <linux/err.h> | 17 | #include <linux/err.h> |
| 19 | #include <linux/device.h> | 18 | #include <linux/device.h> |
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/gpio/consumer.h> | 20 | #include <linux/gpio/consumer.h> |
| 21 | #include <linux/termios.h> | 21 | #include <linux/termios.h> |
| 22 | #include <linux/serial_core.h> | ||
| 22 | 23 | ||
| 23 | #include "serial_mctrl_gpio.h" | 24 | #include "serial_mctrl_gpio.h" |
| 24 | 25 | ||
| 25 | struct mctrl_gpios { | 26 | struct mctrl_gpios { |
| 27 | struct uart_port *port; | ||
| 26 | struct gpio_desc *gpio[UART_GPIO_MAX]; | 28 | struct gpio_desc *gpio[UART_GPIO_MAX]; |
| 29 | int irq[UART_GPIO_MAX]; | ||
| 30 | unsigned int mctrl_prev; | ||
| 31 | bool mctrl_on; | ||
| 27 | }; | 32 | }; |
| 28 | 33 | ||
| 29 | static const struct { | 34 | static const struct { |
| @@ -82,7 +87,7 @@ unsigned int mctrl_gpio_get(struct mctrl_gpios *gpios, unsigned int *mctrl) | |||
| 82 | } | 87 | } |
| 83 | EXPORT_SYMBOL_GPL(mctrl_gpio_get); | 88 | EXPORT_SYMBOL_GPL(mctrl_gpio_get); |
| 84 | 89 | ||
| 85 | struct mctrl_gpios *mctrl_gpio_init(struct device *dev, unsigned int idx) | 90 | struct mctrl_gpios *mctrl_gpio_init_noauto(struct device *dev, unsigned int idx) |
| 86 | { | 91 | { |
| 87 | struct mctrl_gpios *gpios; | 92 | struct mctrl_gpios *gpios; |
| 88 | enum mctrl_gpio_idx i; | 93 | enum mctrl_gpio_idx i; |
| @@ -110,15 +115,135 @@ struct mctrl_gpios *mctrl_gpio_init(struct device *dev, unsigned int idx) | |||
| 110 | 115 | ||
| 111 | return gpios; | 116 | return gpios; |
| 112 | } | 117 | } |
| 113 | EXPORT_SYMBOL_GPL(mctrl_gpio_init); | 118 | EXPORT_SYMBOL_GPL(mctrl_gpio_init_noauto); |
| 119 | |||
| 120 | #define MCTRL_ANY_DELTA (TIOCM_RI | TIOCM_DSR | TIOCM_CD | TIOCM_CTS) | ||
| 121 | static irqreturn_t mctrl_gpio_irq_handle(int irq, void *context) | ||
| 122 | { | ||
| 123 | struct mctrl_gpios *gpios = context; | ||
| 124 | struct uart_port *port = gpios->port; | ||
| 125 | u32 mctrl = gpios->mctrl_prev; | ||
| 126 | u32 mctrl_diff; | ||
| 127 | |||
| 128 | mctrl_gpio_get(gpios, &mctrl); | ||
| 129 | |||
| 130 | mctrl_diff = mctrl ^ gpios->mctrl_prev; | ||
| 131 | gpios->mctrl_prev = mctrl; | ||
| 132 | |||
| 133 | if (mctrl_diff & MCTRL_ANY_DELTA && port->state != NULL) { | ||
| 134 | if ((mctrl_diff & mctrl) & TIOCM_RI) | ||
| 135 | port->icount.rng++; | ||
| 136 | |||
| 137 | if ((mctrl_diff & mctrl) & TIOCM_DSR) | ||
| 138 | port->icount.dsr++; | ||
| 139 | |||
| 140 | if (mctrl_diff & TIOCM_CD) | ||
| 141 | uart_handle_dcd_change(port, mctrl & TIOCM_CD); | ||
| 142 | |||
| 143 | if (mctrl_diff & TIOCM_CTS) | ||
| 144 | uart_handle_cts_change(port, mctrl & TIOCM_CTS); | ||
| 145 | |||
| 146 | wake_up_interruptible(&port->state->port.delta_msr_wait); | ||
| 147 | } | ||
| 148 | |||
| 149 | return IRQ_HANDLED; | ||
| 150 | } | ||
| 151 | |||
| 152 | struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx) | ||
| 153 | { | ||
| 154 | struct mctrl_gpios *gpios; | ||
| 155 | enum mctrl_gpio_idx i; | ||
| 156 | |||
| 157 | gpios = mctrl_gpio_init_noauto(port->dev, idx); | ||
| 158 | if (IS_ERR(gpios)) | ||
| 159 | return gpios; | ||
| 160 | |||
| 161 | gpios->port = port; | ||
| 162 | |||
| 163 | for (i = 0; i < UART_GPIO_MAX; ++i) { | ||
| 164 | int ret; | ||
| 165 | |||
| 166 | if (!gpios->gpio[i] || mctrl_gpios_desc[i].dir_out) | ||
| 167 | continue; | ||
| 168 | |||
| 169 | ret = gpiod_to_irq(gpios->gpio[i]); | ||
| 170 | if (ret <= 0) { | ||
| 171 | dev_err(port->dev, | ||
| 172 | "failed to find corresponding irq for %s (idx=%d, err=%d)\n", | ||
| 173 | mctrl_gpios_desc[i].name, idx, ret); | ||
| 174 | return ERR_PTR(ret); | ||
| 175 | } | ||
| 176 | gpios->irq[i] = ret; | ||
| 177 | |||
| 178 | /* irqs should only be enabled in .enable_ms */ | ||
| 179 | irq_set_status_flags(gpios->irq[i], IRQ_NOAUTOEN); | ||
| 180 | |||
| 181 | ret = devm_request_irq(port->dev, gpios->irq[i], | ||
| 182 | mctrl_gpio_irq_handle, | ||
| 183 | IRQ_TYPE_EDGE_BOTH, dev_name(port->dev), | ||
| 184 | gpios); | ||
| 185 | if (ret) { | ||
| 186 | /* alternatively implement polling */ | ||
| 187 | dev_err(port->dev, | ||
| 188 | "failed to request irq for %s (idx=%d, err=%d)\n", | ||
| 189 | mctrl_gpios_desc[i].name, idx, ret); | ||
| 190 | return ERR_PTR(ret); | ||
| 191 | } | ||
| 192 | } | ||
| 193 | |||
| 194 | return gpios; | ||
| 195 | } | ||
| 114 | 196 | ||
| 115 | void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios) | 197 | void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios) |
| 116 | { | 198 | { |
| 117 | enum mctrl_gpio_idx i; | 199 | enum mctrl_gpio_idx i; |
| 118 | 200 | ||
| 119 | for (i = 0; i < UART_GPIO_MAX; i++) | 201 | for (i = 0; i < UART_GPIO_MAX; i++) { |
| 202 | if (gpios->irq[i]) | ||
| 203 | devm_free_irq(gpios->port->dev, gpios->irq[i], gpios); | ||
| 204 | |||
| 120 | if (gpios->gpio[i]) | 205 | if (gpios->gpio[i]) |
| 121 | devm_gpiod_put(dev, gpios->gpio[i]); | 206 | devm_gpiod_put(dev, gpios->gpio[i]); |
| 207 | } | ||
| 122 | devm_kfree(dev, gpios); | 208 | devm_kfree(dev, gpios); |
| 123 | } | 209 | } |
| 124 | EXPORT_SYMBOL_GPL(mctrl_gpio_free); | 210 | EXPORT_SYMBOL_GPL(mctrl_gpio_free); |
| 211 | |||
| 212 | void mctrl_gpio_enable_ms(struct mctrl_gpios *gpios) | ||
| 213 | { | ||
| 214 | enum mctrl_gpio_idx i; | ||
| 215 | |||
| 216 | /* .enable_ms may be called multiple times */ | ||
| 217 | if (gpios->mctrl_on) | ||
| 218 | return; | ||
| 219 | |||
| 220 | gpios->mctrl_on = true; | ||
| 221 | |||
| 222 | /* get initial status of modem lines GPIOs */ | ||
| 223 | mctrl_gpio_get(gpios, &gpios->mctrl_prev); | ||
| 224 | |||
| 225 | for (i = 0; i < UART_GPIO_MAX; ++i) { | ||
| 226 | if (!gpios->irq[i]) | ||
| 227 | continue; | ||
| 228 | |||
| 229 | enable_irq(gpios->irq[i]); | ||
| 230 | } | ||
| 231 | } | ||
| 232 | EXPORT_SYMBOL_GPL(mctrl_gpio_enable_ms); | ||
| 233 | |||
| 234 | void mctrl_gpio_disable_ms(struct mctrl_gpios *gpios) | ||
| 235 | { | ||
| 236 | enum mctrl_gpio_idx i; | ||
| 237 | |||
| 238 | if (!gpios->mctrl_on) | ||
| 239 | return; | ||
| 240 | |||
| 241 | gpios->mctrl_on = false; | ||
| 242 | |||
| 243 | for (i = 0; i < UART_GPIO_MAX; ++i) { | ||
| 244 | if (!gpios->irq[i]) | ||
| 245 | continue; | ||
| 246 | |||
| 247 | disable_irq(gpios->irq[i]); | ||
| 248 | } | ||
| 249 | } | ||
diff --git a/drivers/tty/serial/serial_mctrl_gpio.h b/drivers/tty/serial/serial_mctrl_gpio.h index 400ba0494a17..9716db283290 100644 --- a/drivers/tty/serial/serial_mctrl_gpio.h +++ b/drivers/tty/serial/serial_mctrl_gpio.h | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/device.h> | 22 | #include <linux/device.h> |
| 23 | #include <linux/gpio/consumer.h> | 23 | #include <linux/gpio/consumer.h> |
| 24 | 24 | ||
| 25 | struct uart_port; | ||
| 26 | |||
| 25 | enum mctrl_gpio_idx { | 27 | enum mctrl_gpio_idx { |
| 26 | UART_GPIO_CTS, | 28 | UART_GPIO_CTS, |
| 27 | UART_GPIO_DSR, | 29 | UART_GPIO_DSR, |
| @@ -60,12 +62,22 @@ struct gpio_desc *mctrl_gpio_to_gpiod(struct mctrl_gpios *gpios, | |||
| 60 | enum mctrl_gpio_idx gidx); | 62 | enum mctrl_gpio_idx gidx); |
| 61 | 63 | ||
| 62 | /* | 64 | /* |
| 65 | * Request and set direction of modem control lines GPIOs and sets up irq | ||
| 66 | * handling. | ||
| 67 | * devm_* functions are used, so there's no need to call mctrl_gpio_free(). | ||
| 68 | * Returns a pointer to the allocated mctrl structure if ok, -ENOMEM on | ||
| 69 | * allocation error. | ||
| 70 | */ | ||
| 71 | struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx); | ||
| 72 | |||
| 73 | /* | ||
| 63 | * Request and set direction of modem control lines GPIOs. | 74 | * Request and set direction of modem control lines GPIOs. |
| 64 | * devm_* functions are used, so there's no need to call mctrl_gpio_free(). | 75 | * devm_* functions are used, so there's no need to call mctrl_gpio_free(). |
| 65 | * Returns a pointer to the allocated mctrl structure if ok, -ENOMEM on | 76 | * Returns a pointer to the allocated mctrl structure if ok, -ENOMEM on |
| 66 | * allocation error. | 77 | * allocation error. |
| 67 | */ | 78 | */ |
| 68 | struct mctrl_gpios *mctrl_gpio_init(struct device *dev, unsigned int idx); | 79 | struct mctrl_gpios *mctrl_gpio_init_noauto(struct device *dev, |
| 80 | unsigned int idx); | ||
| 69 | 81 | ||
| 70 | /* | 82 | /* |
| 71 | * Free the mctrl_gpios structure. | 83 | * Free the mctrl_gpios structure. |
| @@ -74,6 +86,16 @@ struct mctrl_gpios *mctrl_gpio_init(struct device *dev, unsigned int idx); | |||
| 74 | */ | 86 | */ |
| 75 | void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios); | 87 | void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios); |
| 76 | 88 | ||
| 89 | /* | ||
| 90 | * Enable gpio interrupts to report status line changes. | ||
| 91 | */ | ||
| 92 | void mctrl_gpio_enable_ms(struct mctrl_gpios *gpios); | ||
| 93 | |||
| 94 | /* | ||
| 95 | * Disable gpio interrupts to report status line changes. | ||
| 96 | */ | ||
| 97 | void mctrl_gpio_disable_ms(struct mctrl_gpios *gpios); | ||
| 98 | |||
| 77 | #else /* GPIOLIB */ | 99 | #else /* GPIOLIB */ |
| 78 | 100 | ||
| 79 | static inline | 101 | static inline |
| @@ -95,7 +117,13 @@ struct gpio_desc *mctrl_gpio_to_gpiod(struct mctrl_gpios *gpios, | |||
| 95 | } | 117 | } |
| 96 | 118 | ||
| 97 | static inline | 119 | static inline |
| 98 | struct mctrl_gpios *mctrl_gpio_init(struct device *dev, unsigned int idx) | 120 | struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx) |
| 121 | { | ||
| 122 | return ERR_PTR(-ENOSYS); | ||
| 123 | } | ||
| 124 | |||
| 125 | static inline | ||
| 126 | struct mctrl_gpios *mctrl_gpio_init_noauto(struct device *dev, unsigned int idx) | ||
| 99 | { | 127 | { |
| 100 | return ERR_PTR(-ENOSYS); | 128 | return ERR_PTR(-ENOSYS); |
| 101 | } | 129 | } |
| @@ -105,6 +133,14 @@ void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios) | |||
| 105 | { | 133 | { |
| 106 | } | 134 | } |
| 107 | 135 | ||
| 136 | static inline void mctrl_gpio_enable_ms(struct mctrl_gpios *gpios) | ||
| 137 | { | ||
| 138 | } | ||
| 139 | |||
| 140 | static inline void mctrl_gpio_disable_ms(struct mctrl_gpios *gpios) | ||
| 141 | { | ||
| 142 | } | ||
| 143 | |||
| 108 | #endif /* GPIOLIB */ | 144 | #endif /* GPIOLIB */ |
| 109 | 145 | ||
| 110 | #endif | 146 | #endif |
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 1b2f894bdc9e..960e50a97558 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c | |||
| @@ -84,6 +84,7 @@ struct sci_port { | |||
| 84 | unsigned int overrun_reg; | 84 | unsigned int overrun_reg; |
| 85 | unsigned int overrun_mask; | 85 | unsigned int overrun_mask; |
| 86 | unsigned int error_mask; | 86 | unsigned int error_mask; |
| 87 | unsigned int error_clear; | ||
| 87 | unsigned int sampling_rate; | 88 | unsigned int sampling_rate; |
| 88 | resource_size_t reg_size; | 89 | resource_size_t reg_size; |
| 89 | 90 | ||
| @@ -103,19 +104,15 @@ struct sci_port { | |||
| 103 | struct dma_chan *chan_rx; | 104 | struct dma_chan *chan_rx; |
| 104 | 105 | ||
| 105 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | 106 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 106 | struct dma_async_tx_descriptor *desc_tx; | ||
| 107 | struct dma_async_tx_descriptor *desc_rx[2]; | ||
| 108 | dma_cookie_t cookie_tx; | 107 | dma_cookie_t cookie_tx; |
| 109 | dma_cookie_t cookie_rx[2]; | 108 | dma_cookie_t cookie_rx[2]; |
| 110 | dma_cookie_t active_rx; | 109 | dma_cookie_t active_rx; |
| 111 | struct scatterlist sg_tx; | 110 | dma_addr_t tx_dma_addr; |
| 112 | unsigned int sg_len_tx; | 111 | unsigned int tx_dma_len; |
| 113 | struct scatterlist sg_rx[2]; | 112 | struct scatterlist sg_rx[2]; |
| 113 | void *rx_buf[2]; | ||
| 114 | size_t buf_len_rx; | 114 | size_t buf_len_rx; |
| 115 | struct sh_dmae_slave param_tx; | ||
| 116 | struct sh_dmae_slave param_rx; | ||
| 117 | struct work_struct work_tx; | 115 | struct work_struct work_tx; |
| 118 | struct work_struct work_rx; | ||
| 119 | struct timer_list rx_timer; | 116 | struct timer_list rx_timer; |
| 120 | unsigned int rx_timeout; | 117 | unsigned int rx_timeout; |
| 121 | #endif | 118 | #endif |
| @@ -123,11 +120,6 @@ struct sci_port { | |||
| 123 | struct notifier_block freq_transition; | 120 | struct notifier_block freq_transition; |
| 124 | }; | 121 | }; |
| 125 | 122 | ||
| 126 | /* Function prototypes */ | ||
| 127 | static void sci_start_tx(struct uart_port *port); | ||
| 128 | static void sci_stop_tx(struct uart_port *port); | ||
| 129 | static void sci_start_rx(struct uart_port *port); | ||
| 130 | |||
| 131 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS | 123 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
| 132 | 124 | ||
| 133 | static struct sci_port sci_ports[SCI_NPORTS]; | 125 | static struct sci_port sci_ports[SCI_NPORTS]; |
| @@ -146,7 +138,7 @@ struct plat_sci_reg { | |||
| 146 | /* Helper for invalidating specific entries of an inherited map. */ | 138 | /* Helper for invalidating specific entries of an inherited map. */ |
| 147 | #define sci_reg_invalid { .offset = 0, .size = 0 } | 139 | #define sci_reg_invalid { .offset = 0, .size = 0 } |
| 148 | 140 | ||
| 149 | static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | 141 | static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { |
| 150 | [SCIx_PROBE_REGTYPE] = { | 142 | [SCIx_PROBE_REGTYPE] = { |
| 151 | [0 ... SCIx_NR_REGS - 1] = sci_reg_invalid, | 143 | [0 ... SCIx_NR_REGS - 1] = sci_reg_invalid, |
| 152 | }, | 144 | }, |
| @@ -399,7 +391,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
| 399 | */ | 391 | */ |
| 400 | static unsigned int sci_serial_in(struct uart_port *p, int offset) | 392 | static unsigned int sci_serial_in(struct uart_port *p, int offset) |
| 401 | { | 393 | { |
| 402 | struct plat_sci_reg *reg = sci_getreg(p, offset); | 394 | const struct plat_sci_reg *reg = sci_getreg(p, offset); |
| 403 | 395 | ||
| 404 | if (reg->size == 8) | 396 | if (reg->size == 8) |
| 405 | return ioread8(p->membase + (reg->offset << p->regshift)); | 397 | return ioread8(p->membase + (reg->offset << p->regshift)); |
| @@ -413,7 +405,7 @@ static unsigned int sci_serial_in(struct uart_port *p, int offset) | |||
| 413 | 405 | ||
| 414 | static void sci_serial_out(struct uart_port *p, int offset, int value) | 406 | static void sci_serial_out(struct uart_port *p, int offset, int value) |
| 415 | { | 407 | { |
| 416 | struct plat_sci_reg *reg = sci_getreg(p, offset); | 408 | const struct plat_sci_reg *reg = sci_getreg(p, offset); |
| 417 | 409 | ||
| 418 | if (reg->size == 8) | 410 | if (reg->size == 8) |
| 419 | iowrite8(value, p->membase + (reg->offset << p->regshift)); | 411 | iowrite8(value, p->membase + (reg->offset << p->regshift)); |
| @@ -489,6 +481,105 @@ static void sci_port_disable(struct sci_port *sci_port) | |||
| 489 | pm_runtime_put_sync(sci_port->port.dev); | 481 | pm_runtime_put_sync(sci_port->port.dev); |
| 490 | } | 482 | } |
| 491 | 483 | ||
| 484 | static inline unsigned long port_rx_irq_mask(struct uart_port *port) | ||
| 485 | { | ||
| 486 | /* | ||
| 487 | * Not all ports (such as SCIFA) will support REIE. Rather than | ||
| 488 | * special-casing the port type, we check the port initialization | ||
| 489 | * IRQ enable mask to see whether the IRQ is desired at all. If | ||
| 490 | * it's unset, it's logically inferred that there's no point in | ||
| 491 | * testing for it. | ||
| 492 | */ | ||
| 493 | return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); | ||
| 494 | } | ||
| 495 | |||
| 496 | static void sci_start_tx(struct uart_port *port) | ||
| 497 | { | ||
| 498 | struct sci_port *s = to_sci_port(port); | ||
| 499 | unsigned short ctrl; | ||
| 500 | |||
| 501 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 502 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 503 | u16 new, scr = serial_port_in(port, SCSCR); | ||
| 504 | if (s->chan_tx) | ||
| 505 | new = scr | SCSCR_TDRQE; | ||
| 506 | else | ||
| 507 | new = scr & ~SCSCR_TDRQE; | ||
| 508 | if (new != scr) | ||
| 509 | serial_port_out(port, SCSCR, new); | ||
| 510 | } | ||
| 511 | |||
| 512 | if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && | ||
| 513 | dma_submit_error(s->cookie_tx)) { | ||
| 514 | s->cookie_tx = 0; | ||
| 515 | schedule_work(&s->work_tx); | ||
| 516 | } | ||
| 517 | #endif | ||
| 518 | |||
| 519 | if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 520 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ | ||
| 521 | ctrl = serial_port_in(port, SCSCR); | ||
| 522 | serial_port_out(port, SCSCR, ctrl | SCSCR_TIE); | ||
| 523 | } | ||
| 524 | } | ||
| 525 | |||
| 526 | static void sci_stop_tx(struct uart_port *port) | ||
| 527 | { | ||
| 528 | unsigned short ctrl; | ||
| 529 | |||
| 530 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | ||
| 531 | ctrl = serial_port_in(port, SCSCR); | ||
| 532 | |||
| 533 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 534 | ctrl &= ~SCSCR_TDRQE; | ||
| 535 | |||
| 536 | ctrl &= ~SCSCR_TIE; | ||
| 537 | |||
| 538 | serial_port_out(port, SCSCR, ctrl); | ||
| 539 | } | ||
| 540 | |||
| 541 | static void sci_start_rx(struct uart_port *port) | ||
| 542 | { | ||
| 543 | unsigned short ctrl; | ||
| 544 | |||
| 545 | ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port); | ||
| 546 | |||
| 547 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 548 | ctrl &= ~SCSCR_RDRQE; | ||
| 549 | |||
| 550 | serial_port_out(port, SCSCR, ctrl); | ||
| 551 | } | ||
| 552 | |||
| 553 | static void sci_stop_rx(struct uart_port *port) | ||
| 554 | { | ||
| 555 | unsigned short ctrl; | ||
| 556 | |||
| 557 | ctrl = serial_port_in(port, SCSCR); | ||
| 558 | |||
| 559 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 560 | ctrl &= ~SCSCR_RDRQE; | ||
| 561 | |||
| 562 | ctrl &= ~port_rx_irq_mask(port); | ||
| 563 | |||
| 564 | serial_port_out(port, SCSCR, ctrl); | ||
| 565 | } | ||
| 566 | |||
| 567 | static void sci_clear_SCxSR(struct uart_port *port, unsigned int mask) | ||
| 568 | { | ||
| 569 | if (port->type == PORT_SCI) { | ||
| 570 | /* Just store the mask */ | ||
| 571 | serial_port_out(port, SCxSR, mask); | ||
| 572 | } else if (to_sci_port(port)->overrun_mask == SCIFA_ORER) { | ||
| 573 | /* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */ | ||
| 574 | /* Only clear the status bits we want to clear */ | ||
| 575 | serial_port_out(port, SCxSR, | ||
| 576 | serial_port_in(port, SCxSR) & mask); | ||
| 577 | } else { | ||
| 578 | /* Store the mask, clear parity/framing errors */ | ||
| 579 | serial_port_out(port, SCxSR, mask & ~(SCIF_FERC | SCIF_PERC)); | ||
| 580 | } | ||
| 581 | } | ||
| 582 | |||
| 492 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | 583 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
| 493 | 584 | ||
| 494 | #ifdef CONFIG_CONSOLE_POLL | 585 | #ifdef CONFIG_CONSOLE_POLL |
| @@ -500,7 +591,7 @@ static int sci_poll_get_char(struct uart_port *port) | |||
| 500 | do { | 591 | do { |
| 501 | status = serial_port_in(port, SCxSR); | 592 | status = serial_port_in(port, SCxSR); |
| 502 | if (status & SCxSR_ERRORS(port)) { | 593 | if (status & SCxSR_ERRORS(port)) { |
| 503 | serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | 594 | sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port)); |
| 504 | continue; | 595 | continue; |
| 505 | } | 596 | } |
| 506 | break; | 597 | break; |
| @@ -513,7 +604,7 @@ static int sci_poll_get_char(struct uart_port *port) | |||
| 513 | 604 | ||
| 514 | /* Dummy read */ | 605 | /* Dummy read */ |
| 515 | serial_port_in(port, SCxSR); | 606 | serial_port_in(port, SCxSR); |
| 516 | serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 607 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
| 517 | 608 | ||
| 518 | return c; | 609 | return c; |
| 519 | } | 610 | } |
| @@ -528,14 +619,14 @@ static void sci_poll_put_char(struct uart_port *port, unsigned char c) | |||
| 528 | } while (!(status & SCxSR_TDxE(port))); | 619 | } while (!(status & SCxSR_TDxE(port))); |
| 529 | 620 | ||
| 530 | serial_port_out(port, SCxTDR, c); | 621 | serial_port_out(port, SCxTDR, c); |
| 531 | serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port)); | 622 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port)); |
| 532 | } | 623 | } |
| 533 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ | 624 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ |
| 534 | 625 | ||
| 535 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) | 626 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 536 | { | 627 | { |
| 537 | struct sci_port *s = to_sci_port(port); | 628 | struct sci_port *s = to_sci_port(port); |
| 538 | struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR; | 629 | const struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR; |
| 539 | 630 | ||
| 540 | /* | 631 | /* |
| 541 | * Use port-specific handler if provided. | 632 | * Use port-specific handler if provided. |
| @@ -565,7 +656,7 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
| 565 | 656 | ||
| 566 | static int sci_txfill(struct uart_port *port) | 657 | static int sci_txfill(struct uart_port *port) |
| 567 | { | 658 | { |
| 568 | struct plat_sci_reg *reg; | 659 | const struct plat_sci_reg *reg; |
| 569 | 660 | ||
| 570 | reg = sci_getreg(port, SCTFDR); | 661 | reg = sci_getreg(port, SCTFDR); |
| 571 | if (reg->size) | 662 | if (reg->size) |
| @@ -585,7 +676,7 @@ static int sci_txroom(struct uart_port *port) | |||
| 585 | 676 | ||
| 586 | static int sci_rxfill(struct uart_port *port) | 677 | static int sci_rxfill(struct uart_port *port) |
| 587 | { | 678 | { |
| 588 | struct plat_sci_reg *reg; | 679 | const struct plat_sci_reg *reg; |
| 589 | 680 | ||
| 590 | reg = sci_getreg(port, SCRFDR); | 681 | reg = sci_getreg(port, SCRFDR); |
| 591 | if (reg->size) | 682 | if (reg->size) |
| @@ -655,7 +746,7 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 655 | port->icount.tx++; | 746 | port->icount.tx++; |
| 656 | } while (--count > 0); | 747 | } while (--count > 0); |
| 657 | 748 | ||
| 658 | serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | 749 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port)); |
| 659 | 750 | ||
| 660 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 751 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 661 | uart_write_wakeup(port); | 752 | uart_write_wakeup(port); |
| @@ -666,7 +757,7 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 666 | 757 | ||
| 667 | if (port->type != PORT_SCI) { | 758 | if (port->type != PORT_SCI) { |
| 668 | serial_port_in(port, SCxSR); /* Dummy read */ | 759 | serial_port_in(port, SCxSR); /* Dummy read */ |
| 669 | serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | 760 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port)); |
| 670 | } | 761 | } |
| 671 | 762 | ||
| 672 | ctrl |= SCSCR_TIE; | 763 | ctrl |= SCSCR_TIE; |
| @@ -750,7 +841,7 @@ static void sci_receive_chars(struct uart_port *port) | |||
| 750 | } | 841 | } |
| 751 | 842 | ||
| 752 | serial_port_in(port, SCxSR); /* dummy read */ | 843 | serial_port_in(port, SCxSR); /* dummy read */ |
| 753 | serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 844 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
| 754 | 845 | ||
| 755 | copied += count; | 846 | copied += count; |
| 756 | port->icount.rx += count; | 847 | port->icount.rx += count; |
| @@ -761,7 +852,7 @@ static void sci_receive_chars(struct uart_port *port) | |||
| 761 | tty_flip_buffer_push(tport); | 852 | tty_flip_buffer_push(tport); |
| 762 | } else { | 853 | } else { |
| 763 | serial_port_in(port, SCxSR); /* dummy read */ | 854 | serial_port_in(port, SCxSR); /* dummy read */ |
| 764 | serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 855 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
| 765 | } | 856 | } |
| 766 | } | 857 | } |
| 767 | 858 | ||
| @@ -866,7 +957,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port) | |||
| 866 | { | 957 | { |
| 867 | struct tty_port *tport = &port->state->port; | 958 | struct tty_port *tport = &port->state->port; |
| 868 | struct sci_port *s = to_sci_port(port); | 959 | struct sci_port *s = to_sci_port(port); |
| 869 | struct plat_sci_reg *reg; | 960 | const struct plat_sci_reg *reg; |
| 870 | int copied = 0; | 961 | int copied = 0; |
| 871 | u16 status; | 962 | u16 status; |
| 872 | 963 | ||
| @@ -924,6 +1015,460 @@ static int sci_handle_breaks(struct uart_port *port) | |||
| 924 | return copied; | 1015 | return copied; |
| 925 | } | 1016 | } |
| 926 | 1017 | ||
| 1018 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 1019 | static void sci_dma_tx_complete(void *arg) | ||
| 1020 | { | ||
| 1021 | struct sci_port *s = arg; | ||
| 1022 | struct uart_port *port = &s->port; | ||
| 1023 | struct circ_buf *xmit = &port->state->xmit; | ||
| 1024 | unsigned long flags; | ||
| 1025 | |||
| 1026 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | ||
| 1027 | |||
| 1028 | spin_lock_irqsave(&port->lock, flags); | ||
| 1029 | |||
| 1030 | xmit->tail += s->tx_dma_len; | ||
| 1031 | xmit->tail &= UART_XMIT_SIZE - 1; | ||
| 1032 | |||
| 1033 | port->icount.tx += s->tx_dma_len; | ||
| 1034 | |||
| 1035 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
| 1036 | uart_write_wakeup(port); | ||
| 1037 | |||
| 1038 | if (!uart_circ_empty(xmit)) { | ||
| 1039 | s->cookie_tx = 0; | ||
| 1040 | schedule_work(&s->work_tx); | ||
| 1041 | } else { | ||
| 1042 | s->cookie_tx = -EINVAL; | ||
| 1043 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1044 | u16 ctrl = serial_port_in(port, SCSCR); | ||
| 1045 | serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE); | ||
| 1046 | } | ||
| 1047 | } | ||
| 1048 | |||
| 1049 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1050 | } | ||
| 1051 | |||
| 1052 | /* Locking: called with port lock held */ | ||
| 1053 | static int sci_dma_rx_push(struct sci_port *s, void *buf, size_t count) | ||
| 1054 | { | ||
| 1055 | struct uart_port *port = &s->port; | ||
| 1056 | struct tty_port *tport = &port->state->port; | ||
| 1057 | int copied; | ||
| 1058 | |||
| 1059 | copied = tty_insert_flip_string(tport, buf, count); | ||
| 1060 | if (copied < count) { | ||
| 1061 | dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n", | ||
| 1062 | count - copied); | ||
| 1063 | port->icount.buf_overrun++; | ||
| 1064 | } | ||
| 1065 | |||
| 1066 | port->icount.rx += copied; | ||
| 1067 | |||
| 1068 | return copied; | ||
| 1069 | } | ||
| 1070 | |||
| 1071 | static int sci_dma_rx_find_active(struct sci_port *s) | ||
| 1072 | { | ||
| 1073 | unsigned int i; | ||
| 1074 | |||
| 1075 | for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) | ||
| 1076 | if (s->active_rx == s->cookie_rx[i]) | ||
| 1077 | return i; | ||
| 1078 | |||
| 1079 | dev_err(s->port.dev, "%s: Rx cookie %d not found!\n", __func__, | ||
| 1080 | s->active_rx); | ||
| 1081 | return -1; | ||
| 1082 | } | ||
| 1083 | |||
| 1084 | static void sci_rx_dma_release(struct sci_port *s, bool enable_pio) | ||
| 1085 | { | ||
| 1086 | struct dma_chan *chan = s->chan_rx; | ||
| 1087 | struct uart_port *port = &s->port; | ||
| 1088 | unsigned long flags; | ||
| 1089 | |||
| 1090 | spin_lock_irqsave(&port->lock, flags); | ||
| 1091 | s->chan_rx = NULL; | ||
| 1092 | s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; | ||
| 1093 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1094 | dmaengine_terminate_all(chan); | ||
| 1095 | dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], | ||
| 1096 | sg_dma_address(&s->sg_rx[0])); | ||
| 1097 | dma_release_channel(chan); | ||
| 1098 | if (enable_pio) | ||
| 1099 | sci_start_rx(port); | ||
| 1100 | } | ||
| 1101 | |||
| 1102 | static void sci_dma_rx_complete(void *arg) | ||
| 1103 | { | ||
| 1104 | struct sci_port *s = arg; | ||
| 1105 | struct dma_chan *chan = s->chan_rx; | ||
| 1106 | struct uart_port *port = &s->port; | ||
| 1107 | struct dma_async_tx_descriptor *desc; | ||
| 1108 | unsigned long flags; | ||
| 1109 | int active, count = 0; | ||
| 1110 | |||
| 1111 | dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, | ||
| 1112 | s->active_rx); | ||
| 1113 | |||
| 1114 | spin_lock_irqsave(&port->lock, flags); | ||
| 1115 | |||
| 1116 | active = sci_dma_rx_find_active(s); | ||
| 1117 | if (active >= 0) | ||
| 1118 | count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); | ||
| 1119 | |||
| 1120 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); | ||
| 1121 | |||
| 1122 | if (count) | ||
| 1123 | tty_flip_buffer_push(&port->state->port); | ||
| 1124 | |||
| 1125 | desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, | ||
| 1126 | DMA_DEV_TO_MEM, | ||
| 1127 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
| 1128 | if (!desc) | ||
| 1129 | goto fail; | ||
| 1130 | |||
| 1131 | desc->callback = sci_dma_rx_complete; | ||
| 1132 | desc->callback_param = s; | ||
| 1133 | s->cookie_rx[active] = dmaengine_submit(desc); | ||
| 1134 | if (dma_submit_error(s->cookie_rx[active])) | ||
| 1135 | goto fail; | ||
| 1136 | |||
| 1137 | s->active_rx = s->cookie_rx[!active]; | ||
| 1138 | |||
| 1139 | dma_async_issue_pending(chan); | ||
| 1140 | |||
| 1141 | dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", | ||
| 1142 | __func__, s->cookie_rx[active], active, s->active_rx); | ||
| 1143 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1144 | return; | ||
| 1145 | |||
| 1146 | fail: | ||
| 1147 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1148 | dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); | ||
| 1149 | sci_rx_dma_release(s, true); | ||
| 1150 | } | ||
| 1151 | |||
| 1152 | static void sci_tx_dma_release(struct sci_port *s, bool enable_pio) | ||
| 1153 | { | ||
| 1154 | struct dma_chan *chan = s->chan_tx; | ||
| 1155 | struct uart_port *port = &s->port; | ||
| 1156 | unsigned long flags; | ||
| 1157 | |||
| 1158 | spin_lock_irqsave(&port->lock, flags); | ||
| 1159 | s->chan_tx = NULL; | ||
| 1160 | s->cookie_tx = -EINVAL; | ||
| 1161 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1162 | dmaengine_terminate_all(chan); | ||
| 1163 | dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, | ||
| 1164 | DMA_TO_DEVICE); | ||
| 1165 | dma_release_channel(chan); | ||
| 1166 | if (enable_pio) | ||
| 1167 | sci_start_tx(port); | ||
| 1168 | } | ||
| 1169 | |||
| 1170 | static void sci_submit_rx(struct sci_port *s) | ||
| 1171 | { | ||
| 1172 | struct dma_chan *chan = s->chan_rx; | ||
| 1173 | int i; | ||
| 1174 | |||
| 1175 | for (i = 0; i < 2; i++) { | ||
| 1176 | struct scatterlist *sg = &s->sg_rx[i]; | ||
| 1177 | struct dma_async_tx_descriptor *desc; | ||
| 1178 | |||
| 1179 | desc = dmaengine_prep_slave_sg(chan, | ||
| 1180 | sg, 1, DMA_DEV_TO_MEM, | ||
| 1181 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
| 1182 | if (!desc) | ||
| 1183 | goto fail; | ||
| 1184 | |||
| 1185 | desc->callback = sci_dma_rx_complete; | ||
| 1186 | desc->callback_param = s; | ||
| 1187 | s->cookie_rx[i] = dmaengine_submit(desc); | ||
| 1188 | if (dma_submit_error(s->cookie_rx[i])) | ||
| 1189 | goto fail; | ||
| 1190 | |||
| 1191 | dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__, | ||
| 1192 | s->cookie_rx[i], i); | ||
| 1193 | } | ||
| 1194 | |||
| 1195 | s->active_rx = s->cookie_rx[0]; | ||
| 1196 | |||
| 1197 | dma_async_issue_pending(chan); | ||
| 1198 | return; | ||
| 1199 | |||
| 1200 | fail: | ||
| 1201 | if (i) | ||
| 1202 | dmaengine_terminate_all(chan); | ||
| 1203 | for (i = 0; i < 2; i++) | ||
| 1204 | s->cookie_rx[i] = -EINVAL; | ||
| 1205 | s->active_rx = -EINVAL; | ||
| 1206 | dev_warn(s->port.dev, "Failed to re-start Rx DMA, using PIO\n"); | ||
| 1207 | sci_rx_dma_release(s, true); | ||
| 1208 | } | ||
| 1209 | |||
| 1210 | static void work_fn_tx(struct work_struct *work) | ||
| 1211 | { | ||
| 1212 | struct sci_port *s = container_of(work, struct sci_port, work_tx); | ||
| 1213 | struct dma_async_tx_descriptor *desc; | ||
| 1214 | struct dma_chan *chan = s->chan_tx; | ||
| 1215 | struct uart_port *port = &s->port; | ||
| 1216 | struct circ_buf *xmit = &port->state->xmit; | ||
| 1217 | dma_addr_t buf; | ||
| 1218 | |||
| 1219 | /* | ||
| 1220 | * DMA is idle now. | ||
| 1221 | * Port xmit buffer is already mapped, and it is one page... Just adjust | ||
| 1222 | * offsets and lengths. Since it is a circular buffer, we have to | ||
| 1223 | * transmit till the end, and then the rest. Take the port lock to get a | ||
| 1224 | * consistent xmit buffer state. | ||
| 1225 | */ | ||
| 1226 | spin_lock_irq(&port->lock); | ||
| 1227 | buf = s->tx_dma_addr + (xmit->tail & (UART_XMIT_SIZE - 1)); | ||
| 1228 | s->tx_dma_len = min_t(unsigned int, | ||
| 1229 | CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE), | ||
| 1230 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE)); | ||
| 1231 | spin_unlock_irq(&port->lock); | ||
| 1232 | |||
| 1233 | desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, | ||
| 1234 | DMA_MEM_TO_DEV, | ||
| 1235 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
| 1236 | if (!desc) { | ||
| 1237 | dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); | ||
| 1238 | /* switch to PIO */ | ||
| 1239 | sci_tx_dma_release(s, true); | ||
| 1240 | return; | ||
| 1241 | } | ||
| 1242 | |||
| 1243 | dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, | ||
| 1244 | DMA_TO_DEVICE); | ||
| 1245 | |||
| 1246 | spin_lock_irq(&port->lock); | ||
| 1247 | desc->callback = sci_dma_tx_complete; | ||
| 1248 | desc->callback_param = s; | ||
| 1249 | spin_unlock_irq(&port->lock); | ||
| 1250 | s->cookie_tx = dmaengine_submit(desc); | ||
| 1251 | if (dma_submit_error(s->cookie_tx)) { | ||
| 1252 | dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); | ||
| 1253 | /* switch to PIO */ | ||
| 1254 | sci_tx_dma_release(s, true); | ||
| 1255 | return; | ||
| 1256 | } | ||
| 1257 | |||
| 1258 | dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", | ||
| 1259 | __func__, xmit->buf, xmit->tail, xmit->head, s->cookie_tx); | ||
| 1260 | |||
| 1261 | dma_async_issue_pending(chan); | ||
| 1262 | } | ||
| 1263 | |||
| 1264 | static void rx_timer_fn(unsigned long arg) | ||
| 1265 | { | ||
| 1266 | struct sci_port *s = (struct sci_port *)arg; | ||
| 1267 | struct dma_chan *chan = s->chan_rx; | ||
| 1268 | struct uart_port *port = &s->port; | ||
| 1269 | struct dma_tx_state state; | ||
| 1270 | enum dma_status status; | ||
| 1271 | unsigned long flags; | ||
| 1272 | unsigned int read; | ||
| 1273 | int active, count; | ||
| 1274 | u16 scr; | ||
| 1275 | |||
| 1276 | spin_lock_irqsave(&port->lock, flags); | ||
| 1277 | |||
| 1278 | dev_dbg(port->dev, "DMA Rx timed out\n"); | ||
| 1279 | |||
| 1280 | active = sci_dma_rx_find_active(s); | ||
| 1281 | if (active < 0) { | ||
| 1282 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1283 | return; | ||
| 1284 | } | ||
| 1285 | |||
| 1286 | status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); | ||
| 1287 | if (status == DMA_COMPLETE) { | ||
| 1288 | dev_dbg(port->dev, "Cookie %d #%d has already completed\n", | ||
| 1289 | s->active_rx, active); | ||
| 1290 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1291 | |||
| 1292 | /* Let packet complete handler take care of the packet */ | ||
| 1293 | return; | ||
| 1294 | } | ||
| 1295 | |||
| 1296 | dmaengine_pause(chan); | ||
| 1297 | |||
| 1298 | /* | ||
| 1299 | * sometimes DMA transfer doesn't stop even if it is stopped and | ||
| 1300 | * data keeps on coming until transaction is complete so check | ||
| 1301 | * for DMA_COMPLETE again | ||
| 1302 | * Let packet complete handler take care of the packet | ||
| 1303 | */ | ||
| 1304 | status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); | ||
| 1305 | if (status == DMA_COMPLETE) { | ||
| 1306 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1307 | dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); | ||
| 1308 | return; | ||
| 1309 | } | ||
| 1310 | |||
| 1311 | /* Handle incomplete DMA receive */ | ||
| 1312 | dmaengine_terminate_all(s->chan_rx); | ||
| 1313 | read = sg_dma_len(&s->sg_rx[active]) - state.residue; | ||
| 1314 | dev_dbg(port->dev, "Read %u bytes with cookie %d\n", read, | ||
| 1315 | s->active_rx); | ||
| 1316 | |||
| 1317 | if (read) { | ||
| 1318 | count = sci_dma_rx_push(s, s->rx_buf[active], read); | ||
| 1319 | if (count) | ||
| 1320 | tty_flip_buffer_push(&port->state->port); | ||
| 1321 | } | ||
| 1322 | |||
| 1323 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 1324 | sci_submit_rx(s); | ||
| 1325 | |||
| 1326 | /* Direct new serial port interrupts back to CPU */ | ||
| 1327 | scr = serial_port_in(port, SCSCR); | ||
| 1328 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1329 | scr &= ~SCSCR_RDRQE; | ||
| 1330 | enable_irq(s->irqs[SCIx_RXI_IRQ]); | ||
| 1331 | } | ||
| 1332 | serial_port_out(port, SCSCR, scr | SCSCR_RIE); | ||
| 1333 | |||
| 1334 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1335 | } | ||
| 1336 | |||
| 1337 | static struct dma_chan *sci_request_dma_chan(struct uart_port *port, | ||
| 1338 | enum dma_transfer_direction dir, | ||
| 1339 | unsigned int id) | ||
| 1340 | { | ||
| 1341 | dma_cap_mask_t mask; | ||
| 1342 | struct dma_chan *chan; | ||
| 1343 | struct dma_slave_config cfg; | ||
| 1344 | int ret; | ||
| 1345 | |||
| 1346 | dma_cap_zero(mask); | ||
| 1347 | dma_cap_set(DMA_SLAVE, mask); | ||
| 1348 | |||
| 1349 | chan = dma_request_slave_channel_compat(mask, shdma_chan_filter, | ||
| 1350 | (void *)(unsigned long)id, port->dev, | ||
| 1351 | dir == DMA_MEM_TO_DEV ? "tx" : "rx"); | ||
| 1352 | if (!chan) { | ||
| 1353 | dev_warn(port->dev, | ||
| 1354 | "dma_request_slave_channel_compat failed\n"); | ||
| 1355 | return NULL; | ||
| 1356 | } | ||
| 1357 | |||
| 1358 | memset(&cfg, 0, sizeof(cfg)); | ||
| 1359 | cfg.direction = dir; | ||
| 1360 | if (dir == DMA_MEM_TO_DEV) { | ||
| 1361 | cfg.dst_addr = port->mapbase + | ||
| 1362 | (sci_getreg(port, SCxTDR)->offset << port->regshift); | ||
| 1363 | cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; | ||
| 1364 | } else { | ||
| 1365 | cfg.src_addr = port->mapbase + | ||
| 1366 | (sci_getreg(port, SCxRDR)->offset << port->regshift); | ||
| 1367 | cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | ret = dmaengine_slave_config(chan, &cfg); | ||
| 1371 | if (ret) { | ||
| 1372 | dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); | ||
| 1373 | dma_release_channel(chan); | ||
| 1374 | return NULL; | ||
| 1375 | } | ||
| 1376 | |||
| 1377 | return chan; | ||
| 1378 | } | ||
| 1379 | |||
| 1380 | static void sci_request_dma(struct uart_port *port) | ||
| 1381 | { | ||
| 1382 | struct sci_port *s = to_sci_port(port); | ||
| 1383 | struct dma_chan *chan; | ||
| 1384 | |||
| 1385 | dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); | ||
| 1386 | |||
| 1387 | if (!port->dev->of_node && | ||
| 1388 | (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0)) | ||
| 1389 | return; | ||
| 1390 | |||
| 1391 | s->cookie_tx = -EINVAL; | ||
| 1392 | chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV, s->cfg->dma_slave_tx); | ||
| 1393 | dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); | ||
| 1394 | if (chan) { | ||
| 1395 | s->chan_tx = chan; | ||
| 1396 | /* UART circular tx buffer is an aligned page. */ | ||
| 1397 | s->tx_dma_addr = dma_map_single(chan->device->dev, | ||
| 1398 | port->state->xmit.buf, | ||
| 1399 | UART_XMIT_SIZE, | ||
| 1400 | DMA_TO_DEVICE); | ||
| 1401 | if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { | ||
| 1402 | dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); | ||
| 1403 | dma_release_channel(chan); | ||
| 1404 | s->chan_tx = NULL; | ||
| 1405 | } else { | ||
| 1406 | dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", | ||
| 1407 | __func__, UART_XMIT_SIZE, | ||
| 1408 | port->state->xmit.buf, &s->tx_dma_addr); | ||
| 1409 | } | ||
| 1410 | |||
| 1411 | INIT_WORK(&s->work_tx, work_fn_tx); | ||
| 1412 | } | ||
| 1413 | |||
| 1414 | chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM, s->cfg->dma_slave_rx); | ||
| 1415 | dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); | ||
| 1416 | if (chan) { | ||
| 1417 | unsigned int i; | ||
| 1418 | dma_addr_t dma; | ||
| 1419 | void *buf; | ||
| 1420 | |||
| 1421 | s->chan_rx = chan; | ||
| 1422 | |||
| 1423 | s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); | ||
| 1424 | buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, | ||
| 1425 | &dma, GFP_KERNEL); | ||
| 1426 | if (!buf) { | ||
| 1427 | dev_warn(port->dev, | ||
| 1428 | "Failed to allocate Rx dma buffer, using PIO\n"); | ||
| 1429 | dma_release_channel(chan); | ||
| 1430 | s->chan_rx = NULL; | ||
| 1431 | return; | ||
| 1432 | } | ||
| 1433 | |||
| 1434 | for (i = 0; i < 2; i++) { | ||
| 1435 | struct scatterlist *sg = &s->sg_rx[i]; | ||
| 1436 | |||
| 1437 | sg_init_table(sg, 1); | ||
| 1438 | s->rx_buf[i] = buf; | ||
| 1439 | sg_dma_address(sg) = dma; | ||
| 1440 | sg->length = s->buf_len_rx; | ||
| 1441 | |||
| 1442 | buf += s->buf_len_rx; | ||
| 1443 | dma += s->buf_len_rx; | ||
| 1444 | } | ||
| 1445 | |||
| 1446 | setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s); | ||
| 1447 | |||
| 1448 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 1449 | sci_submit_rx(s); | ||
| 1450 | } | ||
| 1451 | } | ||
| 1452 | |||
| 1453 | static void sci_free_dma(struct uart_port *port) | ||
| 1454 | { | ||
| 1455 | struct sci_port *s = to_sci_port(port); | ||
| 1456 | |||
| 1457 | if (s->chan_tx) | ||
| 1458 | sci_tx_dma_release(s, false); | ||
| 1459 | if (s->chan_rx) | ||
| 1460 | sci_rx_dma_release(s, false); | ||
| 1461 | } | ||
| 1462 | #else | ||
| 1463 | static inline void sci_request_dma(struct uart_port *port) | ||
| 1464 | { | ||
| 1465 | } | ||
| 1466 | |||
| 1467 | static inline void sci_free_dma(struct uart_port *port) | ||
| 1468 | { | ||
| 1469 | } | ||
| 1470 | #endif | ||
| 1471 | |||
| 927 | static irqreturn_t sci_rx_interrupt(int irq, void *ptr) | 1472 | static irqreturn_t sci_rx_interrupt(int irq, void *ptr) |
| 928 | { | 1473 | { |
| 929 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | 1474 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| @@ -940,10 +1485,12 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr) | |||
| 940 | scr |= SCSCR_RDRQE; | 1485 | scr |= SCSCR_RDRQE; |
| 941 | } else { | 1486 | } else { |
| 942 | scr &= ~SCSCR_RIE; | 1487 | scr &= ~SCSCR_RIE; |
| 1488 | sci_submit_rx(s); | ||
| 943 | } | 1489 | } |
| 944 | serial_port_out(port, SCSCR, scr); | 1490 | serial_port_out(port, SCSCR, scr); |
| 945 | /* Clear current interrupt */ | 1491 | /* Clear current interrupt */ |
| 946 | serial_port_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port))); | 1492 | serial_port_out(port, SCxSR, |
| 1493 | ssr & ~(SCIF_DR | SCxSR_RDxF(port))); | ||
| 947 | dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n", | 1494 | dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n", |
| 948 | jiffies, s->rx_timeout); | 1495 | jiffies, s->rx_timeout); |
| 949 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); | 1496 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); |
| @@ -976,23 +1523,26 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr) | |||
| 976 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) | 1523 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
| 977 | { | 1524 | { |
| 978 | struct uart_port *port = ptr; | 1525 | struct uart_port *port = ptr; |
| 1526 | struct sci_port *s = to_sci_port(port); | ||
| 979 | 1527 | ||
| 980 | /* Handle errors */ | 1528 | /* Handle errors */ |
| 981 | if (port->type == PORT_SCI) { | 1529 | if (port->type == PORT_SCI) { |
| 982 | if (sci_handle_errors(port)) { | 1530 | if (sci_handle_errors(port)) { |
| 983 | /* discard character in rx buffer */ | 1531 | /* discard character in rx buffer */ |
| 984 | serial_port_in(port, SCxSR); | 1532 | serial_port_in(port, SCxSR); |
| 985 | serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 1533 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
| 986 | } | 1534 | } |
| 987 | } else { | 1535 | } else { |
| 988 | sci_handle_fifo_overrun(port); | 1536 | sci_handle_fifo_overrun(port); |
| 989 | sci_rx_interrupt(irq, ptr); | 1537 | if (!s->chan_rx) |
| 1538 | sci_receive_chars(ptr); | ||
| 990 | } | 1539 | } |
| 991 | 1540 | ||
| 992 | serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | 1541 | sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port)); |
| 993 | 1542 | ||
| 994 | /* Kick the transmission */ | 1543 | /* Kick the transmission */ |
| 995 | sci_tx_interrupt(irq, ptr); | 1544 | if (!s->chan_tx) |
| 1545 | sci_tx_interrupt(irq, ptr); | ||
| 996 | 1546 | ||
| 997 | return IRQ_HANDLED; | 1547 | return IRQ_HANDLED; |
| 998 | } | 1548 | } |
| @@ -1003,23 +1553,11 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr) | |||
| 1003 | 1553 | ||
| 1004 | /* Handle BREAKs */ | 1554 | /* Handle BREAKs */ |
| 1005 | sci_handle_breaks(port); | 1555 | sci_handle_breaks(port); |
| 1006 | serial_port_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); | 1556 | sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port)); |
| 1007 | 1557 | ||
| 1008 | return IRQ_HANDLED; | 1558 | return IRQ_HANDLED; |
| 1009 | } | 1559 | } |
| 1010 | 1560 | ||
| 1011 | static inline unsigned long port_rx_irq_mask(struct uart_port *port) | ||
| 1012 | { | ||
| 1013 | /* | ||
| 1014 | * Not all ports (such as SCIFA) will support REIE. Rather than | ||
| 1015 | * special-casing the port type, we check the port initialization | ||
| 1016 | * IRQ enable mask to see whether the IRQ is desired at all. If | ||
| 1017 | * it's unset, it's logically inferred that there's no point in | ||
| 1018 | * testing for it. | ||
| 1019 | */ | ||
| 1020 | return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); | ||
| 1021 | } | ||
| 1022 | |||
| 1023 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | 1561 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
| 1024 | { | 1562 | { |
| 1025 | unsigned short ssr_status, scr_status, err_enabled, orer_status = 0; | 1563 | unsigned short ssr_status, scr_status, err_enabled, orer_status = 0; |
| @@ -1048,11 +1586,8 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | |||
| 1048 | * DR flags | 1586 | * DR flags |
| 1049 | */ | 1587 | */ |
| 1050 | if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && | 1588 | if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && |
| 1051 | (scr_status & SCSCR_RIE)) { | 1589 | (scr_status & SCSCR_RIE)) |
| 1052 | if (port->type == PORT_SCIF || port->type == PORT_HSCIF) | ||
| 1053 | sci_handle_fifo_overrun(port); | ||
| 1054 | ret = sci_rx_interrupt(irq, ptr); | 1590 | ret = sci_rx_interrupt(irq, ptr); |
| 1055 | } | ||
| 1056 | 1591 | ||
| 1057 | /* Error Interrupt */ | 1592 | /* Error Interrupt */ |
| 1058 | if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) | 1593 | if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) |
| @@ -1063,8 +1598,10 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | |||
| 1063 | ret = sci_br_interrupt(irq, ptr); | 1598 | ret = sci_br_interrupt(irq, ptr); |
| 1064 | 1599 | ||
| 1065 | /* Overrun Interrupt */ | 1600 | /* Overrun Interrupt */ |
| 1066 | if (orer_status & s->overrun_mask) | 1601 | if (orer_status & s->overrun_mask) { |
| 1067 | sci_handle_fifo_overrun(port); | 1602 | sci_handle_fifo_overrun(port); |
| 1603 | ret = IRQ_HANDLED; | ||
| 1604 | } | ||
| 1068 | 1605 | ||
| 1069 | return ret; | 1606 | return ret; |
| 1070 | } | 1607 | } |
| @@ -1092,7 +1629,7 @@ static int sci_notifier(struct notifier_block *self, | |||
| 1092 | return NOTIFY_OK; | 1629 | return NOTIFY_OK; |
| 1093 | } | 1630 | } |
| 1094 | 1631 | ||
| 1095 | static struct sci_irq_desc { | 1632 | static const struct sci_irq_desc { |
| 1096 | const char *desc; | 1633 | const char *desc; |
| 1097 | irq_handler_t handler; | 1634 | irq_handler_t handler; |
| 1098 | } sci_irq_desc[] = { | 1635 | } sci_irq_desc[] = { |
| @@ -1134,7 +1671,7 @@ static int sci_request_irq(struct sci_port *port) | |||
| 1134 | int i, j, ret = 0; | 1671 | int i, j, ret = 0; |
| 1135 | 1672 | ||
| 1136 | for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) { | 1673 | for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) { |
| 1137 | struct sci_irq_desc *desc; | 1674 | const struct sci_irq_desc *desc; |
| 1138 | int irq; | 1675 | int irq; |
| 1139 | 1676 | ||
| 1140 | if (SCIx_IRQ_IS_MUXED(port)) { | 1677 | if (SCIx_IRQ_IS_MUXED(port)) { |
| @@ -1154,11 +1691,8 @@ static int sci_request_irq(struct sci_port *port) | |||
| 1154 | desc = sci_irq_desc + i; | 1691 | desc = sci_irq_desc + i; |
| 1155 | port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", | 1692 | port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", |
| 1156 | dev_name(up->dev), desc->desc); | 1693 | dev_name(up->dev), desc->desc); |
| 1157 | if (!port->irqstr[j]) { | 1694 | if (!port->irqstr[j]) |
| 1158 | dev_err(up->dev, "Failed to allocate %s IRQ string\n", | ||
| 1159 | desc->desc); | ||
| 1160 | goto out_nomem; | 1695 | goto out_nomem; |
| 1161 | } | ||
| 1162 | 1696 | ||
| 1163 | ret = request_irq(irq, desc->handler, up->irqflags, | 1697 | ret = request_irq(irq, desc->handler, up->irqflags, |
| 1164 | port->irqstr[j], port); | 1698 | port->irqstr[j], port); |
| @@ -1232,7 +1766,7 @@ static unsigned int sci_tx_empty(struct uart_port *port) | |||
| 1232 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | 1766 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 1233 | { | 1767 | { |
| 1234 | if (mctrl & TIOCM_LOOP) { | 1768 | if (mctrl & TIOCM_LOOP) { |
| 1235 | struct plat_sci_reg *reg; | 1769 | const struct plat_sci_reg *reg; |
| 1236 | 1770 | ||
| 1237 | /* | 1771 | /* |
| 1238 | * Standard loopback mode for SCFCR ports. | 1772 | * Standard loopback mode for SCFCR ports. |
| @@ -1254,356 +1788,10 @@ static unsigned int sci_get_mctrl(struct uart_port *port) | |||
| 1254 | return TIOCM_DSR | TIOCM_CAR; | 1788 | return TIOCM_DSR | TIOCM_CAR; |
| 1255 | } | 1789 | } |
| 1256 | 1790 | ||
| 1257 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 1258 | static void sci_dma_tx_complete(void *arg) | ||
| 1259 | { | ||
| 1260 | struct sci_port *s = arg; | ||
| 1261 | struct uart_port *port = &s->port; | ||
| 1262 | struct circ_buf *xmit = &port->state->xmit; | ||
| 1263 | unsigned long flags; | ||
| 1264 | |||
| 1265 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | ||
| 1266 | |||
| 1267 | spin_lock_irqsave(&port->lock, flags); | ||
| 1268 | |||
| 1269 | xmit->tail += sg_dma_len(&s->sg_tx); | ||
| 1270 | xmit->tail &= UART_XMIT_SIZE - 1; | ||
| 1271 | |||
| 1272 | port->icount.tx += sg_dma_len(&s->sg_tx); | ||
| 1273 | |||
| 1274 | async_tx_ack(s->desc_tx); | ||
| 1275 | s->desc_tx = NULL; | ||
| 1276 | |||
| 1277 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
| 1278 | uart_write_wakeup(port); | ||
| 1279 | |||
| 1280 | if (!uart_circ_empty(xmit)) { | ||
| 1281 | s->cookie_tx = 0; | ||
| 1282 | schedule_work(&s->work_tx); | ||
| 1283 | } else { | ||
| 1284 | s->cookie_tx = -EINVAL; | ||
| 1285 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1286 | u16 ctrl = serial_port_in(port, SCSCR); | ||
| 1287 | serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE); | ||
| 1288 | } | ||
| 1289 | } | ||
| 1290 | |||
| 1291 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1292 | } | ||
| 1293 | |||
| 1294 | /* Locking: called with port lock held */ | ||
| 1295 | static int sci_dma_rx_push(struct sci_port *s, size_t count) | ||
| 1296 | { | ||
| 1297 | struct uart_port *port = &s->port; | ||
| 1298 | struct tty_port *tport = &port->state->port; | ||
| 1299 | int i, active, room; | ||
| 1300 | |||
| 1301 | room = tty_buffer_request_room(tport, count); | ||
| 1302 | |||
| 1303 | if (s->active_rx == s->cookie_rx[0]) { | ||
| 1304 | active = 0; | ||
| 1305 | } else if (s->active_rx == s->cookie_rx[1]) { | ||
| 1306 | active = 1; | ||
| 1307 | } else { | ||
| 1308 | dev_err(port->dev, "cookie %d not found!\n", s->active_rx); | ||
| 1309 | return 0; | ||
| 1310 | } | ||
| 1311 | |||
| 1312 | if (room < count) | ||
| 1313 | dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n", | ||
| 1314 | count - room); | ||
| 1315 | if (!room) | ||
| 1316 | return room; | ||
| 1317 | |||
| 1318 | for (i = 0; i < room; i++) | ||
| 1319 | tty_insert_flip_char(tport, ((u8 *)sg_virt(&s->sg_rx[active]))[i], | ||
| 1320 | TTY_NORMAL); | ||
| 1321 | |||
| 1322 | port->icount.rx += room; | ||
| 1323 | |||
| 1324 | return room; | ||
| 1325 | } | ||
| 1326 | |||
| 1327 | static void sci_dma_rx_complete(void *arg) | ||
| 1328 | { | ||
| 1329 | struct sci_port *s = arg; | ||
| 1330 | struct uart_port *port = &s->port; | ||
| 1331 | unsigned long flags; | ||
| 1332 | int count; | ||
| 1333 | |||
| 1334 | dev_dbg(port->dev, "%s(%d) active #%d\n", | ||
| 1335 | __func__, port->line, s->active_rx); | ||
| 1336 | |||
| 1337 | spin_lock_irqsave(&port->lock, flags); | ||
| 1338 | |||
| 1339 | count = sci_dma_rx_push(s, s->buf_len_rx); | ||
| 1340 | |||
| 1341 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); | ||
| 1342 | |||
| 1343 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1344 | |||
| 1345 | if (count) | ||
| 1346 | tty_flip_buffer_push(&port->state->port); | ||
| 1347 | |||
| 1348 | schedule_work(&s->work_rx); | ||
| 1349 | } | ||
| 1350 | |||
| 1351 | static void sci_rx_dma_release(struct sci_port *s, bool enable_pio) | ||
| 1352 | { | ||
| 1353 | struct dma_chan *chan = s->chan_rx; | ||
| 1354 | struct uart_port *port = &s->port; | ||
| 1355 | |||
| 1356 | s->chan_rx = NULL; | ||
| 1357 | s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; | ||
| 1358 | dma_release_channel(chan); | ||
| 1359 | if (sg_dma_address(&s->sg_rx[0])) | ||
| 1360 | dma_free_coherent(port->dev, s->buf_len_rx * 2, | ||
| 1361 | sg_virt(&s->sg_rx[0]), sg_dma_address(&s->sg_rx[0])); | ||
| 1362 | if (enable_pio) | ||
| 1363 | sci_start_rx(port); | ||
| 1364 | } | ||
| 1365 | |||
| 1366 | static void sci_tx_dma_release(struct sci_port *s, bool enable_pio) | ||
| 1367 | { | ||
| 1368 | struct dma_chan *chan = s->chan_tx; | ||
| 1369 | struct uart_port *port = &s->port; | ||
| 1370 | |||
| 1371 | s->chan_tx = NULL; | ||
| 1372 | s->cookie_tx = -EINVAL; | ||
| 1373 | dma_release_channel(chan); | ||
| 1374 | if (enable_pio) | ||
| 1375 | sci_start_tx(port); | ||
| 1376 | } | ||
| 1377 | |||
| 1378 | static void sci_submit_rx(struct sci_port *s) | ||
| 1379 | { | ||
| 1380 | struct dma_chan *chan = s->chan_rx; | ||
| 1381 | int i; | ||
| 1382 | |||
| 1383 | for (i = 0; i < 2; i++) { | ||
| 1384 | struct scatterlist *sg = &s->sg_rx[i]; | ||
| 1385 | struct dma_async_tx_descriptor *desc; | ||
| 1386 | |||
| 1387 | desc = dmaengine_prep_slave_sg(chan, | ||
| 1388 | sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT); | ||
| 1389 | |||
| 1390 | if (desc) { | ||
| 1391 | s->desc_rx[i] = desc; | ||
| 1392 | desc->callback = sci_dma_rx_complete; | ||
| 1393 | desc->callback_param = s; | ||
| 1394 | s->cookie_rx[i] = desc->tx_submit(desc); | ||
| 1395 | } | ||
| 1396 | |||
| 1397 | if (!desc || s->cookie_rx[i] < 0) { | ||
| 1398 | if (i) { | ||
| 1399 | async_tx_ack(s->desc_rx[0]); | ||
| 1400 | s->cookie_rx[0] = -EINVAL; | ||
| 1401 | } | ||
| 1402 | if (desc) { | ||
| 1403 | async_tx_ack(desc); | ||
| 1404 | s->cookie_rx[i] = -EINVAL; | ||
| 1405 | } | ||
| 1406 | dev_warn(s->port.dev, | ||
| 1407 | "failed to re-start DMA, using PIO\n"); | ||
| 1408 | sci_rx_dma_release(s, true); | ||
| 1409 | return; | ||
| 1410 | } | ||
| 1411 | dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", | ||
| 1412 | __func__, s->cookie_rx[i], i); | ||
| 1413 | } | ||
| 1414 | |||
| 1415 | s->active_rx = s->cookie_rx[0]; | ||
| 1416 | |||
| 1417 | dma_async_issue_pending(chan); | ||
| 1418 | } | ||
| 1419 | |||
| 1420 | static void work_fn_rx(struct work_struct *work) | ||
| 1421 | { | ||
| 1422 | struct sci_port *s = container_of(work, struct sci_port, work_rx); | ||
| 1423 | struct uart_port *port = &s->port; | ||
| 1424 | struct dma_async_tx_descriptor *desc; | ||
| 1425 | int new; | ||
| 1426 | |||
| 1427 | if (s->active_rx == s->cookie_rx[0]) { | ||
| 1428 | new = 0; | ||
| 1429 | } else if (s->active_rx == s->cookie_rx[1]) { | ||
| 1430 | new = 1; | ||
| 1431 | } else { | ||
| 1432 | dev_err(port->dev, "cookie %d not found!\n", s->active_rx); | ||
| 1433 | return; | ||
| 1434 | } | ||
| 1435 | desc = s->desc_rx[new]; | ||
| 1436 | |||
| 1437 | if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) != | ||
| 1438 | DMA_COMPLETE) { | ||
| 1439 | /* Handle incomplete DMA receive */ | ||
| 1440 | struct dma_chan *chan = s->chan_rx; | ||
| 1441 | struct shdma_desc *sh_desc = container_of(desc, | ||
| 1442 | struct shdma_desc, async_tx); | ||
| 1443 | unsigned long flags; | ||
| 1444 | int count; | ||
| 1445 | |||
| 1446 | dmaengine_terminate_all(chan); | ||
| 1447 | dev_dbg(port->dev, "Read %zu bytes with cookie %d\n", | ||
| 1448 | sh_desc->partial, sh_desc->cookie); | ||
| 1449 | |||
| 1450 | spin_lock_irqsave(&port->lock, flags); | ||
| 1451 | count = sci_dma_rx_push(s, sh_desc->partial); | ||
| 1452 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 1453 | |||
| 1454 | if (count) | ||
| 1455 | tty_flip_buffer_push(&port->state->port); | ||
| 1456 | |||
| 1457 | sci_submit_rx(s); | ||
| 1458 | |||
| 1459 | return; | ||
| 1460 | } | ||
| 1461 | |||
| 1462 | s->cookie_rx[new] = desc->tx_submit(desc); | ||
| 1463 | if (s->cookie_rx[new] < 0) { | ||
| 1464 | dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); | ||
| 1465 | sci_rx_dma_release(s, true); | ||
| 1466 | return; | ||
| 1467 | } | ||
| 1468 | |||
| 1469 | s->active_rx = s->cookie_rx[!new]; | ||
| 1470 | |||
| 1471 | dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", | ||
| 1472 | __func__, s->cookie_rx[new], new, s->active_rx); | ||
| 1473 | } | ||
| 1474 | |||
| 1475 | static void work_fn_tx(struct work_struct *work) | ||
| 1476 | { | ||
| 1477 | struct sci_port *s = container_of(work, struct sci_port, work_tx); | ||
| 1478 | struct dma_async_tx_descriptor *desc; | ||
| 1479 | struct dma_chan *chan = s->chan_tx; | ||
| 1480 | struct uart_port *port = &s->port; | ||
| 1481 | struct circ_buf *xmit = &port->state->xmit; | ||
| 1482 | struct scatterlist *sg = &s->sg_tx; | ||
| 1483 | |||
| 1484 | /* | ||
| 1485 | * DMA is idle now. | ||
| 1486 | * Port xmit buffer is already mapped, and it is one page... Just adjust | ||
| 1487 | * offsets and lengths. Since it is a circular buffer, we have to | ||
| 1488 | * transmit till the end, and then the rest. Take the port lock to get a | ||
| 1489 | * consistent xmit buffer state. | ||
| 1490 | */ | ||
| 1491 | spin_lock_irq(&port->lock); | ||
| 1492 | sg->offset = xmit->tail & (UART_XMIT_SIZE - 1); | ||
| 1493 | sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) + | ||
| 1494 | sg->offset; | ||
| 1495 | sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE), | ||
| 1496 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE)); | ||
| 1497 | spin_unlock_irq(&port->lock); | ||
| 1498 | |||
| 1499 | BUG_ON(!sg_dma_len(sg)); | ||
| 1500 | |||
| 1501 | desc = dmaengine_prep_slave_sg(chan, | ||
| 1502 | sg, s->sg_len_tx, DMA_MEM_TO_DEV, | ||
| 1503 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
| 1504 | if (!desc) { | ||
| 1505 | /* switch to PIO */ | ||
| 1506 | sci_tx_dma_release(s, true); | ||
| 1507 | return; | ||
| 1508 | } | ||
| 1509 | |||
| 1510 | dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE); | ||
| 1511 | |||
| 1512 | spin_lock_irq(&port->lock); | ||
| 1513 | s->desc_tx = desc; | ||
| 1514 | desc->callback = sci_dma_tx_complete; | ||
| 1515 | desc->callback_param = s; | ||
| 1516 | spin_unlock_irq(&port->lock); | ||
| 1517 | s->cookie_tx = desc->tx_submit(desc); | ||
| 1518 | if (s->cookie_tx < 0) { | ||
| 1519 | dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); | ||
| 1520 | /* switch to PIO */ | ||
| 1521 | sci_tx_dma_release(s, true); | ||
| 1522 | return; | ||
| 1523 | } | ||
| 1524 | |||
| 1525 | dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", | ||
| 1526 | __func__, xmit->buf, xmit->tail, xmit->head, s->cookie_tx); | ||
| 1527 | |||
| 1528 | dma_async_issue_pending(chan); | ||
| 1529 | } | ||
| 1530 | #endif | ||
| 1531 | |||
| 1532 | static void sci_start_tx(struct uart_port *port) | ||
| 1533 | { | ||
| 1534 | struct sci_port *s = to_sci_port(port); | ||
| 1535 | unsigned short ctrl; | ||
| 1536 | |||
| 1537 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 1538 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1539 | u16 new, scr = serial_port_in(port, SCSCR); | ||
| 1540 | if (s->chan_tx) | ||
| 1541 | new = scr | SCSCR_TDRQE; | ||
| 1542 | else | ||
| 1543 | new = scr & ~SCSCR_TDRQE; | ||
| 1544 | if (new != scr) | ||
| 1545 | serial_port_out(port, SCSCR, new); | ||
| 1546 | } | ||
| 1547 | |||
| 1548 | if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && | ||
| 1549 | s->cookie_tx < 0) { | ||
| 1550 | s->cookie_tx = 0; | ||
| 1551 | schedule_work(&s->work_tx); | ||
| 1552 | } | ||
| 1553 | #endif | ||
| 1554 | |||
| 1555 | if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1556 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ | ||
| 1557 | ctrl = serial_port_in(port, SCSCR); | ||
| 1558 | serial_port_out(port, SCSCR, ctrl | SCSCR_TIE); | ||
| 1559 | } | ||
| 1560 | } | ||
| 1561 | |||
| 1562 | static void sci_stop_tx(struct uart_port *port) | ||
| 1563 | { | ||
| 1564 | unsigned short ctrl; | ||
| 1565 | |||
| 1566 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | ||
| 1567 | ctrl = serial_port_in(port, SCSCR); | ||
| 1568 | |||
| 1569 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 1570 | ctrl &= ~SCSCR_TDRQE; | ||
| 1571 | |||
| 1572 | ctrl &= ~SCSCR_TIE; | ||
| 1573 | |||
| 1574 | serial_port_out(port, SCSCR, ctrl); | ||
| 1575 | } | ||
| 1576 | |||
| 1577 | static void sci_start_rx(struct uart_port *port) | ||
| 1578 | { | ||
| 1579 | unsigned short ctrl; | ||
| 1580 | |||
| 1581 | ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port); | ||
| 1582 | |||
| 1583 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 1584 | ctrl &= ~SCSCR_RDRQE; | ||
| 1585 | |||
| 1586 | serial_port_out(port, SCSCR, ctrl); | ||
| 1587 | } | ||
| 1588 | |||
| 1589 | static void sci_stop_rx(struct uart_port *port) | ||
| 1590 | { | ||
| 1591 | unsigned short ctrl; | ||
| 1592 | |||
| 1593 | ctrl = serial_port_in(port, SCSCR); | ||
| 1594 | |||
| 1595 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
| 1596 | ctrl &= ~SCSCR_RDRQE; | ||
| 1597 | |||
| 1598 | ctrl &= ~port_rx_irq_mask(port); | ||
| 1599 | |||
| 1600 | serial_port_out(port, SCSCR, ctrl); | ||
| 1601 | } | ||
| 1602 | |||
| 1603 | static void sci_break_ctl(struct uart_port *port, int break_state) | 1791 | static void sci_break_ctl(struct uart_port *port, int break_state) |
| 1604 | { | 1792 | { |
| 1605 | struct sci_port *s = to_sci_port(port); | 1793 | struct sci_port *s = to_sci_port(port); |
| 1606 | struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR; | 1794 | const struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR; |
| 1607 | unsigned short scscr, scsptr; | 1795 | unsigned short scscr, scsptr; |
| 1608 | 1796 | ||
| 1609 | /* check wheter the port has SCSPTR */ | 1797 | /* check wheter the port has SCSPTR */ |
| @@ -1630,142 +1818,6 @@ static void sci_break_ctl(struct uart_port *port, int break_state) | |||
| 1630 | serial_port_out(port, SCSCR, scscr); | 1818 | serial_port_out(port, SCSCR, scscr); |
| 1631 | } | 1819 | } |
| 1632 | 1820 | ||
| 1633 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 1634 | static bool filter(struct dma_chan *chan, void *slave) | ||
| 1635 | { | ||
| 1636 | struct sh_dmae_slave *param = slave; | ||
| 1637 | |||
| 1638 | dev_dbg(chan->device->dev, "%s: slave ID %d\n", | ||
| 1639 | __func__, param->shdma_slave.slave_id); | ||
| 1640 | |||
| 1641 | chan->private = ¶m->shdma_slave; | ||
| 1642 | return true; | ||
| 1643 | } | ||
| 1644 | |||
| 1645 | static void rx_timer_fn(unsigned long arg) | ||
| 1646 | { | ||
| 1647 | struct sci_port *s = (struct sci_port *)arg; | ||
| 1648 | struct uart_port *port = &s->port; | ||
| 1649 | u16 scr = serial_port_in(port, SCSCR); | ||
| 1650 | |||
| 1651 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
| 1652 | scr &= ~SCSCR_RDRQE; | ||
| 1653 | enable_irq(s->irqs[SCIx_RXI_IRQ]); | ||
| 1654 | } | ||
| 1655 | serial_port_out(port, SCSCR, scr | SCSCR_RIE); | ||
| 1656 | dev_dbg(port->dev, "DMA Rx timed out\n"); | ||
| 1657 | schedule_work(&s->work_rx); | ||
| 1658 | } | ||
| 1659 | |||
| 1660 | static void sci_request_dma(struct uart_port *port) | ||
| 1661 | { | ||
| 1662 | struct sci_port *s = to_sci_port(port); | ||
| 1663 | struct sh_dmae_slave *param; | ||
| 1664 | struct dma_chan *chan; | ||
| 1665 | dma_cap_mask_t mask; | ||
| 1666 | int nent; | ||
| 1667 | |||
| 1668 | dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); | ||
| 1669 | |||
| 1670 | if (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0) | ||
| 1671 | return; | ||
| 1672 | |||
| 1673 | dma_cap_zero(mask); | ||
| 1674 | dma_cap_set(DMA_SLAVE, mask); | ||
| 1675 | |||
| 1676 | param = &s->param_tx; | ||
| 1677 | |||
| 1678 | /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */ | ||
| 1679 | param->shdma_slave.slave_id = s->cfg->dma_slave_tx; | ||
| 1680 | |||
| 1681 | s->cookie_tx = -EINVAL; | ||
| 1682 | chan = dma_request_channel(mask, filter, param); | ||
| 1683 | dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); | ||
| 1684 | if (chan) { | ||
| 1685 | s->chan_tx = chan; | ||
| 1686 | sg_init_table(&s->sg_tx, 1); | ||
| 1687 | /* UART circular tx buffer is an aligned page. */ | ||
| 1688 | BUG_ON((uintptr_t)port->state->xmit.buf & ~PAGE_MASK); | ||
| 1689 | sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf), | ||
| 1690 | UART_XMIT_SIZE, | ||
| 1691 | (uintptr_t)port->state->xmit.buf & ~PAGE_MASK); | ||
| 1692 | nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE); | ||
| 1693 | if (!nent) | ||
| 1694 | sci_tx_dma_release(s, false); | ||
| 1695 | else | ||
| 1696 | dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", | ||
| 1697 | __func__, | ||
| 1698 | sg_dma_len(&s->sg_tx), port->state->xmit.buf, | ||
| 1699 | &sg_dma_address(&s->sg_tx)); | ||
| 1700 | |||
| 1701 | s->sg_len_tx = nent; | ||
| 1702 | |||
| 1703 | INIT_WORK(&s->work_tx, work_fn_tx); | ||
| 1704 | } | ||
| 1705 | |||
| 1706 | param = &s->param_rx; | ||
| 1707 | |||
| 1708 | /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */ | ||
| 1709 | param->shdma_slave.slave_id = s->cfg->dma_slave_rx; | ||
| 1710 | |||
| 1711 | chan = dma_request_channel(mask, filter, param); | ||
| 1712 | dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); | ||
| 1713 | if (chan) { | ||
| 1714 | dma_addr_t dma[2]; | ||
| 1715 | void *buf[2]; | ||
| 1716 | int i; | ||
| 1717 | |||
| 1718 | s->chan_rx = chan; | ||
| 1719 | |||
| 1720 | s->buf_len_rx = 2 * max(16, (int)port->fifosize); | ||
| 1721 | buf[0] = dma_alloc_coherent(port->dev, s->buf_len_rx * 2, | ||
| 1722 | &dma[0], GFP_KERNEL); | ||
| 1723 | |||
| 1724 | if (!buf[0]) { | ||
| 1725 | dev_warn(port->dev, | ||
| 1726 | "failed to allocate dma buffer, using PIO\n"); | ||
| 1727 | sci_rx_dma_release(s, true); | ||
| 1728 | return; | ||
| 1729 | } | ||
| 1730 | |||
| 1731 | buf[1] = buf[0] + s->buf_len_rx; | ||
| 1732 | dma[1] = dma[0] + s->buf_len_rx; | ||
| 1733 | |||
| 1734 | for (i = 0; i < 2; i++) { | ||
| 1735 | struct scatterlist *sg = &s->sg_rx[i]; | ||
| 1736 | |||
| 1737 | sg_init_table(sg, 1); | ||
| 1738 | sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx, | ||
| 1739 | (uintptr_t)buf[i] & ~PAGE_MASK); | ||
| 1740 | sg_dma_address(sg) = dma[i]; | ||
| 1741 | } | ||
| 1742 | |||
| 1743 | INIT_WORK(&s->work_rx, work_fn_rx); | ||
| 1744 | setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s); | ||
| 1745 | |||
| 1746 | sci_submit_rx(s); | ||
| 1747 | } | ||
| 1748 | } | ||
| 1749 | |||
| 1750 | static void sci_free_dma(struct uart_port *port) | ||
| 1751 | { | ||
| 1752 | struct sci_port *s = to_sci_port(port); | ||
| 1753 | |||
| 1754 | if (s->chan_tx) | ||
| 1755 | sci_tx_dma_release(s, false); | ||
| 1756 | if (s->chan_rx) | ||
| 1757 | sci_rx_dma_release(s, false); | ||
| 1758 | } | ||
| 1759 | #else | ||
| 1760 | static inline void sci_request_dma(struct uart_port *port) | ||
| 1761 | { | ||
| 1762 | } | ||
| 1763 | |||
| 1764 | static inline void sci_free_dma(struct uart_port *port) | ||
| 1765 | { | ||
| 1766 | } | ||
| 1767 | #endif | ||
| 1768 | |||
| 1769 | static int sci_startup(struct uart_port *port) | 1821 | static int sci_startup(struct uart_port *port) |
| 1770 | { | 1822 | { |
| 1771 | struct sci_port *s = to_sci_port(port); | 1823 | struct sci_port *s = to_sci_port(port); |
| @@ -1800,6 +1852,14 @@ static void sci_shutdown(struct uart_port *port) | |||
| 1800 | sci_stop_tx(port); | 1852 | sci_stop_tx(port); |
| 1801 | spin_unlock_irqrestore(&port->lock, flags); | 1853 | spin_unlock_irqrestore(&port->lock, flags); |
| 1802 | 1854 | ||
| 1855 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
| 1856 | if (s->chan_rx) { | ||
| 1857 | dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, | ||
| 1858 | port->line); | ||
| 1859 | del_timer_sync(&s->rx_timer); | ||
| 1860 | } | ||
| 1861 | #endif | ||
| 1862 | |||
| 1803 | sci_free_dma(port); | 1863 | sci_free_dma(port); |
| 1804 | sci_free_irq(s); | 1864 | sci_free_irq(s); |
| 1805 | } | 1865 | } |
| @@ -1892,7 +1952,7 @@ static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, | |||
| 1892 | 1952 | ||
| 1893 | static void sci_reset(struct uart_port *port) | 1953 | static void sci_reset(struct uart_port *port) |
| 1894 | { | 1954 | { |
| 1895 | struct plat_sci_reg *reg; | 1955 | const struct plat_sci_reg *reg; |
| 1896 | unsigned int status; | 1956 | unsigned int status; |
| 1897 | 1957 | ||
| 1898 | do { | 1958 | do { |
| @@ -1910,7 +1970,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1910 | struct ktermios *old) | 1970 | struct ktermios *old) |
| 1911 | { | 1971 | { |
| 1912 | struct sci_port *s = to_sci_port(port); | 1972 | struct sci_port *s = to_sci_port(port); |
| 1913 | struct plat_sci_reg *reg; | 1973 | const struct plat_sci_reg *reg; |
| 1914 | unsigned int baud, smr_val = 0, max_baud, cks = 0; | 1974 | unsigned int baud, smr_val = 0, max_baud, cks = 0; |
| 1915 | int t = -1; | 1975 | int t = -1; |
| 1916 | unsigned int srr = 15; | 1976 | unsigned int srr = 15; |
| @@ -1951,7 +2011,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1951 | 2011 | ||
| 1952 | sci_reset(port); | 2012 | sci_reset(port); |
| 1953 | 2013 | ||
| 1954 | smr_val |= serial_port_in(port, SCSMR) & 3; | 2014 | smr_val |= serial_port_in(port, SCSMR) & SCSMR_CKS; |
| 1955 | 2015 | ||
| 1956 | uart_update_timeout(port, termios->c_cflag, baud); | 2016 | uart_update_timeout(port, termios->c_cflag, baud); |
| 1957 | 2017 | ||
| @@ -1996,13 +2056,13 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1996 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | 2056 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 1997 | /* | 2057 | /* |
| 1998 | * Calculate delay for 2 DMA buffers (4 FIFO). | 2058 | * Calculate delay for 2 DMA buffers (4 FIFO). |
| 1999 | * See drivers/serial/serial_core.c::uart_update_timeout(). With 10 | 2059 | * See serial_core.c::uart_update_timeout(). |
| 2000 | * bits (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function | 2060 | * With 10 bits (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above |
| 2001 | * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)." | 2061 | * function calculates 1 jiffie for the data plus 5 jiffies for the |
| 2002 | * Then below we calculate 5 jiffies (20ms) for 2 DMA buffers (4 FIFO | 2062 | * "slop(e)." Then below we calculate 5 jiffies (20ms) for 2 DMA |
| 2003 | * sizes), but when performing a faster transfer, value obtained by | 2063 | * buffers (4 FIFO sizes), but when performing a faster transfer, the |
| 2004 | * this formula is may not enough. Therefore, if value is smaller than | 2064 | * value obtained by this formula is too small. Therefore, if the value |
| 2005 | * 20msec, this sets 20msec as timeout of DMA. | 2065 | * is smaller than 20ms, use 20ms as the timeout value for DMA. |
| 2006 | */ | 2066 | */ |
| 2007 | if (s->chan_rx) { | 2067 | if (s->chan_rx) { |
| 2008 | unsigned int bits; | 2068 | unsigned int bits; |
| @@ -2187,7 +2247,6 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2187 | { | 2247 | { |
| 2188 | struct uart_port *port = &sci_port->port; | 2248 | struct uart_port *port = &sci_port->port; |
| 2189 | const struct resource *res; | 2249 | const struct resource *res; |
| 2190 | unsigned int sampling_rate; | ||
| 2191 | unsigned int i; | 2250 | unsigned int i; |
| 2192 | int ret; | 2251 | int ret; |
| 2193 | 2252 | ||
| @@ -2232,37 +2291,37 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2232 | port->fifosize = 256; | 2291 | port->fifosize = 256; |
| 2233 | sci_port->overrun_reg = SCxSR; | 2292 | sci_port->overrun_reg = SCxSR; |
| 2234 | sci_port->overrun_mask = SCIFA_ORER; | 2293 | sci_port->overrun_mask = SCIFA_ORER; |
| 2235 | sampling_rate = 16; | 2294 | sci_port->sampling_rate = 16; |
| 2236 | break; | 2295 | break; |
| 2237 | case PORT_HSCIF: | 2296 | case PORT_HSCIF: |
| 2238 | port->fifosize = 128; | 2297 | port->fifosize = 128; |
| 2239 | sampling_rate = 0; | ||
| 2240 | sci_port->overrun_reg = SCLSR; | 2298 | sci_port->overrun_reg = SCLSR; |
| 2241 | sci_port->overrun_mask = SCLSR_ORER; | 2299 | sci_port->overrun_mask = SCLSR_ORER; |
| 2300 | sci_port->sampling_rate = 0; | ||
| 2242 | break; | 2301 | break; |
| 2243 | case PORT_SCIFA: | 2302 | case PORT_SCIFA: |
| 2244 | port->fifosize = 64; | 2303 | port->fifosize = 64; |
| 2245 | sci_port->overrun_reg = SCxSR; | 2304 | sci_port->overrun_reg = SCxSR; |
| 2246 | sci_port->overrun_mask = SCIFA_ORER; | 2305 | sci_port->overrun_mask = SCIFA_ORER; |
| 2247 | sampling_rate = 16; | 2306 | sci_port->sampling_rate = 16; |
| 2248 | break; | 2307 | break; |
| 2249 | case PORT_SCIF: | 2308 | case PORT_SCIF: |
| 2250 | port->fifosize = 16; | 2309 | port->fifosize = 16; |
| 2251 | if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) { | 2310 | if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) { |
| 2252 | sci_port->overrun_reg = SCxSR; | 2311 | sci_port->overrun_reg = SCxSR; |
| 2253 | sci_port->overrun_mask = SCIFA_ORER; | 2312 | sci_port->overrun_mask = SCIFA_ORER; |
| 2254 | sampling_rate = 16; | 2313 | sci_port->sampling_rate = 16; |
| 2255 | } else { | 2314 | } else { |
| 2256 | sci_port->overrun_reg = SCLSR; | 2315 | sci_port->overrun_reg = SCLSR; |
| 2257 | sci_port->overrun_mask = SCLSR_ORER; | 2316 | sci_port->overrun_mask = SCLSR_ORER; |
| 2258 | sampling_rate = 32; | 2317 | sci_port->sampling_rate = 32; |
| 2259 | } | 2318 | } |
| 2260 | break; | 2319 | break; |
| 2261 | default: | 2320 | default: |
| 2262 | port->fifosize = 1; | 2321 | port->fifosize = 1; |
| 2263 | sci_port->overrun_reg = SCxSR; | 2322 | sci_port->overrun_reg = SCxSR; |
| 2264 | sci_port->overrun_mask = SCI_ORER; | 2323 | sci_port->overrun_mask = SCI_ORER; |
| 2265 | sampling_rate = 32; | 2324 | sci_port->sampling_rate = 32; |
| 2266 | break; | 2325 | break; |
| 2267 | } | 2326 | } |
| 2268 | 2327 | ||
| @@ -2270,8 +2329,8 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2270 | * match the SoC datasheet, this should be investigated. Let platform | 2329 | * match the SoC datasheet, this should be investigated. Let platform |
| 2271 | * data override the sampling rate for now. | 2330 | * data override the sampling rate for now. |
| 2272 | */ | 2331 | */ |
| 2273 | sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate | 2332 | if (p->sampling_rate) |
| 2274 | : sampling_rate; | 2333 | sci_port->sampling_rate = p->sampling_rate; |
| 2275 | 2334 | ||
| 2276 | if (!early) { | 2335 | if (!early) { |
| 2277 | sci_port->iclk = clk_get(&dev->dev, "sci_ick"); | 2336 | sci_port->iclk = clk_get(&dev->dev, "sci_ick"); |
| @@ -2303,15 +2362,22 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2303 | /* | 2362 | /* |
| 2304 | * Establish some sensible defaults for the error detection. | 2363 | * Establish some sensible defaults for the error detection. |
| 2305 | */ | 2364 | */ |
| 2306 | sci_port->error_mask = (p->type == PORT_SCI) ? | 2365 | if (p->type == PORT_SCI) { |
| 2307 | SCI_DEFAULT_ERROR_MASK : SCIF_DEFAULT_ERROR_MASK; | 2366 | sci_port->error_mask = SCI_DEFAULT_ERROR_MASK; |
| 2367 | sci_port->error_clear = SCI_ERROR_CLEAR; | ||
| 2368 | } else { | ||
| 2369 | sci_port->error_mask = SCIF_DEFAULT_ERROR_MASK; | ||
| 2370 | sci_port->error_clear = SCIF_ERROR_CLEAR; | ||
| 2371 | } | ||
| 2308 | 2372 | ||
| 2309 | /* | 2373 | /* |
| 2310 | * Make the error mask inclusive of overrun detection, if | 2374 | * Make the error mask inclusive of overrun detection, if |
| 2311 | * supported. | 2375 | * supported. |
| 2312 | */ | 2376 | */ |
| 2313 | if (sci_port->overrun_reg == SCxSR) | 2377 | if (sci_port->overrun_reg == SCxSR) { |
| 2314 | sci_port->error_mask |= sci_port->overrun_mask; | 2378 | sci_port->error_mask |= sci_port->overrun_mask; |
| 2379 | sci_port->error_clear &= ~sci_port->overrun_mask; | ||
| 2380 | } | ||
| 2315 | 2381 | ||
| 2316 | port->type = p->type; | 2382 | port->type = p->type; |
| 2317 | port->flags = UPF_FIXED_PORT | p->flags; | 2383 | port->flags = UPF_FIXED_PORT | p->flags; |
| @@ -2564,10 +2630,8 @@ sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id) | |||
| 2564 | info = match->data; | 2630 | info = match->data; |
| 2565 | 2631 | ||
| 2566 | p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); | 2632 | p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); |
| 2567 | if (!p) { | 2633 | if (!p) |
| 2568 | dev_err(&pdev->dev, "failed to allocate DT config data\n"); | ||
| 2569 | return NULL; | 2634 | return NULL; |
| 2570 | } | ||
| 2571 | 2635 | ||
| 2572 | /* Get the line number for the aliases node. */ | 2636 | /* Get the line number for the aliases node. */ |
| 2573 | id = of_alias_get_id(np, "serial"); | 2637 | id = of_alias_get_id(np, "serial"); |
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index 3393f67b4e84..bf69bbdcc1f9 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h | |||
| @@ -54,10 +54,10 @@ enum { | |||
| 54 | 54 | ||
| 55 | #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) | 55 | #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) |
| 56 | 56 | ||
| 57 | #define SCI_RDxF_CLEAR ~(SCI_RESERVED | SCI_RDRF) | 57 | #define SCI_RDxF_CLEAR (u32)(~(SCI_RESERVED | SCI_RDRF)) |
| 58 | #define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) | 58 | #define SCI_ERROR_CLEAR (u32)(~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)) |
| 59 | #define SCI_TDxE_CLEAR ~(SCI_RESERVED | SCI_TEND | SCI_TDRE) | 59 | #define SCI_TDxE_CLEAR (u32)(~(SCI_RESERVED | SCI_TEND | SCI_TDRE)) |
| 60 | #define SCI_BREAK_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) | 60 | #define SCI_BREAK_CLEAR (u32)(~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)) |
| 61 | 61 | ||
| 62 | /* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */ | 62 | /* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */ |
| 63 | #define SCIF_ER BIT(7) /* Receive Error */ | 63 | #define SCIF_ER BIT(7) /* Receive Error */ |
| @@ -76,10 +76,10 @@ enum { | |||
| 76 | 76 | ||
| 77 | #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_BRK | SCIF_ER) | 77 | #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_BRK | SCIF_ER) |
| 78 | 78 | ||
| 79 | #define SCIF_RDxF_CLEAR ~(SCIF_DR | SCIF_RDF) | 79 | #define SCIF_RDxF_CLEAR (u32)(~(SCIF_DR | SCIF_RDF)) |
| 80 | #define SCIF_ERROR_CLEAR ~(SCIFA_ORER | SCIF_PER | SCIF_FER | SCIF_ER) | 80 | #define SCIF_ERROR_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_ER)) |
| 81 | #define SCIF_TDxE_CLEAR ~(SCIF_TDFE) | 81 | #define SCIF_TDxE_CLEAR (u32)(~(SCIF_TDFE)) |
| 82 | #define SCIF_BREAK_CLEAR ~(SCIF_PER | SCIF_FER | SCIF_BRK) | 82 | #define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK)) |
| 83 | 83 | ||
| 84 | /* SCFCR (FIFO Control Register) */ | 84 | /* SCFCR (FIFO Control Register) */ |
| 85 | #define SCFCR_MCE BIT(3) /* Modem Control Enable */ | 85 | #define SCFCR_MCE BIT(3) /* Modem Control Enable */ |
| @@ -119,28 +119,11 @@ enum { | |||
| 119 | 119 | ||
| 120 | #define SCxSR_ERRORS(port) (to_sci_port(port)->error_mask) | 120 | #define SCxSR_ERRORS(port) (to_sci_port(port)->error_mask) |
| 121 | 121 | ||
| 122 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 122 | #define SCxSR_RDxF_CLEAR(port) \ |
| 123 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 123 | (((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR) |
| 124 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 124 | #define SCxSR_ERROR_CLEAR(port) \ |
| 125 | defined(CONFIG_ARCH_SH73A0) || \ | 125 | (to_sci_port(port)->error_clear) |
| 126 | defined(CONFIG_ARCH_R8A7740) | 126 | #define SCxSR_TDxE_CLEAR(port) \ |
| 127 | 127 | (((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR) | |
| 128 | # define SCxSR_RDxF_CLEAR(port) \ | 128 | #define SCxSR_BREAK_CLEAR(port) \ |
| 129 | (serial_port_in(port, SCxSR) & SCIF_RDxF_CLEAR) | 129 | (((port)->type == PORT_SCI) ? SCI_BREAK_CLEAR : SCIF_BREAK_CLEAR) |
| 130 | # define SCxSR_ERROR_CLEAR(port) \ | ||
| 131 | (serial_port_in(port, SCxSR) & SCIF_ERROR_CLEAR) | ||
| 132 | # define SCxSR_TDxE_CLEAR(port) \ | ||
| 133 | (serial_port_in(port, SCxSR) & SCIF_TDxE_CLEAR) | ||
| 134 | # define SCxSR_BREAK_CLEAR(port) \ | ||
| 135 | (serial_port_in(port, SCxSR) & SCIF_BREAK_CLEAR) | ||
| 136 | #else | ||
| 137 | # define SCxSR_RDxF_CLEAR(port) \ | ||
| 138 | ((((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR) & 0xff) | ||
| 139 | # define SCxSR_ERROR_CLEAR(port) \ | ||
| 140 | ((((port)->type == PORT_SCI) ? SCI_ERROR_CLEAR : SCIF_ERROR_CLEAR) & 0xff) | ||
| 141 | # define SCxSR_TDxE_CLEAR(port) \ | ||
| 142 | ((((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR) & 0xff) | ||
| 143 | # define SCxSR_BREAK_CLEAR(port) \ | ||
| 144 | ((((port)->type == PORT_SCI) ? SCI_BREAK_CLEAR : SCIF_BREAK_CLEAR) & 0xff) | ||
| 145 | #endif | ||
| 146 | |||
diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c index 3866516c2926..9dbae01d41ce 100644 --- a/drivers/tty/serial/sprd_serial.c +++ b/drivers/tty/serial/sprd_serial.c | |||
| @@ -782,6 +782,7 @@ static const struct of_device_id serial_ids[] = { | |||
| 782 | {.compatible = "sprd,sc9836-uart",}, | 782 | {.compatible = "sprd,sc9836-uart",}, |
| 783 | {} | 783 | {} |
| 784 | }; | 784 | }; |
| 785 | MODULE_DEVICE_TABLE(of, serial_ids); | ||
| 785 | 786 | ||
| 786 | static struct platform_driver sprd_platform_driver = { | 787 | static struct platform_driver sprd_platform_driver = { |
| 787 | .probe = sprd_probe, | 788 | .probe = sprd_probe, |
diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c index d625664ce1b5..2d78cb3627ae 100644 --- a/drivers/tty/serial/st-asc.c +++ b/drivers/tty/serial/st-asc.c | |||
| @@ -430,7 +430,7 @@ static void asc_break_ctl(struct uart_port *port, int break_state) | |||
| 430 | */ | 430 | */ |
| 431 | static int asc_startup(struct uart_port *port) | 431 | static int asc_startup(struct uart_port *port) |
| 432 | { | 432 | { |
| 433 | if (request_irq(port->irq, asc_interrupt, IRQF_NO_SUSPEND, | 433 | if (request_irq(port->irq, asc_interrupt, 0, |
| 434 | asc_port_name(port), port)) { | 434 | asc_port_name(port), port)) { |
| 435 | dev_err(port->dev, "cannot allocate irq.\n"); | 435 | dev_err(port->dev, "cannot allocate irq.\n"); |
| 436 | return -ENODEV; | 436 | return -ENODEV; |
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index e3de9c6d2226..f89d1f79be18 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c | |||
| @@ -322,8 +322,7 @@ static int stm32_startup(struct uart_port *port) | |||
| 322 | u32 val; | 322 | u32 val; |
| 323 | int ret; | 323 | int ret; |
| 324 | 324 | ||
| 325 | ret = request_irq(port->irq, stm32_interrupt, IRQF_NO_SUSPEND, | 325 | ret = request_irq(port->irq, stm32_interrupt, 0, name, port); |
| 326 | name, port); | ||
| 327 | if (ret) | 326 | if (ret) |
| 328 | return ret; | 327 | return ret; |
| 329 | 328 | ||
diff --git a/drivers/tty/synclink.c b/drivers/tty/synclink.c index 2fac7123b274..6188059fd523 100644 --- a/drivers/tty/synclink.c +++ b/drivers/tty/synclink.c | |||
| @@ -3314,12 +3314,11 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp, | |||
| 3314 | -EAGAIN : -ERESTARTSYS; | 3314 | -EAGAIN : -ERESTARTSYS; |
| 3315 | break; | 3315 | break; |
| 3316 | } | 3316 | } |
| 3317 | 3317 | ||
| 3318 | dcd = tty_port_carrier_raised(&info->port); | 3318 | dcd = tty_port_carrier_raised(&info->port); |
| 3319 | 3319 | if (do_clocal || dcd) | |
| 3320 | if (!(port->flags & ASYNC_CLOSING) && (do_clocal || dcd)) | 3320 | break; |
| 3321 | break; | 3321 | |
| 3322 | |||
| 3323 | if (signal_pending(current)) { | 3322 | if (signal_pending(current)) { |
| 3324 | retval = -ERESTARTSYS; | 3323 | retval = -ERESTARTSYS; |
| 3325 | break; | 3324 | break; |
| @@ -3398,15 +3397,6 @@ static int mgsl_open(struct tty_struct *tty, struct file * filp) | |||
| 3398 | printk("%s(%d):mgsl_open(%s), old ref count = %d\n", | 3397 | printk("%s(%d):mgsl_open(%s), old ref count = %d\n", |
| 3399 | __FILE__,__LINE__,tty->driver->name, info->port.count); | 3398 | __FILE__,__LINE__,tty->driver->name, info->port.count); |
| 3400 | 3399 | ||
| 3401 | /* If port is closing, signal caller to try again */ | ||
| 3402 | if (info->port.flags & ASYNC_CLOSING){ | ||
| 3403 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 3404 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 3405 | retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 3406 | -EAGAIN : -ERESTARTSYS); | ||
| 3407 | goto cleanup; | ||
| 3408 | } | ||
| 3409 | |||
| 3410 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 3400 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
| 3411 | 3401 | ||
| 3412 | spin_lock_irqsave(&info->netlock, flags); | 3402 | spin_lock_irqsave(&info->netlock, flags); |
| @@ -6635,7 +6625,7 @@ static bool mgsl_get_rx_frame(struct mgsl_struct *info) | |||
| 6635 | unsigned char *ptmp = info->intermediate_rxbuffer; | 6625 | unsigned char *ptmp = info->intermediate_rxbuffer; |
| 6636 | 6626 | ||
| 6637 | if ( !(status & RXSTATUS_CRC_ERROR)) | 6627 | if ( !(status & RXSTATUS_CRC_ERROR)) |
| 6638 | info->icount.rxok++; | 6628 | info->icount.rxok++; |
| 6639 | 6629 | ||
| 6640 | while(copy_count) { | 6630 | while(copy_count) { |
| 6641 | int partial_count; | 6631 | int partial_count; |
diff --git a/drivers/tty/synclink_gt.c b/drivers/tty/synclink_gt.c index 0ea8eee00178..6fc39fbfc275 100644 --- a/drivers/tty/synclink_gt.c +++ b/drivers/tty/synclink_gt.c | |||
| @@ -672,15 +672,6 @@ static int open(struct tty_struct *tty, struct file *filp) | |||
| 672 | 672 | ||
| 673 | DBGINFO(("%s open, old ref count = %d\n", info->device_name, info->port.count)); | 673 | DBGINFO(("%s open, old ref count = %d\n", info->device_name, info->port.count)); |
| 674 | 674 | ||
| 675 | /* If port is closing, signal caller to try again */ | ||
| 676 | if (info->port.flags & ASYNC_CLOSING){ | ||
| 677 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 678 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 679 | retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 680 | -EAGAIN : -ERESTARTSYS); | ||
| 681 | goto cleanup; | ||
| 682 | } | ||
| 683 | |||
| 684 | mutex_lock(&info->port.mutex); | 675 | mutex_lock(&info->port.mutex); |
| 685 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 676 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
| 686 | 677 | ||
| @@ -3320,9 +3311,8 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
| 3320 | } | 3311 | } |
| 3321 | 3312 | ||
| 3322 | cd = tty_port_carrier_raised(port); | 3313 | cd = tty_port_carrier_raised(port); |
| 3323 | 3314 | if (do_clocal || cd) | |
| 3324 | if (!(port->flags & ASYNC_CLOSING) && (do_clocal || cd )) | 3315 | break; |
| 3325 | break; | ||
| 3326 | 3316 | ||
| 3327 | if (signal_pending(current)) { | 3317 | if (signal_pending(current)) { |
| 3328 | retval = -ERESTARTSYS; | 3318 | retval = -ERESTARTSYS; |
diff --git a/drivers/tty/synclinkmp.c b/drivers/tty/synclinkmp.c index 08633a8139ff..fb00a06dfa4b 100644 --- a/drivers/tty/synclinkmp.c +++ b/drivers/tty/synclinkmp.c | |||
| @@ -752,15 +752,6 @@ static int open(struct tty_struct *tty, struct file *filp) | |||
| 752 | printk("%s(%d):%s open(), old ref count = %d\n", | 752 | printk("%s(%d):%s open(), old ref count = %d\n", |
| 753 | __FILE__,__LINE__,tty->driver->name, info->port.count); | 753 | __FILE__,__LINE__,tty->driver->name, info->port.count); |
| 754 | 754 | ||
| 755 | /* If port is closing, signal caller to try again */ | ||
| 756 | if (info->port.flags & ASYNC_CLOSING){ | ||
| 757 | wait_event_interruptible_tty(tty, info->port.close_wait, | ||
| 758 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 759 | retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 760 | -EAGAIN : -ERESTARTSYS); | ||
| 761 | goto cleanup; | ||
| 762 | } | ||
| 763 | |||
| 764 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 755 | info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
| 765 | 756 | ||
| 766 | spin_lock_irqsave(&info->netlock, flags); | 757 | spin_lock_irqsave(&info->netlock, flags); |
| @@ -3341,9 +3332,8 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
| 3341 | } | 3332 | } |
| 3342 | 3333 | ||
| 3343 | cd = tty_port_carrier_raised(port); | 3334 | cd = tty_port_carrier_raised(port); |
| 3344 | 3335 | if (do_clocal || cd) | |
| 3345 | if (!(port->flags & ASYNC_CLOSING) && (do_clocal || cd)) | 3336 | break; |
| 3346 | break; | ||
| 3347 | 3337 | ||
| 3348 | if (signal_pending(current)) { | 3338 | if (signal_pending(current)) { |
| 3349 | retval = -ERESTARTSYS; | 3339 | retval = -ERESTARTSYS; |
diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index 95b330a9ea98..5381a728d23e 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c | |||
| @@ -1003,6 +1003,10 @@ static const struct kernel_param_ops param_ops_sysrq_reset_seq = { | |||
| 1003 | #define param_check_sysrq_reset_seq(name, p) \ | 1003 | #define param_check_sysrq_reset_seq(name, p) \ |
| 1004 | __param_check(name, p, unsigned short) | 1004 | __param_check(name, p, unsigned short) |
| 1005 | 1005 | ||
| 1006 | /* | ||
| 1007 | * not really modular, but the easiest way to keep compat with existing | ||
| 1008 | * bootargs behaviour is to continue using module_param here. | ||
| 1009 | */ | ||
| 1006 | module_param_array_named(reset_seq, sysrq_reset_seq, sysrq_reset_seq, | 1010 | module_param_array_named(reset_seq, sysrq_reset_seq, sysrq_reset_seq, |
| 1007 | &sysrq_reset_seq_len, 0644); | 1011 | &sysrq_reset_seq_len, 0644); |
| 1008 | 1012 | ||
| @@ -1119,4 +1123,4 @@ static int __init sysrq_init(void) | |||
| 1119 | 1123 | ||
| 1120 | return 0; | 1124 | return 0; |
| 1121 | } | 1125 | } |
| 1122 | module_init(sysrq_init); | 1126 | device_initcall(sysrq_init); |
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index a660ab181cca..9a479e61791a 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c | |||
| @@ -403,7 +403,7 @@ void tty_schedule_flip(struct tty_port *port) | |||
| 403 | * flush_to_ldisc() sees buffer data. | 403 | * flush_to_ldisc() sees buffer data. |
| 404 | */ | 404 | */ |
| 405 | smp_store_release(&buf->tail->commit, buf->tail->used); | 405 | smp_store_release(&buf->tail->commit, buf->tail->used); |
| 406 | schedule_work(&buf->work); | 406 | queue_work(system_unbound_wq, &buf->work); |
| 407 | } | 407 | } |
| 408 | EXPORT_SYMBOL(tty_schedule_flip); | 408 | EXPORT_SYMBOL(tty_schedule_flip); |
| 409 | 409 | ||
| @@ -587,3 +587,13 @@ void tty_buffer_set_lock_subclass(struct tty_port *port) | |||
| 587 | { | 587 | { |
| 588 | lockdep_set_subclass(&port->buf.lock, TTY_LOCK_SLAVE); | 588 | lockdep_set_subclass(&port->buf.lock, TTY_LOCK_SLAVE); |
| 589 | } | 589 | } |
| 590 | |||
| 591 | bool tty_buffer_restart_work(struct tty_port *port) | ||
| 592 | { | ||
| 593 | return queue_work(system_unbound_wq, &port->buf.work); | ||
| 594 | } | ||
| 595 | |||
| 596 | bool tty_buffer_cancel_work(struct tty_port *port) | ||
| 597 | { | ||
| 598 | return cancel_work_sync(&port->buf.work); | ||
| 599 | } | ||
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c index 2eefaa6e3e3a..0c41dbcb90b8 100644 --- a/drivers/tty/tty_io.c +++ b/drivers/tty/tty_io.c | |||
| @@ -390,10 +390,10 @@ EXPORT_SYMBOL_GPL(tty_find_polling_driver); | |||
| 390 | * Locking: ctrl_lock | 390 | * Locking: ctrl_lock |
| 391 | */ | 391 | */ |
| 392 | 392 | ||
| 393 | int tty_check_change(struct tty_struct *tty) | 393 | int __tty_check_change(struct tty_struct *tty, int sig) |
| 394 | { | 394 | { |
| 395 | unsigned long flags; | 395 | unsigned long flags; |
| 396 | struct pid *pgrp; | 396 | struct pid *pgrp, *tty_pgrp; |
| 397 | int ret = 0; | 397 | int ret = 0; |
| 398 | 398 | ||
| 399 | if (current->signal->tty != tty) | 399 | if (current->signal->tty != tty) |
| @@ -403,33 +403,35 @@ int tty_check_change(struct tty_struct *tty) | |||
| 403 | pgrp = task_pgrp(current); | 403 | pgrp = task_pgrp(current); |
| 404 | 404 | ||
| 405 | spin_lock_irqsave(&tty->ctrl_lock, flags); | 405 | spin_lock_irqsave(&tty->ctrl_lock, flags); |
| 406 | 406 | tty_pgrp = tty->pgrp; | |
| 407 | if (!tty->pgrp) { | ||
| 408 | printk(KERN_WARNING "tty_check_change: tty->pgrp == NULL!\n"); | ||
| 409 | goto out_unlock; | ||
| 410 | } | ||
| 411 | if (pgrp == tty->pgrp) | ||
| 412 | goto out_unlock; | ||
| 413 | spin_unlock_irqrestore(&tty->ctrl_lock, flags); | 407 | spin_unlock_irqrestore(&tty->ctrl_lock, flags); |
| 414 | 408 | ||
| 415 | if (is_ignored(SIGTTOU)) | 409 | if (tty_pgrp && pgrp != tty->pgrp) { |
| 416 | goto out_rcuunlock; | 410 | if (is_ignored(sig)) { |
| 417 | if (is_current_pgrp_orphaned()) { | 411 | if (sig == SIGTTIN) |
| 418 | ret = -EIO; | 412 | ret = -EIO; |
| 419 | goto out_rcuunlock; | 413 | } else if (is_current_pgrp_orphaned()) |
| 414 | ret = -EIO; | ||
| 415 | else { | ||
| 416 | kill_pgrp(pgrp, sig, 1); | ||
| 417 | set_thread_flag(TIF_SIGPENDING); | ||
| 418 | ret = -ERESTARTSYS; | ||
| 419 | } | ||
| 420 | } | 420 | } |
| 421 | kill_pgrp(pgrp, SIGTTOU, 1); | ||
| 422 | rcu_read_unlock(); | ||
| 423 | set_thread_flag(TIF_SIGPENDING); | ||
| 424 | ret = -ERESTARTSYS; | ||
| 425 | return ret; | ||
| 426 | out_unlock: | ||
| 427 | spin_unlock_irqrestore(&tty->ctrl_lock, flags); | ||
| 428 | out_rcuunlock: | ||
| 429 | rcu_read_unlock(); | 421 | rcu_read_unlock(); |
| 422 | |||
| 423 | if (!tty_pgrp) { | ||
| 424 | pr_warn("%s: tty_check_change: sig=%d, tty->pgrp == NULL!\n", | ||
| 425 | tty_name(tty), sig); | ||
| 426 | } | ||
| 427 | |||
| 430 | return ret; | 428 | return ret; |
| 431 | } | 429 | } |
| 432 | 430 | ||
| 431 | int tty_check_change(struct tty_struct *tty) | ||
| 432 | { | ||
| 433 | return __tty_check_change(tty, SIGTTOU); | ||
| 434 | } | ||
| 433 | EXPORT_SYMBOL(tty_check_change); | 435 | EXPORT_SYMBOL(tty_check_change); |
| 434 | 436 | ||
| 435 | static ssize_t hung_up_tty_read(struct file *file, char __user *buf, | 437 | static ssize_t hung_up_tty_read(struct file *file, char __user *buf, |
| @@ -1198,11 +1200,9 @@ void tty_write_message(struct tty_struct *tty, char *msg) | |||
| 1198 | if (tty) { | 1200 | if (tty) { |
| 1199 | mutex_lock(&tty->atomic_write_lock); | 1201 | mutex_lock(&tty->atomic_write_lock); |
| 1200 | tty_lock(tty); | 1202 | tty_lock(tty); |
| 1201 | if (tty->ops->write && tty->count > 0) { | 1203 | if (tty->ops->write && tty->count > 0) |
| 1202 | tty_unlock(tty); | ||
| 1203 | tty->ops->write(tty, msg, strlen(msg)); | 1204 | tty->ops->write(tty, msg, strlen(msg)); |
| 1204 | } else | 1205 | tty_unlock(tty); |
| 1205 | tty_unlock(tty); | ||
| 1206 | tty_write_unlock(tty); | 1206 | tty_write_unlock(tty); |
| 1207 | } | 1207 | } |
| 1208 | return; | 1208 | return; |
| @@ -1689,7 +1689,7 @@ static void release_tty(struct tty_struct *tty, int idx) | |||
| 1689 | tty->port->itty = NULL; | 1689 | tty->port->itty = NULL; |
| 1690 | if (tty->link) | 1690 | if (tty->link) |
| 1691 | tty->link->port->itty = NULL; | 1691 | tty->link->port->itty = NULL; |
| 1692 | cancel_work_sync(&tty->port->buf.work); | 1692 | tty_buffer_cancel_work(tty->port); |
| 1693 | 1693 | ||
| 1694 | tty_kref_put(tty->link); | 1694 | tty_kref_put(tty->link); |
| 1695 | tty_kref_put(tty); | 1695 | tty_kref_put(tty); |
| @@ -2569,7 +2569,6 @@ static int tiocspgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t | |||
| 2569 | struct pid *pgrp; | 2569 | struct pid *pgrp; |
| 2570 | pid_t pgrp_nr; | 2570 | pid_t pgrp_nr; |
| 2571 | int retval = tty_check_change(real_tty); | 2571 | int retval = tty_check_change(real_tty); |
| 2572 | unsigned long flags; | ||
| 2573 | 2572 | ||
| 2574 | if (retval == -EIO) | 2573 | if (retval == -EIO) |
| 2575 | return -ENOTTY; | 2574 | return -ENOTTY; |
| @@ -2592,10 +2591,10 @@ static int tiocspgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t | |||
| 2592 | if (session_of_pgrp(pgrp) != task_session(current)) | 2591 | if (session_of_pgrp(pgrp) != task_session(current)) |
| 2593 | goto out_unlock; | 2592 | goto out_unlock; |
| 2594 | retval = 0; | 2593 | retval = 0; |
| 2595 | spin_lock_irqsave(&tty->ctrl_lock, flags); | 2594 | spin_lock_irq(&tty->ctrl_lock); |
| 2596 | put_pid(real_tty->pgrp); | 2595 | put_pid(real_tty->pgrp); |
| 2597 | real_tty->pgrp = get_pid(pgrp); | 2596 | real_tty->pgrp = get_pid(pgrp); |
| 2598 | spin_unlock_irqrestore(&tty->ctrl_lock, flags); | 2597 | spin_unlock_irq(&tty->ctrl_lock); |
| 2599 | out_unlock: | 2598 | out_unlock: |
| 2600 | rcu_read_unlock(); | 2599 | rcu_read_unlock(); |
| 2601 | return retval; | 2600 | return retval; |
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c index 71750cbac31f..5af8f1874c1a 100644 --- a/drivers/tty/tty_ldisc.c +++ b/drivers/tty/tty_ldisc.c | |||
| @@ -319,7 +319,7 @@ __tty_ldisc_lock_nested(struct tty_struct *tty, unsigned long timeout) | |||
| 319 | 319 | ||
| 320 | static inline void __tty_ldisc_unlock(struct tty_struct *tty) | 320 | static inline void __tty_ldisc_unlock(struct tty_struct *tty) |
| 321 | { | 321 | { |
| 322 | return ldsem_up_write(&tty->ldisc_sem); | 322 | ldsem_up_write(&tty->ldisc_sem); |
| 323 | } | 323 | } |
| 324 | 324 | ||
| 325 | static int __lockfunc | 325 | static int __lockfunc |
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c index 40b31835f80b..482f33f20043 100644 --- a/drivers/tty/tty_port.c +++ b/drivers/tty/tty_port.c | |||
| @@ -22,7 +22,6 @@ void tty_port_init(struct tty_port *port) | |||
| 22 | memset(port, 0, sizeof(*port)); | 22 | memset(port, 0, sizeof(*port)); |
| 23 | tty_buffer_init(port); | 23 | tty_buffer_init(port); |
| 24 | init_waitqueue_head(&port->open_wait); | 24 | init_waitqueue_head(&port->open_wait); |
| 25 | init_waitqueue_head(&port->close_wait); | ||
| 26 | init_waitqueue_head(&port->delta_msr_wait); | 25 | init_waitqueue_head(&port->delta_msr_wait); |
| 27 | mutex_init(&port->mutex); | 26 | mutex_init(&port->mutex); |
| 28 | mutex_init(&port->buf_mutex); | 27 | mutex_init(&port->buf_mutex); |
| @@ -131,7 +130,7 @@ EXPORT_SYMBOL(tty_port_free_xmit_buf); | |||
| 131 | */ | 130 | */ |
| 132 | void tty_port_destroy(struct tty_port *port) | 131 | void tty_port_destroy(struct tty_port *port) |
| 133 | { | 132 | { |
| 134 | cancel_work_sync(&port->buf.work); | 133 | tty_buffer_cancel_work(port); |
| 135 | tty_buffer_free_all(port); | 134 | tty_buffer_free_all(port); |
| 136 | } | 135 | } |
| 137 | EXPORT_SYMBOL(tty_port_destroy); | 136 | EXPORT_SYMBOL(tty_port_destroy); |
| @@ -363,16 +362,6 @@ int tty_port_block_til_ready(struct tty_port *port, | |||
| 363 | unsigned long flags; | 362 | unsigned long flags; |
| 364 | DEFINE_WAIT(wait); | 363 | DEFINE_WAIT(wait); |
| 365 | 364 | ||
| 366 | /* block if port is in the process of being closed */ | ||
| 367 | if (port->flags & ASYNC_CLOSING) { | ||
| 368 | wait_event_interruptible_tty(tty, port->close_wait, | ||
| 369 | !(port->flags & ASYNC_CLOSING)); | ||
| 370 | if (port->flags & ASYNC_HUP_NOTIFY) | ||
| 371 | return -EAGAIN; | ||
| 372 | else | ||
| 373 | return -ERESTARTSYS; | ||
| 374 | } | ||
| 375 | |||
| 376 | /* if non-blocking mode is set we can pass directly to open unless | 365 | /* if non-blocking mode is set we can pass directly to open unless |
| 377 | the port has just hung up or is in another error state */ | 366 | the port has just hung up or is in another error state */ |
| 378 | if (tty->flags & (1 << TTY_IO_ERROR)) { | 367 | if (tty->flags & (1 << TTY_IO_ERROR)) { |
| @@ -423,8 +412,7 @@ int tty_port_block_til_ready(struct tty_port *port, | |||
| 423 | * Never ask drivers if CLOCAL is set, this causes troubles | 412 | * Never ask drivers if CLOCAL is set, this causes troubles |
| 424 | * on some hardware. | 413 | * on some hardware. |
| 425 | */ | 414 | */ |
| 426 | if (!(port->flags & ASYNC_CLOSING) && | 415 | if (do_clocal || tty_port_carrier_raised(port)) |
| 427 | (do_clocal || tty_port_carrier_raised(port))) | ||
| 428 | break; | 416 | break; |
| 429 | if (signal_pending(current)) { | 417 | if (signal_pending(current)) { |
| 430 | retval = -ERESTARTSYS; | 418 | retval = -ERESTARTSYS; |
| @@ -463,10 +451,7 @@ static void tty_port_drain_delay(struct tty_port *port, struct tty_struct *tty) | |||
| 463 | schedule_timeout_interruptible(timeout); | 451 | schedule_timeout_interruptible(timeout); |
| 464 | } | 452 | } |
| 465 | 453 | ||
| 466 | /* Caller holds tty lock. | 454 | /* Caller holds tty lock. */ |
| 467 | * NB: may drop and reacquire tty lock (in tty_wait_until_sent_from_close()) | ||
| 468 | * so tty and tty port may have changed state (but not hung up or reopened). | ||
| 469 | */ | ||
| 470 | int tty_port_close_start(struct tty_port *port, | 455 | int tty_port_close_start(struct tty_port *port, |
| 471 | struct tty_struct *tty, struct file *filp) | 456 | struct tty_struct *tty, struct file *filp) |
| 472 | { | 457 | { |
| @@ -502,7 +487,7 @@ int tty_port_close_start(struct tty_port *port, | |||
| 502 | if (tty->flow_stopped) | 487 | if (tty->flow_stopped) |
| 503 | tty_driver_flush_buffer(tty); | 488 | tty_driver_flush_buffer(tty); |
| 504 | if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) | 489 | if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) |
| 505 | tty_wait_until_sent_from_close(tty, port->closing_wait); | 490 | tty_wait_until_sent(tty, port->closing_wait); |
| 506 | if (port->drain_delay) | 491 | if (port->drain_delay) |
| 507 | tty_port_drain_delay(port, tty); | 492 | tty_port_drain_delay(port, tty); |
| 508 | } | 493 | } |
| @@ -534,7 +519,6 @@ void tty_port_close_end(struct tty_port *port, struct tty_struct *tty) | |||
| 534 | wake_up_interruptible(&port->open_wait); | 519 | wake_up_interruptible(&port->open_wait); |
| 535 | } | 520 | } |
| 536 | port->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); | 521 | port->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); |
| 537 | wake_up_interruptible(&port->close_wait); | ||
| 538 | spin_unlock_irqrestore(&port->lock, flags); | 522 | spin_unlock_irqrestore(&port->lock, flags); |
| 539 | } | 523 | } |
| 540 | EXPORT_SYMBOL(tty_port_close_end); | 524 | EXPORT_SYMBOL(tty_port_close_end); |
| @@ -543,10 +527,6 @@ EXPORT_SYMBOL(tty_port_close_end); | |||
| 543 | * tty_port_close | 527 | * tty_port_close |
| 544 | * | 528 | * |
| 545 | * Caller holds tty lock | 529 | * Caller holds tty lock |
| 546 | * | ||
| 547 | * NB: may drop and reacquire tty lock (in tty_port_close_start()-> | ||
| 548 | * tty_wait_until_sent_from_close()) so tty and tty_port may have changed | ||
| 549 | * state (but not hung up or reopened). | ||
| 550 | */ | 530 | */ |
| 551 | void tty_port_close(struct tty_port *port, struct tty_struct *tty, | 531 | void tty_port_close(struct tty_port *port, struct tty_struct *tty, |
| 552 | struct file *filp) | 532 | struct file *filp) |
diff --git a/drivers/usb/gadget/function/u_serial.c b/drivers/usb/gadget/function/u_serial.c index 9cc6a13d5e5b..f7771d86ad6c 100644 --- a/drivers/usb/gadget/function/u_serial.c +++ b/drivers/usb/gadget/function/u_serial.c | |||
| @@ -114,6 +114,7 @@ struct gs_port { | |||
| 114 | struct gs_buf port_write_buf; | 114 | struct gs_buf port_write_buf; |
| 115 | wait_queue_head_t drain_wait; /* wait while writes drain */ | 115 | wait_queue_head_t drain_wait; /* wait while writes drain */ |
| 116 | bool write_busy; | 116 | bool write_busy; |
| 117 | wait_queue_head_t close_wait; | ||
| 117 | 118 | ||
| 118 | /* REVISIT this state ... */ | 119 | /* REVISIT this state ... */ |
| 119 | struct usb_cdc_line_coding port_line_coding; /* 8-N-1 etc */ | 120 | struct usb_cdc_line_coding port_line_coding; /* 8-N-1 etc */ |
| @@ -883,7 +884,7 @@ static void gs_close(struct tty_struct *tty, struct file *file) | |||
| 883 | pr_debug("gs_close: ttyGS%d (%p,%p) done!\n", | 884 | pr_debug("gs_close: ttyGS%d (%p,%p) done!\n", |
| 884 | port->port_num, tty, file); | 885 | port->port_num, tty, file); |
| 885 | 886 | ||
| 886 | wake_up(&port->port.close_wait); | 887 | wake_up(&port->close_wait); |
| 887 | exit: | 888 | exit: |
| 888 | spin_unlock_irq(&port->port_lock); | 889 | spin_unlock_irq(&port->port_lock); |
| 889 | } | 890 | } |
| @@ -1043,6 +1044,7 @@ gs_port_alloc(unsigned port_num, struct usb_cdc_line_coding *coding) | |||
| 1043 | tty_port_init(&port->port); | 1044 | tty_port_init(&port->port); |
| 1044 | spin_lock_init(&port->port_lock); | 1045 | spin_lock_init(&port->port_lock); |
| 1045 | init_waitqueue_head(&port->drain_wait); | 1046 | init_waitqueue_head(&port->drain_wait); |
| 1047 | init_waitqueue_head(&port->close_wait); | ||
| 1046 | 1048 | ||
| 1047 | tasklet_init(&port->push, gs_rx_push, (unsigned long) port); | 1049 | tasklet_init(&port->push, gs_rx_push, (unsigned long) port); |
| 1048 | 1050 | ||
| @@ -1073,7 +1075,7 @@ static void gserial_free_port(struct gs_port *port) | |||
| 1073 | { | 1075 | { |
| 1074 | tasklet_kill(&port->push); | 1076 | tasklet_kill(&port->push); |
| 1075 | /* wait for old opens to finish */ | 1077 | /* wait for old opens to finish */ |
| 1076 | wait_event(port->port.close_wait, gs_closed(port)); | 1078 | wait_event(port->close_wait, gs_closed(port)); |
| 1077 | WARN_ON(port->port_usb != NULL); | 1079 | WARN_ON(port->port_usb != NULL); |
| 1078 | tty_port_destroy(&port->port); | 1080 | tty_port_destroy(&port->port); |
| 1079 | kfree(port); | 1081 | kfree(port); |
diff --git a/include/linux/dma/hsu.h b/include/linux/dma/hsu.h index 234393a6997b..79df69dc629c 100644 --- a/include/linux/dma/hsu.h +++ b/include/linux/dma/hsu.h | |||
| @@ -35,14 +35,23 @@ struct hsu_dma_chip { | |||
| 35 | unsigned int length; | 35 | unsigned int length; |
| 36 | unsigned int offset; | 36 | unsigned int offset; |
| 37 | struct hsu_dma *hsu; | 37 | struct hsu_dma *hsu; |
| 38 | struct hsu_dma_platform_data *pdata; | ||
| 39 | }; | 38 | }; |
| 40 | 39 | ||
| 40 | #if IS_ENABLED(CONFIG_HSU_DMA) | ||
| 41 | /* Export to the internal users */ | 41 | /* Export to the internal users */ |
| 42 | irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr); | 42 | irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr); |
| 43 | 43 | ||
| 44 | /* Export to the platform drivers */ | 44 | /* Export to the platform drivers */ |
| 45 | int hsu_dma_probe(struct hsu_dma_chip *chip); | 45 | int hsu_dma_probe(struct hsu_dma_chip *chip); |
| 46 | int hsu_dma_remove(struct hsu_dma_chip *chip); | 46 | int hsu_dma_remove(struct hsu_dma_chip *chip); |
| 47 | #else | ||
| 48 | static inline irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, | ||
| 49 | unsigned short nr) | ||
| 50 | { | ||
| 51 | return IRQ_NONE; | ||
| 52 | } | ||
| 53 | static inline int hsu_dma_probe(struct hsu_dma_chip *chip) { return -ENODEV; } | ||
| 54 | static inline int hsu_dma_remove(struct hsu_dma_chip *chip) { return 0; } | ||
| 55 | #endif /* CONFIG_HSU_DMA */ | ||
| 47 | 56 | ||
| 48 | #endif /* _DMA_HSU_H */ | 57 | #endif /* _DMA_HSU_H */ |
diff --git a/include/linux/n_r3964.h b/include/linux/n_r3964.h index 5d0b2a1dee69..90a803aa42e8 100644 --- a/include/linux/n_r3964.h +++ b/include/linux/n_r3964.h | |||
| @@ -152,9 +152,6 @@ struct r3964_info { | |||
| 152 | unsigned char *rx_buf; /* ring buffer */ | 152 | unsigned char *rx_buf; /* ring buffer */ |
| 153 | unsigned char *tx_buf; | 153 | unsigned char *tx_buf; |
| 154 | 154 | ||
| 155 | wait_queue_head_t read_wait; | ||
| 156 | //struct wait_queue *read_wait; | ||
| 157 | |||
| 158 | struct r3964_block_header *rx_first; | 155 | struct r3964_block_header *rx_first; |
| 159 | struct r3964_block_header *rx_last; | 156 | struct r3964_block_header *rx_last; |
| 160 | struct r3964_block_header *tx_first; | 157 | struct r3964_block_header *tx_first; |
| @@ -164,8 +161,9 @@ struct r3964_info { | |||
| 164 | unsigned char last_rx; | 161 | unsigned char last_rx; |
| 165 | unsigned char bcc; | 162 | unsigned char bcc; |
| 166 | unsigned int blocks_in_rx_queue; | 163 | unsigned int blocks_in_rx_queue; |
| 167 | 164 | ||
| 168 | 165 | struct mutex read_lock; /* serialize r3964_read */ | |
| 166 | |||
| 169 | struct r3964_client_info *firstClient; | 167 | struct r3964_client_info *firstClient; |
| 170 | unsigned int state; | 168 | unsigned int state; |
| 171 | unsigned int flags; | 169 | unsigned int flags; |
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index bdc0ee8e84e9..91b16adab0cd 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h | |||
| @@ -19,12 +19,6 @@ | |||
| 19 | #include <linux/serial.h> | 19 | #include <linux/serial.h> |
| 20 | #include <linux/platform_data/macb.h> | 20 | #include <linux/platform_data/macb.h> |
| 21 | 21 | ||
| 22 | /* | ||
| 23 | * at91: 6 USARTs and one DBGU port (SAM9260) | ||
| 24 | * avr32: 4 | ||
| 25 | */ | ||
| 26 | #define ATMEL_MAX_UART 7 | ||
| 27 | |||
| 28 | /* Compact Flash */ | 22 | /* Compact Flash */ |
| 29 | struct at91_cf_data { | 23 | struct at91_cf_data { |
| 30 | int irq_pin; /* I/O IRQ */ | 24 | int irq_pin; /* I/O IRQ */ |
diff --git a/include/linux/platform_data/dma-hsu.h b/include/linux/platform_data/dma-hsu.h index 8a1f6a4920b2..3453fa655502 100644 --- a/include/linux/platform_data/dma-hsu.h +++ b/include/linux/platform_data/dma-hsu.h | |||
| @@ -18,8 +18,4 @@ struct hsu_dma_slave { | |||
| 18 | int chan_id; | 18 | int chan_id; |
| 19 | }; | 19 | }; |
| 20 | 20 | ||
| 21 | struct hsu_dma_platform_data { | ||
| 22 | unsigned short nr_channels; | ||
| 23 | }; | ||
| 24 | |||
| 25 | #endif /* _PLATFORM_DATA_DMA_HSU_H */ | 21 | #endif /* _PLATFORM_DATA_DMA_HSU_H */ |
diff --git a/include/linux/tty.h b/include/linux/tty.h index d072ded41678..5b04b0a5375b 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h | |||
| @@ -227,7 +227,6 @@ struct tty_port { | |||
| 227 | int blocked_open; /* Waiting to open */ | 227 | int blocked_open; /* Waiting to open */ |
| 228 | int count; /* Usage count */ | 228 | int count; /* Usage count */ |
| 229 | wait_queue_head_t open_wait; /* Open waiters */ | 229 | wait_queue_head_t open_wait; /* Open waiters */ |
| 230 | wait_queue_head_t close_wait; /* Close waiters */ | ||
| 231 | wait_queue_head_t delta_msr_wait; /* Modem status change */ | 230 | wait_queue_head_t delta_msr_wait; /* Modem status change */ |
| 232 | unsigned long flags; /* TTY flags ASY_*/ | 231 | unsigned long flags; /* TTY flags ASY_*/ |
| 233 | unsigned char console:1, /* port is a console */ | 232 | unsigned char console:1, /* port is a console */ |
| @@ -424,6 +423,7 @@ extern int tty_paranoia_check(struct tty_struct *tty, struct inode *inode, | |||
| 424 | const char *routine); | 423 | const char *routine); |
| 425 | extern const char *tty_name(const struct tty_struct *tty); | 424 | extern const char *tty_name(const struct tty_struct *tty); |
| 426 | extern void tty_wait_until_sent(struct tty_struct *tty, long timeout); | 425 | extern void tty_wait_until_sent(struct tty_struct *tty, long timeout); |
| 426 | extern int __tty_check_change(struct tty_struct *tty, int sig); | ||
| 427 | extern int tty_check_change(struct tty_struct *tty); | 427 | extern int tty_check_change(struct tty_struct *tty); |
| 428 | extern void __stop_tty(struct tty_struct *tty); | 428 | extern void __stop_tty(struct tty_struct *tty); |
| 429 | extern void stop_tty(struct tty_struct *tty); | 429 | extern void stop_tty(struct tty_struct *tty); |
| @@ -467,6 +467,8 @@ extern void tty_buffer_free_all(struct tty_port *port); | |||
| 467 | extern void tty_buffer_flush(struct tty_struct *tty, struct tty_ldisc *ld); | 467 | extern void tty_buffer_flush(struct tty_struct *tty, struct tty_ldisc *ld); |
| 468 | extern void tty_buffer_init(struct tty_port *port); | 468 | extern void tty_buffer_init(struct tty_port *port); |
| 469 | extern void tty_buffer_set_lock_subclass(struct tty_port *port); | 469 | extern void tty_buffer_set_lock_subclass(struct tty_port *port); |
| 470 | extern bool tty_buffer_restart_work(struct tty_port *port); | ||
| 471 | extern bool tty_buffer_cancel_work(struct tty_port *port); | ||
| 470 | extern speed_t tty_termios_baud_rate(struct ktermios *termios); | 472 | extern speed_t tty_termios_baud_rate(struct ktermios *termios); |
| 471 | extern speed_t tty_termios_input_baud_rate(struct ktermios *termios); | 473 | extern speed_t tty_termios_input_baud_rate(struct ktermios *termios); |
| 472 | extern void tty_termios_encode_baud_rate(struct ktermios *termios, | 474 | extern void tty_termios_encode_baud_rate(struct ktermios *termios, |
| @@ -656,50 +658,6 @@ extern void __lockfunc tty_unlock(struct tty_struct *tty); | |||
| 656 | extern void __lockfunc tty_lock_slave(struct tty_struct *tty); | 658 | extern void __lockfunc tty_lock_slave(struct tty_struct *tty); |
| 657 | extern void __lockfunc tty_unlock_slave(struct tty_struct *tty); | 659 | extern void __lockfunc tty_unlock_slave(struct tty_struct *tty); |
| 658 | extern void tty_set_lock_subclass(struct tty_struct *tty); | 660 | extern void tty_set_lock_subclass(struct tty_struct *tty); |
| 659 | /* | ||
| 660 | * this shall be called only from where BTM is held (like close) | ||
| 661 | * | ||
| 662 | * We need this to ensure nobody waits for us to finish while we are waiting. | ||
| 663 | * Without this we were encountering system stalls. | ||
| 664 | * | ||
| 665 | * This should be indeed removed with BTM removal later. | ||
| 666 | * | ||
| 667 | * Locking: BTM required. Nobody is allowed to hold port->mutex. | ||
| 668 | */ | ||
| 669 | static inline void tty_wait_until_sent_from_close(struct tty_struct *tty, | ||
| 670 | long timeout) | ||
| 671 | { | ||
| 672 | tty_unlock(tty); /* tty->ops->close holds the BTM, drop it while waiting */ | ||
| 673 | tty_wait_until_sent(tty, timeout); | ||
| 674 | tty_lock(tty); | ||
| 675 | } | ||
| 676 | |||
| 677 | /* | ||
| 678 | * wait_event_interruptible_tty -- wait for a condition with the tty lock held | ||
| 679 | * | ||
| 680 | * The condition we are waiting for might take a long time to | ||
| 681 | * become true, or might depend on another thread taking the | ||
| 682 | * BTM. In either case, we need to drop the BTM to guarantee | ||
| 683 | * forward progress. This is a leftover from the conversion | ||
| 684 | * from the BKL and should eventually get removed as the BTM | ||
| 685 | * falls out of use. | ||
| 686 | * | ||
| 687 | * Do not use in new code. | ||
| 688 | */ | ||
| 689 | #define wait_event_interruptible_tty(tty, wq, condition) \ | ||
| 690 | ({ \ | ||
| 691 | int __ret = 0; \ | ||
| 692 | if (!(condition)) \ | ||
| 693 | __ret = __wait_event_interruptible_tty(tty, wq, \ | ||
| 694 | condition); \ | ||
| 695 | __ret; \ | ||
| 696 | }) | ||
| 697 | |||
| 698 | #define __wait_event_interruptible_tty(tty, wq, condition) \ | ||
| 699 | ___wait_event(wq, condition, TASK_INTERRUPTIBLE, 0, 0, \ | ||
| 700 | tty_unlock(tty); \ | ||
| 701 | schedule(); \ | ||
| 702 | tty_lock(tty)) | ||
| 703 | 661 | ||
| 704 | #ifdef CONFIG_PROC_FS | 662 | #ifdef CONFIG_PROC_FS |
| 705 | extern void proc_tty_register_driver(struct tty_driver *); | 663 | extern void proc_tty_register_driver(struct tty_driver *); |
diff --git a/net/irda/ircomm/ircomm_tty.c b/net/irda/ircomm/ircomm_tty.c index 683346d2d633..a4237707f79d 100644 --- a/net/irda/ircomm/ircomm_tty.c +++ b/net/irda/ircomm/ircomm_tty.c | |||
| @@ -335,8 +335,7 @@ static int ircomm_tty_block_til_ready(struct ircomm_tty_cb *self, | |||
| 335 | * specified, we cannot return before the IrCOMM link is | 335 | * specified, we cannot return before the IrCOMM link is |
| 336 | * ready | 336 | * ready |
| 337 | */ | 337 | */ |
| 338 | if (!test_bit(ASYNCB_CLOSING, &port->flags) && | 338 | if ((do_clocal || tty_port_carrier_raised(port)) && |
| 339 | (do_clocal || tty_port_carrier_raised(port)) && | ||
| 340 | self->state == IRCOMM_TTY_READY) | 339 | self->state == IRCOMM_TTY_READY) |
| 341 | { | 340 | { |
| 342 | break; | 341 | break; |
| @@ -443,34 +442,6 @@ static int ircomm_tty_open(struct tty_struct *tty, struct file *filp) | |||
| 443 | /* Not really used by us, but lets do it anyway */ | 442 | /* Not really used by us, but lets do it anyway */ |
| 444 | self->port.low_latency = (self->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 443 | self->port.low_latency = (self->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
| 445 | 444 | ||
| 446 | /* | ||
| 447 | * If the port is the middle of closing, bail out now | ||
| 448 | */ | ||
| 449 | if (test_bit(ASYNCB_CLOSING, &self->port.flags)) { | ||
| 450 | |||
| 451 | /* Hm, why are we blocking on ASYNC_CLOSING if we | ||
| 452 | * do return -EAGAIN/-ERESTARTSYS below anyway? | ||
| 453 | * IMHO it's either not needed in the first place | ||
| 454 | * or for some reason we need to make sure the async | ||
| 455 | * closing has been finished - if so, wouldn't we | ||
| 456 | * probably better sleep uninterruptible? | ||
| 457 | */ | ||
| 458 | |||
| 459 | if (wait_event_interruptible(self->port.close_wait, | ||
| 460 | !test_bit(ASYNCB_CLOSING, &self->port.flags))) { | ||
| 461 | net_warn_ratelimited("%s - got signal while blocking on ASYNC_CLOSING!\n", | ||
| 462 | __func__); | ||
| 463 | return -ERESTARTSYS; | ||
| 464 | } | ||
| 465 | |||
| 466 | #ifdef SERIAL_DO_RESTART | ||
| 467 | return (self->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 468 | -EAGAIN : -ERESTARTSYS; | ||
| 469 | #else | ||
| 470 | return -EAGAIN; | ||
| 471 | #endif | ||
| 472 | } | ||
| 473 | |||
| 474 | /* Check if this is a "normal" ircomm device, or an irlpt device */ | 445 | /* Check if this is a "normal" ircomm device, or an irlpt device */ |
| 475 | if (self->line < 0x10) { | 446 | if (self->line < 0x10) { |
| 476 | self->service_type = IRCOMM_3_WIRE | IRCOMM_9_WIRE; | 447 | self->service_type = IRCOMM_3_WIRE | IRCOMM_9_WIRE; |
