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authorTudor Ambarus <tudor-dan.ambarus@nxp.com>2016-09-30 05:09:39 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2016-10-02 10:33:45 -0400
commitf97581cfa6e7db9818520597b8a44f8268d75013 (patch)
tree3142b5190712e36c9c3d143086de0a1151c6f27a
parent81422badb39078fde1ffcecda3caac555226fc7b (diff)
crypto: caam - treat SGT address pointer as u64
Even for i.MX, CAAM is able to use address pointers greater than 32 bits, the address pointer field being interpreted as a double word. Enforce u64 address pointer in the sec4_sg_entry struct. This patch fixes the SGT address pointer endianness issue for 32bit platforms where core endianness != caam endianness. Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/caam/desc.h6
-rw-r--r--drivers/crypto/caam/regs.h8
-rw-r--r--drivers/crypto/caam/sg_sw_sec4.h2
3 files changed, 9 insertions, 7 deletions
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index 26427c11ad87..513b6646bb36 100644
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -23,13 +23,7 @@
23#define SEC4_SG_OFFSET_MASK 0x00001fff 23#define SEC4_SG_OFFSET_MASK 0x00001fff
24 24
25struct sec4_sg_entry { 25struct sec4_sg_entry {
26#if !defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) && \
27 defined(CONFIG_CRYPTO_DEV_FSL_CAAM_IMX)
28 u32 rsvd1;
29 dma_addr_t ptr;
30#else
31 u64 ptr; 26 u64 ptr;
32#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_IMX */
33 u32 len; 27 u32 len;
34 u32 bpid_offset; 28 u32 bpid_offset;
35}; 29};
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index b3c5016f6458..84d2f838a063 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -196,6 +196,14 @@ static inline u64 rd_reg64(void __iomem *reg)
196#define caam_dma_to_cpu(value) caam32_to_cpu(value) 196#define caam_dma_to_cpu(value) caam32_to_cpu(value)
197#endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */ 197#endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */
198 198
199#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX
200#define cpu_to_caam_dma64(value) \
201 (((u64)cpu_to_caam32(lower_32_bits(value)) << 32) | \
202 (u64)cpu_to_caam32(upper_32_bits(value)))
203#else
204#define cpu_to_caam_dma64(value) cpu_to_caam64(value)
205#endif
206
199/* 207/*
200 * jr_outentry 208 * jr_outentry
201 * Represents each entry in a JobR output ring 209 * Represents each entry in a JobR output ring
diff --git a/drivers/crypto/caam/sg_sw_sec4.h b/drivers/crypto/caam/sg_sw_sec4.h
index 19dc64fede0d..41cd5a356d05 100644
--- a/drivers/crypto/caam/sg_sw_sec4.h
+++ b/drivers/crypto/caam/sg_sw_sec4.h
@@ -15,7 +15,7 @@ struct sec4_sg_entry;
15static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr, 15static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
16 dma_addr_t dma, u32 len, u16 offset) 16 dma_addr_t dma, u32 len, u16 offset)
17{ 17{
18 sec4_sg_ptr->ptr = cpu_to_caam_dma(dma); 18 sec4_sg_ptr->ptr = cpu_to_caam_dma64(dma);
19 sec4_sg_ptr->len = cpu_to_caam32(len); 19 sec4_sg_ptr->len = cpu_to_caam32(len);
20 sec4_sg_ptr->bpid_offset = cpu_to_caam32(offset & SEC4_SG_OFFSET_MASK); 20 sec4_sg_ptr->bpid_offset = cpu_to_caam32(offset & SEC4_SG_OFFSET_MASK);
21#ifdef DEBUG 21#ifdef DEBUG