aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJohn Crispin <john@phrozen.org>2016-06-20 17:32:11 -0400
committerBoris Brezillon <boris.brezillon@free-electrons.com>2016-07-11 02:40:15 -0400
commite7e1f7be335458139e0a112bd0aae40d33dfe3a8 (patch)
tree7f18bc7c7077ada41cf0848683543fbd7e621dff
parent44772fa5ec4162ef133f1294299d1e1ada7d2d11 (diff)
mtd: nand: xway: fix nand locking
The external Bus Unit (EBU) can control different flash devices, but these NAND flash commands have to be atomic and should not be interrupted in between. Lock the EBU from the beginning of the command till the end by moving the lock to the chip select. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r--drivers/mtd/nand/xway_nand.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c
index ab93b3536877..08f796eaa624 100644
--- a/drivers/mtd/nand/xway_nand.c
+++ b/drivers/mtd/nand/xway_nand.c
@@ -65,17 +65,22 @@
65 65
66struct xway_nand_data { 66struct xway_nand_data {
67 struct nand_chip chip; 67 struct nand_chip chip;
68 unsigned long csflags;
68}; 69};
69 70
70static void xway_select_chip(struct mtd_info *mtd, int chip) 71static void xway_select_chip(struct mtd_info *mtd, int select)
71{ 72{
73 struct nand_chip *chip = mtd_to_nand(mtd);
74 struct xway_nand_data *data = nand_get_controller_data(chip);
72 75
73 switch (chip) { 76 switch (select) {
74 case -1: 77 case -1:
75 ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON); 78 ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
76 ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON); 79 ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
80 spin_unlock_irqrestore(&ebu_lock, data->csflags);
77 break; 81 break;
78 case 0: 82 case 0:
83 spin_lock_irqsave(&ebu_lock, data->csflags);
79 ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON); 84 ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
80 ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON); 85 ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
81 break; 86 break;
@@ -88,12 +93,10 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
88{ 93{
89 struct nand_chip *this = mtd_to_nand(mtd); 94 struct nand_chip *this = mtd_to_nand(mtd);
90 unsigned long nandaddr = (unsigned long) this->IO_ADDR_W; 95 unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
91 unsigned long flags;
92 96
93 if (cmd == NAND_CMD_NONE) 97 if (cmd == NAND_CMD_NONE)
94 return; 98 return;
95 99
96 spin_lock_irqsave(&ebu_lock, flags);
97 if (ctrl & NAND_CLE) 100 if (ctrl & NAND_CLE)
98 writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_CMD)); 101 writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_CMD));
99 else if (ctrl & NAND_ALE) 102 else if (ctrl & NAND_ALE)
@@ -101,7 +104,6 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
101 104
102 while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) 105 while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
103 ; 106 ;
104 spin_unlock_irqrestore(&ebu_lock, flags);
105} 107}
106 108
107static int xway_dev_ready(struct mtd_info *mtd) 109static int xway_dev_ready(struct mtd_info *mtd)
@@ -113,14 +115,8 @@ static unsigned char xway_read_byte(struct mtd_info *mtd)
113{ 115{
114 struct nand_chip *this = mtd_to_nand(mtd); 116 struct nand_chip *this = mtd_to_nand(mtd);
115 unsigned long nandaddr = (unsigned long) this->IO_ADDR_R; 117 unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
116 unsigned long flags;
117 int ret;
118 118
119 spin_lock_irqsave(&ebu_lock, flags); 119 return ltq_r8((void __iomem *)(nandaddr + NAND_READ_DATA));
120 ret = ltq_r8((void __iomem *)(nandaddr + NAND_READ_DATA));
121 spin_unlock_irqrestore(&ebu_lock, flags);
122
123 return ret;
124} 120}
125 121
126/* 122/*