diff options
author | James Liao <jamesjj.liao@mediatek.com> | 2015-07-28 03:37:34 -0400 |
---|---|---|
committer | James Liao <jamesjj.liao@mediatek.com> | 2015-10-01 00:04:49 -0400 |
commit | e02940fc9ed323ae512f3ded62abaf9d6a3d3265 (patch) | |
tree | 29d6a642c135c6f6b1e6147855ffd8741b48c73b | |
parent | 07d130698b8e1ecf1a72d294b5f89a26fea1ec6f (diff) |
clk: mediatek: Add __initdata and __init for data and functions
Add __init for clock registration functions, and add __initdata for
mtk_gate_regs initial structures.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
-rw-r--r-- | drivers/clk/mediatek/clk-gate.c | 2 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-mt8173.c | 6 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-mtk.c | 13 |
3 files changed, 11 insertions, 10 deletions
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c index 57020368a693..576bdb7c98b8 100644 --- a/drivers/clk/mediatek/clk-gate.c +++ b/drivers/clk/mediatek/clk-gate.c | |||
@@ -97,7 +97,7 @@ const struct clk_ops mtk_clk_gate_ops_setclr_inv = { | |||
97 | .disable = mtk_cg_disable_inv, | 97 | .disable = mtk_cg_disable_inv, |
98 | }; | 98 | }; |
99 | 99 | ||
100 | struct clk *mtk_clk_register_gate( | 100 | struct clk * __init mtk_clk_register_gate( |
101 | const char *name, | 101 | const char *name, |
102 | const char *parent_name, | 102 | const char *parent_name, |
103 | struct regmap *regmap, | 103 | struct regmap *regmap, |
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 63e32fdb660f..849507a02ec1 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c | |||
@@ -587,7 +587,7 @@ static const struct mtk_composite top_muxes[] __initconst = { | |||
587 | MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1), | 587 | MUX(CLK_TOP_I2S3_B_SEL, "i2s3_b_ck_sel", i2s3_b_ck_parents, 0x120, 8, 1), |
588 | }; | 588 | }; |
589 | 589 | ||
590 | static const struct mtk_gate_regs infra_cg_regs = { | 590 | static const struct mtk_gate_regs infra_cg_regs __initconst = { |
591 | .set_ofs = 0x0040, | 591 | .set_ofs = 0x0040, |
592 | .clr_ofs = 0x0044, | 592 | .clr_ofs = 0x0044, |
593 | .sta_ofs = 0x0048, | 593 | .sta_ofs = 0x0048, |
@@ -620,13 +620,13 @@ static const struct mtk_fixed_factor infra_divs[] __initconst = { | |||
620 | FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2), | 620 | FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2), |
621 | }; | 621 | }; |
622 | 622 | ||
623 | static const struct mtk_gate_regs peri0_cg_regs = { | 623 | static const struct mtk_gate_regs peri0_cg_regs __initconst = { |
624 | .set_ofs = 0x0008, | 624 | .set_ofs = 0x0008, |
625 | .clr_ofs = 0x0010, | 625 | .clr_ofs = 0x0010, |
626 | .sta_ofs = 0x0018, | 626 | .sta_ofs = 0x0018, |
627 | }; | 627 | }; |
628 | 628 | ||
629 | static const struct mtk_gate_regs peri1_cg_regs = { | 629 | static const struct mtk_gate_regs peri1_cg_regs __initconst = { |
630 | .set_ofs = 0x000c, | 630 | .set_ofs = 0x000c, |
631 | .clr_ofs = 0x0014, | 631 | .clr_ofs = 0x0014, |
632 | .sta_ofs = 0x001c, | 632 | .sta_ofs = 0x001c, |
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 18444aea63c9..268b6ff23aec 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include "clk-mtk.h" | 24 | #include "clk-mtk.h" |
25 | #include "clk-gate.h" | 25 | #include "clk-gate.h" |
26 | 26 | ||
27 | struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num) | 27 | struct clk_onecell_data * __init mtk_alloc_clk_data(unsigned int clk_num) |
28 | { | 28 | { |
29 | int i; | 29 | int i; |
30 | struct clk_onecell_data *clk_data; | 30 | struct clk_onecell_data *clk_data; |
@@ -49,8 +49,8 @@ err_out: | |||
49 | return NULL; | 49 | return NULL; |
50 | } | 50 | } |
51 | 51 | ||
52 | void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num, | 52 | void __init mtk_clk_register_factors(const struct mtk_fixed_factor *clks, |
53 | struct clk_onecell_data *clk_data) | 53 | int num, struct clk_onecell_data *clk_data) |
54 | { | 54 | { |
55 | int i; | 55 | int i; |
56 | struct clk *clk; | 56 | struct clk *clk; |
@@ -72,7 +72,8 @@ void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num, | |||
72 | } | 72 | } |
73 | } | 73 | } |
74 | 74 | ||
75 | int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks, | 75 | int __init mtk_clk_register_gates(struct device_node *node, |
76 | const struct mtk_gate *clks, | ||
76 | int num, struct clk_onecell_data *clk_data) | 77 | int num, struct clk_onecell_data *clk_data) |
77 | { | 78 | { |
78 | int i; | 79 | int i; |
@@ -111,7 +112,7 @@ int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks | |||
111 | return 0; | 112 | return 0; |
112 | } | 113 | } |
113 | 114 | ||
114 | struct clk *mtk_clk_register_composite(const struct mtk_composite *mc, | 115 | struct clk * __init mtk_clk_register_composite(const struct mtk_composite *mc, |
115 | void __iomem *base, spinlock_t *lock) | 116 | void __iomem *base, spinlock_t *lock) |
116 | { | 117 | { |
117 | struct clk *clk; | 118 | struct clk *clk; |
@@ -196,7 +197,7 @@ err_out: | |||
196 | return ERR_PTR(ret); | 197 | return ERR_PTR(ret); |
197 | } | 198 | } |
198 | 199 | ||
199 | void mtk_clk_register_composites(const struct mtk_composite *mcs, | 200 | void __init mtk_clk_register_composites(const struct mtk_composite *mcs, |
200 | int num, void __iomem *base, spinlock_t *lock, | 201 | int num, void __iomem *base, spinlock_t *lock, |
201 | struct clk_onecell_data *clk_data) | 202 | struct clk_onecell_data *clk_data) |
202 | { | 203 | { |