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authorDave Hansen <dave.hansen@linux.intel.com>2016-06-02 20:19:32 -0400
committerIngo Molnar <mingo@kernel.org>2016-06-08 07:03:25 -0400
commitdb73c5a8c80decbb6ddf208e58f3865b4df5384d (patch)
tree37fca2311711e9e6e5fa34bf381feb7c1815256a
parentd40671e30cb46e834651e0ce3d4590c915171414 (diff)
x86/intel_idle: Use Intel family macros for intel_idle
Use the new INTEL_FAM6_* macros for intel_idle.c. Also fix up some of the macros to be consistent with how some of the intel_idle code refers to the model. There's on oddity here: model 0x1F is uniquely referred to here and nowhere else that I could find. 0x1E/0x1F are just spelled out as "Intel Core i7 and i5 Processors" in the SDM or as "Intel processors based on the Nehalem, Westmere microarchitectures" in the RDPMC section. Comments between tables 19-19 and 19-20 in the SDM seem to point to 0x1F being some kind of Westmere, so let's call it "WESTMERE2". Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Len Brown <lenb@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: jacob.jun.pan@intel.com Cc: linux-pm@vger.kernel.org Link: http://lkml.kernel.org/r/20160603001932.EE978EB9@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r--drivers/idle/intel_idle.c71
1 files changed, 36 insertions, 35 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index c96649292b55..b5dd41d13d3d 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -62,6 +62,7 @@
62#include <linux/cpu.h> 62#include <linux/cpu.h>
63#include <linux/module.h> 63#include <linux/module.h>
64#include <asm/cpu_device_id.h> 64#include <asm/cpu_device_id.h>
65#include <asm/intel-family.h>
65#include <asm/mwait.h> 66#include <asm/mwait.h>
66#include <asm/msr.h> 67#include <asm/msr.h>
67 68
@@ -1020,38 +1021,38 @@ static const struct idle_cpu idle_cpu_bxt = {
1020 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } 1021 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
1021 1022
1022static const struct x86_cpu_id intel_idle_ids[] __initconst = { 1023static const struct x86_cpu_id intel_idle_ids[] __initconst = {
1023 ICPU(0x1a, idle_cpu_nehalem), 1024 ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem),
1024 ICPU(0x1e, idle_cpu_nehalem), 1025 ICPU(INTEL_FAM6_NEHALEM, idle_cpu_nehalem),
1025 ICPU(0x1f, idle_cpu_nehalem), 1026 ICPU(INTEL_FAM6_WESTMERE2, idle_cpu_nehalem),
1026 ICPU(0x25, idle_cpu_nehalem), 1027 ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem),
1027 ICPU(0x2c, idle_cpu_nehalem), 1028 ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem),
1028 ICPU(0x2e, idle_cpu_nehalem), 1029 ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem),
1029 ICPU(0x1c, idle_cpu_atom), 1030 ICPU(INTEL_FAM6_ATOM_PINEVIEW, idle_cpu_atom),
1030 ICPU(0x26, idle_cpu_lincroft), 1031 ICPU(INTEL_FAM6_ATOM_LINCROFT, idle_cpu_lincroft),
1031 ICPU(0x2f, idle_cpu_nehalem), 1032 ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem),
1032 ICPU(0x2a, idle_cpu_snb), 1033 ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb),
1033 ICPU(0x2d, idle_cpu_snb), 1034 ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
1034 ICPU(0x36, idle_cpu_atom), 1035 ICPU(INTEL_FAM6_ATOM_CEDARVIEW, idle_cpu_atom),
1035 ICPU(0x37, idle_cpu_byt), 1036 ICPU(INTEL_FAM6_ATOM_SILVERMONT1, idle_cpu_byt),
1036 ICPU(0x4c, idle_cpu_cht), 1037 ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
1037 ICPU(0x3a, idle_cpu_ivb), 1038 ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
1038 ICPU(0x3e, idle_cpu_ivt), 1039 ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
1039 ICPU(0x3c, idle_cpu_hsw), 1040 ICPU(INTEL_FAM6_HASWELL_CORE, idle_cpu_hsw),
1040 ICPU(0x3f, idle_cpu_hsw), 1041 ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw),
1041 ICPU(0x45, idle_cpu_hsw), 1042 ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw),
1042 ICPU(0x46, idle_cpu_hsw), 1043 ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw),
1043 ICPU(0x4d, idle_cpu_avn), 1044 ICPU(INTEL_FAM6_ATOM_SILVERMONT2, idle_cpu_avn),
1044 ICPU(0x3d, idle_cpu_bdw), 1045 ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw),
1045 ICPU(0x47, idle_cpu_bdw), 1046 ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw),
1046 ICPU(0x4f, idle_cpu_bdw), 1047 ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw),
1047 ICPU(0x56, idle_cpu_bdw), 1048 ICPU(INTEL_FAM6_BROADWELL_XEON_D, idle_cpu_bdw),
1048 ICPU(0x4e, idle_cpu_skl), 1049 ICPU(INTEL_FAM6_SKYLAKE_MOBILE, idle_cpu_skl),
1049 ICPU(0x5e, idle_cpu_skl), 1050 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP, idle_cpu_skl),
1050 ICPU(0x8e, idle_cpu_skl), 1051 ICPU(INTEL_FAM6_KABYLAKE_MOBILE, idle_cpu_skl),
1051 ICPU(0x9e, idle_cpu_skl), 1052 ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, idle_cpu_skl),
1052 ICPU(0x55, idle_cpu_skx), 1053 ICPU(INTEL_FAM6_SKYLAKE_X, idle_cpu_skx),
1053 ICPU(0x57, idle_cpu_knl), 1054 ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
1054 ICPU(0x5c, idle_cpu_bxt), 1055 ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
1055 {} 1056 {}
1056}; 1057};
1057MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); 1058MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
@@ -1261,13 +1262,13 @@ static void intel_idle_state_table_update(void)
1261{ 1262{
1262 switch (boot_cpu_data.x86_model) { 1263 switch (boot_cpu_data.x86_model) {
1263 1264
1264 case 0x3e: /* IVT */ 1265 case INTEL_FAM6_IVYBRIDGE_X:
1265 ivt_idle_state_table_update(); 1266 ivt_idle_state_table_update();
1266 break; 1267 break;
1267 case 0x5c: /* BXT */ 1268 case INTEL_FAM6_ATOM_GOLDMONT:
1268 bxt_idle_state_table_update(); 1269 bxt_idle_state_table_update();
1269 break; 1270 break;
1270 case 0x5e: /* SKL-H */ 1271 case INTEL_FAM6_SKYLAKE_DESKTOP:
1271 sklh_idle_state_table_update(); 1272 sklh_idle_state_table_update();
1272 break; 1273 break;
1273 } 1274 }