Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "As usual, we queue up a few fixes that don't seem urgent enough to go
  in through -rc.

   - a number of randconfig warning fixes from Arnd
   - various small fixes for OMAP
   - one somewhat larger patch to restore the OMAP3 cpuidle tuning that
     was lost in a cleanup
   - a small regression fix for cns3xxx PCI"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  CNS3xxx: Fix PCI cns3xxx_write_config()
  MAINTAINERS: unify email addrs for Kevin Hilman
  CNS3xxx: remove unused *_VIRT definitions
  ARM: OMAP2+: Fix hwmod clock for l4_ls
  soc: TI knav_qmss: fix dma_addr_t printing
  ARM: prima2: always enable reset controller
  ARM: socfpga: hide unused functions
  ARM: ux500: fix ureachable iounmap()
  ARM: ks8695: fix __initdata annotation
  ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
  ARM: mv78xx0: avoid unused function warning
  ARM: orion: only select I2C_BOARDINFO when using I2C
  ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
  ARM: OMAP3: Add cpuidle parameters table for omap3430
  ARM: davinci: make I2C support optional
  ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
  ARM: davinci: avoid unused mityomapl138_pn_info variable
  ARM: davinci: limit DT support to DA850
  ARM: DRA7: hwmod: Add reset data for PCIe
  ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
  ...

32 files changed, 195 insertions, 121 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index 606528bb16af..871818cf9409 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7887,7 +7887,7 @@ S:	Maintained
 F:      arch/arm/*omap*/*clock*
 
 OMAP POWER MANAGEMENT SUPPORT
-M:      Kevin Hilman <khilman@deeprootsystems.com>
+M:      Kevin Hilman <khilman@kernel.org>
 L:      linux-omap@vger.kernel.org
 S:      Maintained
 F:      arch/arm/*omap*/*pm*
@@ -7991,7 +7991,7 @@ F:	arch/arm/*omap*/usb*
 OMAP GPIO DRIVER
 M:      Grygorii Strashko <grygorii.strashko@ti.com>
 M:      Santosh Shilimkar <ssantosh@kernel.org>
-M:      Kevin Hilman <khilman@deeprootsystems.com>
+M:      Kevin Hilman <khilman@kernel.org>
 L:      linux-omap@vger.kernel.org
 S:      Maintained
 F:      Documentation/devicetree/bindings/gpio/gpio-omap.txt
@@ -10048,7 +10048,7 @@ F:	arch/arm/mach-s3c24xx/bast-irq.c
 
 TI DAVINCI MACHINE SUPPORT
 M:      Sekhar Nori <nsekhar@ti.com>
-M:      Kevin Hilman <khilman@deeprootsystems.com>
+M:      Kevin Hilman <khilman@kernel.org>
 T:      git git://gitorious.org/linux-davinci/linux-davinci.git
 Q:      http://patchwork.kernel.org/project/linux-davinci/list/
 S:      Supported
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f6c185f2d8b0..99c11433115e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -622,6 +622,7 @@ config ARCH_DAVINCI
         select ARCH_HAS_HOLES_MEMORYMODEL
         select ARCH_REQUIRE_GPIOLIB
         select CLKDEV_LOOKUP
+        select CPU_ARM926T
         select GENERIC_ALLOCATOR
         select GENERIC_CLOCKEVENTS
         select GENERIC_IRQ_CHIP
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 9c93f5655248..0b02e4f43c6a 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -158,6 +158,7 @@ CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_S3C2410=y
 CONFIG_I2C_SIMTEC=y
+CONFIG_EEPROM_AT24=y
 CONFIG_SPI=y
 CONFIG_SPI_S3C24XX=y
 CONFIG_SPI_SPIDEV=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index f3142369f594..b3ade552a2a5 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -290,6 +290,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_S3C2410=y
 CONFIG_I2C_SIMTEC=y
+CONFIG_EEPROM_AT24=y
 CONFIG_SPI=y
 CONFIG_SPI_GPIO=m
 CONFIG_SPI_S3C24XX=m
diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h
index a0f5b60662ae..a642ba5feb64 100644
--- a/arch/arm/mach-cns3xxx/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
@@ -162,13 +162,11 @@
 #define CNS3XXX_L2C_BASE                        0x92000000      /* L2 Cache Control */
 
 #define CNS3XXX_PCIE0_MEM_BASE                  0xA0000000      /* PCIe Port 0 IO/Memory Space */
-#define CNS3XXX_PCIE0_MEM_BASE_VIRT             0xE0000000
 
 #define CNS3XXX_PCIE0_HOST_BASE                 0xAB000000      /* PCIe Port 0 RC Base */
 #define CNS3XXX_PCIE0_HOST_BASE_VIRT            0xE1000000
 
 #define CNS3XXX_PCIE0_IO_BASE                   0xAC000000      /* PCIe Port 0 */
-#define CNS3XXX_PCIE0_IO_BASE_VIRT              0xE2000000
 
 #define CNS3XXX_PCIE0_CFG0_BASE                 0xAD000000      /* PCIe Port 0 CFG Type 0 */
 #define CNS3XXX_PCIE0_CFG0_BASE_VIRT            0xE3000000
@@ -177,16 +175,13 @@
 #define CNS3XXX_PCIE0_CFG1_BASE_VIRT            0xE4000000
 
 #define CNS3XXX_PCIE0_MSG_BASE                  0xAF000000      /* PCIe Port 0 Message Space */
-#define CNS3XXX_PCIE0_MSG_BASE_VIRT             0xE5000000
 
 #define CNS3XXX_PCIE1_MEM_BASE                  0xB0000000      /* PCIe Port 1 IO/Memory Space */
-#define CNS3XXX_PCIE1_MEM_BASE_VIRT             0xE8000000
 
 #define CNS3XXX_PCIE1_HOST_BASE                 0xBB000000      /* PCIe Port 1 RC Base */
 #define CNS3XXX_PCIE1_HOST_BASE_VIRT            0xE9000000
 
 #define CNS3XXX_PCIE1_IO_BASE                   0xBC000000      /* PCIe Port 1 */
-#define CNS3XXX_PCIE1_IO_BASE_VIRT              0xEA000000
 
 #define CNS3XXX_PCIE1_CFG0_BASE                 0xBD000000      /* PCIe Port 1 CFG Type 0 */
 #define CNS3XXX_PCIE1_CFG0_BASE_VIRT            0xEB000000
@@ -195,7 +190,6 @@
 #define CNS3XXX_PCIE1_CFG1_BASE_VIRT            0xEC000000
 
 #define CNS3XXX_PCIE1_MSG_BASE                  0xBF000000      /* PCIe Port 1 Message Space */
-#define CNS3XXX_PCIE1_MSG_BASE_VIRT             0xED000000
 
 /*
  * Testchip peripheral and fpga gic regions
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 47905a50e075..318394ed5c7a 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -220,13 +220,13 @@ static void cns3xxx_write_config(struct cns3xxx_pcie *cnspci,
         u32 mask = (0x1ull << (size * 8)) - 1;
         int shift = (where % 4) * 8;
 
-        v = readl_relaxed(base + (where & 0xffc));
+        v = readl_relaxed(base);
 
         v &= ~(mask << shift);
         v |= (val & mask) << shift;
 
-        writel_relaxed(v, base + (where & 0xffc));
-        readl_relaxed(base + (where & 0xffc));
+        writel_relaxed(v, base);
+        readl_relaxed(base);
 }
 
 static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index bcaf1d025505..36c8f5324e43 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -9,7 +9,6 @@ config CP_INTC
 
 config ARCH_DAVINCI_DMx
         bool
-        select CPU_ARM926T
 
 menu "TI DaVinci Implementations"
 
@@ -32,7 +31,7 @@ config ARCH_DAVINCI_DM646x
 
 config ARCH_DAVINCI_DA830
         bool "DA830/OMAP-L137/AM17x based system"
-        depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
+        depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT)
         select ARCH_DAVINCI_DA8XX
         # needed on silicon revs 1.0, 1.1:
         select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE
@@ -40,13 +39,12 @@ config ARCH_DAVINCI_DA830
 
 config ARCH_DAVINCI_DA850
         bool "DA850/OMAP-L138/AM18x based system"
-        depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
+        depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT)
         select ARCH_DAVINCI_DA8XX
         select CP_INTC
 
 config ARCH_DAVINCI_DA8XX
         bool
-        select CPU_ARM926T
 
 config ARCH_DAVINCI_DM365
         bool "DaVinci 365 based system"
@@ -58,7 +56,7 @@ comment "DaVinci Board Type"
 config MACH_DA8XX_DT
         bool "Support DA8XX platforms using device tree"
         default y
-        depends on ARCH_DAVINCI_DA8XX
+        depends on ARCH_DAVINCI_DA850
         select PINCTRL
         help
           Say y here to include support for TI DaVinci DA850 based using
@@ -68,8 +66,6 @@ config MACH_DAVINCI_EVM
         bool "TI DM644x EVM"
         default ARCH_DAVINCI_DM644x
         depends on ARCH_DAVINCI_DM644x
-        select EEPROM_AT24
-        select I2C
         help
           Configure this option to specify the whether the board used
           for development is a DM644x EVM
@@ -77,8 +73,6 @@ config MACH_DAVINCI_EVM
 config MACH_SFFSDR
         bool "Lyrtech SFFSDR"
         depends on ARCH_DAVINCI_DM644x
-        select EEPROM_AT24
-        select I2C
         help
           Say Y here to select the Lyrtech Small Form Factor
           Software Defined Radio (SFFSDR) board.
@@ -109,8 +103,6 @@ config MACH_DAVINCI_DM6467_EVM
         bool "TI DM6467 EVM"
         default ARCH_DAVINCI_DM646x
         depends on ARCH_DAVINCI_DM646x
-        select EEPROM_AT24
-        select I2C
         select MACH_DAVINCI_DM6467TEVM
         help
           Configure this option to specify the whether the board used
@@ -123,8 +115,6 @@ config MACH_DAVINCI_DM365_EVM
         bool "TI DM365 EVM"
         default ARCH_DAVINCI_DM365
         depends on ARCH_DAVINCI_DM365
-        select EEPROM_AT24
-        select I2C
         help
           Configure this option to specify whether the board used
           for development is a DM365 EVM
@@ -133,9 +123,7 @@ config MACH_DAVINCI_DA830_EVM
         bool "TI DA830/OMAP-L137/AM17x Reference Platform"
         default ARCH_DAVINCI_DA830
         depends on ARCH_DAVINCI_DA830
-        select EEPROM_AT24
-        select GPIO_PCF857X
-        select I2C
+        select GPIO_PCF857X if I2C
         help
           Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
 
@@ -204,8 +192,6 @@ endchoice
 config MACH_MITYOMAPL138
         bool "Critical Link MityDSP-L138/MityARM-1808 SoM"
         depends on ARCH_DAVINCI_DA850
-        select EEPROM_AT24
-        select I2C
         help
           Say Y here to select the Critical Link MityDSP-L138/MityARM-1808
           System on Module.  Information on this SoM may be found at
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 7a20507a3eef..68cc09907828 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -267,7 +267,7 @@ static struct platform_device rtc_dev = {
 static struct snd_platform_data dm644x_evm_snd_data;
 
 /*----------------------------------------------------------------------*/
-
+#ifdef CONFIG_I2C
 /*
  * I2C GPIO expanders
  */
@@ -612,6 +612,7 @@ static void __init evm_init_i2c(void)
         i2c_add_driver(&dm6446evm_msp_driver);
         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 }
+#endif
 
 #define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
 
@@ -780,7 +781,9 @@ static __init void davinci_evm_init(void)
                                 pr_warn("%s: Cannot configure AEMIF\n",
                                         __func__);
 
+#ifdef CONFIG_I2C
                         evm_leds[7].default_trigger = "nand-disk";
+#endif
                         if (HAS_NOR)
                                 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
                 } else if (HAS_NOR)
@@ -789,9 +792,10 @@ static __init void davinci_evm_init(void)
 
         platform_add_devices(davinci_evm_devices,
                              ARRAY_SIZE(davinci_evm_devices));
+#ifdef CONFIG_I2C
         evm_init_i2c();
-
         davinci_setup_mmc(0, &dm6446evm_mmc_config);
+#endif
         dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
 
         davinci_serial_init(dm644x_serial_device);
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index ee6ab7e8d3b0..f702d4fc8eb8 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -121,6 +121,7 @@ static struct platform_device davinci_nand_device = {
 
 #define HAS_ATA         IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
 
+#ifdef CONFIG_I2C
 /* CPLD Register 0 bits to control ATA */
 #define DM646X_EVM_ATA_RST              BIT(0)
 #define DM646X_EVM_ATA_PWD              BIT(1)
@@ -316,6 +317,7 @@ static struct at24_platform_data eeprom_info = {
         .setup          = davinci_get_mac_addr,
         .context        = (void *)0x7f00,
 };
+#endif
 
 static u8 dm646x_iis_serializer_direction[] = {
        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
@@ -346,6 +348,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
         },
 };
 
+#ifdef CONFIG_I2C
 static struct i2c_client *cpld_client;
 
 static int cpld_video_probe(struct i2c_client *client,
@@ -710,6 +713,7 @@ static void __init evm_init_i2c(void)
         evm_init_cpld();
         evm_init_video();
 }
+#endif
 
 #define DM6467T_EVM_REF_FREQ            33000000
 
@@ -764,7 +768,10 @@ static __init void evm_init(void)
         if (ret)
                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
 
+#ifdef CONFIG_I2C
         evm_init_i2c();
+#endif
+
         davinci_serial_init(dm646x_serial_device);
         dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
         dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 62ebac51bab9..d97c588550ad 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -51,6 +51,7 @@ struct factory_config {
 
 static struct factory_config factory_config;
 
+#ifdef CONFIG_CPU_FREQ
 struct part_no_info {
         const char      *part_no;       /* part number string of interest */
         int             max_freq;       /* khz */
@@ -87,7 +88,6 @@ static struct part_no_info mityomapl138_pn_info[] = {
         },
 };
 
-#ifdef CONFIG_CPU_FREQ
 static void mityomapl138_cpufreq_init(const char *partnum)
 {
         int i, ret;
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig
index d8c439c89ea9..0bd6d894c597 100644
--- a/arch/arm/mach-dove/Kconfig
+++ b/arch/arm/mach-dove/Kconfig
@@ -8,7 +8,7 @@ config DOVE_LEGACY
 config MACH_DOVE_DB
         bool "Marvell DB-MV88AP510 Development Board"
         select DOVE_LEGACY
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Marvell DB-MV88AP510 Development Board.
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 652a0bb11578..5189bcecad12 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -27,6 +27,7 @@ menuconfig ARCH_EXYNOS
         select S5P_DEV_MFC
         select SRAM
         select THERMAL
+        select THERMAL_OF
         select MFD_SYSCON
         select CLKSRC_EXYNOS_MCT
         select POWER_RESET
diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c
index 1f4f2f4f25bb..478ebd1f2b0f 100644
--- a/arch/arm/mach-ks8695/board-og.c
+++ b/arch/arm/mach-ks8695/board-og.c
@@ -80,7 +80,7 @@ static void __init og_pci_bus_reset(void)
 #define S8250_VIRT      0xf4000000
 #define S8250_SIZE      0x00100000
 
-static struct __initdata map_desc og_io_desc[] = {
+static struct map_desc og_io_desc[] __initdata = {
         {
                 .virtual        = S8250_VIRT,
                 .pfn            = __phys_to_pfn(S8250_PHYS),
diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c
index 474a050da85b..7a1c4caa1ab5 100644
--- a/arch/arm/mach-ks8695/cpu.c
+++ b/arch/arm/mach-ks8695/cpu.c
@@ -34,7 +34,7 @@
 #include <mach/regs-misc.h>
 
 
-static struct __initdata map_desc ks8695_io_desc[] = {
+static struct map_desc ks8695_io_desc[] __initdata = {
         {
                 .virtual        = (unsigned long)KS8695_IO_VA,
                 .pfn            = __phys_to_pfn(KS8695_IO_PA),
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index a1a04df9c05c..99cc93900a24 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -405,9 +405,8 @@ void __init mv78xx0_init(void)
         printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000);
         printk("TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);
 
-#ifdef CONFIG_CACHE_FEROCEON_L2
-        feroceon_l2_init(is_l2_writethrough());
-#endif
+        if (IS_ENABLED(CONFIG_CACHE_FEROCEON_L2))
+                feroceon_l2_init(is_l2_writethrough());
 
         /* Setup root of clk tree */
         clk_init();
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 55348ee5a352..7e989d61159c 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -107,7 +107,7 @@ static struct notifier_block mvebu_hwcc_nb = {
         .notifier_call = mvebu_hwcc_notifier,
 };
 
-static struct notifier_block mvebu_hwcc_pci_nb = {
+static struct notifier_block mvebu_hwcc_pci_nb __maybe_unused = {
         .notifier_call = mvebu_hwcc_notifier,
 };
 
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index cf5855174c93..1662071bb2cc 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -36,7 +36,6 @@
 
 static void __iomem *omap2_ctrl_base;
 static s16 omap2_ctrl_offset;
-static struct regmap *omap2_ctrl_syscon;
 
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
 struct omap3_scratchpad {
@@ -166,16 +165,9 @@ u16 omap_ctrl_readw(u16 offset)
 
 u32 omap_ctrl_readl(u16 offset)
 {
-        u32 val;
-
         offset &= 0xfffc;
-        if (!omap2_ctrl_syscon)
-                val = readl_relaxed(omap2_ctrl_base + offset);
-        else
-                regmap_read(omap2_ctrl_syscon, omap2_ctrl_offset + offset,
-                            &val);
 
-        return val;
+        return readl_relaxed(omap2_ctrl_base + offset);
 }
 
 void omap_ctrl_writeb(u8 val, u16 offset)
@@ -207,11 +199,7 @@ void omap_ctrl_writew(u16 val, u16 offset)
 void omap_ctrl_writel(u32 val, u16 offset)
 {
         offset &= 0xfffc;
-        if (!omap2_ctrl_syscon)
-                writel_relaxed(val, omap2_ctrl_base + offset);
-        else
-                regmap_write(omap2_ctrl_syscon, omap2_ctrl_offset + offset,
-                             val);
+        writel_relaxed(val, omap2_ctrl_base + offset);
 }
 
 #ifdef CONFIG_ARCH_OMAP3
@@ -715,8 +703,6 @@ int __init omap_control_init(void)
                         if (IS_ERR(syscon))
                                 return PTR_ERR(syscon);
 
-                        omap2_ctrl_syscon = syscon;
-
                         if (of_get_child_by_name(scm_conf, "clocks")) {
                                 ret = omap2_clk_provider_init(scm_conf,
                                                               data->index,
@@ -724,9 +710,6 @@ int __init omap_control_init(void)
                                 if (ret)
                                         return ret;
                         }
-
-                        iounmap(omap2_ctrl_base);
-                        omap2_ctrl_base = NULL;
                 } else {
                         /* No scm_conf found, direct access */
                         ret = omap2_clk_provider_init(np, data->index, NULL,
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index aa7b379e2661..2a3db0bd9e15 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
 #include "pm.h"
 #include "control.h"
 #include "common.h"
+#include "soc.h"
 
 /* Mach specific information to be recorded in the C-state driver_data */
 struct omap3_idle_statedata {
@@ -315,6 +316,69 @@ static struct cpuidle_driver omap3_idle_driver = {
         .safe_state_index = 0,
 };
 
+/*
+ * Numbers based on measurements made in October 2009 for PM optimized kernel
+ * with CPU freq enabled on device Nokia N900. Assumes OPP2 (main idle OPP,
+ * and worst case latencies).
+ */
+static struct cpuidle_driver omap3430_idle_driver = {
+        .name             = "omap3430_idle",
+        .owner            = THIS_MODULE,
+        .states = {
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 110 + 162,
+                        .target_residency = 5,
+                        .name             = "C1",
+                        .desc             = "MPU ON + CORE ON",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 106 + 180,
+                        .target_residency = 309,
+                        .name             = "C2",
+                        .desc             = "MPU ON + CORE ON",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 107 + 410,
+                        .target_residency = 46057,
+                        .name             = "C3",
+                        .desc             = "MPU RET + CORE ON",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 121 + 3374,
+                        .target_residency = 46057,
+                        .name             = "C4",
+                        .desc             = "MPU OFF + CORE ON",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 855 + 1146,
+                        .target_residency = 46057,
+                        .name             = "C5",
+                        .desc             = "MPU RET + CORE RET",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 7580 + 4134,
+                        .target_residency = 484329,
+                        .name             = "C6",
+                        .desc             = "MPU OFF + CORE RET",
+                },
+                {
+                        .enter            = omap3_enter_idle_bm,
+                        .exit_latency     = 7505 + 15274,
+                        .target_residency = 484329,
+                        .name             = "C7",
+                        .desc             = "MPU OFF + CORE OFF",
+                },
+        },
+        .state_count = ARRAY_SIZE(omap3_idle_data),
+        .safe_state_index = 0,
+};
+
 /* Public functions */
 
 /**
@@ -333,5 +397,8 @@ int __init omap3_idle_init(void)
         if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
                 return -ENODEV;
 
-        return cpuidle_register(&omap3_idle_driver, NULL);
+        if (cpu_is_omap3430())
+                return cpuidle_register(&omap3430_idle_driver, NULL);
+        else
+                return cpuidle_register(&omap3_idle_driver, NULL);
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 0a985325cd64..9869a75c5d96 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3583,14 +3583,14 @@ static struct omap_hwmod_class_sysconfig omap34xx_ssi_sysc = {
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
-static struct omap_hwmod_class omap34xx_ssi_hwmod_class = {
+static struct omap_hwmod_class omap3xxx_ssi_hwmod_class = {
         .name   = "ssi",
         .sysc   = &omap34xx_ssi_sysc,
 };
 
-static struct omap_hwmod omap34xx_ssi_hwmod = {
+static struct omap_hwmod omap3xxx_ssi_hwmod = {
         .name           = "ssi",
-        .class          = &omap34xx_ssi_hwmod_class,
+        .class          = &omap3xxx_ssi_hwmod_class,
         .clkdm_name     = "core_l4_clkdm",
         .main_clk       = "ssi_ssr_fck",
         .prcm           = {
@@ -3605,9 +3605,9 @@ static struct omap_hwmod omap34xx_ssi_hwmod = {
 };
 
 /* L4 CORE -> SSI */
-static struct omap_hwmod_ocp_if omap34xx_l4_core__ssi = {
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__ssi = {
         .master         = &omap3xxx_l4_core_hwmod,
-        .slave          = &omap34xx_ssi_hwmod,
+        .slave          = &omap3xxx_ssi_hwmod,
         .clk            = "ssi_ick",
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
@@ -3760,7 +3760,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {
         &omap3xxx_sad2d__l3,
         &omap3xxx_l4_core__mmu_isp,
         &omap3xxx_l3_main__mmu_iva,
-        &omap34xx_l4_core__ssi,
+        &omap3xxx_l4_core__ssi,
         NULL
 };
 
@@ -3784,6 +3784,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {
         &omap3xxx_sad2d__l3,
         &omap3xxx_l4_core__mmu_isp,
         &omap3xxx_l3_main__mmu_iva,
+        &omap3xxx_l4_core__ssi,
         NULL
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 848356e38b74..b61355e2a771 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1482,8 +1482,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_ocp2scp_sysc = {
         .syss_offs      = 0x0014,
         .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
                            SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           SIDLE_SMART_WKUP),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -1532,14 +1531,21 @@ static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
 };
 
 /* pcie1 */
+static struct omap_hwmod_rst_info dra7xx_pciess1_resets[] = {
+        { .name = "pcie", .rst_shift = 0 },
+};
+
 static struct omap_hwmod dra7xx_pciess1_hwmod = {
         .name           = "pcie1",
         .class          = &dra7xx_pciess_hwmod_class,
         .clkdm_name     = "pcie_clkdm",
+        .rst_lines      = dra7xx_pciess1_resets,
+        .rst_lines_cnt  = ARRAY_SIZE(dra7xx_pciess1_resets),
         .main_clk       = "l4_root_clk_div",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
+                        .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
                         .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
@@ -1547,14 +1553,22 @@ static struct omap_hwmod dra7xx_pciess1_hwmod = {
 };
 
 /* pcie2 */
+static struct omap_hwmod_rst_info dra7xx_pciess2_resets[] = {
+        { .name = "pcie", .rst_shift = 1 },
+};
+
+/* pcie2 */
 static struct omap_hwmod dra7xx_pciess2_hwmod = {
         .name           = "pcie2",
         .class          = &dra7xx_pciess_hwmod_class,
         .clkdm_name     = "pcie_clkdm",
+        .rst_lines      = dra7xx_pciess2_resets,
+        .rst_lines_cnt  = ARRAY_SIZE(dra7xx_pciess2_resets),
         .main_clk       = "l4_root_clk_div",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET,
+                        .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
                         .context_offs = DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET,
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e493ae372910..f8cc40021729 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -429,6 +429,7 @@ static struct omap_hwmod dm81xx_elm_hwmod = {
 static struct omap_hwmod_ocp_if dm81xx_l4_ls__elm = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm81xx_elm_hwmod,
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -478,6 +479,7 @@ static struct omap_hwmod dm81xx_gpio1_hwmod = {
 static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio1 = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm81xx_gpio1_hwmod,
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -504,6 +506,7 @@ static struct omap_hwmod dm81xx_gpio2_hwmod = {
 static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio2 = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm81xx_gpio2_hwmod,
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -628,7 +631,7 @@ static struct omap_hwmod dm814x_timer1_hwmod = {
 static struct omap_hwmod_ocp_if dm814x_l4_ls__timer1 = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm814x_timer1_hwmod,
-        .clk            = "timer1_fck",
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -665,7 +668,7 @@ static struct omap_hwmod dm814x_timer2_hwmod = {
 static struct omap_hwmod_ocp_if dm814x_l4_ls__timer2 = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm814x_timer2_hwmod,
-        .clk            = "timer2_fck",
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -1123,6 +1126,7 @@ static struct omap_hwmod dm81xx_mailbox_hwmod = {
 static struct omap_hwmod_ocp_if dm81xx_l4_ls__mailbox = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm81xx_mailbox_hwmod,
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
@@ -1157,6 +1161,7 @@ static struct omap_hwmod dm81xx_spinbox_hwmod = {
 static struct omap_hwmod_ocp_if dm81xx_l4_ls__spinbox = {
         .master         = &dm81xx_l4_ls_hwmod,
         .slave          = &dm81xx_spinbox_hwmod,
+        .clk            = "sysclk6_ck",
         .user           = OCP_USER_MPU,
 };
 
diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h
index cc1e6a2b97f6..294deed956f3 100644
--- a/arch/arm/mach-omap2/prm7xx.h
+++ b/arch/arm/mach-omap2/prm7xx.h
@@ -360,6 +360,7 @@
 /* PRM.L3INIT_PRM register offsets */
 #define DRA7XX_PM_L3INIT_PWRSTCTRL_OFFSET                       0x0000
 #define DRA7XX_PM_L3INIT_PWRSTST_OFFSET                         0x0004
+#define DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET                  0x0010
 #define DRA7XX_PM_L3INIT_MMC1_WKDEP_OFFSET                      0x0028
 #define DRA7XX_RM_L3INIT_MMC1_CONTEXT_OFFSET                    0x002c
 #define DRA7XX_PM_L3INIT_MMC2_WKDEP_OFFSET                      0x0030
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index a9ad95f000a1..a2af15822fcb 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -28,14 +28,14 @@ config ARCH_ORION5X_DT
 
 config MACH_DB88F5281
         bool "Marvell Orion-2 Development Board"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Marvell Orion-2 (88F5281) Development Board
 
 config MACH_RD88F5182
         bool "Marvell Orion-NAS Reference Design"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Marvell Orion-NAS (88F5182) RD2
@@ -43,14 +43,14 @@ config MACH_RD88F5182
 config MACH_RD88F5182_DT
         bool "Marvell Orion-NAS Reference Design (Flattened Device Tree)"
         select ARCH_ORION5X_DT
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the Marvell
           Orion-NAS (88F5182) RD2, Flattened Device Tree.
 
 config MACH_KUROBOX_PRO
         bool "KuroBox Pro"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           KuroBox Pro platform.
@@ -58,7 +58,7 @@ config MACH_KUROBOX_PRO
 config MACH_DNS323
         bool "D-Link DNS-323"
         select GENERIC_NET_UTILS
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           D-Link DNS-323 platform.
@@ -78,7 +78,7 @@ config MACH_TERASTATION_PRO2
 
 config MACH_LINKSTATION_PRO
         bool "Buffalo Linkstation Pro/Live"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Buffalo Linkstation Pro/Live platform. Both v1 and
@@ -86,7 +86,7 @@ config MACH_LINKSTATION_PRO
 
 config MACH_LINKSTATION_LSCHL
         bool "Buffalo Linkstation Live v3 (LS-CHL)"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Buffalo Linkstation Live v3 (LS-CHL) platform.
@@ -100,7 +100,7 @@ config MACH_LINKSTATION_MINI
 
 config MACH_LINKSTATION_LS_HGL
         bool "Buffalo Linkstation LS-HGL"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           Buffalo Linkstation LS-HGL platform.
@@ -139,7 +139,7 @@ config MACH_D2NET_DT
 
 config MACH_NET2BIG
         bool "LaCie 2Big Network"
-        select I2C_BOARDINFO
+        select I2C_BOARDINFO if I2C
         help
           Say 'Y' here if you want your kernel to support the
           LaCie 2Big Network NAS.
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index f998eb1c698e..0cf4426183cf 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -2,6 +2,7 @@ menuconfig ARCH_SIRF
         bool "CSR SiRF"
         depends on ARCH_MULTI_V7
         select ARCH_HAS_RESET_CONTROLLER
+        select RESET_CONTROLLER
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_IRQ_CHIP
         select NO_IOPORT_MAP
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index ef68ecb27396..5884bbb7952e 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -405,7 +405,7 @@ config MACH_S3C2416_DT
 
 endif   # CPU_S3C2416
 
-if CPU_S3C2440
+if CPU_S3C2440 || CPU_S3C2442
 
 config S3C2440_XTAL_12000000
         bool
@@ -432,6 +432,9 @@ config S3C2440_PLL_16934400
         default y if S3C24XX_PLL
         help
           PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
+endif
+
+if CPU_S3C2440
 
 comment "S3C2440 Boards"
 
@@ -460,7 +463,6 @@ config MACH_AT2440EVB
 
 config MACH_MINI2440
         bool "MINI2440 development board"
-        select EEPROM_AT24 if I2C
         select LEDS_CLASS
         select LEDS_TRIGGERS
         select LEDS_TRIGGER_BACKLIGHT
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 6d1e0b9c5b27..27ae6877550f 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -154,6 +154,7 @@ static struct s3c2410_uartcfg gta02_uartcfgs[] = {
 #define ADC_NOM_CHG_DETECT_1A 6
 #define ADC_NOM_CHG_DETECT_USB 43
 
+#ifdef CONFIG_PCF50633_ADC
 static void
 gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res)
 {
@@ -174,6 +175,7 @@ gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res)
 
         pcf50633_mbc_usb_curlim_set(pcf, ma);
 }
+#endif
 
 static struct delayed_work gta02_charger_work;
 static int gta02_usb_vbus_draw;
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8a894ee3ee76..92ec8c3b42b9 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -216,7 +216,7 @@ static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
         REGULATOR_SUPPLY("AVDD", "0-001b"),
 };
 
-static struct regulator_init_data smdk6410_b_pwr_5v_data = {
+static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = {
         .constraints = {
                 .always_on = 1,
         },
@@ -300,7 +300,7 @@ static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 };
 
 /* VDDARM, BUCK1 on J5 */
-static struct regulator_init_data smdk6410_vddarm = {
+static struct regulator_init_data __maybe_unused smdk6410_vddarm = {
         .constraints = {
                 .name = "PVDD_ARM",
                 .min_uV = 1000000,
@@ -313,7 +313,7 @@ static struct regulator_init_data smdk6410_vddarm = {
 };
 
 /* VDD_INT, BUCK2 on J5 */
-static struct regulator_init_data smdk6410_vddint = {
+static struct regulator_init_data __maybe_unused smdk6410_vddint = {
         .constraints = {
                 .name = "PVDD_INT",
                 .min_uV = 1000000,
@@ -324,7 +324,7 @@ static struct regulator_init_data smdk6410_vddint = {
 };
 
 /* VDD_HI, LDO3 on J5 */
-static struct regulator_init_data smdk6410_vddhi = {
+static struct regulator_init_data __maybe_unused smdk6410_vddhi = {
         .constraints = {
                 .name = "PVDD_HI",
                 .always_on = 1,
@@ -332,7 +332,7 @@ static struct regulator_init_data smdk6410_vddhi = {
 };
 
 /* VDD_PLL, LDO2 on J5 */
-static struct regulator_init_data smdk6410_vddpll = {
+static struct regulator_init_data __maybe_unused smdk6410_vddpll = {
         .constraints = {
                 .name = "PVDD_PLL",
                 .always_on = 1,
@@ -340,7 +340,7 @@ static struct regulator_init_data smdk6410_vddpll = {
 };
 
 /* VDD_UH_MMC, LDO5 on J5 */
-static struct regulator_init_data smdk6410_vdduh_mmc = {
+static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = {
         .constraints = {
                 .name = "PVDD_UH+PVDD_MMC",
                 .always_on = 1,
@@ -348,7 +348,7 @@ static struct regulator_init_data smdk6410_vdduh_mmc = {
 };
 
 /* VCCM3BT, LDO8 on J5 */
-static struct regulator_init_data smdk6410_vccmc3bt = {
+static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = {
         .constraints = {
                 .name = "PVCCM3BT",
                 .always_on = 1,
@@ -356,7 +356,7 @@ static struct regulator_init_data smdk6410_vccmc3bt = {
 };
 
 /* VCCM2MTV, LDO11 on J5 */
-static struct regulator_init_data smdk6410_vccm2mtv = {
+static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = {
         .constraints = {
                 .name = "PVCCM2MTV",
                 .always_on = 1,
@@ -364,7 +364,7 @@ static struct regulator_init_data smdk6410_vccm2mtv = {
 };
 
 /* VDD_LCD, LDO12 on J5 */
-static struct regulator_init_data smdk6410_vddlcd = {
+static struct regulator_init_data __maybe_unused smdk6410_vddlcd = {
         .constraints = {
                 .name = "PVDD_LCD",
                 .always_on = 1,
@@ -372,7 +372,7 @@ static struct regulator_init_data smdk6410_vddlcd = {
 };
 
 /* VDD_OTGI, LDO9 on J5 */
-static struct regulator_init_data smdk6410_vddotgi = {
+static struct regulator_init_data __maybe_unused smdk6410_vddotgi = {
         .constraints = {
                 .name = "PVDD_OTGI",
                 .always_on = 1,
@@ -380,7 +380,7 @@ static struct regulator_init_data smdk6410_vddotgi = {
 };
 
 /* VDD_OTG, LDO14 on J5 */
-static struct regulator_init_data smdk6410_vddotg = {
+static struct regulator_init_data __maybe_unused smdk6410_vddotg = {
         .constraints = {
                 .name = "PVDD_OTG",
                 .always_on = 1,
@@ -388,7 +388,7 @@ static struct regulator_init_data smdk6410_vddotg = {
 };
 
 /* VDD_ALIVE, LDO15 on J5 */
-static struct regulator_init_data smdk6410_vddalive = {
+static struct regulator_init_data __maybe_unused smdk6410_vddalive = {
         .constraints = {
                 .name = "PVDD_ALIVE",
                 .always_on = 1,
@@ -396,7 +396,7 @@ static struct regulator_init_data smdk6410_vddalive = {
 };
 
 /* VDD_AUDIO, VLDO_AUDIO on J5 */
-static struct regulator_init_data smdk6410_vddaudio = {
+static struct regulator_init_data __maybe_unused smdk6410_vddaudio = {
         .constraints = {
                 .name = "PVDD_AUDIO",
                 .always_on = 1,
@@ -406,7 +406,7 @@ static struct regulator_init_data smdk6410_vddaudio = {
 
 #ifdef CONFIG_SMDK6410_WM1190_EV1
 /* S3C64xx internal logic & PLL */
-static struct regulator_init_data wm8350_dcdc1_data = {
+static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = {
         .constraints = {
                 .name = "PVDD_INT+PVDD_PLL",
                 .min_uV = 1200000,
@@ -417,7 +417,7 @@ static struct regulator_init_data wm8350_dcdc1_data = {
 };
 
 /* Memory */
-static struct regulator_init_data wm8350_dcdc3_data = {
+static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = {
         .constraints = {
                 .name = "PVDD_MEM",
                 .min_uV = 1800000,
@@ -437,7 +437,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
         REGULATOR_SUPPLY("DVDD", "0-001b"),
 };
 
-static struct regulator_init_data wm8350_dcdc4_data = {
+static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = {
         .constraints = {
                 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
                 .min_uV = 3000000,
@@ -449,7 +449,7 @@ static struct regulator_init_data wm8350_dcdc4_data = {
 };
 
 /* OTGi/1190-EV1 HPVDD & AVDD */
-static struct regulator_init_data wm8350_ldo4_data = {
+static struct regulator_init_data __maybe_unused wm8350_ldo4_data = {
         .constraints = {
                 .name = "PVDD_OTGI+HPVDD+AVDD",
                 .min_uV = 1200000,
@@ -537,7 +537,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
         .max_uA = 27554,
 };
 
-static struct regulator_init_data wm1192_dcdc3 = {
+static struct regulator_init_data __maybe_unused wm1192_dcdc3 = {
         .constraints = {
                 .name = "PVDD_MEM+PVDD_GPS",
                 .always_on = 1,
@@ -548,7 +548,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
         REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */
 };
 
-static struct regulator_init_data wm1192_ldo1 = {
+static struct regulator_init_data __maybe_unused wm1192_ldo1 = {
         .constraints = {
                 .name = "PVDD_LCD+PVDD_EXT",
                 .always_on = 1,
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index cbb0a54df80a..07945748b571 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -94,6 +94,7 @@ static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
         scu_enable(socfpga_scu_base_addr);
 }
 
+#ifdef CONFIG_HOTPLUG_CPU
 /*
  * platform-specific code to shutdown a CPU
  *
@@ -116,6 +117,7 @@ static int socfpga_cpu_kill(unsigned int cpu)
 {
         return 1;
 }
+#endif
 
 static const struct smp_operations socfpga_smp_ops __initconst = {
         .smp_prepare_cpus       = socfpga_smp_prepare_cpus,
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index a0ffaad1fb61..a557955472ea 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -76,17 +76,19 @@ static struct arm_pmu_platdata db8500_pmu_platdata = {
 static const char *db8500_read_soc_id(void)
 {
         void __iomem *uid;
+        const char *retstr;
 
         uid = ioremap(U8500_BB_UID_BASE, 0x20);
         if (!uid)
                 return NULL;
         /* Throw these device-specific numbers into the entropy pool */
         add_device_randomness(uid, 0x14);
-        return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
+        retstr = kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
                          readl((u32 *)uid+0),
                          readl((u32 *)uid+1), readl((u32 *)uid+2),
                          readl((u32 *)uid+3), readl((u32 *)uid+4));
         iounmap(uid);
+        return retstr;
 }
 
 static struct device * __init db8500_soc_device_init(void)
diff --git a/drivers/soc/ti/knav_qmss.h b/drivers/soc/ti/knav_qmss.h
index 6ff936cacb70..905b974d1bdc 100644
--- a/drivers/soc/ti/knav_qmss.h
+++ b/drivers/soc/ti/knav_qmss.h
@@ -93,13 +93,13 @@ struct knav_reg_pdsp_regs {
 struct knav_reg_acc_command {
         u32             command;
         u32             queue_mask;
-        u32             list_phys;
+        u32             list_dma;
         u32             queue_num;
         u32             timer_config;
 };
 
 struct knav_link_ram_block {
-        dma_addr_t       phys;
+        dma_addr_t       dma;
         void            *virt;
         size_t           size;
 };
diff --git a/drivers/soc/ti/knav_qmss_acc.c b/drivers/soc/ti/knav_qmss_acc.c
index d2d48f2802bc..0612ebae0a09 100644
--- a/drivers/soc/ti/knav_qmss_acc.c
+++ b/drivers/soc/ti/knav_qmss_acc.c
@@ -122,8 +122,8 @@ static irqreturn_t knav_acc_int_handler(int irq, void *_instdata)
         channel = acc->channel;
         list_dma = acc->list_dma[acc->list_index];
         list_cpu = acc->list_cpu[acc->list_index];
-        dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, phys %x\n",
-                channel, acc->list_index, list_cpu, list_dma);
+        dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, dma %pad\n",
+                channel, acc->list_index, list_cpu, &list_dma);
         if (atomic_read(&acc->retrigger_count)) {
                 atomic_dec(&acc->retrigger_count);
                 __knav_acc_notify(range, acc);
@@ -297,12 +297,12 @@ knav_acc_write(struct knav_device *kdev, struct knav_pdsp_info *pdsp,
         u32 result;
 
         dev_dbg(kdev->dev, "acc command %08x %08x %08x %08x %08x\n",
-                cmd->command, cmd->queue_mask, cmd->list_phys,
+                cmd->command, cmd->queue_mask, cmd->list_dma,
                 cmd->queue_num, cmd->timer_config);
 
         writel_relaxed(cmd->timer_config, &pdsp->acc_command->timer_config);
         writel_relaxed(cmd->queue_num, &pdsp->acc_command->queue_num);
-        writel_relaxed(cmd->list_phys, &pdsp->acc_command->list_phys);
+        writel_relaxed(cmd->list_dma, &pdsp->acc_command->list_dma);
         writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask);
         writel_relaxed(cmd->command, &pdsp->acc_command->command);
 
@@ -337,7 +337,7 @@ static void knav_acc_setup_cmd(struct knav_device *kdev,
         memset(cmd, 0, sizeof(*cmd));
         cmd->command    = acc->channel;
         cmd->queue_mask = queue_mask;
-        cmd->list_phys  = acc->list_dma[0];
+        cmd->list_dma   = (u32)acc->list_dma[0];
         cmd->queue_num  = info->list_entries << 16;
         cmd->queue_num |= queue_base;
 
@@ -591,8 +591,8 @@ int knav_init_acc_range(struct knav_device *kdev,
                 acc->list_cpu[1] = list_mem + list_size;
                 acc->list_dma[0] = list_dma;
                 acc->list_dma[1] = list_dma + list_size;
-                dev_dbg(kdev->dev, "%s: channel %d, phys %08x, virt %8p\n",
-                        acc->name, acc->channel, list_dma, list_mem);
+                dev_dbg(kdev->dev, "%s: channel %d, dma %pad, virt %8p\n",
+                        acc->name, acc->channel, &list_dma, list_mem);
         }
 
         range->ops = &knav_acc_range_ops;
diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c
index 8c03a80b482d..b73e3534f67b 100644
--- a/drivers/soc/ti/knav_qmss_queue.c
+++ b/drivers/soc/ti/knav_qmss_queue.c
@@ -1023,9 +1023,9 @@ static void knav_queue_setup_region(struct knav_device *kdev,
         list_add(&pool->region_inst, &region->pools);
 
         dev_dbg(kdev->dev,
-                "region %s (%d): size:%d, link:%d@%d, phys:%08x-%08x, virt:%p-%p\n",
+                "region %s (%d): size:%d, link:%d@%d, dma:%pad-%pad, virt:%p-%p\n",
                 region->name, id, region->desc_size, region->num_desc,
-                region->link_index, region->dma_start, region->dma_end,
+                region->link_index, &region->dma_start, &region->dma_end,
                 region->virt_start, region->virt_end);
 
         hw_desc_size = (region->desc_size / 16) - 1;
@@ -1033,7 +1033,7 @@ static void knav_queue_setup_region(struct knav_device *kdev,
 
         for_each_qmgr(kdev, qmgr) {
                 regs = qmgr->reg_region + id;
-                writel_relaxed(region->dma_start, &regs->base);
+                writel_relaxed((u32)region->dma_start, &regs->base);
                 writel_relaxed(region->link_index, &regs->start_index);
                 writel_relaxed(hw_desc_size << 16 | hw_num_desc,
                                &regs->size_count);
@@ -1145,14 +1145,14 @@ static int knav_get_link_ram(struct knav_device *kdev,
                          * queue_base specified => using internal or onchip
                          * link ram WARNING - we do not "reserve" this block
                          */
-                        block->phys = (dma_addr_t)temp[0];
+                        block->dma = (dma_addr_t)temp[0];
                         block->virt = NULL;
                         block->size = temp[1];
                 } else {
                         block->size = temp[1];
                         /* queue_base not specific => allocate requested size */
                         block->virt = dmam_alloc_coherent(kdev->dev,
-                                                  8 * block->size, &block->phys,
+                                                  8 * block->size, &block->dma,
                                                   GFP_KERNEL);
                         if (!block->virt) {
                                 dev_err(kdev->dev, "failed to alloc linkram\n");
@@ -1172,18 +1172,18 @@ static int knav_queue_setup_link_ram(struct knav_device *kdev)
 
         for_each_qmgr(kdev, qmgr) {
                 block = &kdev->link_rams[0];
-                dev_dbg(kdev->dev, "linkram0: phys:%x, virt:%p, size:%x\n",
-                        block->phys, block->virt, block->size);
-                writel_relaxed(block->phys, &qmgr->reg_config->link_ram_base0);
+                dev_dbg(kdev->dev, "linkram0: dma:%pad, virt:%p, size:%x\n",
+                        &block->dma, block->virt, block->size);
+                writel_relaxed((u32)block->dma, &qmgr->reg_config->link_ram_base0);
                 writel_relaxed(block->size, &qmgr->reg_config->link_ram_size0);
 
                 block++;
                 if (!block->size)
                         continue;
 
-                dev_dbg(kdev->dev, "linkram1: phys:%x, virt:%p, size:%x\n",
-                        block->phys, block->virt, block->size);
-                writel_relaxed(block->phys, &qmgr->reg_config->link_ram_base1);
+                dev_dbg(kdev->dev, "linkram1: dma:%pad, virt:%p, size:%x\n",
+                        &block->dma, block->virt, block->size);
+                writel_relaxed(block->dma, &qmgr->reg_config->link_ram_base1);
         }
 
         return 0;