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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-01-10 09:38:52 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-02-01 02:33:13 -0500
commitda1fdb8456ac79533aa09ce61b99a84ac7ca57b9 (patch)
tree09b3acc875743da64d6b30afdbbbb53b787e6e0b
parent583eded5860b84344d91462796cc5e5d40bbc27b (diff)
pinctrl: baytrail: Rectify debounce support
commit 04ff5a095d662e0879f0eb04b9247e092210aeff upstream. The commit 658b476c742f ("pinctrl: baytrail: Add debounce configuration") implements debounce for Baytrail pin control, but seems wasn't tested properly. The register which keeps debounce value is separated from the configuration one. Writing wrong values to the latter will guarantee wrong behaviour of the driver and even might break something physically. Besides above there is missed case how to disable it, which is actually done through the bit in configuration register. Rectify implementation here by using proper register for debounce value. Fixes: 658b476c742f ("pinctrl: baytrail: Add debounce configuration") Cc: Cristina Ciocan <cristina.ciocan@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/pinctrl/intel/pinctrl-baytrail.c28
1 files changed, 17 insertions, 11 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 71bbeb9321ba..079015385fd8 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -1092,6 +1092,7 @@ static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset,
1092 enum pin_config_param param = pinconf_to_config_param(*config); 1092 enum pin_config_param param = pinconf_to_config_param(*config);
1093 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); 1093 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
1094 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); 1094 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1095 void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);
1095 unsigned long flags; 1096 unsigned long flags;
1096 u32 conf, pull, val, debounce; 1097 u32 conf, pull, val, debounce;
1097 u16 arg = 0; 1098 u16 arg = 0;
@@ -1128,7 +1129,7 @@ static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset,
1128 return -EINVAL; 1129 return -EINVAL;
1129 1130
1130 raw_spin_lock_irqsave(&vg->lock, flags); 1131 raw_spin_lock_irqsave(&vg->lock, flags);
1131 debounce = readl(byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG)); 1132 debounce = readl(db_reg);
1132 raw_spin_unlock_irqrestore(&vg->lock, flags); 1133 raw_spin_unlock_irqrestore(&vg->lock, flags);
1133 1134
1134 switch (debounce & BYT_DEBOUNCE_PULSE_MASK) { 1135 switch (debounce & BYT_DEBOUNCE_PULSE_MASK) {
@@ -1176,6 +1177,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
1176 unsigned int param, arg; 1177 unsigned int param, arg;
1177 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); 1178 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
1178 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); 1179 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1180 void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);
1179 unsigned long flags; 1181 unsigned long flags;
1180 u32 conf, val, debounce; 1182 u32 conf, val, debounce;
1181 int i, ret = 0; 1183 int i, ret = 0;
@@ -1238,36 +1240,40 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
1238 1240
1239 break; 1241 break;
1240 case PIN_CONFIG_INPUT_DEBOUNCE: 1242 case PIN_CONFIG_INPUT_DEBOUNCE:
1241 debounce = readl(byt_gpio_reg(vg, offset, 1243 debounce = readl(db_reg);
1242 BYT_DEBOUNCE_REG)); 1244 debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
1243 conf &= ~BYT_DEBOUNCE_PULSE_MASK;
1244 1245
1245 switch (arg) { 1246 switch (arg) {
1247 case 0:
1248 conf &= BYT_DEBOUNCE_EN;
1249 break;
1246 case 375: 1250 case 375:
1247 conf |= BYT_DEBOUNCE_PULSE_375US; 1251 debounce |= BYT_DEBOUNCE_PULSE_375US;
1248 break; 1252 break;
1249 case 750: 1253 case 750:
1250 conf |= BYT_DEBOUNCE_PULSE_750US; 1254 debounce |= BYT_DEBOUNCE_PULSE_750US;
1251 break; 1255 break;
1252 case 1500: 1256 case 1500:
1253 conf |= BYT_DEBOUNCE_PULSE_1500US; 1257 debounce |= BYT_DEBOUNCE_PULSE_1500US;
1254 break; 1258 break;
1255 case 3000: 1259 case 3000:
1256 conf |= BYT_DEBOUNCE_PULSE_3MS; 1260 debounce |= BYT_DEBOUNCE_PULSE_3MS;
1257 break; 1261 break;
1258 case 6000: 1262 case 6000:
1259 conf |= BYT_DEBOUNCE_PULSE_6MS; 1263 debounce |= BYT_DEBOUNCE_PULSE_6MS;
1260 break; 1264 break;
1261 case 12000: 1265 case 12000:
1262 conf |= BYT_DEBOUNCE_PULSE_12MS; 1266 debounce |= BYT_DEBOUNCE_PULSE_12MS;
1263 break; 1267 break;
1264 case 24000: 1268 case 24000:
1265 conf |= BYT_DEBOUNCE_PULSE_24MS; 1269 debounce |= BYT_DEBOUNCE_PULSE_24MS;
1266 break; 1270 break;
1267 default: 1271 default:
1268 ret = -EINVAL; 1272 ret = -EINVAL;
1269 } 1273 }
1270 1274
1275 if (!ret)
1276 writel(debounce, db_reg);
1271 break; 1277 break;
1272 default: 1278 default:
1273 ret = -ENOTSUPP; 1279 ret = -ENOTSUPP;