diff options
author | Michal Suchanek <hramrach@gmail.com> | 2015-07-11 08:59:56 -0400 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2015-08-11 10:08:51 -0400 |
commit | d8d79f8f60c4363a0fa490ff1626be4bd5e003a3 (patch) | |
tree | aafecf35e7af28fcc120a7f092c1a92dcd96249a | |
parent | 18ca2ba5995d950619589355c3bc760b2a91e2bf (diff) |
mfd: axp20x: Add axp152 support
The axp152 is a stripped down version of the axp202 pmic with the battery
charging function removed as it is intended for top-set boxes.
Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r-- | drivers/mfd/axp20x.c | 83 | ||||
-rw-r--r-- | include/linux/mfd/axp20x.h | 61 |
2 files changed, 143 insertions, 1 deletions
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 8c2c3c4c9a56..b369cfce866c 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c | |||
@@ -30,12 +30,34 @@ | |||
30 | #define AXP20X_OFF 0x80 | 30 | #define AXP20X_OFF 0x80 |
31 | 31 | ||
32 | static const char * const axp20x_model_names[] = { | 32 | static const char * const axp20x_model_names[] = { |
33 | "AXP152", | ||
33 | "AXP202", | 34 | "AXP202", |
34 | "AXP209", | 35 | "AXP209", |
35 | "AXP221", | 36 | "AXP221", |
36 | "AXP288", | 37 | "AXP288", |
37 | }; | 38 | }; |
38 | 39 | ||
40 | static const struct regmap_range axp152_writeable_ranges[] = { | ||
41 | regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), | ||
42 | regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), | ||
43 | }; | ||
44 | |||
45 | static const struct regmap_range axp152_volatile_ranges[] = { | ||
46 | regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), | ||
47 | regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), | ||
48 | regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), | ||
49 | }; | ||
50 | |||
51 | static const struct regmap_access_table axp152_writeable_table = { | ||
52 | .yes_ranges = axp152_writeable_ranges, | ||
53 | .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), | ||
54 | }; | ||
55 | |||
56 | static const struct regmap_access_table axp152_volatile_table = { | ||
57 | .yes_ranges = axp152_volatile_ranges, | ||
58 | .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), | ||
59 | }; | ||
60 | |||
39 | static const struct regmap_range axp20x_writeable_ranges[] = { | 61 | static const struct regmap_range axp20x_writeable_ranges[] = { |
40 | regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), | 62 | regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), |
41 | regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), | 63 | regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), |
@@ -93,6 +115,11 @@ static const struct regmap_access_table axp288_volatile_table = { | |||
93 | .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), | 115 | .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), |
94 | }; | 116 | }; |
95 | 117 | ||
118 | static struct resource axp152_pek_resources[] = { | ||
119 | DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), | ||
120 | DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), | ||
121 | }; | ||
122 | |||
96 | static struct resource axp20x_pek_resources[] = { | 123 | static struct resource axp20x_pek_resources[] = { |
97 | { | 124 | { |
98 | .name = "PEK_DBR", | 125 | .name = "PEK_DBR", |
@@ -154,6 +181,15 @@ static struct resource axp288_fuel_gauge_resources[] = { | |||
154 | }, | 181 | }, |
155 | }; | 182 | }; |
156 | 183 | ||
184 | static const struct regmap_config axp152_regmap_config = { | ||
185 | .reg_bits = 8, | ||
186 | .val_bits = 8, | ||
187 | .wr_table = &axp152_writeable_table, | ||
188 | .volatile_table = &axp152_volatile_table, | ||
189 | .max_register = AXP152_PWM1_DUTY_CYCLE, | ||
190 | .cache_type = REGCACHE_RBTREE, | ||
191 | }; | ||
192 | |||
157 | static const struct regmap_config axp20x_regmap_config = { | 193 | static const struct regmap_config axp20x_regmap_config = { |
158 | .reg_bits = 8, | 194 | .reg_bits = 8, |
159 | .val_bits = 8, | 195 | .val_bits = 8, |
@@ -184,6 +220,26 @@ static const struct regmap_config axp288_regmap_config = { | |||
184 | #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ | 220 | #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ |
185 | [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } | 221 | [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } |
186 | 222 | ||
223 | static const struct regmap_irq axp152_regmap_irqs[] = { | ||
224 | INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), | ||
225 | INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), | ||
226 | INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), | ||
227 | INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), | ||
228 | INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), | ||
229 | INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), | ||
230 | INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), | ||
231 | INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), | ||
232 | INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), | ||
233 | INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), | ||
234 | INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), | ||
235 | INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), | ||
236 | INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), | ||
237 | INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), | ||
238 | INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), | ||
239 | INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), | ||
240 | INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), | ||
241 | }; | ||
242 | |||
187 | static const struct regmap_irq axp20x_regmap_irqs[] = { | 243 | static const struct regmap_irq axp20x_regmap_irqs[] = { |
188 | INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), | 244 | INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), |
189 | INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), | 245 | INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), |
@@ -293,6 +349,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = { | |||
293 | }; | 349 | }; |
294 | 350 | ||
295 | static const struct of_device_id axp20x_of_match[] = { | 351 | static const struct of_device_id axp20x_of_match[] = { |
352 | { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID }, | ||
296 | { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, | 353 | { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, |
297 | { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, | 354 | { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, |
298 | { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, | 355 | { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, |
@@ -317,6 +374,18 @@ static const struct acpi_device_id axp20x_acpi_match[] = { | |||
317 | }; | 374 | }; |
318 | MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); | 375 | MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); |
319 | 376 | ||
377 | static const struct regmap_irq_chip axp152_regmap_irq_chip = { | ||
378 | .name = "axp152_irq_chip", | ||
379 | .status_base = AXP152_IRQ1_STATE, | ||
380 | .ack_base = AXP152_IRQ1_STATE, | ||
381 | .mask_base = AXP152_IRQ1_EN, | ||
382 | .mask_invert = true, | ||
383 | .init_ack_masked = true, | ||
384 | .irqs = axp152_regmap_irqs, | ||
385 | .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), | ||
386 | .num_regs = 3, | ||
387 | }; | ||
388 | |||
320 | static const struct regmap_irq_chip axp20x_regmap_irq_chip = { | 389 | static const struct regmap_irq_chip axp20x_regmap_irq_chip = { |
321 | .name = "axp20x_irq_chip", | 390 | .name = "axp20x_irq_chip", |
322 | .status_base = AXP20X_IRQ1_STATE, | 391 | .status_base = AXP20X_IRQ1_STATE, |
@@ -375,6 +444,14 @@ static struct mfd_cell axp22x_cells[] = { | |||
375 | }, | 444 | }, |
376 | }; | 445 | }; |
377 | 446 | ||
447 | static struct mfd_cell axp152_cells[] = { | ||
448 | { | ||
449 | .name = "axp20x-pek", | ||
450 | .num_resources = ARRAY_SIZE(axp152_pek_resources), | ||
451 | .resources = axp152_pek_resources, | ||
452 | }, | ||
453 | }; | ||
454 | |||
378 | static struct resource axp288_adc_resources[] = { | 455 | static struct resource axp288_adc_resources[] = { |
379 | { | 456 | { |
380 | .name = "GPADC", | 457 | .name = "GPADC", |
@@ -513,6 +590,12 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) | |||
513 | } | 590 | } |
514 | 591 | ||
515 | switch (axp20x->variant) { | 592 | switch (axp20x->variant) { |
593 | case AXP152_ID: | ||
594 | axp20x->nr_cells = ARRAY_SIZE(axp152_cells); | ||
595 | axp20x->cells = axp152_cells; | ||
596 | axp20x->regmap_cfg = &axp152_regmap_config; | ||
597 | axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; | ||
598 | break; | ||
516 | case AXP202_ID: | 599 | case AXP202_ID: |
517 | case AXP209_ID: | 600 | case AXP209_ID: |
518 | axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); | 601 | axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); |
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index c2aa853fb412..52203d5f7984 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h | |||
@@ -12,7 +12,8 @@ | |||
12 | #define __LINUX_MFD_AXP20X_H | 12 | #define __LINUX_MFD_AXP20X_H |
13 | 13 | ||
14 | enum { | 14 | enum { |
15 | AXP202_ID = 0, | 15 | AXP152_ID = 0, |
16 | AXP202_ID, | ||
16 | AXP209_ID, | 17 | AXP209_ID, |
17 | AXP221_ID, | 18 | AXP221_ID, |
18 | AXP288_ID, | 19 | AXP288_ID, |
@@ -22,6 +23,24 @@ enum { | |||
22 | #define AXP20X_DATACACHE(m) (0x04 + (m)) | 23 | #define AXP20X_DATACACHE(m) (0x04 + (m)) |
23 | 24 | ||
24 | /* Power supply */ | 25 | /* Power supply */ |
26 | #define AXP152_PWR_OP_MODE 0x01 | ||
27 | #define AXP152_LDO3456_DC1234_CTRL 0x12 | ||
28 | #define AXP152_ALDO_OP_MODE 0x13 | ||
29 | #define AXP152_LDO0_CTRL 0x15 | ||
30 | #define AXP152_DCDC2_V_OUT 0x23 | ||
31 | #define AXP152_DCDC2_V_SCAL 0x25 | ||
32 | #define AXP152_DCDC1_V_OUT 0x26 | ||
33 | #define AXP152_DCDC3_V_OUT 0x27 | ||
34 | #define AXP152_ALDO12_V_OUT 0x28 | ||
35 | #define AXP152_DLDO1_V_OUT 0x29 | ||
36 | #define AXP152_DLDO2_V_OUT 0x2a | ||
37 | #define AXP152_DCDC4_V_OUT 0x2b | ||
38 | #define AXP152_V_OFF 0x31 | ||
39 | #define AXP152_OFF_CTRL 0x32 | ||
40 | #define AXP152_PEK_KEY 0x36 | ||
41 | #define AXP152_DCDC_FREQ 0x37 | ||
42 | #define AXP152_DCDC_MODE 0x80 | ||
43 | |||
25 | #define AXP20X_PWR_INPUT_STATUS 0x00 | 44 | #define AXP20X_PWR_INPUT_STATUS 0x00 |
26 | #define AXP20X_PWR_OP_MODE 0x01 | 45 | #define AXP20X_PWR_OP_MODE 0x01 |
27 | #define AXP20X_USB_OTG_STATUS 0x02 | 46 | #define AXP20X_USB_OTG_STATUS 0x02 |
@@ -69,6 +88,13 @@ enum { | |||
69 | #define AXP22X_CHRG_CTRL3 0x35 | 88 | #define AXP22X_CHRG_CTRL3 0x35 |
70 | 89 | ||
71 | /* Interrupt */ | 90 | /* Interrupt */ |
91 | #define AXP152_IRQ1_EN 0x40 | ||
92 | #define AXP152_IRQ2_EN 0x41 | ||
93 | #define AXP152_IRQ3_EN 0x42 | ||
94 | #define AXP152_IRQ1_STATE 0x48 | ||
95 | #define AXP152_IRQ2_STATE 0x49 | ||
96 | #define AXP152_IRQ3_STATE 0x4a | ||
97 | |||
72 | #define AXP20X_IRQ1_EN 0x40 | 98 | #define AXP20X_IRQ1_EN 0x40 |
73 | #define AXP20X_IRQ2_EN 0x41 | 99 | #define AXP20X_IRQ2_EN 0x41 |
74 | #define AXP20X_IRQ3_EN 0x42 | 100 | #define AXP20X_IRQ3_EN 0x42 |
@@ -127,6 +153,19 @@ enum { | |||
127 | #define AXP22X_PWREN_CTRL2 0x8d | 153 | #define AXP22X_PWREN_CTRL2 0x8d |
128 | 154 | ||
129 | /* GPIO */ | 155 | /* GPIO */ |
156 | #define AXP152_GPIO0_CTRL 0x90 | ||
157 | #define AXP152_GPIO1_CTRL 0x91 | ||
158 | #define AXP152_GPIO2_CTRL 0x92 | ||
159 | #define AXP152_GPIO3_CTRL 0x93 | ||
160 | #define AXP152_LDOGPIO2_V_OUT 0x96 | ||
161 | #define AXP152_GPIO_INPUT 0x97 | ||
162 | #define AXP152_PWM0_FREQ_X 0x98 | ||
163 | #define AXP152_PWM0_FREQ_Y 0x99 | ||
164 | #define AXP152_PWM0_DUTY_CYCLE 0x9a | ||
165 | #define AXP152_PWM1_FREQ_X 0x9b | ||
166 | #define AXP152_PWM1_FREQ_Y 0x9c | ||
167 | #define AXP152_PWM1_DUTY_CYCLE 0x9d | ||
168 | |||
130 | #define AXP20X_GPIO0_CTRL 0x90 | 169 | #define AXP20X_GPIO0_CTRL 0x90 |
131 | #define AXP20X_LDO5_V_OUT 0x91 | 170 | #define AXP20X_LDO5_V_OUT 0x91 |
132 | #define AXP20X_GPIO1_CTRL 0x92 | 171 | #define AXP20X_GPIO1_CTRL 0x92 |
@@ -218,6 +257,26 @@ enum { | |||
218 | 257 | ||
219 | /* IRQs */ | 258 | /* IRQs */ |
220 | enum { | 259 | enum { |
260 | AXP152_IRQ_LDO0IN_CONNECT = 1, | ||
261 | AXP152_IRQ_LDO0IN_REMOVAL, | ||
262 | AXP152_IRQ_ALDO0IN_CONNECT, | ||
263 | AXP152_IRQ_ALDO0IN_REMOVAL, | ||
264 | AXP152_IRQ_DCDC1_V_LOW, | ||
265 | AXP152_IRQ_DCDC2_V_LOW, | ||
266 | AXP152_IRQ_DCDC3_V_LOW, | ||
267 | AXP152_IRQ_DCDC4_V_LOW, | ||
268 | AXP152_IRQ_PEK_SHORT, | ||
269 | AXP152_IRQ_PEK_LONG, | ||
270 | AXP152_IRQ_TIMER, | ||
271 | AXP152_IRQ_PEK_RIS_EDGE, | ||
272 | AXP152_IRQ_PEK_FAL_EDGE, | ||
273 | AXP152_IRQ_GPIO3_INPUT, | ||
274 | AXP152_IRQ_GPIO2_INPUT, | ||
275 | AXP152_IRQ_GPIO1_INPUT, | ||
276 | AXP152_IRQ_GPIO0_INPUT, | ||
277 | }; | ||
278 | |||
279 | enum { | ||
221 | AXP20X_IRQ_ACIN_OVER_V = 1, | 280 | AXP20X_IRQ_ACIN_OVER_V = 1, |
222 | AXP20X_IRQ_ACIN_PLUGIN, | 281 | AXP20X_IRQ_ACIN_PLUGIN, |
223 | AXP20X_IRQ_ACIN_REMOVAL, | 282 | AXP20X_IRQ_ACIN_REMOVAL, |