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authorVineet Gupta <vgupta@synopsys.com>2016-01-22 03:57:50 -0500
committerVineet Gupta <vgupta@synopsys.com>2016-01-29 06:21:02 -0500
commitd584f0fb041d86b9605fae1f0ed9e268f217daa9 (patch)
treeadea69bcc4054b62a0c71fa5adbc5fb6207c7d41
parentcbfe74a753e877b49dc54e9b04d5d42230ca0aed (diff)
ARCv2: clocksource: Rename GRTC -> GFRC ...
... it is now called Global Free Running Counter Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/Kconfig2
-rw-r--r--arch/arc/configs/vdk_hs38_smp_defconfig2
-rw-r--r--arch/arc/include/asm/mcip.h4
-rw-r--r--arch/arc/kernel/mcip.c10
-rw-r--r--arch/arc/kernel/time.c8
5 files changed, 13 insertions, 13 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 6312f607932f..bb15e8062b1f 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -413,7 +413,7 @@ config ARC_HAS_RTC
413 default n 413 default n
414 depends on !SMP 414 depends on !SMP
415 415
416config ARC_HAS_GRTC 416config ARC_HAS_GFRC
417 bool "SMP synchronized 64-bit cycle counter" 417 bool "SMP synchronized 64-bit cycle counter"
418 default y 418 default y
419 depends on SMP 419 depends on SMP
diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig b/arch/arc/configs/vdk_hs38_smp_defconfig
index f36c047b33ca..735985974a31 100644
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -16,7 +16,7 @@ CONFIG_ARC_PLAT_AXS10X=y
16CONFIG_AXS103=y 16CONFIG_AXS103=y
17CONFIG_ISA_ARCV2=y 17CONFIG_ISA_ARCV2=y
18CONFIG_SMP=y 18CONFIG_SMP=y
19# CONFIG_ARC_HAS_GRTC is not set 19# CONFIG_ARC_HAS_GFRC is not set
20CONFIG_ARC_UBOOT_SUPPORT=y 20CONFIG_ARC_UBOOT_SUPPORT=y
21CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp" 21CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
22CONFIG_PREEMPT=y 22CONFIG_PREEMPT=y
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index 46f4e5351b2a..847e3bbe387f 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -39,8 +39,8 @@ struct mcip_cmd {
39#define CMD_DEBUG_SET_MASK 0x34 39#define CMD_DEBUG_SET_MASK 0x34
40#define CMD_DEBUG_SET_SELECT 0x36 40#define CMD_DEBUG_SET_SELECT 0x36
41 41
42#define CMD_GRTC_READ_LO 0x42 42#define CMD_GFRC_READ_LO 0x42
43#define CMD_GRTC_READ_HI 0x43 43#define CMD_GFRC_READ_HI 0x43
44 44
45#define CMD_IDU_ENABLE 0x71 45#define CMD_IDU_ENABLE 0x71
46#define CMD_IDU_DISABLE 0x72 46#define CMD_IDU_DISABLE 0x72
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index bd237acdf4f2..bc771f58fefb 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -96,13 +96,13 @@ static void mcip_probe_n_setup(void)
96#ifdef CONFIG_CPU_BIG_ENDIAN 96#ifdef CONFIG_CPU_BIG_ENDIAN
97 unsigned int pad3:8, 97 unsigned int pad3:8,
98 idu:1, llm:1, num_cores:6, 98 idu:1, llm:1, num_cores:6,
99 iocoh:1, grtc:1, dbg:1, pad2:1, 99 iocoh:1, gfrc:1, dbg:1, pad2:1,
100 msg:1, sem:1, ipi:1, pad:1, 100 msg:1, sem:1, ipi:1, pad:1,
101 ver:8; 101 ver:8;
102#else 102#else
103 unsigned int ver:8, 103 unsigned int ver:8,
104 pad:1, ipi:1, sem:1, msg:1, 104 pad:1, ipi:1, sem:1, msg:1,
105 pad2:1, dbg:1, grtc:1, iocoh:1, 105 pad2:1, dbg:1, gfrc:1, iocoh:1,
106 num_cores:6, llm:1, idu:1, 106 num_cores:6, llm:1, idu:1,
107 pad3:8; 107 pad3:8;
108#endif 108#endif
@@ -116,7 +116,7 @@ static void mcip_probe_n_setup(void)
116 IS_AVAIL1(mp.ipi, "IPI "), 116 IS_AVAIL1(mp.ipi, "IPI "),
117 IS_AVAIL1(mp.idu, "IDU "), 117 IS_AVAIL1(mp.idu, "IDU "),
118 IS_AVAIL1(mp.dbg, "DEBUG "), 118 IS_AVAIL1(mp.dbg, "DEBUG "),
119 IS_AVAIL1(mp.grtc, "GRTC")); 119 IS_AVAIL1(mp.gfrc, "GFRC"));
120 120
121 idu_detected = mp.idu; 121 idu_detected = mp.idu;
122 122
@@ -125,8 +125,8 @@ static void mcip_probe_n_setup(void)
125 __mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf); 125 __mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
126 } 126 }
127 127
128 if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) && !mp.grtc) 128 if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
129 panic("kernel trying to use non-existent GRTC\n"); 129 panic("kernel trying to use non-existent GFRC\n");
130} 130}
131 131
132struct plat_smp_ops plat_smp_ops = { 132struct plat_smp_ops plat_smp_ops = {
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index dfad287f1db1..156d9833ff84 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -62,7 +62,7 @@
62 62
63/********** Clock Source Device *********/ 63/********** Clock Source Device *********/
64 64
65#ifdef CONFIG_ARC_HAS_GRTC 65#ifdef CONFIG_ARC_HAS_GFRC
66 66
67static int arc_counter_setup(void) 67static int arc_counter_setup(void)
68{ 68{
@@ -83,10 +83,10 @@ static cycle_t arc_counter_read(struct clocksource *cs)
83 83
84 local_irq_save(flags); 84 local_irq_save(flags);
85 85
86 __mcip_cmd(CMD_GRTC_READ_LO, 0); 86 __mcip_cmd(CMD_GFRC_READ_LO, 0);
87 stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK); 87 stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
88 88
89 __mcip_cmd(CMD_GRTC_READ_HI, 0); 89 __mcip_cmd(CMD_GFRC_READ_HI, 0);
90 stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK); 90 stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
91 91
92 local_irq_restore(flags); 92 local_irq_restore(flags);
@@ -95,7 +95,7 @@ static cycle_t arc_counter_read(struct clocksource *cs)
95} 95}
96 96
97static struct clocksource arc_counter = { 97static struct clocksource arc_counter = {
98 .name = "ARConnect GRTC", 98 .name = "ARConnect GFRC",
99 .rating = 400, 99 .rating = 400,
100 .read = arc_counter_read, 100 .read = arc_counter_read,
101 .mask = CLOCKSOURCE_MASK(64), 101 .mask = CLOCKSOURCE_MASK(64),