diff options
author | Suman Anna <s-anna@ti.com> | 2015-03-13 18:58:37 -0400 |
---|---|---|
committer | Tero Kristo <t-kristo@ti.com> | 2015-03-24 14:23:50 -0400 |
commit | d4295be3874c1d464ae83a71f87ed93f84aa5d21 (patch) | |
tree | dbd01b8b606503f788aa83017124ff22fde6dc9b | |
parent | 03ff41a938d0c31c3e712590600b474454ac39fe (diff) |
clk: ti: DRA7: Correct timer_sys_ck clock aliases for Timers
The OMAP DMTimer API, omap_dm_timer_set_source(), can set the parent
of a timer node using 3 different values that use fixed parent names
for the clocks. The parent name, timer_sys_ck, is used for setting the
parent when used with the source index OMAP_TIMER_SRC_SYS_CLK. This
should point to the TIMER_SYS_CLK and not the SYSCLKIN2, so correct
the clock aliases appropriately. SYSCLKIN2 is not a mandatory clock
input.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
-rw-r--r-- | drivers/clk/ti/clk-7xx.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index ee32f4deebf4..256295eb5157 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c | |||
@@ -289,13 +289,13 @@ static struct ti_dt_clk dra7xx_clks[] = { | |||
289 | DT_CLK("usbhs_omap", "usbtll_fck", "dummy_ck"), | 289 | DT_CLK("usbhs_omap", "usbtll_fck", "dummy_ck"), |
290 | DT_CLK("omap_wdt", "ick", "dummy_ck"), | 290 | DT_CLK("omap_wdt", "ick", "dummy_ck"), |
291 | DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"), | 291 | DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"), |
292 | DT_CLK("4ae18000.timer", "timer_sys_ck", "sys_clkin2"), | 292 | DT_CLK("4ae18000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
293 | DT_CLK("48032000.timer", "timer_sys_ck", "sys_clkin2"), | 293 | DT_CLK("48032000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
294 | DT_CLK("48034000.timer", "timer_sys_ck", "sys_clkin2"), | 294 | DT_CLK("48034000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
295 | DT_CLK("48036000.timer", "timer_sys_ck", "sys_clkin2"), | 295 | DT_CLK("48036000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
296 | DT_CLK("4803e000.timer", "timer_sys_ck", "sys_clkin2"), | 296 | DT_CLK("4803e000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
297 | DT_CLK("48086000.timer", "timer_sys_ck", "sys_clkin2"), | 297 | DT_CLK("48086000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
298 | DT_CLK("48088000.timer", "timer_sys_ck", "sys_clkin2"), | 298 | DT_CLK("48088000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
299 | DT_CLK("48820000.timer", "timer_sys_ck", "timer_sys_clk_div"), | 299 | DT_CLK("48820000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
300 | DT_CLK("48822000.timer", "timer_sys_ck", "timer_sys_clk_div"), | 300 | DT_CLK("48822000.timer", "timer_sys_ck", "timer_sys_clk_div"), |
301 | DT_CLK("48824000.timer", "timer_sys_ck", "timer_sys_clk_div"), | 301 | DT_CLK("48824000.timer", "timer_sys_ck", "timer_sys_clk_div"), |