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authorDennis Dalessandro <dennis.dalessandro@intel.com>2016-05-19 08:26:04 -0400
committerDoug Ledford <dledford@redhat.com>2016-05-26 11:23:18 -0400
commitd079031742023a00e1deda0fa847d403b4b91c76 (patch)
tree6509f116f57188e8476c5733ad5443521104ca8f
parent7312f29d8ee5518c71572d7bfcbfcd5800b12d16 (diff)
IB/hfi1: Remove EPROM functionality from data device
Remove EPROM handling from the cdev which is used for user application data traffic. Reviewed-by: Dean Luick <dean.luick@intel.com> Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
-rw-r--r--drivers/staging/rdma/hfi1/eprom.c369
-rw-r--r--drivers/staging/rdma/hfi1/file_ops.c23
-rw-r--r--include/uapi/rdma/hfi/hfi1_user.h7
3 files changed, 0 insertions, 399 deletions
diff --git a/drivers/staging/rdma/hfi1/eprom.c b/drivers/staging/rdma/hfi1/eprom.c
index bd8771570f81..36b77943cbfd 100644
--- a/drivers/staging/rdma/hfi1/eprom.c
+++ b/drivers/staging/rdma/hfi1/eprom.c
@@ -49,387 +49,18 @@
49#include "common.h" 49#include "common.h"
50#include "eprom.h" 50#include "eprom.h"
51 51
52/*
53 * The EPROM is logically divided into three partitions:
54 * partition 0: the first 128K, visible from PCI ROM BAR
55 * partition 1: 4K config file (sector size)
56 * partition 2: the rest
57 */
58#define P0_SIZE (128 * 1024)
59#define P1_SIZE (4 * 1024)
60#define P1_START P0_SIZE
61#define P2_START (P0_SIZE + P1_SIZE)
62
63/* erase sizes supported by the controller */
64#define SIZE_4KB (4 * 1024)
65#define MASK_4KB (SIZE_4KB - 1)
66
67#define SIZE_32KB (32 * 1024)
68#define MASK_32KB (SIZE_32KB - 1)
69
70#define SIZE_64KB (64 * 1024)
71#define MASK_64KB (SIZE_64KB - 1)
72
73/* controller page size, in bytes */
74#define EP_PAGE_SIZE 256
75#define EEP_PAGE_MASK (EP_PAGE_SIZE - 1)
76
77/* controller commands */
78#define CMD_SHIFT 24 52#define CMD_SHIFT 24
79#define CMD_NOP (0)
80#define CMD_PAGE_PROGRAM(addr) ((0x02 << CMD_SHIFT) | addr)
81#define CMD_READ_DATA(addr) ((0x03 << CMD_SHIFT) | addr)
82#define CMD_READ_SR1 ((0x05 << CMD_SHIFT))
83#define CMD_WRITE_ENABLE ((0x06 << CMD_SHIFT))
84#define CMD_SECTOR_ERASE_4KB(addr) ((0x20 << CMD_SHIFT) | addr)
85#define CMD_SECTOR_ERASE_32KB(addr) ((0x52 << CMD_SHIFT) | addr)
86#define CMD_CHIP_ERASE ((0x60 << CMD_SHIFT))
87#define CMD_READ_MANUF_DEV_ID ((0x90 << CMD_SHIFT))
88#define CMD_RELEASE_POWERDOWN_NOID ((0xab << CMD_SHIFT)) 53#define CMD_RELEASE_POWERDOWN_NOID ((0xab << CMD_SHIFT))
89#define CMD_SECTOR_ERASE_64KB(addr) ((0xd8 << CMD_SHIFT) | addr)
90 54
91/* controller interface speeds */ 55/* controller interface speeds */
92#define EP_SPEED_FULL 0x2 /* full speed */ 56#define EP_SPEED_FULL 0x2 /* full speed */
93 57
94/* controller status register 1 bits */
95#define SR1_BUSY 0x1ull /* the BUSY bit in SR1 */
96
97/* sleep length while waiting for controller */
98#define WAIT_SLEEP_US 100 /* must be larger than 5 (see usage) */
99#define COUNT_DELAY_SEC(n) ((n) * (1000000 / WAIT_SLEEP_US))
100
101/* GPIO pins */
102#define EPROM_WP_N BIT_ULL(14) /* EPROM write line */
103
104/* 58/*
105 * How long to wait for the EPROM to become available, in ms. 59 * How long to wait for the EPROM to become available, in ms.
106 * The spec 32 Mb EPROM takes around 40s to erase then write. 60 * The spec 32 Mb EPROM takes around 40s to erase then write.
107 * Double it for safety. 61 * Double it for safety.
108 */ 62 */
109#define EPROM_TIMEOUT 80000 /* ms */ 63#define EPROM_TIMEOUT 80000 /* ms */
110
111/*
112 * Turn on external enable line that allows writing on the flash.
113 */
114static void write_enable(struct hfi1_devdata *dd)
115{
116 /* raise signal */
117 write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
118 /* raise enable */
119 write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
120}
121
122/*
123 * Turn off external enable line that allows writing on the flash.
124 */
125static void write_disable(struct hfi1_devdata *dd)
126{
127 /* lower signal */
128 write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
129 /* lower enable */
130 write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
131}
132
133/*
134 * Wait for the device to become not busy. Must be called after all
135 * write or erase operations.
136 */
137static int wait_for_not_busy(struct hfi1_devdata *dd)
138{
139 unsigned long count = 0;
140 u64 reg;
141 int ret = 0;
142
143 /* starts page mode */
144 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_SR1);
145 while (1) {
146 udelay(WAIT_SLEEP_US);
147 usleep_range(WAIT_SLEEP_US - 5, WAIT_SLEEP_US + 5);
148 count++;
149 reg = read_csr(dd, ASIC_EEP_DATA);
150 if ((reg & SR1_BUSY) == 0)
151 break;
152 /* 200s is the largest time for a 128Mb device */
153 if (count > COUNT_DELAY_SEC(200)) {
154 dd_dev_err(dd, "waited too long for SPI FLASH busy to clear - failing\n");
155 ret = -ETIMEDOUT;
156 break; /* break, not goto - must stop page mode */
157 }
158 }
159
160 /* stop page mode with a NOP */
161 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP);
162
163 return ret;
164}
165
166/*
167 * Read the device ID from the SPI controller.
168 */
169static u32 read_device_id(struct hfi1_devdata *dd)
170{
171 /* read the Manufacture Device ID */
172 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_MANUF_DEV_ID);
173 return (u32)read_csr(dd, ASIC_EEP_DATA);
174}
175
176/*
177 * Erase the whole flash.
178 */
179static int erase_chip(struct hfi1_devdata *dd)
180{
181 int ret;
182
183 write_enable(dd);
184
185 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
186 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_CHIP_ERASE);
187 ret = wait_for_not_busy(dd);
188
189 write_disable(dd);
190
191 return ret;
192}
193
194/*
195 * Erase a range.
196 */
197static int erase_range(struct hfi1_devdata *dd, u32 start, u32 len)
198{
199 u32 end = start + len;
200 int ret = 0;
201
202 if (end < start)
203 return -EINVAL;
204
205 /* check the end points for the minimum erase */
206 if ((start & MASK_4KB) || (end & MASK_4KB)) {
207 dd_dev_err(dd,
208 "%s: non-aligned range (0x%x,0x%x) for a 4KB erase\n",
209 __func__, start, end);
210 return -EINVAL;
211 }
212
213 write_enable(dd);
214
215 while (start < end) {
216 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
217 /* check in order of largest to smallest */
218 if (((start & MASK_64KB) == 0) && (start + SIZE_64KB <= end)) {
219 write_csr(dd, ASIC_EEP_ADDR_CMD,
220 CMD_SECTOR_ERASE_64KB(start));
221 start += SIZE_64KB;
222 } else if (((start & MASK_32KB) == 0) &&
223 (start + SIZE_32KB <= end)) {
224 write_csr(dd, ASIC_EEP_ADDR_CMD,
225 CMD_SECTOR_ERASE_32KB(start));
226 start += SIZE_32KB;
227 } else { /* 4KB will work */
228 write_csr(dd, ASIC_EEP_ADDR_CMD,
229 CMD_SECTOR_ERASE_4KB(start));
230 start += SIZE_4KB;
231 }
232 ret = wait_for_not_busy(dd);
233 if (ret)
234 goto done;
235 }
236
237done:
238 write_disable(dd);
239
240 return ret;
241}
242
243/*
244 * Read a 256 byte (64 dword) EPROM page.
245 * All callers have verified the offset is at a page boundary.
246 */
247static void read_page(struct hfi1_devdata *dd, u32 offset, u32 *result)
248{
249 int i;
250
251 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_DATA(offset));
252 for (i = 0; i < EP_PAGE_SIZE / sizeof(u32); i++)
253 result[i] = (u32)read_csr(dd, ASIC_EEP_DATA);
254 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP); /* close open page */
255}
256
257/*
258 * Read length bytes starting at offset. Copy to user address addr.
259 */
260static int read_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
261{
262 u32 offset;
263 u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
264 int ret = 0;
265
266 /* reject anything not on an EPROM page boundary */
267 if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
268 return -EINVAL;
269
270 for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
271 read_page(dd, start + offset, buffer);
272 if (copy_to_user((void __user *)(addr + offset),
273 buffer, EP_PAGE_SIZE)) {
274 ret = -EFAULT;
275 goto done;
276 }
277 }
278
279done:
280 return ret;
281}
282
283/*
284 * Write a 256 byte (64 dword) EPROM page.
285 * All callers have verified the offset is at a page boundary.
286 */
287static int write_page(struct hfi1_devdata *dd, u32 offset, u32 *data)
288{
289 int i;
290
291 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
292 write_csr(dd, ASIC_EEP_DATA, data[0]);
293 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_PAGE_PROGRAM(offset));
294 for (i = 1; i < EP_PAGE_SIZE / sizeof(u32); i++)
295 write_csr(dd, ASIC_EEP_DATA, data[i]);
296 /* will close the open page */
297 return wait_for_not_busy(dd);
298}
299
300/*
301 * Write length bytes starting at offset. Read from user address addr.
302 */
303static int write_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
304{
305 u32 offset;
306 u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
307 int ret = 0;
308
309 /* reject anything not on an EPROM page boundary */
310 if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
311 return -EINVAL;
312
313 write_enable(dd);
314
315 for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
316 if (copy_from_user(buffer, (void __user *)(addr + offset),
317 EP_PAGE_SIZE)) {
318 ret = -EFAULT;
319 goto done;
320 }
321 ret = write_page(dd, start + offset, buffer);
322 if (ret)
323 goto done;
324 }
325
326done:
327 write_disable(dd);
328 return ret;
329}
330
331/* convert an range composite to a length, in bytes */
332static inline u32 extract_rlen(u32 composite)
333{
334 return (composite & 0xffff) * EP_PAGE_SIZE;
335}
336
337/* convert an range composite to a start, in bytes */
338static inline u32 extract_rstart(u32 composite)
339{
340 return (composite >> 16) * EP_PAGE_SIZE;
341}
342
343/*
344 * Perform the given operation on the EPROM. Called from user space. The
345 * user credentials have already been checked.
346 *
347 * Return 0 on success, -ERRNO on error
348 */
349int handle_eprom_command(struct file *fp, const struct hfi1_cmd *cmd)
350{
351 struct hfi1_devdata *dd;
352 u32 dev_id;
353 u32 rlen; /* range length */
354 u32 rstart; /* range start */
355 int i_minor;
356 int ret = 0;
357
358 /*
359 * Map the device file to device data using the relative minor.
360 * The device file minor number is the unit number + 1. 0 is
361 * the generic device file - reject it.
362 */
363 i_minor = iminor(file_inode(fp)) - HFI1_USER_MINOR_BASE;
364 if (i_minor <= 0)
365 return -EINVAL;
366 dd = hfi1_lookup(i_minor - 1);
367 if (!dd) {
368 pr_err("%s: cannot find unit %d!\n", __func__, i_minor);
369 return -EINVAL;
370 }
371
372 /* some devices do not have an EPROM */
373 if (!dd->eprom_available)
374 return -EOPNOTSUPP;
375
376 ret = acquire_chip_resource(dd, CR_EPROM, EPROM_TIMEOUT);
377 if (ret) {
378 dd_dev_err(dd, "%s: unable to acquire EPROM resource\n",
379 __func__);
380 goto done_asic;
381 }
382
383 dd_dev_info(dd, "%s: cmd: type %d, len 0x%x, addr 0x%016llx\n",
384 __func__, cmd->type, cmd->len, cmd->addr);
385
386 switch (cmd->type) {
387 case HFI1_CMD_EP_INFO:
388 if (cmd->len != sizeof(u32)) {
389 ret = -ERANGE;
390 break;
391 }
392 dev_id = read_device_id(dd);
393 /* addr points to a u32 user buffer */
394 if (copy_to_user((void __user *)cmd->addr, &dev_id,
395 sizeof(u32)))
396 ret = -EFAULT;
397 break;
398
399 case HFI1_CMD_EP_ERASE_CHIP:
400 ret = erase_chip(dd);
401 break;
402
403 case HFI1_CMD_EP_ERASE_RANGE:
404 rlen = extract_rlen(cmd->len);
405 rstart = extract_rstart(cmd->len);
406 ret = erase_range(dd, rstart, rlen);
407 break;
408
409 case HFI1_CMD_EP_READ_RANGE:
410 rlen = extract_rlen(cmd->len);
411 rstart = extract_rstart(cmd->len);
412 ret = read_length(dd, rstart, rlen, cmd->addr);
413 break;
414
415 case HFI1_CMD_EP_WRITE_RANGE:
416 rlen = extract_rlen(cmd->len);
417 rstart = extract_rstart(cmd->len);
418 ret = write_length(dd, rstart, rlen, cmd->addr);
419 break;
420
421 default:
422 dd_dev_err(dd, "%s: unexpected command %d\n",
423 __func__, cmd->type);
424 ret = -EINVAL;
425 break;
426 }
427
428 release_chip_resource(dd, CR_EPROM);
429done_asic:
430 return ret;
431}
432
433/* 64/*
434 * Initialize the EPROM handler. 65 * Initialize the EPROM handler.
435 */ 66 */
diff --git a/drivers/staging/rdma/hfi1/file_ops.c b/drivers/staging/rdma/hfi1/file_ops.c
index eb66befd51fc..2eddd3305c6a 100644
--- a/drivers/staging/rdma/hfi1/file_ops.c
+++ b/drivers/staging/rdma/hfi1/file_ops.c
@@ -189,7 +189,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
189 void *dest = NULL; 189 void *dest = NULL;
190 __u64 user_val = 0; 190 __u64 user_val = 0;
191 int uctxt_required = 1; 191 int uctxt_required = 1;
192 int must_be_root = 0;
193 192
194 /* FIXME: This interface cannot continue out of staging */ 193 /* FIXME: This interface cannot continue out of staging */
195 if (WARN_ON_ONCE(!ib_safe_file_access(fp))) 194 if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
@@ -234,15 +233,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
234 copy = 0; 233 copy = 0;
235 user_val = cmd.addr; 234 user_val = cmd.addr;
236 break; 235 break;
237 case HFI1_CMD_EP_INFO:
238 case HFI1_CMD_EP_ERASE_CHIP:
239 case HFI1_CMD_EP_ERASE_RANGE:
240 case HFI1_CMD_EP_READ_RANGE:
241 case HFI1_CMD_EP_WRITE_RANGE:
242 uctxt_required = 0; /* assigned user context not required */
243 must_be_root = 1; /* validate user */
244 copy = 0;
245 break;
246 default: 236 default:
247 ret = -EINVAL; 237 ret = -EINVAL;
248 goto bail; 238 goto bail;
@@ -265,12 +255,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
265 goto bail; 255 goto bail;
266 } 256 }
267 257
268 /* only root can do these operations */
269 if (must_be_root && !capable(CAP_SYS_ADMIN)) {
270 ret = -EPERM;
271 goto bail;
272 }
273
274 switch (cmd.type) { 258 switch (cmd.type) {
275 case HFI1_CMD_ASSIGN_CTXT: 259 case HFI1_CMD_ASSIGN_CTXT:
276 ret = assign_ctxt(fp, &uinfo); 260 ret = assign_ctxt(fp, &uinfo);
@@ -409,13 +393,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
409 sc_return_credits(sc); 393 sc_return_credits(sc);
410 break; 394 break;
411 } 395 }
412 case HFI1_CMD_EP_INFO:
413 case HFI1_CMD_EP_ERASE_CHIP:
414 case HFI1_CMD_EP_ERASE_RANGE:
415 case HFI1_CMD_EP_READ_RANGE:
416 case HFI1_CMD_EP_WRITE_RANGE:
417 ret = handle_eprom_command(fp, &cmd);
418 break;
419 } 396 }
420 397
421 if (ret >= 0) 398 if (ret >= 0)
diff --git a/include/uapi/rdma/hfi/hfi1_user.h b/include/uapi/rdma/hfi/hfi1_user.h
index 09558999ca1d..3e3680d11b25 100644
--- a/include/uapi/rdma/hfi/hfi1_user.h
+++ b/include/uapi/rdma/hfi/hfi1_user.h
@@ -122,13 +122,6 @@
122#define HFI1_CMD_SET_PKEY 11 /* set context's pkey */ 122#define HFI1_CMD_SET_PKEY 11 /* set context's pkey */
123#define HFI1_CMD_CTXT_RESET 12 /* reset context's HW send context */ 123#define HFI1_CMD_CTXT_RESET 12 /* reset context's HW send context */
124#define HFI1_CMD_TID_INVAL_READ 13 /* read TID cache invalidations */ 124#define HFI1_CMD_TID_INVAL_READ 13 /* read TID cache invalidations */
125/* separate EPROM commands from normal PSM commands */
126#define HFI1_CMD_EP_INFO 64 /* read EPROM device ID */
127#define HFI1_CMD_EP_ERASE_CHIP 65 /* erase whole EPROM */
128/* range 66-74 no longer used */
129#define HFI1_CMD_EP_ERASE_RANGE 75 /* erase EPROM range */
130#define HFI1_CMD_EP_READ_RANGE 76 /* read EPROM range */
131#define HFI1_CMD_EP_WRITE_RANGE 77 /* write EPROM range */
132 125
133#define _HFI1_EVENT_FROZEN_BIT 0 126#define _HFI1_EVENT_FROZEN_BIT 0
134#define _HFI1_EVENT_LINKDOWN_BIT 1 127#define _HFI1_EVENT_LINKDOWN_BIT 1