diff options
author | Flora Cui <Flora.Cui@amd.com> | 2016-08-01 23:32:41 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-08-19 12:30:58 -0400 |
commit | c632d7994360aa06158ccb089ad7e4814ce8f08b (patch) | |
tree | 4275015c3a03e9356b30a2c1c6c44fca4fe98bea | |
parent | 2a702ccd9a79f6fc23fdb07a410a5f6533ac8f78 (diff) |
amdgpu: move ttm stuff to amdgpu_ttm.h
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 45 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 78 |
3 files changed, 80 insertions, 51 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 1a7e05da470e..06a7cab3bcc7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -51,6 +51,7 @@ | |||
51 | #include "amdgpu_ih.h" | 51 | #include "amdgpu_ih.h" |
52 | #include "amdgpu_irq.h" | 52 | #include "amdgpu_irq.h" |
53 | #include "amdgpu_ucode.h" | 53 | #include "amdgpu_ucode.h" |
54 | #include "amdgpu_ttm.h" | ||
54 | #include "amdgpu_gds.h" | 55 | #include "amdgpu_gds.h" |
55 | #include "amd_powerplay.h" | 56 | #include "amd_powerplay.h" |
56 | #include "amdgpu_acp.h" | 57 | #include "amdgpu_acp.h" |
@@ -397,51 +398,9 @@ int amdgpu_fence_wait_empty(struct amdgpu_ring *ring); | |||
397 | unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring); | 398 | unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring); |
398 | 399 | ||
399 | /* | 400 | /* |
400 | * TTM. | 401 | * BO. |
401 | */ | 402 | */ |
402 | 403 | ||
403 | #define AMDGPU_TTM_LRU_SIZE 20 | ||
404 | |||
405 | struct amdgpu_mman_lru { | ||
406 | struct list_head *lru[TTM_NUM_MEM_TYPES]; | ||
407 | struct list_head *swap_lru; | ||
408 | }; | ||
409 | |||
410 | struct amdgpu_mman { | ||
411 | struct ttm_bo_global_ref bo_global_ref; | ||
412 | struct drm_global_reference mem_global_ref; | ||
413 | struct ttm_bo_device bdev; | ||
414 | bool mem_global_referenced; | ||
415 | bool initialized; | ||
416 | |||
417 | #if defined(CONFIG_DEBUG_FS) | ||
418 | struct dentry *vram; | ||
419 | struct dentry *gtt; | ||
420 | #endif | ||
421 | |||
422 | /* buffer handling */ | ||
423 | const struct amdgpu_buffer_funcs *buffer_funcs; | ||
424 | struct amdgpu_ring *buffer_funcs_ring; | ||
425 | /* Scheduler entity for buffer moves */ | ||
426 | struct amd_sched_entity entity; | ||
427 | |||
428 | /* custom LRU management */ | ||
429 | struct amdgpu_mman_lru log2_size[AMDGPU_TTM_LRU_SIZE]; | ||
430 | }; | ||
431 | |||
432 | int amdgpu_copy_buffer(struct amdgpu_ring *ring, | ||
433 | uint64_t src_offset, | ||
434 | uint64_t dst_offset, | ||
435 | uint32_t byte_count, | ||
436 | struct reservation_object *resv, | ||
437 | struct fence **fence); | ||
438 | int amdgpu_fill_buffer(struct amdgpu_bo *bo, | ||
439 | uint32_t src_data, | ||
440 | struct reservation_object *resv, | ||
441 | struct fence **fence); | ||
442 | |||
443 | int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); | ||
444 | |||
445 | struct amdgpu_bo_list_entry { | 404 | struct amdgpu_bo_list_entry { |
446 | struct amdgpu_bo *robj; | 405 | struct amdgpu_bo *robj; |
447 | struct ttm_validate_buffer tv; | 406 | struct ttm_validate_buffer tv; |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h index 503d54098128..e73728d90388 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h | |||
@@ -31,14 +31,6 @@ | |||
31 | #define AMDGPU_GWS_SHIFT PAGE_SHIFT | 31 | #define AMDGPU_GWS_SHIFT PAGE_SHIFT |
32 | #define AMDGPU_OA_SHIFT PAGE_SHIFT | 32 | #define AMDGPU_OA_SHIFT PAGE_SHIFT |
33 | 33 | ||
34 | #define AMDGPU_PL_GDS TTM_PL_PRIV0 | ||
35 | #define AMDGPU_PL_GWS TTM_PL_PRIV1 | ||
36 | #define AMDGPU_PL_OA TTM_PL_PRIV2 | ||
37 | |||
38 | #define AMDGPU_PL_FLAG_GDS TTM_PL_FLAG_PRIV0 | ||
39 | #define AMDGPU_PL_FLAG_GWS TTM_PL_FLAG_PRIV1 | ||
40 | #define AMDGPU_PL_FLAG_OA TTM_PL_FLAG_PRIV2 | ||
41 | |||
42 | struct amdgpu_ring; | 34 | struct amdgpu_ring; |
43 | struct amdgpu_bo; | 35 | struct amdgpu_bo; |
44 | 36 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h new file mode 100644 index 000000000000..8927e0e5012a --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * Copyright 2016 Advanced Micro Devices, Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #ifndef __AMDGPU_TTM_H__ | ||
25 | #define __AMDGPU_TTM_H__ | ||
26 | |||
27 | #include "gpu_scheduler.h" | ||
28 | |||
29 | #define AMDGPU_PL_GDS TTM_PL_PRIV0 | ||
30 | #define AMDGPU_PL_GWS TTM_PL_PRIV1 | ||
31 | #define AMDGPU_PL_OA TTM_PL_PRIV2 | ||
32 | |||
33 | #define AMDGPU_PL_FLAG_GDS TTM_PL_FLAG_PRIV0 | ||
34 | #define AMDGPU_PL_FLAG_GWS TTM_PL_FLAG_PRIV1 | ||
35 | #define AMDGPU_PL_FLAG_OA TTM_PL_FLAG_PRIV2 | ||
36 | |||
37 | #define AMDGPU_TTM_LRU_SIZE 20 | ||
38 | |||
39 | struct amdgpu_mman_lru { | ||
40 | struct list_head *lru[TTM_NUM_MEM_TYPES]; | ||
41 | struct list_head *swap_lru; | ||
42 | }; | ||
43 | |||
44 | struct amdgpu_mman { | ||
45 | struct ttm_bo_global_ref bo_global_ref; | ||
46 | struct drm_global_reference mem_global_ref; | ||
47 | struct ttm_bo_device bdev; | ||
48 | bool mem_global_referenced; | ||
49 | bool initialized; | ||
50 | |||
51 | #if defined(CONFIG_DEBUG_FS) | ||
52 | struct dentry *vram; | ||
53 | struct dentry *gtt; | ||
54 | #endif | ||
55 | |||
56 | /* buffer handling */ | ||
57 | const struct amdgpu_buffer_funcs *buffer_funcs; | ||
58 | struct amdgpu_ring *buffer_funcs_ring; | ||
59 | /* Scheduler entity for buffer moves */ | ||
60 | struct amd_sched_entity entity; | ||
61 | |||
62 | /* custom LRU management */ | ||
63 | struct amdgpu_mman_lru log2_size[AMDGPU_TTM_LRU_SIZE]; | ||
64 | }; | ||
65 | |||
66 | int amdgpu_copy_buffer(struct amdgpu_ring *ring, | ||
67 | uint64_t src_offset, | ||
68 | uint64_t dst_offset, | ||
69 | uint32_t byte_count, | ||
70 | struct reservation_object *resv, | ||
71 | struct fence **fence); | ||
72 | int amdgpu_fill_buffer(struct amdgpu_bo *bo, | ||
73 | uint32_t src_data, | ||
74 | struct reservation_object *resv, | ||
75 | struct fence **fence); | ||
76 | |||
77 | int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); | ||
78 | #endif | ||