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authorStephen Boyd <sboyd@codeaurora.org>2015-08-25 19:02:02 -0400
committerStephen Boyd <sboyd@codeaurora.org>2015-08-25 19:03:42 -0400
commitc5a132a84a692f8d81f3b6959b98bcd959659457 (patch)
tree8e294610580e0ac7fed7d3f13ffc7798b302cb34
parenta7c602bf42f943e717eed92165ebfa6dbaba3029 (diff)
clk: tegra: Fix some static checker problems
The latest Tegra clk pull had some problems. Fix them. drivers/clk/tegra/clk-tegra124.c:1450:6: warning: symbol 'tegra124_clock_assert_dfll_dvco_reset' was not declared. Should it be static? drivers/clk/tegra/clk-tegra124.c:1466:6: warning: symbol 'tegra124_clock_deassert_dfll_dvco_reset' was not declared. Should it be static? drivers/clk/tegra/clk-tegra124.c:1476:5: warning: symbol 'tegra124_reset_assert' was not declared. Should it be static? drivers/clk/tegra/clk-tegra124.c:1486:5: warning: symbol 'tegra124_reset_deassert' was not declared. Should it be static? drivers/clk/tegra/clk-dfll.c:590 dfll_load_i2c_lut() warn: inconsistent indenting drivers/clk/tegra/clk-dfll.c:1448 dfll_build_i2c_lut() warn: unsigned 'td->i2c_lut[0]' is never less than zero. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/tegra/clk-dfll.c8
-rw-r--r--drivers/clk/tegra/clk-tegra124.c8
2 files changed, 9 insertions, 7 deletions
diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c
index 109a79b95238..c2ff859ee0e8 100644
--- a/drivers/clk/tegra/clk-dfll.c
+++ b/drivers/clk/tegra/clk-dfll.c
@@ -587,7 +587,7 @@ static void dfll_load_i2c_lut(struct tegra_dfll *td)
587 else 587 else
588 lut_index = i; 588 lut_index = i;
589 589
590 val = regulator_list_hardware_vsel(td->vdd_reg, 590 val = regulator_list_hardware_vsel(td->vdd_reg,
591 td->i2c_lut[lut_index]); 591 td->i2c_lut[lut_index]);
592 __raw_writel(val, td->lut_base + i * 4); 592 __raw_writel(val, td->lut_base + i * 4);
593 } 593 }
@@ -1432,6 +1432,7 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td)
1432 int selector; 1432 int selector;
1433 unsigned long rate; 1433 unsigned long rate;
1434 struct dev_pm_opp *opp; 1434 struct dev_pm_opp *opp;
1435 int lut;
1435 1436
1436 rcu_read_lock(); 1437 rcu_read_lock();
1437 1438
@@ -1444,9 +1445,10 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td)
1444 v_max = dev_pm_opp_get_voltage(opp); 1445 v_max = dev_pm_opp_get_voltage(opp);
1445 1446
1446 v = td->soc->min_millivolts * 1000; 1447 v = td->soc->min_millivolts * 1000;
1447 td->i2c_lut[0] = find_vdd_map_entry_exact(td, v); 1448 lut = find_vdd_map_entry_exact(td, v);
1448 if (td->i2c_lut[0] < 0) 1449 if (lut < 0)
1449 goto out; 1450 goto out;
1451 td->i2c_lut[0] = lut;
1450 1452
1451 for (j = 1, rate = 0; ; rate++) { 1453 for (j = 1, rate = 0; ; rate++) {
1452 opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); 1454 opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index a9e2b30737ec..824d75883d2b 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -1447,7 +1447,7 @@ static void tegra124_car_barrier(void)
1447 * 1447 *
1448 * Assert the reset line of the DFLL's DVCO. No return value. 1448 * Assert the reset line of the DFLL's DVCO. No return value.
1449 */ 1449 */
1450void tegra124_clock_assert_dfll_dvco_reset(void) 1450static void tegra124_clock_assert_dfll_dvco_reset(void)
1451{ 1451{
1452 u32 v; 1452 u32 v;
1453 1453
@@ -1463,7 +1463,7 @@ void tegra124_clock_assert_dfll_dvco_reset(void)
1463 * Deassert the reset line of the DFLL's DVCO, allowing the DVCO to 1463 * Deassert the reset line of the DFLL's DVCO, allowing the DVCO to
1464 * operate. No return value. 1464 * operate. No return value.
1465 */ 1465 */
1466void tegra124_clock_deassert_dfll_dvco_reset(void) 1466static void tegra124_clock_deassert_dfll_dvco_reset(void)
1467{ 1467{
1468 u32 v; 1468 u32 v;
1469 1469
@@ -1473,7 +1473,7 @@ void tegra124_clock_deassert_dfll_dvco_reset(void)
1473 tegra124_car_barrier(); 1473 tegra124_car_barrier();
1474} 1474}
1475 1475
1476int tegra124_reset_assert(unsigned long id) 1476static int tegra124_reset_assert(unsigned long id)
1477{ 1477{
1478 if (id == TEGRA124_RST_DFLL_DVCO) 1478 if (id == TEGRA124_RST_DFLL_DVCO)
1479 tegra124_clock_assert_dfll_dvco_reset(); 1479 tegra124_clock_assert_dfll_dvco_reset();
@@ -1483,7 +1483,7 @@ int tegra124_reset_assert(unsigned long id)
1483 return 0; 1483 return 0;
1484} 1484}
1485 1485
1486int tegra124_reset_deassert(unsigned long id) 1486static int tegra124_reset_deassert(unsigned long id)
1487{ 1487{
1488 if (id == TEGRA124_RST_DFLL_DVCO) 1488 if (id == TEGRA124_RST_DFLL_DVCO)
1489 tegra124_clock_deassert_dfll_dvco_reset(); 1489 tegra124_clock_deassert_dfll_dvco_reset();