diff options
author | Loc Ho <lho@apm.com> | 2014-06-06 17:35:40 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-06 19:08:06 -0400 |
commit | c3811711a6fd3965bfd8c782fa5c014aecaeeffc (patch) | |
tree | 5ec30a9c93cebc505db7fd122e7c5bf6bdd3c051 | |
parent | ee1d90146815fdc8d653c558b327fff2acba041d (diff) |
Documentation/devicetree/bindings: add documentation for the APM X-Gene SoC RTC DTS binding
Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Cc: Jon Masters <jcm@redhat.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | Documentation/devicetree/bindings/rtc/xgene-rtc.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rtc/xgene-rtc.txt b/Documentation/devicetree/bindings/rtc/xgene-rtc.txt new file mode 100644 index 000000000000..fd195c358446 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/xgene-rtc.txt | |||
@@ -0,0 +1,28 @@ | |||
1 | * APM X-Gene Real Time Clock | ||
2 | |||
3 | RTC controller for the APM X-Gene Real Time Clock | ||
4 | |||
5 | Required properties: | ||
6 | - compatible : Should be "apm,xgene-rtc" | ||
7 | - reg: physical base address of the controller and length of memory mapped | ||
8 | region. | ||
9 | - interrupts: IRQ line for the RTC. | ||
10 | - #clock-cells: Should be 1. | ||
11 | - clocks: Reference to the clock entry. | ||
12 | |||
13 | Example: | ||
14 | |||
15 | rtcclk: rtcclk { | ||
16 | compatible = "fixed-clock"; | ||
17 | #clock-cells = <1>; | ||
18 | clock-frequency = <100000000>; | ||
19 | clock-output-names = "rtcclk"; | ||
20 | }; | ||
21 | |||
22 | rtc: rtc@10510000 { | ||
23 | compatible = "apm,xgene-rtc"; | ||
24 | reg = <0x0 0x10510000 0x0 0x400>; | ||
25 | interrupts = <0x0 0x46 0x4>; | ||
26 | #clock-cells = <1>; | ||
27 | clocks = <&rtcclk 0>; | ||
28 | }; | ||