drm/amdgpu: refine uvd gate logic for CI.

uvd dpm will be controlled by uvd.
dpm just disable uvd dpm in case of suspend when play video.
due to the new logic of uvd_begin_use/end_use,
if disable uvd dpm in late init, will have no chance to
enable uvd dpm after resume until play video again.

Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 2 insertions, 4 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index a0d63a293bb0..1d8c375a3561 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -5396,7 +5396,7 @@ static void ci_dpm_disable(struct amdgpu_device *adev)
         amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
                        AMDGPU_THERMAL_IRQ_HIGH_TO_LOW);
 
-        ci_dpm_powergate_uvd(adev, false);
+        ci_dpm_powergate_uvd(adev, true);
 
         if (!amdgpu_ci_is_smc_running(adev))
                 return;
@@ -6036,7 +6036,7 @@ static int ci_dpm_init(struct amdgpu_device *adev)
 
         pi->caps_dynamic_ac_timing = true;
 
-        pi->uvd_power_gated = false;
+        pi->uvd_power_gated = true;
 
         /* make sure dc limits are valid */
         if ((adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
@@ -6179,8 +6179,6 @@ static int ci_dpm_late_init(void *handle)
         if (ret)
                 return ret;
 
-        ci_dpm_powergate_uvd(adev, true);
-
         return 0;
 }