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authorLinus Torvalds <torvalds@linux-foundation.org>2016-03-16 00:22:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-03-16 00:22:26 -0400
commitb7aae4a9d02a1f9fdeb183cd5da95e00aae5c93e (patch)
tree1ad69ddd5c19eaaa9e730d4d7206f7e08f4c75f9
parentff280e3639548fc8c366f6e4bd471e715ac590c7 (diff)
parentd25263d917caadba52275bf95c9b3400fe77edbe (diff)
Merge tag 'regmap-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown: "This has been a very busy release for regmap, not just in cleaning up the mess we got ourselves into with the endianness handling but also in other areas too: - Fixes for the endianness handling so that we now explicitly default to little endian (the code used to do this by accident). This fixes handling of explictly specified endianness on big endian systems. - Optimisation of the implementation of register striding. - A refectoring of the _update_bits() code to reduce duplication. - Fixes and enhancements for the interrupt implementation which make it easier to use in a wider range of systems" * tag 'regmap-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: (28 commits) regmap: irq: add devm apis for regmap_{add,del}_irq_chip regmap: replace regmap_write_bits() regmap: irq: Enable irq retriggering for nested irqs regmap: add regmap_fields_force_xxx() macros regmap: add regmap_field_force_xxx() macros regmap: merge regmap_fields_update_bits() into macro regmap: merge regmap_fields_write() into macro regmap: add regmap_fields_update_bits_base() regmap: merge regmap_field_update_bits() into macro regmap: merge regmap_field_write() into macro regmap: add regmap_field_update_bits_base() regmap: merge regmap_update_bits_check_async() into macro regmap: merge regmap_update_bits_check() into macro regmap: merge regmap_update_bits_async() into macro regmap: merge regmap_update_bits() into macro regmap: add regmap_update_bits_base() regcache: flat: Introduce register strider order regcache: Introduce the index parsing API by stride order regmap: core: Introduce register stride order regmap: irq: add devm apis for regmap_{add,del}_irq_chip ...
-rw-r--r--Documentation/devicetree/bindings/regmap/regmap.txt11
-rw-r--r--arch/mips/boot/dts/brcm/bcm6328.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6368.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi2
-rw-r--r--drivers/base/regmap/internal.h16
-rw-r--r--drivers/base/regmap/regcache-flat.c20
-rw-r--r--drivers/base/regmap/regcache.c45
-rw-r--r--drivers/base/regmap/regmap-irq.c104
-rw-r--r--drivers/base/regmap/regmap-mmio.c259
-rw-r--r--drivers/base/regmap/regmap.c241
-rw-r--r--include/linux/regmap.h107
18 files changed, 438 insertions, 385 deletions
diff --git a/Documentation/devicetree/bindings/regmap/regmap.txt b/Documentation/devicetree/bindings/regmap/regmap.txt
index b494f8b8ef72..e98a9652ccc8 100644
--- a/Documentation/devicetree/bindings/regmap/regmap.txt
+++ b/Documentation/devicetree/bindings/regmap/regmap.txt
@@ -5,15 +5,18 @@ Index Device Endianness properties
5--------------------------------------------------- 5---------------------------------------------------
61 BE 'big-endian' 61 BE 'big-endian'
72 LE 'little-endian' 72 LE 'little-endian'
83 Native 'native-endian'
8 9
9For one device driver, which will run in different scenarios above 10For one device driver, which will run in different scenarios above
10on different SoCs using the devicetree, we need one way to simplify 11on different SoCs using the devicetree, we need one way to simplify
11this. 12this.
12 13
13Required properties: 14Optional properties:
14- {big,little}-endian: these are boolean properties, if absent 15- {big,little,native}-endian: these are boolean properties, if absent
15 meaning that the CPU and the Device are in the same endianness mode, 16 then the implementation will choose a default based on the device
16 these properties are for register values and all the buffers only. 17 being controlled. These properties are for register values and all
18 the buffers only. Native endian means that the CPU and device have
19 the same endianness.
17 20
18Examples: 21Examples:
19Scenario 1 : CPU in LE mode & device in LE mode. 22Scenario 1 : CPU in LE mode & device in LE mode.
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index d61b1616b604..9d19236f53e7 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -74,7 +74,7 @@
74 timer: timer@10000040 { 74 timer: timer@10000040 {
75 compatible = "syscon"; 75 compatible = "syscon";
76 reg = <0x10000040 0x2c>; 76 reg = <0x10000040 0x2c>;
77 little-endian; 77 native-endian;
78 }; 78 };
79 79
80 reboot { 80 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 9c8d3fe28b31..1f6b9b5cddb4 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -54,7 +54,7 @@
54 periph_cntl: syscon@10000000 { 54 periph_cntl: syscon@10000000 {
55 compatible = "syscon"; 55 compatible = "syscon";
56 reg = <0x10000000 0x14>; 56 reg = <0x10000000 0x14>;
57 little-endian; 57 native-endian;
58 }; 58 };
59 59
60 reboot: syscon-reboot@10000008 { 60 reboot: syscon-reboot@10000008 {
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 1a7efa883c5e..3ae16053a0c9 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -98,7 +98,7 @@
98 sun_top_ctrl: syscon@404000 { 98 sun_top_ctrl: syscon@404000 {
99 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon"; 99 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
100 reg = <0x404000 0x60c>; 100 reg = <0x404000 0x60c>;
101 little-endian; 101 native-endian;
102 }; 102 };
103 103
104 reboot { 104 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index d4bf52cfcf17..be7991917d29 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -118,7 +118,7 @@
118 sun_top_ctrl: syscon@404000 { 118 sun_top_ctrl: syscon@404000 {
119 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon"; 119 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
120 reg = <0x404000 0x51c>; 120 reg = <0x404000 0x51c>;
121 little-endian; 121 native-endian;
122 }; 122 };
123 123
124 reboot { 124 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 8e2501694d03..060805be619a 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -112,7 +112,7 @@
112 sun_top_ctrl: syscon@404000 { 112 sun_top_ctrl: syscon@404000 {
113 compatible = "brcm,bcm7358-sun-top-ctrl", "syscon"; 113 compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
114 reg = <0x404000 0x51c>; 114 reg = <0x404000 0x51c>;
115 little-endian; 115 native-endian;
116 }; 116 };
117 117
118 reboot { 118 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 7e5f76040fb8..bcdb09bfe07b 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -112,7 +112,7 @@
112 sun_top_ctrl: syscon@404000 { 112 sun_top_ctrl: syscon@404000 {
113 compatible = "brcm,bcm7360-sun-top-ctrl", "syscon"; 113 compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
114 reg = <0x404000 0x51c>; 114 reg = <0x404000 0x51c>;
115 little-endian; 115 native-endian;
116 }; 116 };
117 117
118 reboot { 118 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index c739ea77acb0..d3b1b762e6c3 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -118,7 +118,7 @@
118 sun_top_ctrl: syscon@404000 { 118 sun_top_ctrl: syscon@404000 {
119 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon"; 119 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
120 reg = <0x404000 0x51c>; 120 reg = <0x404000 0x51c>;
121 little-endian; 121 native-endian;
122 }; 122 };
123 123
124 reboot { 124 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 5f55d0a50a28..3302a1b8a5c9 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -99,7 +99,7 @@
99 sun_top_ctrl: syscon@404000 { 99 sun_top_ctrl: syscon@404000 {
100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon"; 100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
101 reg = <0x404000 0x60c>; 101 reg = <0x404000 0x60c>;
102 little-endian; 102 native-endian;
103 }; 103 };
104 104
105 reboot { 105 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index e24d41ab4e30..15b27aae15a9 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -100,7 +100,7 @@
100 sun_top_ctrl: syscon@404000 { 100 sun_top_ctrl: syscon@404000 {
101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
102 reg = <0x404000 0x51c>; 102 reg = <0x404000 0x51c>;
103 little-endian; 103 native-endian;
104 }; 104 };
105 105
106 reboot { 106 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 8b9432cc062b..adb33e355043 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -114,7 +114,7 @@
114 sun_top_ctrl: syscon@404000 { 114 sun_top_ctrl: syscon@404000 {
115 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 115 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
116 reg = <0x404000 0x51c>; 116 reg = <0x404000 0x51c>;
117 little-endian; 117 native-endian;
118 }; 118 };
119 119
120 reboot { 120 reboot {
diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index 3df977054781..5c79526245c2 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h
@@ -110,6 +110,7 @@ struct regmap {
110 /* number of bits to (left) shift the reg value when formatting*/ 110 /* number of bits to (left) shift the reg value when formatting*/
111 int reg_shift; 111 int reg_shift;
112 int reg_stride; 112 int reg_stride;
113 int reg_stride_order;
113 114
114 /* regcache specific members */ 115 /* regcache specific members */
115 const struct regcache_ops *cache_ops; 116 const struct regcache_ops *cache_ops;
@@ -263,4 +264,19 @@ static inline const char *regmap_name(const struct regmap *map)
263 return map->name; 264 return map->name;
264} 265}
265 266
267static inline unsigned int regmap_get_offset(const struct regmap *map,
268 unsigned int index)
269{
270 if (map->reg_stride_order >= 0)
271 return index << map->reg_stride_order;
272 else
273 return index * map->reg_stride;
274}
275
276static inline unsigned int regcache_get_index_by_order(const struct regmap *map,
277 unsigned int reg)
278{
279 return reg >> map->reg_stride_order;
280}
281
266#endif 282#endif
diff --git a/drivers/base/regmap/regcache-flat.c b/drivers/base/regmap/regcache-flat.c
index 686c9e0b930e..3ee72550b1e3 100644
--- a/drivers/base/regmap/regcache-flat.c
+++ b/drivers/base/regmap/regcache-flat.c
@@ -16,20 +16,30 @@
16 16
17#include "internal.h" 17#include "internal.h"
18 18
19static inline unsigned int regcache_flat_get_index(const struct regmap *map,
20 unsigned int reg)
21{
22 return regcache_get_index_by_order(map, reg);
23}
24
19static int regcache_flat_init(struct regmap *map) 25static int regcache_flat_init(struct regmap *map)
20{ 26{
21 int i; 27 int i;
22 unsigned int *cache; 28 unsigned int *cache;
23 29
24 map->cache = kcalloc(map->max_register + 1, sizeof(unsigned int), 30 if (!map || map->reg_stride_order < 0)
25 GFP_KERNEL); 31 return -EINVAL;
32
33 map->cache = kcalloc(regcache_flat_get_index(map, map->max_register)
34 + 1, sizeof(unsigned int), GFP_KERNEL);
26 if (!map->cache) 35 if (!map->cache)
27 return -ENOMEM; 36 return -ENOMEM;
28 37
29 cache = map->cache; 38 cache = map->cache;
30 39
31 for (i = 0; i < map->num_reg_defaults; i++) 40 for (i = 0; i < map->num_reg_defaults; i++)
32 cache[map->reg_defaults[i].reg] = map->reg_defaults[i].def; 41 cache[regcache_flat_get_index(map, map->reg_defaults[i].reg)] =
42 map->reg_defaults[i].def;
33 43
34 return 0; 44 return 0;
35} 45}
@@ -47,7 +57,7 @@ static int regcache_flat_read(struct regmap *map,
47{ 57{
48 unsigned int *cache = map->cache; 58 unsigned int *cache = map->cache;
49 59
50 *value = cache[reg]; 60 *value = cache[regcache_flat_get_index(map, reg)];
51 61
52 return 0; 62 return 0;
53} 63}
@@ -57,7 +67,7 @@ static int regcache_flat_write(struct regmap *map, unsigned int reg,
57{ 67{
58 unsigned int *cache = map->cache; 68 unsigned int *cache = map->cache;
59 69
60 cache[reg] = value; 70 cache[regcache_flat_get_index(map, reg)] = value;
61 71
62 return 0; 72 return 0;
63} 73}
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index 348be3a35410..4170b7d95276 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -30,7 +30,7 @@ static int regcache_hw_init(struct regmap *map)
30 int i, j; 30 int i, j;
31 int ret; 31 int ret;
32 int count; 32 int count;
33 unsigned int val; 33 unsigned int reg, val;
34 void *tmp_buf; 34 void *tmp_buf;
35 35
36 if (!map->num_reg_defaults_raw) 36 if (!map->num_reg_defaults_raw)
@@ -57,7 +57,7 @@ static int regcache_hw_init(struct regmap *map)
57 bool cache_bypass = map->cache_bypass; 57 bool cache_bypass = map->cache_bypass;
58 dev_warn(map->dev, "No cache defaults, reading back from HW\n"); 58 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
59 59
60 /* Bypass the cache access till data read from HW*/ 60 /* Bypass the cache access till data read from HW */
61 map->cache_bypass = true; 61 map->cache_bypass = true;
62 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); 62 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
63 if (!tmp_buf) { 63 if (!tmp_buf) {
@@ -65,29 +65,48 @@ static int regcache_hw_init(struct regmap *map)
65 goto err_free; 65 goto err_free;
66 } 66 }
67 ret = regmap_raw_read(map, 0, tmp_buf, 67 ret = regmap_raw_read(map, 0, tmp_buf,
68 map->num_reg_defaults_raw); 68 map->cache_size_raw);
69 map->cache_bypass = cache_bypass; 69 map->cache_bypass = cache_bypass;
70 if (ret < 0) 70 if (ret == 0) {
71 goto err_cache_free; 71 map->reg_defaults_raw = tmp_buf;
72 72 map->cache_free = 1;
73 map->reg_defaults_raw = tmp_buf; 73 } else {
74 map->cache_free = 1; 74 kfree(tmp_buf);
75 }
75 } 76 }
76 77
77 /* fill the reg_defaults */ 78 /* fill the reg_defaults */
78 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) { 79 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
79 if (regmap_volatile(map, i * map->reg_stride)) 80 reg = i * map->reg_stride;
81
82 if (!regmap_readable(map, reg))
80 continue; 83 continue;
81 val = regcache_get_val(map, map->reg_defaults_raw, i); 84
82 map->reg_defaults[j].reg = i * map->reg_stride; 85 if (regmap_volatile(map, reg))
86 continue;
87
88 if (map->reg_defaults_raw) {
89 val = regcache_get_val(map, map->reg_defaults_raw, i);
90 } else {
91 bool cache_bypass = map->cache_bypass;
92
93 map->cache_bypass = true;
94 ret = regmap_read(map, reg, &val);
95 map->cache_bypass = cache_bypass;
96 if (ret != 0) {
97 dev_err(map->dev, "Failed to read %d: %d\n",
98 reg, ret);
99 goto err_free;
100 }
101 }
102
103 map->reg_defaults[j].reg = reg;
83 map->reg_defaults[j].def = val; 104 map->reg_defaults[j].def = val;
84 j++; 105 j++;
85 } 106 }
86 107
87 return 0; 108 return 0;
88 109
89err_cache_free:
90 kfree(tmp_buf);
91err_free: 110err_free:
92 kfree(map->reg_defaults); 111 kfree(map->reg_defaults);
93 112
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 9b0d202414d0..26f799e71c82 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -379,6 +379,7 @@ static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
379 irq_set_chip_data(virq, data); 379 irq_set_chip_data(virq, data);
380 irq_set_chip(virq, &data->irq_chip); 380 irq_set_chip(virq, &data->irq_chip);
381 irq_set_nested_thread(virq, 1); 381 irq_set_nested_thread(virq, 1);
382 irq_set_parent(virq, data->irq);
382 irq_set_noprobe(virq); 383 irq_set_noprobe(virq);
383 384
384 return 0; 385 return 0;
@@ -655,13 +656,34 @@ EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
655 * 656 *
656 * @irq: Primary IRQ for the device 657 * @irq: Primary IRQ for the device
657 * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip() 658 * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip()
659 *
660 * This function also dispose all mapped irq on chip.
658 */ 661 */
659void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) 662void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
660{ 663{
664 unsigned int virq;
665 int hwirq;
666
661 if (!d) 667 if (!d)
662 return; 668 return;
663 669
664 free_irq(irq, d); 670 free_irq(irq, d);
671
672 /* Dispose all virtual irq from irq domain before removing it */
673 for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) {
674 /* Ignore hwirq if holes in the IRQ list */
675 if (!d->chip->irqs[hwirq].mask)
676 continue;
677
678 /*
679 * Find the virtual irq of hwirq on chip and if it is
680 * there then dispose it
681 */
682 virq = irq_find_mapping(d->domain, hwirq);
683 if (virq)
684 irq_dispose_mapping(virq);
685 }
686
665 irq_domain_remove(d->domain); 687 irq_domain_remove(d->domain);
666 kfree(d->type_buf); 688 kfree(d->type_buf);
667 kfree(d->type_buf_def); 689 kfree(d->type_buf_def);
@@ -674,6 +696,88 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
674} 696}
675EXPORT_SYMBOL_GPL(regmap_del_irq_chip); 697EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
676 698
699static void devm_regmap_irq_chip_release(struct device *dev, void *res)
700{
701 struct regmap_irq_chip_data *d = *(struct regmap_irq_chip_data **)res;
702
703 regmap_del_irq_chip(d->irq, d);
704}
705
706static int devm_regmap_irq_chip_match(struct device *dev, void *res, void *data)
707
708{
709 struct regmap_irq_chip_data **r = res;
710
711 if (!r || !*r) {
712 WARN_ON(!r || !*r);
713 return 0;
714 }
715 return *r == data;
716}
717
718/**
719 * devm_regmap_add_irq_chip(): Resource manager regmap_add_irq_chip()
720 *
721 * @dev: The device pointer on which irq_chip belongs to.
722 * @map: The regmap for the device.
723 * @irq: The IRQ the device uses to signal interrupts
724 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
725 * @chip: Configuration for the interrupt controller.
726 * @data: Runtime data structure for the controller, allocated on success
727 *
728 * Returns 0 on success or an errno on failure.
729 *
730 * The regmap_irq_chip data automatically be released when the device is
731 * unbound.
732 */
733int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
734 int irq_flags, int irq_base,
735 const struct regmap_irq_chip *chip,
736 struct regmap_irq_chip_data **data)
737{
738 struct regmap_irq_chip_data **ptr, *d;
739 int ret;
740
741 ptr = devres_alloc(devm_regmap_irq_chip_release, sizeof(*ptr),
742 GFP_KERNEL);
743 if (!ptr)
744 return -ENOMEM;
745
746 ret = regmap_add_irq_chip(map, irq, irq_flags, irq_base,
747 chip, &d);
748 if (ret < 0) {
749 devres_free(ptr);
750 return ret;
751 }
752
753 *ptr = d;
754 devres_add(dev, ptr);
755 *data = d;
756 return 0;
757}
758EXPORT_SYMBOL_GPL(devm_regmap_add_irq_chip);
759
760/**
761 * devm_regmap_del_irq_chip(): Resource managed regmap_del_irq_chip()
762 *
763 * @dev: Device for which which resource was allocated.
764 * @irq: Primary IRQ for the device
765 * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip()
766 */
767void devm_regmap_del_irq_chip(struct device *dev, int irq,
768 struct regmap_irq_chip_data *data)
769{
770 int rc;
771
772 WARN_ON(irq != data->irq);
773 rc = devres_release(dev, devm_regmap_irq_chip_release,
774 devm_regmap_irq_chip_match, data);
775
776 if (rc != 0)
777 WARN_ON(rc);
778}
779EXPORT_SYMBOL_GPL(devm_regmap_del_irq_chip);
780
677/** 781/**
678 * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip 782 * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip
679 * 783 *
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
index eea51569f0eb..7526906ca080 100644
--- a/drivers/base/regmap/regmap-mmio.c
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -25,26 +25,14 @@
25 25
26struct regmap_mmio_context { 26struct regmap_mmio_context {
27 void __iomem *regs; 27 void __iomem *regs;
28 unsigned reg_bytes;
29 unsigned val_bytes; 28 unsigned val_bytes;
30 unsigned pad_bytes;
31 struct clk *clk; 29 struct clk *clk;
32};
33 30
34static inline void regmap_mmio_regsize_check(size_t reg_size) 31 void (*reg_write)(struct regmap_mmio_context *ctx,
35{ 32 unsigned int reg, unsigned int val);
36 switch (reg_size) { 33 unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
37 case 1: 34 unsigned int reg);
38 case 2: 35};
39 case 4:
40#ifdef CONFIG_64BIT
41 case 8:
42#endif
43 break;
44 default:
45 BUG();
46 }
47}
48 36
49static int regmap_mmio_regbits_check(size_t reg_bits) 37static int regmap_mmio_regbits_check(size_t reg_bits)
50{ 38{
@@ -88,72 +76,62 @@ static int regmap_mmio_get_min_stride(size_t val_bits)
88 return min_stride; 76 return min_stride;
89} 77}
90 78
91static inline void regmap_mmio_count_check(size_t count, u32 offset) 79static void regmap_mmio_write8(struct regmap_mmio_context *ctx,
80 unsigned int reg,
81 unsigned int val)
82{
83 writeb(val, ctx->regs + reg);
84}
85
86static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
87 unsigned int reg,
88 unsigned int val)
92{ 89{
93 BUG_ON(count <= offset); 90 writew(val, ctx->regs + reg);
94} 91}
95 92
96static inline unsigned int 93static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
97regmap_mmio_get_offset(const void *reg, size_t reg_size) 94 unsigned int reg,
95 unsigned int val)
98{ 96{
99 switch (reg_size) { 97 iowrite16be(val, ctx->regs + reg);
100 case 1: 98}
101 return *(u8 *)reg; 99
102 case 2: 100static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
103 return *(u16 *)reg; 101 unsigned int reg,
104 case 4: 102 unsigned int val)
105 return *(u32 *)reg; 103{
104 writel(val, ctx->regs + reg);
105}
106
107static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
108 unsigned int reg,
109 unsigned int val)
110{
111 iowrite32be(val, ctx->regs + reg);
112}
113
106#ifdef CONFIG_64BIT 114#ifdef CONFIG_64BIT
107 case 8: 115static void regmap_mmio_write64le(struct regmap_mmio_context *ctx,
108 return *(u64 *)reg; 116 unsigned int reg,
109#endif 117 unsigned int val)
110 default: 118{
111 BUG(); 119 writeq(val, ctx->regs + reg);
112 }
113} 120}
121#endif
114 122
115static int regmap_mmio_gather_write(void *context, 123static int regmap_mmio_write(void *context, unsigned int reg, unsigned int val)
116 const void *reg, size_t reg_size,
117 const void *val, size_t val_size)
118{ 124{
119 struct regmap_mmio_context *ctx = context; 125 struct regmap_mmio_context *ctx = context;
120 unsigned int offset;
121 int ret; 126 int ret;
122 127
123 regmap_mmio_regsize_check(reg_size);
124
125 if (!IS_ERR(ctx->clk)) { 128 if (!IS_ERR(ctx->clk)) {
126 ret = clk_enable(ctx->clk); 129 ret = clk_enable(ctx->clk);
127 if (ret < 0) 130 if (ret < 0)
128 return ret; 131 return ret;
129 } 132 }
130 133
131 offset = regmap_mmio_get_offset(reg, reg_size); 134 ctx->reg_write(ctx, reg, val);
132
133 while (val_size) {
134 switch (ctx->val_bytes) {
135 case 1:
136 writeb(*(u8 *)val, ctx->regs + offset);
137 break;
138 case 2:
139 writew(*(u16 *)val, ctx->regs + offset);
140 break;
141 case 4:
142 writel(*(u32 *)val, ctx->regs + offset);
143 break;
144#ifdef CONFIG_64BIT
145 case 8:
146 writeq(*(u64 *)val, ctx->regs + offset);
147 break;
148#endif
149 default:
150 /* Should be caught by regmap_mmio_check_config */
151 BUG();
152 }
153 val_size -= ctx->val_bytes;
154 val += ctx->val_bytes;
155 offset += ctx->val_bytes;
156 }
157 135
158 if (!IS_ERR(ctx->clk)) 136 if (!IS_ERR(ctx->clk))
159 clk_disable(ctx->clk); 137 clk_disable(ctx->clk);
@@ -161,59 +139,56 @@ static int regmap_mmio_gather_write(void *context,
161 return 0; 139 return 0;
162} 140}
163 141
164static int regmap_mmio_write(void *context, const void *data, size_t count) 142static unsigned int regmap_mmio_read8(struct regmap_mmio_context *ctx,
143 unsigned int reg)
165{ 144{
166 struct regmap_mmio_context *ctx = context; 145 return readb(ctx->regs + reg);
167 unsigned int offset = ctx->reg_bytes + ctx->pad_bytes; 146}
147
148static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
149 unsigned int reg)
150{
151 return readw(ctx->regs + reg);
152}
153
154static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
155 unsigned int reg)
156{
157 return ioread16be(ctx->regs + reg);
158}
159
160static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
161 unsigned int reg)
162{
163 return readl(ctx->regs + reg);
164}
168 165
169 regmap_mmio_count_check(count, offset); 166static unsigned int regmap_mmio_read32be(struct regmap_mmio_context *ctx,
167 unsigned int reg)
168{
169 return ioread32be(ctx->regs + reg);
170}
170 171
171 return regmap_mmio_gather_write(context, data, ctx->reg_bytes, 172#ifdef CONFIG_64BIT
172 data + offset, count - offset); 173static unsigned int regmap_mmio_read64le(struct regmap_mmio_context *ctx,
174 unsigned int reg)
175{
176 return readq(ctx->regs + reg);
173} 177}
178#endif
174 179
175static int regmap_mmio_read(void *context, 180static int regmap_mmio_read(void *context, unsigned int reg, unsigned int *val)
176 const void *reg, size_t reg_size,
177 void *val, size_t val_size)
178{ 181{
179 struct regmap_mmio_context *ctx = context; 182 struct regmap_mmio_context *ctx = context;
180 unsigned int offset;
181 int ret; 183 int ret;
182 184
183 regmap_mmio_regsize_check(reg_size);
184
185 if (!IS_ERR(ctx->clk)) { 185 if (!IS_ERR(ctx->clk)) {
186 ret = clk_enable(ctx->clk); 186 ret = clk_enable(ctx->clk);
187 if (ret < 0) 187 if (ret < 0)
188 return ret; 188 return ret;
189 } 189 }
190 190
191 offset = regmap_mmio_get_offset(reg, reg_size); 191 *val = ctx->reg_read(ctx, reg);
192
193 while (val_size) {
194 switch (ctx->val_bytes) {
195 case 1:
196 *(u8 *)val = readb(ctx->regs + offset);
197 break;
198 case 2:
199 *(u16 *)val = readw(ctx->regs + offset);
200 break;
201 case 4:
202 *(u32 *)val = readl(ctx->regs + offset);
203 break;
204#ifdef CONFIG_64BIT
205 case 8:
206 *(u64 *)val = readq(ctx->regs + offset);
207 break;
208#endif
209 default:
210 /* Should be caught by regmap_mmio_check_config */
211 BUG();
212 }
213 val_size -= ctx->val_bytes;
214 val += ctx->val_bytes;
215 offset += ctx->val_bytes;
216 }
217 192
218 if (!IS_ERR(ctx->clk)) 193 if (!IS_ERR(ctx->clk))
219 clk_disable(ctx->clk); 194 clk_disable(ctx->clk);
@@ -232,14 +207,11 @@ static void regmap_mmio_free_context(void *context)
232 kfree(context); 207 kfree(context);
233} 208}
234 209
235static struct regmap_bus regmap_mmio = { 210static const struct regmap_bus regmap_mmio = {
236 .fast_io = true, 211 .fast_io = true,
237 .write = regmap_mmio_write, 212 .reg_write = regmap_mmio_write,
238 .gather_write = regmap_mmio_gather_write, 213 .reg_read = regmap_mmio_read,
239 .read = regmap_mmio_read,
240 .free_context = regmap_mmio_free_context, 214 .free_context = regmap_mmio_free_context,
241 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
242 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
243}; 215};
244 216
245static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev, 217static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
@@ -265,24 +237,71 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
265 if (config->reg_stride < min_stride) 237 if (config->reg_stride < min_stride)
266 return ERR_PTR(-EINVAL); 238 return ERR_PTR(-EINVAL);
267 239
268 switch (config->reg_format_endian) {
269 case REGMAP_ENDIAN_DEFAULT:
270 case REGMAP_ENDIAN_NATIVE:
271 break;
272 default:
273 return ERR_PTR(-EINVAL);
274 }
275
276 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 240 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
277 if (!ctx) 241 if (!ctx)
278 return ERR_PTR(-ENOMEM); 242 return ERR_PTR(-ENOMEM);
279 243
280 ctx->regs = regs; 244 ctx->regs = regs;
281 ctx->val_bytes = config->val_bits / 8; 245 ctx->val_bytes = config->val_bits / 8;
282 ctx->reg_bytes = config->reg_bits / 8;
283 ctx->pad_bytes = config->pad_bits / 8;
284 ctx->clk = ERR_PTR(-ENODEV); 246 ctx->clk = ERR_PTR(-ENODEV);
285 247
248 switch (config->reg_format_endian) {
249 case REGMAP_ENDIAN_DEFAULT:
250 case REGMAP_ENDIAN_LITTLE:
251#ifdef __LITTLE_ENDIAN
252 case REGMAP_ENDIAN_NATIVE:
253#endif
254 switch (config->val_bits) {
255 case 8:
256 ctx->reg_read = regmap_mmio_read8;
257 ctx->reg_write = regmap_mmio_write8;
258 break;
259 case 16:
260 ctx->reg_read = regmap_mmio_read16le;
261 ctx->reg_write = regmap_mmio_write16le;
262 break;
263 case 32:
264 ctx->reg_read = regmap_mmio_read32le;
265 ctx->reg_write = regmap_mmio_write32le;
266 break;
267#ifdef CONFIG_64BIT
268 case 64:
269 ctx->reg_read = regmap_mmio_read64le;
270 ctx->reg_write = regmap_mmio_write64le;
271 break;
272#endif
273 default:
274 ret = -EINVAL;
275 goto err_free;
276 }
277 break;
278 case REGMAP_ENDIAN_BIG:
279#ifdef __BIG_ENDIAN
280 case REGMAP_ENDIAN_NATIVE:
281#endif
282 switch (config->val_bits) {
283 case 8:
284 ctx->reg_read = regmap_mmio_read8;
285 ctx->reg_write = regmap_mmio_write8;
286 break;
287 case 16:
288 ctx->reg_read = regmap_mmio_read16be;
289 ctx->reg_write = regmap_mmio_write16be;
290 break;
291 case 32:
292 ctx->reg_read = regmap_mmio_read32be;
293 ctx->reg_write = regmap_mmio_write32be;
294 break;
295 default:
296 ret = -EINVAL;
297 goto err_free;
298 }
299 break;
300 default:
301 ret = -EINVAL;
302 goto err_free;
303 }
304
286 if (clk_id == NULL) 305 if (clk_id == NULL)
287 return ctx; 306 return ctx;
288 307
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index ee54e841de4a..df2d2ef5d6b3 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -19,6 +19,7 @@
19#include <linux/rbtree.h> 19#include <linux/rbtree.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/log2.h>
22 23
23#define CREATE_TRACE_POINTS 24#define CREATE_TRACE_POINTS
24#include "trace.h" 25#include "trace.h"
@@ -557,6 +558,8 @@ enum regmap_endian regmap_get_val_endian(struct device *dev,
557 endian = REGMAP_ENDIAN_BIG; 558 endian = REGMAP_ENDIAN_BIG;
558 else if (of_property_read_bool(np, "little-endian")) 559 else if (of_property_read_bool(np, "little-endian"))
559 endian = REGMAP_ENDIAN_LITTLE; 560 endian = REGMAP_ENDIAN_LITTLE;
561 else if (of_property_read_bool(np, "native-endian"))
562 endian = REGMAP_ENDIAN_NATIVE;
560 563
561 /* If the endianness was specified in DT, use that */ 564 /* If the endianness was specified in DT, use that */
562 if (endian != REGMAP_ENDIAN_DEFAULT) 565 if (endian != REGMAP_ENDIAN_DEFAULT)
@@ -638,6 +641,10 @@ struct regmap *__regmap_init(struct device *dev,
638 map->reg_stride = config->reg_stride; 641 map->reg_stride = config->reg_stride;
639 else 642 else
640 map->reg_stride = 1; 643 map->reg_stride = 1;
644 if (is_power_of_2(map->reg_stride))
645 map->reg_stride_order = ilog2(map->reg_stride);
646 else
647 map->reg_stride_order = -1;
641 map->use_single_read = config->use_single_rw || !bus || !bus->read; 648 map->use_single_read = config->use_single_rw || !bus || !bus->read;
642 map->use_single_write = config->use_single_rw || !bus || !bus->write; 649 map->use_single_write = config->use_single_rw || !bus || !bus->write;
643 map->can_multi_write = config->can_multi_write && bus && bus->write; 650 map->can_multi_write = config->can_multi_write && bus && bus->write;
@@ -1308,7 +1315,7 @@ int _regmap_raw_write(struct regmap *map, unsigned int reg,
1308 if (map->writeable_reg) 1315 if (map->writeable_reg)
1309 for (i = 0; i < val_len / map->format.val_bytes; i++) 1316 for (i = 0; i < val_len / map->format.val_bytes; i++)
1310 if (!map->writeable_reg(map->dev, 1317 if (!map->writeable_reg(map->dev,
1311 reg + (i * map->reg_stride))) 1318 reg + regmap_get_offset(map, i)))
1312 return -EINVAL; 1319 return -EINVAL;
1313 1320
1314 if (!map->cache_bypass && map->format.parse_val) { 1321 if (!map->cache_bypass && map->format.parse_val) {
@@ -1316,7 +1323,8 @@ int _regmap_raw_write(struct regmap *map, unsigned int reg,
1316 int val_bytes = map->format.val_bytes; 1323 int val_bytes = map->format.val_bytes;
1317 for (i = 0; i < val_len / val_bytes; i++) { 1324 for (i = 0; i < val_len / val_bytes; i++) {
1318 ival = map->format.parse_val(val + (i * val_bytes)); 1325 ival = map->format.parse_val(val + (i * val_bytes));
1319 ret = regcache_write(map, reg + (i * map->reg_stride), 1326 ret = regcache_write(map,
1327 reg + regmap_get_offset(map, i),
1320 ival); 1328 ival);
1321 if (ret) { 1329 if (ret) {
1322 dev_err(map->dev, 1330 dev_err(map->dev,
@@ -1690,100 +1698,63 @@ int regmap_raw_write(struct regmap *map, unsigned int reg,
1690EXPORT_SYMBOL_GPL(regmap_raw_write); 1698EXPORT_SYMBOL_GPL(regmap_raw_write);
1691 1699
1692/** 1700/**
1693 * regmap_field_write(): Write a value to a single register field 1701 * regmap_field_update_bits_base():
1694 * 1702 * Perform a read/modify/write cycle on the register field
1695 * @field: Register field to write to 1703 * with change, async, force option
1696 * @val: Value to be written
1697 *
1698 * A value of zero will be returned on success, a negative errno will
1699 * be returned in error cases.
1700 */
1701int regmap_field_write(struct regmap_field *field, unsigned int val)
1702{
1703 return regmap_update_bits(field->regmap, field->reg,
1704 field->mask, val << field->shift);
1705}
1706EXPORT_SYMBOL_GPL(regmap_field_write);
1707
1708/**
1709 * regmap_field_update_bits(): Perform a read/modify/write cycle
1710 * on the register field
1711 * 1704 *
1712 * @field: Register field to write to 1705 * @field: Register field to write to
1713 * @mask: Bitmask to change 1706 * @mask: Bitmask to change
1714 * @val: Value to be written 1707 * @val: Value to be written
1708 * @change: Boolean indicating if a write was done
1709 * @async: Boolean indicating asynchronously
1710 * @force: Boolean indicating use force update
1715 * 1711 *
1716 * A value of zero will be returned on success, a negative errno will 1712 * A value of zero will be returned on success, a negative errno will
1717 * be returned in error cases. 1713 * be returned in error cases.
1718 */ 1714 */
1719int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) 1715int regmap_field_update_bits_base(struct regmap_field *field,
1716 unsigned int mask, unsigned int val,
1717 bool *change, bool async, bool force)
1720{ 1718{
1721 mask = (mask << field->shift) & field->mask; 1719 mask = (mask << field->shift) & field->mask;
1722 1720
1723 return regmap_update_bits(field->regmap, field->reg, 1721 return regmap_update_bits_base(field->regmap, field->reg,
1724 mask, val << field->shift); 1722 mask, val << field->shift,
1723 change, async, force);
1725} 1724}
1726EXPORT_SYMBOL_GPL(regmap_field_update_bits); 1725EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1727 1726
1728/** 1727/**
1729 * regmap_fields_write(): Write a value to a single register field with port ID 1728 * regmap_fields_update_bits_base():
1730 * 1729 * Perform a read/modify/write cycle on the register field
1731 * @field: Register field to write to 1730 * with change, async, force option
1732 * @id: port ID
1733 * @val: Value to be written
1734 *
1735 * A value of zero will be returned on success, a negative errno will
1736 * be returned in error cases.
1737 */
1738int regmap_fields_write(struct regmap_field *field, unsigned int id,
1739 unsigned int val)
1740{
1741 if (id >= field->id_size)
1742 return -EINVAL;
1743
1744 return regmap_update_bits(field->regmap,
1745 field->reg + (field->id_offset * id),
1746 field->mask, val << field->shift);
1747}
1748EXPORT_SYMBOL_GPL(regmap_fields_write);
1749
1750int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
1751 unsigned int val)
1752{
1753 if (id >= field->id_size)
1754 return -EINVAL;
1755
1756 return regmap_write_bits(field->regmap,
1757 field->reg + (field->id_offset * id),
1758 field->mask, val << field->shift);
1759}
1760EXPORT_SYMBOL_GPL(regmap_fields_force_write);
1761
1762/**
1763 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1764 * on the register field
1765 * 1731 *
1766 * @field: Register field to write to 1732 * @field: Register field to write to
1767 * @id: port ID 1733 * @id: port ID
1768 * @mask: Bitmask to change 1734 * @mask: Bitmask to change
1769 * @val: Value to be written 1735 * @val: Value to be written
1736 * @change: Boolean indicating if a write was done
1737 * @async: Boolean indicating asynchronously
1738 * @force: Boolean indicating use force update
1770 * 1739 *
1771 * A value of zero will be returned on success, a negative errno will 1740 * A value of zero will be returned on success, a negative errno will
1772 * be returned in error cases. 1741 * be returned in error cases.
1773 */ 1742 */
1774int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, 1743int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1775 unsigned int mask, unsigned int val) 1744 unsigned int mask, unsigned int val,
1745 bool *change, bool async, bool force)
1776{ 1746{
1777 if (id >= field->id_size) 1747 if (id >= field->id_size)
1778 return -EINVAL; 1748 return -EINVAL;
1779 1749
1780 mask = (mask << field->shift) & field->mask; 1750 mask = (mask << field->shift) & field->mask;
1781 1751
1782 return regmap_update_bits(field->regmap, 1752 return regmap_update_bits_base(field->regmap,
1783 field->reg + (field->id_offset * id), 1753 field->reg + (field->id_offset * id),
1784 mask, val << field->shift); 1754 mask, val << field->shift,
1755 change, async, force);
1785} 1756}
1786EXPORT_SYMBOL_GPL(regmap_fields_update_bits); 1757EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1787 1758
1788/* 1759/*
1789 * regmap_bulk_write(): Write multiple registers to the device 1760 * regmap_bulk_write(): Write multiple registers to the device
@@ -1846,8 +1817,9 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1846 goto out; 1817 goto out;
1847 } 1818 }
1848 1819
1849 ret = _regmap_write(map, reg + (i * map->reg_stride), 1820 ret = _regmap_write(map,
1850 ival); 1821 reg + regmap_get_offset(map, i),
1822 ival);
1851 if (ret != 0) 1823 if (ret != 0)
1852 goto out; 1824 goto out;
1853 } 1825 }
@@ -2253,6 +2225,9 @@ static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2253 2225
2254 WARN_ON(!map->bus); 2226 WARN_ON(!map->bus);
2255 2227
2228 if (!map->bus || !map->bus->read)
2229 return -EINVAL;
2230
2256 range = _regmap_range_lookup(map, reg); 2231 range = _regmap_range_lookup(map, reg);
2257 if (range) { 2232 if (range) {
2258 ret = _regmap_select_page(map, &reg, range, 2233 ret = _regmap_select_page(map, &reg, range,
@@ -2416,7 +2391,7 @@ int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2416 * cost as we expect to hit the cache. 2391 * cost as we expect to hit the cache.
2417 */ 2392 */
2418 for (i = 0; i < val_count; i++) { 2393 for (i = 0; i < val_count; i++) {
2419 ret = _regmap_read(map, reg + (i * map->reg_stride), 2394 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2420 &v); 2395 &v);
2421 if (ret != 0) 2396 if (ret != 0)
2422 goto out; 2397 goto out;
@@ -2568,7 +2543,7 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2568 } else { 2543 } else {
2569 for (i = 0; i < val_count; i++) { 2544 for (i = 0; i < val_count; i++) {
2570 unsigned int ival; 2545 unsigned int ival;
2571 ret = regmap_read(map, reg + (i * map->reg_stride), 2546 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2572 &ival); 2547 &ival);
2573 if (ret != 0) 2548 if (ret != 0)
2574 return ret; 2549 return ret;
@@ -2648,138 +2623,36 @@ static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2648} 2623}
2649 2624
2650/** 2625/**
2651 * regmap_update_bits: Perform a read/modify/write cycle on the register map 2626 * regmap_update_bits_base:
2652 * 2627 * Perform a read/modify/write cycle on the
2653 * @map: Register map to update 2628 * register map with change, async, force option
2654 * @reg: Register to update
2655 * @mask: Bitmask to change
2656 * @val: New value for bitmask
2657 *
2658 * Returns zero for success, a negative number on error.
2659 */
2660int regmap_update_bits(struct regmap *map, unsigned int reg,
2661 unsigned int mask, unsigned int val)
2662{
2663 int ret;
2664
2665 map->lock(map->lock_arg);
2666 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2667 map->unlock(map->lock_arg);
2668
2669 return ret;
2670}
2671EXPORT_SYMBOL_GPL(regmap_update_bits);
2672
2673/**
2674 * regmap_write_bits: Perform a read/modify/write cycle on the register map
2675 *
2676 * @map: Register map to update
2677 * @reg: Register to update
2678 * @mask: Bitmask to change
2679 * @val: New value for bitmask
2680 *
2681 * Returns zero for success, a negative number on error.
2682 */
2683int regmap_write_bits(struct regmap *map, unsigned int reg,
2684 unsigned int mask, unsigned int val)
2685{
2686 int ret;
2687
2688 map->lock(map->lock_arg);
2689 ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
2690 map->unlock(map->lock_arg);
2691
2692 return ret;
2693}
2694EXPORT_SYMBOL_GPL(regmap_write_bits);
2695
2696/**
2697 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2698 * map asynchronously
2699 *
2700 * @map: Register map to update
2701 * @reg: Register to update
2702 * @mask: Bitmask to change
2703 * @val: New value for bitmask
2704 *
2705 * With most buses the read must be done synchronously so this is most
2706 * useful for devices with a cache which do not need to interact with
2707 * the hardware to determine the current register value.
2708 *
2709 * Returns zero for success, a negative number on error.
2710 */
2711int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2712 unsigned int mask, unsigned int val)
2713{
2714 int ret;
2715
2716 map->lock(map->lock_arg);
2717
2718 map->async = true;
2719
2720 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2721
2722 map->async = false;
2723
2724 map->unlock(map->lock_arg);
2725
2726 return ret;
2727}
2728EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2729
2730/**
2731 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2732 * register map and report if updated
2733 *
2734 * @map: Register map to update
2735 * @reg: Register to update
2736 * @mask: Bitmask to change
2737 * @val: New value for bitmask
2738 * @change: Boolean indicating if a write was done
2739 *
2740 * Returns zero for success, a negative number on error.
2741 */
2742int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2743 unsigned int mask, unsigned int val,
2744 bool *change)
2745{
2746 int ret;
2747
2748 map->lock(map->lock_arg);
2749 ret = _regmap_update_bits(map, reg, mask, val, change, false);
2750 map->unlock(map->lock_arg);
2751 return ret;
2752}
2753EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2754
2755/**
2756 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2757 * register map asynchronously and report if
2758 * updated
2759 * 2629 *
2760 * @map: Register map to update 2630 * @map: Register map to update
2761 * @reg: Register to update 2631 * @reg: Register to update
2762 * @mask: Bitmask to change 2632 * @mask: Bitmask to change
2763 * @val: New value for bitmask 2633 * @val: New value for bitmask
2764 * @change: Boolean indicating if a write was done 2634 * @change: Boolean indicating if a write was done
2635 * @async: Boolean indicating asynchronously
2636 * @force: Boolean indicating use force update
2765 * 2637 *
2638 * if async was true,
2766 * With most buses the read must be done synchronously so this is most 2639 * With most buses the read must be done synchronously so this is most
2767 * useful for devices with a cache which do not need to interact with 2640 * useful for devices with a cache which do not need to interact with
2768 * the hardware to determine the current register value. 2641 * the hardware to determine the current register value.
2769 * 2642 *
2770 * Returns zero for success, a negative number on error. 2643 * Returns zero for success, a negative number on error.
2771 */ 2644 */
2772int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, 2645int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2773 unsigned int mask, unsigned int val, 2646 unsigned int mask, unsigned int val,
2774 bool *change) 2647 bool *change, bool async, bool force)
2775{ 2648{
2776 int ret; 2649 int ret;
2777 2650
2778 map->lock(map->lock_arg); 2651 map->lock(map->lock_arg);
2779 2652
2780 map->async = true; 2653 map->async = async;
2781 2654
2782 ret = _regmap_update_bits(map, reg, mask, val, change, false); 2655 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2783 2656
2784 map->async = false; 2657 map->async = false;
2785 2658
@@ -2787,7 +2660,7 @@ int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2787 2660
2788 return ret; 2661 return ret;
2789} 2662}
2790EXPORT_SYMBOL_GPL(regmap_update_bits_check_async); 2663EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2791 2664
2792void regmap_async_complete_cb(struct regmap_async *async, int ret) 2665void regmap_async_complete_cb(struct regmap_async *async, int ret)
2793{ 2666{
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 18394343f489..3dc08ce15426 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -65,6 +65,36 @@ struct reg_sequence {
65 unsigned int delay_us; 65 unsigned int delay_us;
66}; 66};
67 67
68#define regmap_update_bits(map, reg, mask, val) \
69 regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
70#define regmap_update_bits_async(map, reg, mask, val)\
71 regmap_update_bits_base(map, reg, mask, val, NULL, true, false)
72#define regmap_update_bits_check(map, reg, mask, val, change)\
73 regmap_update_bits_base(map, reg, mask, val, change, false, false)
74#define regmap_update_bits_check_async(map, reg, mask, val, change)\
75 regmap_update_bits_base(map, reg, mask, val, change, true, false)
76
77#define regmap_write_bits(map, reg, mask, val) \
78 regmap_update_bits_base(map, reg, mask, val, NULL, false, true)
79
80#define regmap_field_write(field, val) \
81 regmap_field_update_bits_base(field, ~0, val, NULL, false, false)
82#define regmap_field_force_write(field, val) \
83 regmap_field_update_bits_base(field, ~0, val, NULL, false, true)
84#define regmap_field_update_bits(field, mask, val)\
85 regmap_field_update_bits_base(field, mask, val, NULL, false, false)
86#define regmap_field_force_update_bits(field, mask, val) \
87 regmap_field_update_bits_base(field, mask, val, NULL, false, true)
88
89#define regmap_fields_write(field, id, val) \
90 regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, false)
91#define regmap_fields_force_write(field, id, val) \
92 regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, true)
93#define regmap_fields_update_bits(field, id, mask, val)\
94 regmap_fields_update_bits_base(field, id, mask, val, NULL, false, false)
95#define regmap_fields_force_update_bits(field, id, mask, val) \
96 regmap_fields_update_bits_base(field, id, mask, val, NULL, false, true)
97
68#ifdef CONFIG_REGMAP 98#ifdef CONFIG_REGMAP
69 99
70enum regmap_endian { 100enum regmap_endian {
@@ -162,7 +192,7 @@ typedef void (*regmap_unlock)(void *);
162 * This field is a duplicate of a similar file in 192 * This field is a duplicate of a similar file in
163 * 'struct regmap_bus' and serves exact same purpose. 193 * 'struct regmap_bus' and serves exact same purpose.
164 * Use it only for "no-bus" cases. 194 * Use it only for "no-bus" cases.
165 * @max_register: Optional, specifies the maximum valid register index. 195 * @max_register: Optional, specifies the maximum valid register address.
166 * @wr_table: Optional, points to a struct regmap_access_table specifying 196 * @wr_table: Optional, points to a struct regmap_access_table specifying
167 * valid ranges for write access. 197 * valid ranges for write access.
168 * @rd_table: As above, for read access. 198 * @rd_table: As above, for read access.
@@ -691,18 +721,9 @@ int regmap_raw_read(struct regmap *map, unsigned int reg,
691 void *val, size_t val_len); 721 void *val, size_t val_len);
692int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, 722int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
693 size_t val_count); 723 size_t val_count);
694int regmap_update_bits(struct regmap *map, unsigned int reg, 724int regmap_update_bits_base(struct regmap *map, unsigned int reg,
695 unsigned int mask, unsigned int val); 725 unsigned int mask, unsigned int val,
696int regmap_write_bits(struct regmap *map, unsigned int reg, 726 bool *change, bool async, bool force);
697 unsigned int mask, unsigned int val);
698int regmap_update_bits_async(struct regmap *map, unsigned int reg,
699 unsigned int mask, unsigned int val);
700int regmap_update_bits_check(struct regmap *map, unsigned int reg,
701 unsigned int mask, unsigned int val,
702 bool *change);
703int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
704 unsigned int mask, unsigned int val,
705 bool *change);
706int regmap_get_val_bytes(struct regmap *map); 727int regmap_get_val_bytes(struct regmap *map);
707int regmap_get_max_register(struct regmap *map); 728int regmap_get_max_register(struct regmap *map);
708int regmap_get_reg_stride(struct regmap *map); 729int regmap_get_reg_stride(struct regmap *map);
@@ -770,18 +791,14 @@ struct regmap_field *devm_regmap_field_alloc(struct device *dev,
770void devm_regmap_field_free(struct device *dev, struct regmap_field *field); 791void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
771 792
772int regmap_field_read(struct regmap_field *field, unsigned int *val); 793int regmap_field_read(struct regmap_field *field, unsigned int *val);
773int regmap_field_write(struct regmap_field *field, unsigned int val); 794int regmap_field_update_bits_base(struct regmap_field *field,
774int regmap_field_update_bits(struct regmap_field *field, 795 unsigned int mask, unsigned int val,
775 unsigned int mask, unsigned int val); 796 bool *change, bool async, bool force);
776
777int regmap_fields_write(struct regmap_field *field, unsigned int id,
778 unsigned int val);
779int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
780 unsigned int val);
781int regmap_fields_read(struct regmap_field *field, unsigned int id, 797int regmap_fields_read(struct regmap_field *field, unsigned int id,
782 unsigned int *val); 798 unsigned int *val);
783int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, 799int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
784 unsigned int mask, unsigned int val); 800 unsigned int mask, unsigned int val,
801 bool *change, bool async, bool force);
785 802
786/** 803/**
787 * Description of an IRQ for the generic regmap irq_chip. 804 * Description of an IRQ for the generic regmap irq_chip.
@@ -868,6 +885,14 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
868 int irq_base, const struct regmap_irq_chip *chip, 885 int irq_base, const struct regmap_irq_chip *chip,
869 struct regmap_irq_chip_data **data); 886 struct regmap_irq_chip_data **data);
870void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); 887void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
888
889int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
890 int irq_flags, int irq_base,
891 const struct regmap_irq_chip *chip,
892 struct regmap_irq_chip_data **data);
893void devm_regmap_del_irq_chip(struct device *dev, int irq,
894 struct regmap_irq_chip_data *data);
895
871int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); 896int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
872int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); 897int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
873struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); 898struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
@@ -937,42 +962,26 @@ static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
937 return -EINVAL; 962 return -EINVAL;
938} 963}
939 964
940static inline int regmap_update_bits(struct regmap *map, unsigned int reg, 965static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
941 unsigned int mask, unsigned int val) 966 unsigned int mask, unsigned int val,
942{ 967 bool *change, bool async, bool force)
943 WARN_ONCE(1, "regmap API is disabled");
944 return -EINVAL;
945}
946
947static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
948 unsigned int mask, unsigned int val)
949{
950 WARN_ONCE(1, "regmap API is disabled");
951 return -EINVAL;
952}
953
954static inline int regmap_update_bits_async(struct regmap *map,
955 unsigned int reg,
956 unsigned int mask, unsigned int val)
957{ 968{
958 WARN_ONCE(1, "regmap API is disabled"); 969 WARN_ONCE(1, "regmap API is disabled");
959 return -EINVAL; 970 return -EINVAL;
960} 971}
961 972
962static inline int regmap_update_bits_check(struct regmap *map, 973static inline int regmap_field_update_bits_base(struct regmap_field *field,
963 unsigned int reg, 974 unsigned int mask, unsigned int val,
964 unsigned int mask, unsigned int val, 975 bool *change, bool async, bool force)
965 bool *change)
966{ 976{
967 WARN_ONCE(1, "regmap API is disabled"); 977 WARN_ONCE(1, "regmap API is disabled");
968 return -EINVAL; 978 return -EINVAL;
969} 979}
970 980
971static inline int regmap_update_bits_check_async(struct regmap *map, 981static inline int regmap_fields_update_bits_base(struct regmap_field *field,
972 unsigned int reg, 982 unsigned int id,
973 unsigned int mask, 983 unsigned int mask, unsigned int val,
974 unsigned int val, 984 bool *change, bool async, bool force)
975 bool *change)
976{ 985{
977 WARN_ONCE(1, "regmap API is disabled"); 986 WARN_ONCE(1, "regmap API is disabled");
978 return -EINVAL; 987 return -EINVAL;