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authorJohn Crispin <blogic@openwrt.org>2016-02-19 03:44:13 -0500
committerMatthias Brugger <matthias.bgg@gmail.com>2016-04-20 07:03:04 -0400
commitb28d78cd1812e4c65063ff6db9c7f4ab213e75d8 (patch)
treeddc2ce452aabd5a10d220b181bcf92f94c44b085
parent25269cefb691d324a3fe2be4d2a7b81f6a733996 (diff)
soc: mediatek: PMIC wrap: add a slave specific struct
This patch adds a new struct pwrap_slv_type that we use to store the slave specific data. The patch adds 2 new helper functions to access the dew registers. The slave type is looked up via the wrappers child node. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--drivers/soc/mediatek/mtk-pmic-wrap.c159
1 files changed, 112 insertions, 47 deletions
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index a2bacda5a65d..bcc841ebbdc3 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -69,33 +69,54 @@
69 PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \ 69 PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
70 PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE) 70 PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
71 71
72/* macro for slave device wrapper registers */ 72/* defines for slave device wrapper registers */
73#define PWRAP_DEW_BASE 0xbc00 73enum dew_regs {
74#define PWRAP_DEW_EVENT_OUT_EN (PWRAP_DEW_BASE + 0x0) 74 PWRAP_DEW_BASE,
75#define PWRAP_DEW_DIO_EN (PWRAP_DEW_BASE + 0x2) 75 PWRAP_DEW_DIO_EN,
76#define PWRAP_DEW_EVENT_SRC_EN (PWRAP_DEW_BASE + 0x4) 76 PWRAP_DEW_READ_TEST,
77#define PWRAP_DEW_EVENT_SRC (PWRAP_DEW_BASE + 0x6) 77 PWRAP_DEW_WRITE_TEST,
78#define PWRAP_DEW_EVENT_FLAG (PWRAP_DEW_BASE + 0x8) 78 PWRAP_DEW_CRC_EN,
79#define PWRAP_DEW_READ_TEST (PWRAP_DEW_BASE + 0xa) 79 PWRAP_DEW_CRC_VAL,
80#define PWRAP_DEW_WRITE_TEST (PWRAP_DEW_BASE + 0xc) 80 PWRAP_DEW_MON_GRP_SEL,
81#define PWRAP_DEW_CRC_EN (PWRAP_DEW_BASE + 0xe) 81 PWRAP_DEW_CIPHER_KEY_SEL,
82#define PWRAP_DEW_CRC_VAL (PWRAP_DEW_BASE + 0x10) 82 PWRAP_DEW_CIPHER_IV_SEL,
83#define PWRAP_DEW_MON_GRP_SEL (PWRAP_DEW_BASE + 0x12) 83 PWRAP_DEW_CIPHER_RDY,
84#define PWRAP_DEW_MON_FLAG_SEL (PWRAP_DEW_BASE + 0x14) 84 PWRAP_DEW_CIPHER_MODE,
85#define PWRAP_DEW_EVENT_TEST (PWRAP_DEW_BASE + 0x16) 85 PWRAP_DEW_CIPHER_SWRST,
86#define PWRAP_DEW_CIPHER_KEY_SEL (PWRAP_DEW_BASE + 0x18) 86
87#define PWRAP_DEW_CIPHER_IV_SEL (PWRAP_DEW_BASE + 0x1a) 87 /* MT6397 only regs */
88#define PWRAP_DEW_CIPHER_LOAD (PWRAP_DEW_BASE + 0x1c) 88 PWRAP_DEW_EVENT_OUT_EN,
89#define PWRAP_DEW_CIPHER_START (PWRAP_DEW_BASE + 0x1e) 89 PWRAP_DEW_EVENT_SRC_EN,
90#define PWRAP_DEW_CIPHER_RDY (PWRAP_DEW_BASE + 0x20) 90 PWRAP_DEW_EVENT_SRC,
91#define PWRAP_DEW_CIPHER_MODE (PWRAP_DEW_BASE + 0x22) 91 PWRAP_DEW_EVENT_FLAG,
92#define PWRAP_DEW_CIPHER_SWRST (PWRAP_DEW_BASE + 0x24) 92 PWRAP_DEW_MON_FLAG_SEL,
93#define PWRAP_MT8173_DEW_CIPHER_IV0 (PWRAP_DEW_BASE + 0x26) 93 PWRAP_DEW_EVENT_TEST,
94#define PWRAP_MT8173_DEW_CIPHER_IV1 (PWRAP_DEW_BASE + 0x28) 94 PWRAP_DEW_CIPHER_LOAD,
95#define PWRAP_MT8173_DEW_CIPHER_IV2 (PWRAP_DEW_BASE + 0x2a) 95 PWRAP_DEW_CIPHER_START,
96#define PWRAP_MT8173_DEW_CIPHER_IV3 (PWRAP_DEW_BASE + 0x2c) 96};
97#define PWRAP_MT8173_DEW_CIPHER_IV4 (PWRAP_DEW_BASE + 0x2e) 97
98#define PWRAP_MT8173_DEW_CIPHER_IV5 (PWRAP_DEW_BASE + 0x30) 98static const u32 mt6397_regs[] = {
99 [PWRAP_DEW_BASE] = 0xbc00,
100 [PWRAP_DEW_EVENT_OUT_EN] = 0xbc00,
101 [PWRAP_DEW_DIO_EN] = 0xbc02,
102 [PWRAP_DEW_EVENT_SRC_EN] = 0xbc04,
103 [PWRAP_DEW_EVENT_SRC] = 0xbc06,
104 [PWRAP_DEW_EVENT_FLAG] = 0xbc08,
105 [PWRAP_DEW_READ_TEST] = 0xbc0a,
106 [PWRAP_DEW_WRITE_TEST] = 0xbc0c,
107 [PWRAP_DEW_CRC_EN] = 0xbc0e,
108 [PWRAP_DEW_CRC_VAL] = 0xbc10,
109 [PWRAP_DEW_MON_GRP_SEL] = 0xbc12,
110 [PWRAP_DEW_MON_FLAG_SEL] = 0xbc14,
111 [PWRAP_DEW_EVENT_TEST] = 0xbc16,
112 [PWRAP_DEW_CIPHER_KEY_SEL] = 0xbc18,
113 [PWRAP_DEW_CIPHER_IV_SEL] = 0xbc1a,
114 [PWRAP_DEW_CIPHER_LOAD] = 0xbc1c,
115 [PWRAP_DEW_CIPHER_START] = 0xbc1e,
116 [PWRAP_DEW_CIPHER_RDY] = 0xbc20,
117 [PWRAP_DEW_CIPHER_MODE] = 0xbc22,
118 [PWRAP_DEW_CIPHER_SWRST] = 0xbc24,
119};
99 120
100enum pwrap_regs { 121enum pwrap_regs {
101 PWRAP_MUX_SEL, 122 PWRAP_MUX_SEL,
@@ -349,16 +370,26 @@ static int mt8135_regs[] = {
349 [PWRAP_DCM_DBC_PRD] = 0x160, 370 [PWRAP_DCM_DBC_PRD] = 0x160,
350}; 371};
351 372
373enum pmic_type {
374 PMIC_MT6397,
375};
376
352enum pwrap_type { 377enum pwrap_type {
353 PWRAP_MT8135, 378 PWRAP_MT8135,
354 PWRAP_MT8173, 379 PWRAP_MT8173,
355}; 380};
356 381
382struct pwrap_slv_type {
383 const u32 *dew_regs;
384 enum pmic_type type;
385};
386
357struct pmic_wrapper { 387struct pmic_wrapper {
358 struct device *dev; 388 struct device *dev;
359 void __iomem *base; 389 void __iomem *base;
360 struct regmap *regmap; 390 struct regmap *regmap;
361 const struct pmic_wrapper_type *master; 391 const struct pmic_wrapper_type *master;
392 const struct pwrap_slv_type *slave;
362 struct clk *clk_spi; 393 struct clk *clk_spi;
363 struct clk *clk_wrap; 394 struct clk *clk_wrap;
364 struct reset_control *rstc; 395 struct reset_control *rstc;
@@ -544,7 +575,8 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
544 575
545 for (i = 0; i < 4; i++) { 576 for (i = 0; i < 4; i++) {
546 pwrap_writel(wrp, i, PWRAP_SIDLY); 577 pwrap_writel(wrp, i, PWRAP_SIDLY);
547 pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata); 578 pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST],
579 &rdata);
548 if (rdata == PWRAP_DEW_READ_TEST_VAL) { 580 if (rdata == PWRAP_DEW_READ_TEST_VAL) {
549 dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i); 581 dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
550 pass |= 1 << i; 582 pass |= 1 << i;
@@ -593,7 +625,8 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp)
593 u32 rdata; 625 u32 rdata;
594 int ret; 626 int ret;
595 627
596 ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata); 628 ret = pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY],
629 &rdata);
597 if (ret) 630 if (ret)
598 return 0; 631 return 0;
599 632
@@ -621,12 +654,12 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
621 } 654 }
622 655
623 /* Config cipher mode @PMIC */ 656 /* Config cipher mode @PMIC */
624 pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1); 657 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1);
625 pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0); 658 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0);
626 pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1); 659 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1);
627 pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2); 660 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2);
628 pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1); 661 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_LOAD], 0x1);
629 pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1); 662 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_START], 0x1);
630 663
631 /* wait for cipher data ready@AP */ 664 /* wait for cipher data ready@AP */
632 ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready); 665 ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
@@ -643,7 +676,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
643 } 676 }
644 677
645 /* wait for cipher mode idle */ 678 /* wait for cipher mode idle */
646 pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1); 679 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_MODE], 0x1);
647 ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle); 680 ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
648 if (ret) { 681 if (ret) {
649 dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret); 682 dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
@@ -653,9 +686,11 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
653 pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE); 686 pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
654 687
655 /* Write Test */ 688 /* Write Test */
656 if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) || 689 if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
657 pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) || 690 PWRAP_DEW_WRITE_TEST_VAL) ||
658 (rdata != PWRAP_DEW_WRITE_TEST_VAL)) { 691 pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
692 &rdata) ||
693 (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
659 dev_err(wrp->dev, "rdata=0x%04X\n", rdata); 694 dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
660 return -EFAULT; 695 return -EFAULT;
661 } 696 }
@@ -677,8 +712,10 @@ static int pwrap_mt8135_init_soc_specific(struct pmic_wrapper *wrp)
677 writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN); 712 writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
678 713
679 /* enable PMIC event out and sources */ 714 /* enable PMIC event out and sources */
680 if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) || 715 if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
681 pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) { 716 0x1) ||
717 pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
718 0xffff)) {
682 dev_err(wrp->dev, "enable dewrap fail\n"); 719 dev_err(wrp->dev, "enable dewrap fail\n");
683 return -EFAULT; 720 return -EFAULT;
684 }