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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-06-30 10:38:18 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-07-11 10:40:16 -0400
commitad49579adfd4b8097b391f838b62b5a6fa346a4a (patch)
tree42bdce9d7b136a6419a0bb8b22d3932cfa96a9dd
parentfe42487284efc584a43e75a835881bff2cf21b6a (diff)
dt-bindings: add Marvell Dove LCD controller documentation
Add the Marvell Dove LCD controller DT binding documentation. The clock names used here are intentionally taken from the specification for the Dove SoC. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--Documentation/devicetree/bindings/drm/armada/marvell,dove-lcd.txt30
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/drm/armada/marvell,dove-lcd.txt b/Documentation/devicetree/bindings/drm/armada/marvell,dove-lcd.txt
new file mode 100644
index 000000000000..46525ea3e646
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/armada/marvell,dove-lcd.txt
@@ -0,0 +1,30 @@
1Device Tree bindings for Armada DRM CRTC driver
2
3Required properties:
4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
8
9Optional properties:
10
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
17
18Note: all clocks are optional but at least one must be specified.
19Further clocks may be added in the future according to requirements of
20different SoCs.
21
22Example:
23
24 lcd0: lcd-controller@820000 {
25 compatible = "marvell,dove-lcd";
26 reg = <0x820000 0x1000>;
27 interrupts = <47>;
28 clocks = <&si5351 0>;
29 clock-names = "ext_ref_clk_1";
30 };