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authorAdam Ford <aford173@gmail.com>2016-02-20 02:27:52 -0500
committerTony Lindgren <tony@atomide.com>2016-02-22 13:56:38 -0500
commitab8dd3aed01130c4e08313276d09b47e3eb40e4b (patch)
treee1a6b371c2e52ca952441665c2b23e696a1b7f07
parent730d7dcf03c0f276fc6435e69df75dacd57b55c7 (diff)
ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV
The Logic PD DM37xx SOM-LV devkit consists of a base board and a SOM. While the SOM (System on Module) supports Bluetooth and WiFi, LPD did not obtain an FCC ID, so anyone who uses it will have to go through certification. I have only tested the Type 28 Display, SMSC9211 Ethernet, SD/MMC and basic power management, however the overall current seems high. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts268
-rw-r--r--arch/arm/boot/dts/logicpd-som-lv.dtsi208
2 files changed, 476 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
new file mode 100644
index 000000000000..da8598402ab8
--- /dev/null
+++ b/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
@@ -0,0 +1,268 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 */
6
7/dts-v1/;
8
9#include "omap36xx.dtsi"
10#include "logicpd-som-lv.dtsi"
11#include "omap-gpmc-smsc9221.dtsi"
12
13/ {
14 model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
15 compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
16
17 gpio_keys {
18 compatible = "gpio-keys";
19 pinctrl-names = "default";
20 pinctrl-0 = <&gpio_key_pins>;
21
22 sysboot2 {
23 label = "gpio3";
24 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* gpio_111 / uP_GPIO_3 */
25 linux,code = <BTN_0>;
26 wakeup-source;
27 };
28 };
29
30 sound {
31 compatible = "ti,omap-twl4030";
32 ti,model = "omap3logic";
33 ti,mcbsp = <&mcbsp2>;
34 };
35
36 leds {
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&led_pins &led_pins_wkup>;
40
41 led1 {
42 label = "led1";
43 gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* gpio133 */
44 linux,default-trigger = "cpu0";
45 };
46
47 led2 {
48 label = "led2";
49 gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* gpio11 */
50 linux,default-trigger = "none";
51 };
52 };
53};
54
55&vaux1 {
56 regulator-min-microvolt = <3000000>;
57 regulator-max-microvolt = <3000000>;
58};
59
60&vaux4 {
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <1800000>;
63};
64
65&mcbsp2 {
66 status = "okay";
67};
68
69&charger {
70 ti,bb-uvolt = <3200000>;
71 ti,bb-uamp = <150>;
72};
73
74&gpmc {
75 ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
76
77 ethernet@gpmc {
78 pinctrl-names = "default";
79 pinctrl-0 = <&lan9221_pins>;
80 interrupt-parent = <&gpio5>;
81 interrupts = <24 IRQ_TYPE_LEVEL_LOW>; /* gpio_152 */
82 reg = <1 0 0xff>;
83 };
84};
85
86&vpll2 {
87 regulator-always-on;
88};
89
90&dss {
91 status = "ok";
92 vdds_dsi-supply = <&vpll2>;
93 vdda_video-supply = <&video_reg>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&dss_dpi_pins1>;
96 port {
97 dpi_out: endpoint {
98 remote-endpoint = <&lcd_in>;
99 data-lines = <16>;
100 };
101 };
102};
103
104/ {
105 aliases {
106 display0 = &lcd0;
107 };
108
109 video_reg: video_reg {
110 compatible = "regulator-fixed";
111 regulator-name = "fixed-supply";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 };
115
116 lcd0: display@0 {
117 compatible = "panel-dpi";
118 label = "28";
119 status = "okay";
120 /* default-on; */
121 pinctrl-names = "default";
122 pinctrl-0 = <&lcd_enable_pin>;
123 enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
124 port {
125 lcd_in: endpoint {
126 remote-endpoint = <&dpi_out>;
127 };
128 };
129
130 panel-timing {
131 clock-frequency = <9000000>;
132 hactive = <480>;
133 vactive = <272>;
134 hfront-porch = <3>;
135 hback-porch = <2>;
136 hsync-len = <42>;
137 vback-porch = <3>;
138 vfront-porch = <2>;
139 vsync-len = <11>;
140 hsync-active = <1>;
141 vsync-active = <1>;
142 de-active = <1>;
143 pixelclk-active = <0>;
144 };
145 };
146
147 bl: backlight {
148 compatible = "pwm-backlight";
149 pinctrl-names = "default";
150 pinctrl-0 = <&backlight_pins>;
151 pwms = <&twl_pwm 0 5000000>;
152 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
153 default-brightness-level = <7>;
154 enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* gpio_8 */
155 };
156};
157
158&mmc1 {
159 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&mmc1_pins &mmc1_cd>;
162 wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
163 cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */
164 vmmc-supply = <&vmmc1>;
165 bus-width = <4>;
166 cap-power-off-card;
167};
168
169&omap3_pmx_core {
170 gpio_key_pins: pinmux_gpio_key_pins {
171 pinctrl-single,pins = <
172 OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_xclkb.gpio_111 / uP_GPIO_3*/
173 >;
174 };
175
176 led_pins: pinmux_led_pins {
177 pinctrl-single,pins = <
178 OMAP3_CORE1_IOPAD(0x215e, PIN_OUTPUT_PULLUP | MUX_MODE4) /* sdmmc2_dat1.gpio_133 / uP_GPIO_0 */
179 >;
180 };
181
182 lan9221_pins: pinmux_lan9221_pins {
183 pinctrl-single,pins = <
184 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
185 >;
186 };
187
188 mmc1_pins: pinmux_mmc1_pins {
189 pinctrl-single,pins = <
190 OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
191 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
192 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
193 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
194 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
195 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
196 OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 sdmmc1_wp*/
197 >;
198 };
199
200 lcd_enable_pin: pinmux_lcd_enable_pin {
201 pinctrl-single,pins = <
202 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */
203 >;
204 };
205
206 dss_dpi_pins1: pinmux_dss_dpi_pins1 {
207 pinctrl-single,pins = <
208 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */
209 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */
210 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */
211 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */
212
213 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data0.dss_data0 */
214 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data1.dss_data1 */
215 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data2.dss_data2 */
216 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data3.dss_data3 */
217 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data4.dss_data4 */
218 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data5.dss_data5 */
219 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */
220 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */
221 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */
222 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */
223 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */
224 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */
225 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */
226 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */
227 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */
228 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */
229 >;
230 };
231};
232
233&omap3_pmx_wkup {
234 led_pins_wkup: pinmux_led_pins_wkup {
235 pinctrl-single,pins = <
236 OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 / uP_GPIO_1 */
237 >;
238 };
239
240 backlight_pins: pinmux_backlight_pins {
241 pinctrl-single,pins = <
242 OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* sys_boot6.gpio_8 */
243 >;
244 };
245
246 mmc1_cd: pinmux_mmc1_cd {
247 pinctrl-single,pins = <
248 OMAP3_WKUP_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */
249 >;
250 };
251};
252
253
254&uart1 {
255 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
256};
257
258/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
259&usb_otg_hs {
260 pinctrl-names = "default";
261 pinctrl-0 = <&hsusb_otg_pins>;
262 interface-type = <0>;
263 usb-phy = <&usb2_phy>;
264 phys = <&usb2_phy>;
265 phy-names = "usb2-phy";
266 mode = <3>;
267 power = <50>;
268};
diff --git a/arch/arm/boot/dts/logicpd-som-lv.dtsi b/arch/arm/boot/dts/logicpd-som-lv.dtsi
new file mode 100644
index 000000000000..aa9572bd930a
--- /dev/null
+++ b/arch/arm/boot/dts/logicpd-som-lv.dtsi
@@ -0,0 +1,208 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 */
6
7#include <dt-bindings/input/input.h>
8
9/ {
10 cpus {
11 cpu@0 {
12 cpu0-supply = <&vcc>;
13 };
14 };
15
16 wl12xx_vmmc: wl12xx_vmmc {
17 compatible = "regulator-fixed";
18 regulator-name = "vwl1271";
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
21 gpio = <&gpio1 3 0>; /* gpio_3 */
22 startup-delay-us = <70000>;
23 enable-active-high;
24 vin-supply = <&vmmc2>;
25 };
26};
27
28&gpmc {
29 ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
30
31 nand@0,0 {
32 linux,mtd-name = "micron,mt29f4g16abbda3w";
33 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
34 nand-bus-width = <16>;
35 ti,nand-ecc-opt = "bch8";
36 gpmc,sync-clk-ps = <0>;
37 gpmc,cs-on-ns = <0>;
38 gpmc,cs-rd-off-ns = <44>;
39 gpmc,cs-wr-off-ns = <44>;
40 gpmc,adv-on-ns = <6>;
41 gpmc,adv-rd-off-ns = <34>;
42 gpmc,adv-wr-off-ns = <44>;
43 gpmc,we-off-ns = <40>;
44 gpmc,oe-off-ns = <54>;
45 gpmc,access-ns = <64>;
46 gpmc,rd-cycle-ns = <82>;
47 gpmc,wr-cycle-ns = <82>;
48 gpmc,wr-access-ns = <40>;
49 gpmc,wr-data-mux-bus-ns = <0>;
50 gpmc,device-width = <2>;
51
52 gpmc,page-burst-access-ns = <5>;
53 gpmc,cycle2cycle-delay-ns = <50>;
54
55 #address-cells = <1>;
56 #size-cells = <1>;
57
58 /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
59
60 x-loader@0 {
61 label = "x-loader";
62 reg = <0 0x80000>;
63 };
64
65 bootloaders@80000 {
66 label = "u-boot";
67 reg = <0x80000 0x1e0000>;
68 };
69
70 bootloaders_env@260000 {
71 label = "u-boot-env";
72 reg = <0x260000 0x20000>;
73 };
74
75 kernel@280000 {
76 label = "kernel";
77 reg = <0x280000 0x400000>;
78 };
79
80 filesystem@680000 {
81 label = "fs";
82 reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
83 };
84 };
85};
86
87&i2c1 {
88 clock-frequency = <2600000>;
89
90 twl: twl@48 {
91 reg = <0x48>;
92 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
93 interrupt-parent = <&intc>;
94 twl_audio: audio {
95 compatible = "ti,twl4030-audio";
96 codec {
97 };
98 };
99 };
100};
101
102&i2c2 {
103 clock-frequency = <400000>;
104};
105
106&i2c3 {
107 clock-frequency = <400000>;
108};
109
110&mmc3 {
111 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
112 pinctrl-0 = <&mmc3_pins>;
113 pinctrl-names = "default";
114 vmmc-supply = <&wl12xx_vmmc>;
115 non-removable;
116 bus-width = <4>;
117 cap-power-off-card;
118 #address-cells = <1>;
119 #size-cells = <0>;
120 wlcore: wlcore@2 {
121 compatible = "ti,wl1273";
122 reg = <2>;
123 interrupt-parent = <&gpio5>;
124 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
125 ref-clock-frequency = <26000000>;
126 };
127};
128
129&omap3_pmx_core {
130 mmc3_pins: pinmux_mm3_pins {
131 pinctrl-single,pins = <
132 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
133 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
134 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
135 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
136 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
137 OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
138 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
139 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
140 >;
141 };
142 mcbsp2_pins: pinmux_mcbsp2_pins {
143 pinctrl-single,pins = <
144 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
145 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
146 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
147 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
148 >;
149 };
150 uart2_pins: pinmux_uart2_pins {
151 pinctrl-single,pins = <
152 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
153 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
154 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
155 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
156 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
157 >;
158 };
159 mcspi1_pins: pinmux_mcspi1_pins {
160 pinctrl-single,pins = <
161 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
162 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
163 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
164 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
165 >;
166 };
167 hsusb_otg_pins: pinmux_hsusb_otg_pins {
168 pinctrl-single,pins = <
169 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
170 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
171 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
172 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
173 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
174 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
175 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
176 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
177 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
178 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
179 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
180 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
181 >;
182 };
183};
184
185&uart2 {
186 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&uart2_pins>;
189};
190
191&mcspi1 {
192 pinctrl-names = "default";
193 pinctrl-0 = <&mcspi1_pins>;
194};
195
196#include "twl4030.dtsi"
197#include "twl4030_omap3.dtsi"
198
199&twl {
200 twl_power: power {
201 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
202 ti,use_poweroff;
203 };
204};
205
206&twl_gpio {
207 ti,use-leds;
208};