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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 17:18:39 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-02-14 18:25:31 -0500
commita6b1dc61bcf45fbc03a2e62f007cd36410e5e269 (patch)
tree2ee7bdffb3d8e14df7f7d33e6c484b352c14db36
parentd2e4b66b4ef24aeecb0cdef7278aa00850461de9 (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
commit 6e978b22efa1db9f6e71b24440b5f1d93e968ee3 upstream. Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/cpufreq/intel_pstate.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 4737520ec823..80fa656da5ab 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -820,6 +820,25 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata)
820 wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1); 820 wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
821} 821}
822 822
823#define MSR_IA32_POWER_CTL_BIT_EE 19
824
825/* Disable energy efficiency optimization */
826static void intel_pstate_disable_ee(int cpu)
827{
828 u64 power_ctl;
829 int ret;
830
831 ret = rdmsrl_on_cpu(cpu, MSR_IA32_POWER_CTL, &power_ctl);
832 if (ret)
833 return;
834
835 if (!(power_ctl & BIT(MSR_IA32_POWER_CTL_BIT_EE))) {
836 pr_info("Disabling energy efficiency optimization\n");
837 power_ctl |= BIT(MSR_IA32_POWER_CTL_BIT_EE);
838 wrmsrl_on_cpu(cpu, MSR_IA32_POWER_CTL, power_ctl);
839 }
840}
841
823static int atom_get_min_pstate(void) 842static int atom_get_min_pstate(void)
824{ 843{
825 u64 value; 844 u64 value;
@@ -1420,6 +1439,11 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
1420 {} 1439 {}
1421}; 1440};
1422 1441
1442static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
1443 ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, core_params),
1444 {}
1445};
1446
1423static int intel_pstate_init_cpu(unsigned int cpunum) 1447static int intel_pstate_init_cpu(unsigned int cpunum)
1424{ 1448{
1425 struct cpudata *cpu; 1449 struct cpudata *cpu;
@@ -1435,6 +1459,12 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
1435 cpu->cpu = cpunum; 1459 cpu->cpu = cpunum;
1436 1460
1437 if (hwp_active) { 1461 if (hwp_active) {
1462 const struct x86_cpu_id *id;
1463
1464 id = x86_match_cpu(intel_pstate_cpu_ee_disable_ids);
1465 if (id)
1466 intel_pstate_disable_ee(cpunum);
1467
1438 intel_pstate_hwp_enable(cpu); 1468 intel_pstate_hwp_enable(cpu);
1439 pid_params.sample_rate_ms = 50; 1469 pid_params.sample_rate_ms = 50;
1440 pid_params.sample_rate_ns = 50 * NSEC_PER_MSEC; 1470 pid_params.sample_rate_ns = 50 * NSEC_PER_MSEC;