drm/amdgpu: move UVD IB test into common code v2

Since we now raise the clocks from begin_use() we don't need
a separate function for each hw generation any more.

v2: remove unintentional lowering of the UVD clocks, fix typos for CIK hw.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

5 files changed, 40 insertions, 125 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index bfb3c274d7f0..ef5342bd6968 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1127,3 +1127,38 @@ void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
 {
         schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
 }
+
+/**
+ * amdgpu_uvd_ring_test_ib - test ib execution
+ *
+ * @ring: amdgpu_ring pointer
+ *
+ * Test if we can successfully execute an IB
+ */
+int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring)
+{
+        struct fence *fence = NULL;
+        int r;
+
+        r = amdgpu_uvd_get_create_msg(ring, 1, NULL);
+        if (r) {
+                DRM_ERROR("amdgpu: failed to get create msg (%d).\n", r);
+                goto error;
+        }
+
+        r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);
+        if (r) {
+                DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r);
+                goto error;
+        }
+
+        r = fence_wait(fence, false);
+        if (r) {
+                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+                goto error;
+        }
+        DRM_INFO("ib test on ring %d succeeded\n",  ring->idx);
+error:
+        fence_put(fence);
+        return r;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index 5bad3712a56e..224359e4d0b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -37,5 +37,6 @@ void amdgpu_uvd_free_handles(struct amdgpu_device *adev,
 int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx);
 void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring);
 void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring);
+int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring);
 
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 862d6cf89c1a..132e613ed674 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -527,49 +527,6 @@ static void uvd_v4_2_ring_emit_ib(struct amdgpu_ring *ring,
 }
 
 /**
- * uvd_v4_2_ring_test_ib - test ib execution
- *
- * @ring: amdgpu_ring pointer
- *
- * Test if we can successfully execute an IB
- */
-static int uvd_v4_2_ring_test_ib(struct amdgpu_ring *ring)
-{
-        struct amdgpu_device *adev = ring->adev;
-        struct fence *fence = NULL;
-        int r;
-
-        r = amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to raise UVD clocks (%d).\n", r);
-                return r;
-        }
-
-        r = amdgpu_uvd_get_create_msg(ring, 1, NULL);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get create msg (%d).\n", r);
-                goto error;
-        }
-
-        r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r);
-                goto error;
-        }
-
-        r = fence_wait(fence, false);
-        if (r) {
-                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
-                goto error;
-        }
-        DRM_INFO("ib test on ring %d succeeded\n",  ring->idx);
-error:
-        fence_put(fence);
-        amdgpu_asic_set_uvd_clocks(adev, 0, 0);
-        return r;
-}
-
-/**
  * uvd_v4_2_mc_resume - memory controller programming
  *
  * @adev: amdgpu_device pointer
@@ -794,7 +751,7 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
         .emit_hdp_flush = uvd_v4_2_ring_emit_hdp_flush,
         .emit_hdp_invalidate = uvd_v4_2_ring_emit_hdp_invalidate,
         .test_ring = uvd_v4_2_ring_test_ring,
-        .test_ib = uvd_v4_2_ring_test_ib,
+        .test_ib = amdgpu_uvd_ring_test_ib,
         .insert_nop = amdgpu_ring_insert_nop,
         .pad_ib = amdgpu_ring_generic_pad_ib,
         .begin_use = amdgpu_uvd_ring_begin_use,
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index f585247a356f..101de136ba63 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -577,49 +577,6 @@ static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring,
         amdgpu_ring_write(ring, ib->length_dw);
 }
 
-/**
- * uvd_v5_0_ring_test_ib - test ib execution
- *
- * @ring: amdgpu_ring pointer
- *
- * Test if we can successfully execute an IB
- */
-static int uvd_v5_0_ring_test_ib(struct amdgpu_ring *ring)
-{
-        struct amdgpu_device *adev = ring->adev;
-        struct fence *fence = NULL;
-        int r;
-
-        r = amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to raise UVD clocks (%d).\n", r);
-                return r;
-        }
-
-        r = amdgpu_uvd_get_create_msg(ring, 1, NULL);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get create msg (%d).\n", r);
-                goto error;
-        }
-
-        r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r);
-                goto error;
-        }
-
-        r = fence_wait(fence, false);
-        if (r) {
-                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
-                goto error;
-        }
-        DRM_INFO("ib test on ring %d succeeded\n",  ring->idx);
-error:
-        fence_put(fence);
-        amdgpu_asic_set_uvd_clocks(adev, 0, 0);
-        return r;
-}
-
 static bool uvd_v5_0_is_idle(void *handle)
 {
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -845,7 +802,7 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
         .emit_hdp_flush = uvd_v5_0_ring_emit_hdp_flush,
         .emit_hdp_invalidate = uvd_v5_0_ring_emit_hdp_invalidate,
         .test_ring = uvd_v5_0_ring_test_ring,
-        .test_ib = uvd_v5_0_ring_test_ib,
+        .test_ib = amdgpu_uvd_ring_test_ib,
         .insert_nop = amdgpu_ring_insert_nop,
         .pad_ib = amdgpu_ring_generic_pad_ib,
         .begin_use = amdgpu_uvd_ring_begin_use,
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 8e985de62780..1791566aae9d 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -684,41 +684,6 @@ static void uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
         amdgpu_ring_write(ring, ib->length_dw);
 }
 
-/**
- * uvd_v6_0_ring_test_ib - test ib execution
- *
- * @ring: amdgpu_ring pointer
- *
- * Test if we can successfully execute an IB
- */
-static int uvd_v6_0_ring_test_ib(struct amdgpu_ring *ring)
-{
-        struct fence *fence = NULL;
-        int r;
-
-        r = amdgpu_uvd_get_create_msg(ring, 1, NULL);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get create msg (%d).\n", r);
-                goto error;
-        }
-
-        r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);
-        if (r) {
-                DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r);
-                goto error;
-        }
-
-        r = fence_wait(fence, false);
-        if (r) {
-                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
-                goto error;
-        }
-        DRM_INFO("ib test on ring %d succeeded\n",  ring->idx);
-error:
-        fence_put(fence);
-        return r;
-}
-
 static void uvd_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                          unsigned vm_id, uint64_t pd_addr)
 {
@@ -1016,7 +981,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
         .emit_hdp_flush = uvd_v6_0_ring_emit_hdp_flush,
         .emit_hdp_invalidate = uvd_v6_0_ring_emit_hdp_invalidate,
         .test_ring = uvd_v6_0_ring_test_ring,
-        .test_ib = uvd_v6_0_ring_test_ib,
+        .test_ib = amdgpu_uvd_ring_test_ib,
         .insert_nop = amdgpu_ring_insert_nop,
         .pad_ib = amdgpu_ring_generic_pad_ib,
         .begin_use = amdgpu_uvd_ring_begin_use,
@@ -1035,7 +1000,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
         .emit_hdp_flush = uvd_v6_0_ring_emit_hdp_flush,
         .emit_hdp_invalidate = uvd_v6_0_ring_emit_hdp_invalidate,
         .test_ring = uvd_v6_0_ring_test_ring,
-        .test_ib = uvd_v6_0_ring_test_ib,
+        .test_ib = amdgpu_uvd_ring_test_ib,
         .insert_nop = amdgpu_ring_insert_nop,
         .pad_ib = amdgpu_ring_generic_pad_ib,
         .begin_use = amdgpu_uvd_ring_begin_use,