aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2015-08-16 18:44:33 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-08-16 18:44:33 -0400
commit8916e0b03ec35026008742cdf4d4ed8daf60afb5 (patch)
tree91bcd70318033c66b40934fe1f315f8e8668a70a
parent0f405bf75ffcf2abe64fb735facd4ef7b89df27f (diff)
parent02149517acbbf5cf0d1819024977963093168106 (diff)
Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "A smallish batch of fixes, a little more than expected this late, but all fixes are contained to their platforms and seem reasonably low risk: - a somewhat large SMP fix for ux500 that still seemed warranted to include here - OMAP DT fixes for pbias regulator specification that broke due to some DT reshuffling - PCIe IRQ routing bugfix for i.MX - networking fixes for keystone - runtime PM for OMAP GPMC - a couple of error path bug fixes for exynos" * tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific file ARM: dts: keystone: fix the clock node for mdio memory: omap-gpmc: Don't try to save uninitialized GPMC context ARM: imx6: correct i.MX6 PCIe interrupt routing ARM: ux500: add an SMP enablement type and move cpu nodes ARM: dts: dra7: Fix broken pbias device creation ARM: dts: OMAP5: Fix broken pbias device creation ARM: dts: OMAP4: Fix broken pbias device creation ARM: dts: omap243x: Fix broken pbias device creation ARM: EXYNOS: fix double of_node_put() on error path ARM: EXYNOS: Fix potentian kfree() of ro memory
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt1
-rw-r--r--arch/arm/boot/dts/dra7.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi8
-rw-r--r--arch/arm/boot/dts/k2e.dtsi15
-rw-r--r--arch/arm/boot/dts/k2hk.dtsi11
-rw-r--r--arch/arm/boot/dts/k2l.dtsi16
-rw-r--r--arch/arm/boot/dts/keystone.dtsi11
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi3
-rw-r--r--arch/arm/boot/dts/omap4.dtsi3
-rw-r--r--arch/arm/boot/dts/omap5.dtsi3
-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi53
-rw-r--r--arch/arm/mach-exynos/pm_domains.c3
-rw-r--r--drivers/memory/omap-gpmc.c6
13 files changed, 79 insertions, 56 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index d6b794cef0b8..91e6e5c478d0 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -199,6 +199,7 @@ nodes to be present and contain the properties described below.
199 "qcom,kpss-acc-v1" 199 "qcom,kpss-acc-v1"
200 "qcom,kpss-acc-v2" 200 "qcom,kpss-acc-v2"
201 "rockchip,rk3066-smp" 201 "rockchip,rk3066-smp"
202 "ste,dbx500-smp"
202 203
203 - cpu-release-addr 204 - cpu-release-addr
204 Usage: required for systems that have an "enable-method" 205 Usage: required for systems that have an "enable-method"
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 4a0718ccf68e..1e29ccf77ea2 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -116,7 +116,7 @@
116 ranges = <0 0x2000 0x2000>; 116 ranges = <0 0x2000 0x2000>;
117 117
118 scm_conf: scm_conf@0 { 118 scm_conf: scm_conf@0 {
119 compatible = "syscon"; 119 compatible = "syscon", "simple-bus";
120 reg = <0x0 0x1400>; 120 reg = <0x0 0x1400>;
121 #address-cells = <1>; 121 #address-cells = <1>;
122 #size-cells = <1>; 122 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e6d13592080d..b57033e8c633 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -181,10 +181,10 @@
181 interrupt-names = "msi"; 181 interrupt-names = "msi";
182 #interrupt-cells = <1>; 182 #interrupt-cells = <1>;
183 interrupt-map-mask = <0 0 0 0x7>; 183 interrupt-map-mask = <0 0 0 0x7>;
184 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 184 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
185 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 185 <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
186 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 186 <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
187 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 187 <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
188 clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, 188 clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
189 <&clks IMX6QDL_CLK_LVDS1_GATE>, 189 <&clks IMX6QDL_CLK_LVDS1_GATE>,
190 <&clks IMX6QDL_CLK_PCIE_REF_125M>; 190 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
index 1b6494fbdb91..675fb8e492c6 100644
--- a/arch/arm/boot/dts/k2e.dtsi
+++ b/arch/arm/boot/dts/k2e.dtsi
@@ -131,10 +131,17 @@
131 <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>; 131 <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
132 }; 132 };
133 }; 133 };
134
135 mdio: mdio@24200f00 {
136 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
137 #address-cells = <1>;
138 #size-cells = <0>;
139 reg = <0x24200f00 0x100>;
140 status = "disabled";
141 clocks = <&clkcpgmac>;
142 clock-names = "fck";
143 bus_freq = <2500000>;
144 };
134 /include/ "k2e-netcp.dtsi" 145 /include/ "k2e-netcp.dtsi"
135 }; 146 };
136}; 147};
137
138&mdio {
139 reg = <0x24200f00 0x100>;
140};
diff --git a/arch/arm/boot/dts/k2hk.dtsi b/arch/arm/boot/dts/k2hk.dtsi
index ae6472407b22..d0810a5f2968 100644
--- a/arch/arm/boot/dts/k2hk.dtsi
+++ b/arch/arm/boot/dts/k2hk.dtsi
@@ -98,6 +98,17 @@
98 #gpio-cells = <2>; 98 #gpio-cells = <2>;
99 gpio,syscon-dev = <&devctrl 0x25c>; 99 gpio,syscon-dev = <&devctrl 0x25c>;
100 }; 100 };
101
102 mdio: mdio@02090300 {
103 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
104 #address-cells = <1>;
105 #size-cells = <0>;
106 reg = <0x02090300 0x100>;
107 status = "disabled";
108 clocks = <&clkcpgmac>;
109 clock-names = "fck";
110 bus_freq = <2500000>;
111 };
101 /include/ "k2hk-netcp.dtsi" 112 /include/ "k2hk-netcp.dtsi"
102 }; 113 };
103}; 114};
diff --git a/arch/arm/boot/dts/k2l.dtsi b/arch/arm/boot/dts/k2l.dtsi
index 0e007483615e..49fd414f680c 100644
--- a/arch/arm/boot/dts/k2l.dtsi
+++ b/arch/arm/boot/dts/k2l.dtsi
@@ -29,7 +29,6 @@
29 }; 29 };
30 30
31 soc { 31 soc {
32
33 /include/ "k2l-clocks.dtsi" 32 /include/ "k2l-clocks.dtsi"
34 33
35 uart2: serial@02348400 { 34 uart2: serial@02348400 {
@@ -79,6 +78,17 @@
79 #gpio-cells = <2>; 78 #gpio-cells = <2>;
80 gpio,syscon-dev = <&devctrl 0x24c>; 79 gpio,syscon-dev = <&devctrl 0x24c>;
81 }; 80 };
81
82 mdio: mdio@26200f00 {
83 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
84 #address-cells = <1>;
85 #size-cells = <0>;
86 reg = <0x26200f00 0x100>;
87 status = "disabled";
88 clocks = <&clkcpgmac>;
89 clock-names = "fck";
90 bus_freq = <2500000>;
91 };
82 /include/ "k2l-netcp.dtsi" 92 /include/ "k2l-netcp.dtsi"
83 }; 93 };
84}; 94};
@@ -96,7 +106,3 @@
96 /* Pin muxed. Enabled and configured by Bootloader */ 106 /* Pin muxed. Enabled and configured by Bootloader */
97 status = "disabled"; 107 status = "disabled";
98}; 108};
99
100&mdio {
101 reg = <0x26200f00 0x100>;
102};
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index e7a6f6deabb6..72816d65f7ec 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -267,17 +267,6 @@
267 1 0 0x21000A00 0x00000100>; 267 1 0 0x21000A00 0x00000100>;
268 }; 268 };
269 269
270 mdio: mdio@02090300 {
271 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 reg = <0x02090300 0x100>;
275 status = "disabled";
276 clocks = <&clkpa>;
277 clock-names = "fck";
278 bus_freq = <2500000>;
279 };
280
281 kirq0: keystone_irq@26202a0 { 270 kirq0: keystone_irq@26202a0 {
282 compatible = "ti,keystone-irq"; 271 compatible = "ti,keystone-irq";
283 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; 272 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 11a7963be003..2390f387c271 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -51,7 +51,8 @@
51 }; 51 };
52 52
53 scm_conf: scm_conf@270 { 53 scm_conf: scm_conf@270 {
54 compatible = "syscon"; 54 compatible = "syscon",
55 "simple-bus";
55 reg = <0x270 0x240>; 56 reg = <0x270 0x240>;
56 #address-cells = <1>; 57 #address-cells = <1>;
57 #size-cells = <1>; 58 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 7d31c6ff246f..abc4473e6f8a 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -191,7 +191,8 @@
191 }; 191 };
192 192
193 omap4_padconf_global: omap4_padconf_global@5a0 { 193 omap4_padconf_global: omap4_padconf_global@5a0 {
194 compatible = "syscon"; 194 compatible = "syscon",
195 "simple-bus";
195 reg = <0x5a0 0x170>; 196 reg = <0x5a0 0x170>;
196 #address-cells = <1>; 197 #address-cells = <1>;
197 #size-cells = <1>; 198 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index c8fd648a7108..b1a1263e6001 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -180,7 +180,8 @@
180 }; 180 };
181 181
182 omap5_padconf_global: omap5_padconf_global@5a0 { 182 omap5_padconf_global: omap5_padconf_global@5a0 {
183 compatible = "syscon"; 183 compatible = "syscon",
184 "simple-bus";
184 reg = <0x5a0 0xec>; 185 reg = <0x5a0 0xec>;
185 #address-cells = <1>; 186 #address-cells = <1>;
186 #size-cells = <1>; 187 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index a75f3289e653..b8f81fb418ce 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -15,6 +15,33 @@
15#include "skeleton.dtsi" 15#include "skeleton.dtsi"
16 16
17/ { 17/ {
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "ste,dbx500-smp";
22
23 cpu-map {
24 cluster0 {
25 core0 {
26 cpu = <&CPU0>;
27 };
28 core1 {
29 cpu = <&CPU1>;
30 };
31 };
32 };
33 CPU0: cpu@300 {
34 device_type = "cpu";
35 compatible = "arm,cortex-a9";
36 reg = <0x300>;
37 };
38 CPU1: cpu@301 {
39 device_type = "cpu";
40 compatible = "arm,cortex-a9";
41 reg = <0x301>;
42 };
43 };
44
18 soc { 45 soc {
19 #address-cells = <1>; 46 #address-cells = <1>;
20 #size-cells = <1>; 47 #size-cells = <1>;
@@ -22,32 +49,6 @@
22 interrupt-parent = <&intc>; 49 interrupt-parent = <&intc>;
23 ranges; 50 ranges;
24 51
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu-map {
30 cluster0 {
31 core0 {
32 cpu = <&CPU0>;
33 };
34 core1 {
35 cpu = <&CPU1>;
36 };
37 };
38 };
39 CPU0: cpu@0 {
40 device_type = "cpu";
41 compatible = "arm,cortex-a9";
42 reg = <0>;
43 };
44 CPU1: cpu@1 {
45 device_type = "cpu";
46 compatible = "arm,cortex-a9";
47 reg = <1>;
48 };
49 };
50
51 ptm@801ae000 { 52 ptm@801ae000 {
52 compatible = "arm,coresight-etm3x", "arm,primecell"; 53 compatible = "arm,coresight-etm3x", "arm,primecell";
53 reg = <0x801ae000 0x1000>; 54 reg = <0x801ae000 0x1000>;
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 6001f1c9d136..4a87e86dec45 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -146,9 +146,8 @@ static __init int exynos4_pm_init_power_domain(void)
146 pd->base = of_iomap(np, 0); 146 pd->base = of_iomap(np, 0);
147 if (!pd->base) { 147 if (!pd->base) {
148 pr_warn("%s: failed to map memory\n", __func__); 148 pr_warn("%s: failed to map memory\n", __func__);
149 kfree(pd->pd.name); 149 kfree_const(pd->pd.name);
150 kfree(pd); 150 kfree(pd);
151 of_node_put(np);
152 continue; 151 continue;
153 } 152 }
154 153
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
index 3a27a84ad3ec..9426276dbe14 100644
--- a/drivers/memory/omap-gpmc.c
+++ b/drivers/memory/omap-gpmc.c
@@ -2245,6 +2245,9 @@ void omap3_gpmc_save_context(void)
2245{ 2245{
2246 int i; 2246 int i;
2247 2247
2248 if (!gpmc_base)
2249 return;
2250
2248 gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); 2251 gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
2249 gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); 2252 gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
2250 gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); 2253 gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
@@ -2277,6 +2280,9 @@ void omap3_gpmc_restore_context(void)
2277{ 2280{
2278 int i; 2281 int i;
2279 2282
2283 if (!gpmc_base)
2284 return;
2285
2280 gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); 2286 gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
2281 gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); 2287 gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
2282 gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); 2288 gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);