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authorAlban Bedel <albeu@free.fr>2015-08-02 12:30:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2015-09-03 06:08:02 -0400
commit832f5dacfa0bb081a3b3b979a36a132b28ffacf3 (patch)
tree46943a79c18c1351840778fe3483dab4f927e523
parent1d473c2cb9fe25fc6bad30b0eb8d92e384496042 (diff)
MIPS: Remove all the uses of custom gpio.h
Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS machines, and each machine type provides its own gpio.h. However only a handful really implement the GPIO API, most just forward everythings to gpiolib. The Alchemy machine is notable as it provides a system to allow implementing the GPIO API at the board level. But it is not used by any board currently supported, so it can also be removed. For most machine types we can just remove the custom gpio.h, as well as the custom wrappers if some exists. Some of the code found in the wrappers must be moved to the respective GPIO driver. A few more fixes are need in some drivers as they rely on linux/gpio.h to provides some machine specific definitions, or used asm/gpio.h instead of linux/gpio.h for the gpio API. Signed-off-by: Alban Bedel <albeu@free.fr> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tejun Heo <tj@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Florian Fainelli <florian@openwrt.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Joe Perches <joe@perches.com> Cc: Daniel Walter <dwalter@google.com> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Varka Bhadram <varkabhadram@gmail.com> Cc: Masanari Iida <standby24x7@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Michael Buesch <m@bues.ch> Cc: abdoulaye berthe <berthe.ab@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-ide@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10828/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/alchemy/Kconfig7
-rw-r--r--arch/mips/alchemy/board-gpr.c1
-rw-r--r--arch/mips/alchemy/board-mtx1.c1
-rw-r--r--arch/mips/alchemy/common/Makefile7
-rw-r--r--arch/mips/alchemy/devboards/db1000.c1
-rw-r--r--arch/mips/alchemy/devboards/db1300.c1
-rw-r--r--arch/mips/alchemy/devboards/db1550.c1
-rw-r--r--arch/mips/alchemy/devboards/pm.c2
-rw-r--r--arch/mips/ar7/gpio.c5
-rw-r--r--arch/mips/ar7/platform.c1
-rw-r--r--arch/mips/ar7/setup.c1
-rw-r--r--arch/mips/include/asm/gpio.h6
-rw-r--r--arch/mips/include/asm/mach-ar7/ar7.h4
-rw-r--r--arch/mips/include/asm/mach-ar7/gpio.h41
-rw-r--r--arch/mips/include/asm/mach-ath25/gpio.h16
-rw-r--r--arch/mips/include/asm/mach-ath79/gpio.h26
-rw-r--r--arch/mips/include/asm/mach-au1x00/gpio-au1000.h148
-rw-r--r--arch/mips/include/asm/mach-au1x00/gpio.h86
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h17
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/gpio.h15
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/gpio.h21
-rw-r--r--arch/mips/include/asm/mach-generic/gpio.h21
-rw-r--r--arch/mips/include/asm/mach-jz4740/gpio.h2
-rw-r--r--arch/mips/include/asm/mach-lantiq/gpio.h13
-rw-r--r--arch/mips/include/asm/mach-loongson64/gpio.h36
-rw-r--r--arch/mips/include/asm/mach-pistachio/gpio.h21
-rw-r--r--arch/mips/include/asm/mach-rc32434/gpio.h12
-rw-r--r--arch/mips/jz4740/gpio.c20
-rw-r--r--arch/mips/pci/pci-lantiq.c1
-rw-r--r--arch/mips/rb532/devices.c1
-rw-r--r--arch/mips/rb532/gpio.c6
-rw-r--r--arch/mips/txx9/generic/setup.c16
-rw-r--r--drivers/ata/pata_rb532_cf.c3
-rw-r--r--drivers/gpio/gpio-ath79.c32
-rw-r--r--drivers/input/misc/rb532_button.c1
-rw-r--r--drivers/net/ethernet/ti/cpmac.c2
37 files changed, 45 insertions, 551 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 449f840d5a7f..06c5957917d3 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -14,7 +14,6 @@ config MIPS
14 select HAVE_ARCH_SECCOMP_FILTER 14 select HAVE_ARCH_SECCOMP_FILTER
15 select HAVE_ARCH_TRACEHOOK 15 select HAVE_ARCH_TRACEHOOK
16 select HAVE_BPF_JIT if !CPU_MICROMIPS 16 select HAVE_BPF_JIT if !CPU_MICROMIPS
17 select ARCH_HAVE_CUSTOM_GPIO_H
18 select HAVE_FUNCTION_TRACER 17 select HAVE_FUNCTION_TRACER
19 select HAVE_DYNAMIC_FTRACE 18 select HAVE_DYNAMIC_FTRACE
20 select HAVE_FTRACE_MCOUNT_RECORD 19 select HAVE_FTRACE_MCOUNT_RECORD
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index b9628983d620..7fa24881b708 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -6,13 +6,6 @@ config ALCHEMY_GPIOINT_AU1000
6config ALCHEMY_GPIOINT_AU1300 6config ALCHEMY_GPIOINT_AU1300
7 bool 7 bool
8 8
9# select this in your board config if you don't want to use the gpio
10# namespace as documented in the manuals. In this case however you need
11# to create the necessary gpio_* functions in your board code/headers!
12# see arch/mips/include/asm/mach-au1x00/gpio.h for more information.
13config ALCHEMY_GPIO_INDIRECT
14 def_bool n
15
16choice 9choice
17 prompt "Machine type" 10 prompt "Machine type"
18 depends on MIPS_ALCHEMY 11 depends on MIPS_ALCHEMY
diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c
index acf9a2a37f5a..79efe4c6e636 100644
--- a/arch/mips/alchemy/board-gpr.c
+++ b/arch/mips/alchemy/board-gpr.c
@@ -34,6 +34,7 @@
34#include <asm/idle.h> 34#include <asm/idle.h>
35#include <asm/reboot.h> 35#include <asm/reboot.h>
36#include <asm/mach-au1x00/au1000.h> 36#include <asm/mach-au1x00/au1000.h>
37#include <asm/mach-au1x00/gpio-au1000.h>
37#include <prom.h> 38#include <prom.h>
38 39
39const char *get_system_type(void) 40const char *get_system_type(void)
diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c
index 1e3b102389ef..85bb75669b0d 100644
--- a/arch/mips/alchemy/board-mtx1.c
+++ b/arch/mips/alchemy/board-mtx1.c
@@ -32,6 +32,7 @@
32#include <asm/bootinfo.h> 32#include <asm/bootinfo.h>
33#include <asm/reboot.h> 33#include <asm/reboot.h>
34#include <asm/mach-au1x00/au1000.h> 34#include <asm/mach-au1x00/au1000.h>
35#include <asm/mach-au1x00/gpio-au1000.h>
35#include <asm/mach-au1x00/au1xxx_eth.h> 36#include <asm/mach-au1x00/au1xxx_eth.h>
36#include <prom.h> 37#include <prom.h>
37 38
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index f64744f3b59f..23800b8e67e5 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -5,10 +5,5 @@
5# Makefile for the Alchemy Au1xx0 CPUs, generic files. 5# Makefile for the Alchemy Au1xx0 CPUs, generic files.
6# 6#
7 7
8obj-y += prom.o time.o clock.o platform.o power.o \ 8obj-y += prom.o time.o clock.o platform.o power.o gpiolib.o \
9 setup.o sleeper.o dma.o dbdma.o vss.o irq.o usb.o 9 setup.o sleeper.o dma.o dbdma.o vss.o irq.o usb.o
10
11# optional gpiolib support
12ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),)
13 obj-$(CONFIG_GPIOLIB) += gpiolib.o
14endif
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c
index 001102e197f1..bdeed9d13c6f 100644
--- a/arch/mips/alchemy/devboards/db1000.c
+++ b/arch/mips/alchemy/devboards/db1000.c
@@ -33,6 +33,7 @@
33#include <linux/spi/spi_gpio.h> 33#include <linux/spi/spi_gpio.h>
34#include <linux/spi/ads7846.h> 34#include <linux/spi/ads7846.h>
35#include <asm/mach-au1x00/au1000.h> 35#include <asm/mach-au1x00/au1000.h>
36#include <asm/mach-au1x00/gpio-au1000.h>
36#include <asm/mach-au1x00/au1000_dma.h> 37#include <asm/mach-au1x00/au1000_dma.h>
37#include <asm/mach-au1x00/au1100_mmc.h> 38#include <asm/mach-au1x00/au1100_mmc.h>
38#include <asm/mach-db1x00/bcsr.h> 39#include <asm/mach-db1x00/bcsr.h>
diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c
index 1c64fdbe4c81..b58077008a53 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -24,6 +24,7 @@
24#include <linux/wm97xx.h> 24#include <linux/wm97xx.h>
25 25
26#include <asm/mach-au1x00/au1000.h> 26#include <asm/mach-au1x00/au1000.h>
27#include <asm/mach-au1x00/gpio-au1300.h>
27#include <asm/mach-au1x00/au1100_mmc.h> 28#include <asm/mach-au1x00/au1100_mmc.h>
28#include <asm/mach-au1x00/au1200fb.h> 29#include <asm/mach-au1x00/au1200fb.h>
29#include <asm/mach-au1x00/au1xxx_dbdma.h> 30#include <asm/mach-au1x00/au1xxx_dbdma.h>
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c
index 0fd5177e35ab..5740bcfdfc7f 100644
--- a/arch/mips/alchemy/devboards/db1550.c
+++ b/arch/mips/alchemy/devboards/db1550.c
@@ -20,6 +20,7 @@
20#include <linux/spi/flash.h> 20#include <linux/spi/flash.h>
21#include <asm/bootinfo.h> 21#include <asm/bootinfo.h>
22#include <asm/mach-au1x00/au1000.h> 22#include <asm/mach-au1x00/au1000.h>
23#include <asm/mach-au1x00/gpio-au1000.h>
23#include <asm/mach-au1x00/au1xxx_eth.h> 24#include <asm/mach-au1x00/au1xxx_eth.h>
24#include <asm/mach-au1x00/au1xxx_dbdma.h> 25#include <asm/mach-au1x00/au1xxx_dbdma.h>
25#include <asm/mach-au1x00/au1xxx_psc.h> 26#include <asm/mach-au1x00/au1xxx_psc.h>
diff --git a/arch/mips/alchemy/devboards/pm.c b/arch/mips/alchemy/devboards/pm.c
index bfeb8f3c0be6..93024dc6b314 100644
--- a/arch/mips/alchemy/devboards/pm.c
+++ b/arch/mips/alchemy/devboards/pm.c
@@ -9,7 +9,7 @@
9#include <linux/suspend.h> 9#include <linux/suspend.h>
10#include <linux/sysfs.h> 10#include <linux/sysfs.h>
11#include <asm/mach-au1x00/au1000.h> 11#include <asm/mach-au1x00/au1000.h>
12#include <asm/mach-au1x00/gpio.h> 12#include <asm/mach-au1x00/gpio-au1000.h>
13#include <asm/mach-db1x00/bcsr.h> 13#include <asm/mach-db1x00/bcsr.h>
14 14
15/* 15/*
diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
index d8dbd8f0c1d2..f4930456eb8e 100644
--- a/arch/mips/ar7/gpio.c
+++ b/arch/mips/ar7/gpio.c
@@ -21,7 +21,10 @@
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23 23
24#include <asm/mach-ar7/gpio.h> 24#include <asm/mach-ar7/ar7.h>
25
26#define AR7_GPIO_MAX 32
27#define TITAN_GPIO_MAX 51
25 28
26struct ar7_gpio_chip { 29struct ar7_gpio_chip {
27 void __iomem *regs; 30 void __iomem *regs;
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index be9ff1673ded..462a252ea6e6 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -39,7 +39,6 @@
39 39
40#include <asm/addrspace.h> 40#include <asm/addrspace.h>
41#include <asm/mach-ar7/ar7.h> 41#include <asm/mach-ar7/ar7.h>
42#include <asm/mach-ar7/gpio.h>
43#include <asm/mach-ar7/prom.h> 42#include <asm/mach-ar7/prom.h>
44 43
45/***************************************************************************** 44/*****************************************************************************
diff --git a/arch/mips/ar7/setup.c b/arch/mips/ar7/setup.c
index 820b7a313d9b..7bb9a670bb73 100644
--- a/arch/mips/ar7/setup.c
+++ b/arch/mips/ar7/setup.c
@@ -23,7 +23,6 @@
23#include <asm/reboot.h> 23#include <asm/reboot.h>
24#include <asm/mach-ar7/ar7.h> 24#include <asm/mach-ar7/ar7.h>
25#include <asm/mach-ar7/prom.h> 25#include <asm/mach-ar7/prom.h>
26#include <asm/mach-ar7/gpio.h>
27 26
28static void ar7_machine_restart(char *command) 27static void ar7_machine_restart(char *command)
29{ 28{
diff --git a/arch/mips/include/asm/gpio.h b/arch/mips/include/asm/gpio.h
deleted file mode 100644
index 06e46faf862d..000000000000
--- a/arch/mips/include/asm/gpio.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_MIPS_GPIO_H
2#define __ASM_MIPS_GPIO_H
3
4#include <gpio.h>
5
6#endif /* __ASM_MIPS_GPIO_H */
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
index a47ea0c85248..468cbd61b906 100644
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -203,4 +203,8 @@ static inline void ar7_device_off(u32 bit)
203int __init ar7_gpio_init(void); 203int __init ar7_gpio_init(void);
204void __init ar7_init_clocks(void); 204void __init ar7_init_clocks(void);
205 205
206/* Board specific GPIO functions */
207int ar7_gpio_enable(unsigned gpio);
208int ar7_gpio_disable(unsigned gpio);
209
206#endif /* __AR7_H__ */ 210#endif /* __AR7_H__ */
diff --git a/arch/mips/include/asm/mach-ar7/gpio.h b/arch/mips/include/asm/mach-ar7/gpio.h
deleted file mode 100644
index c177cd1eed25..000000000000
--- a/arch/mips/include/asm/mach-ar7/gpio.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright (C) 2007-2009 Florian Fainelli <florian@openwrt.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef __AR7_GPIO_H__
20#define __AR7_GPIO_H__
21
22#include <asm/mach-ar7/ar7.h>
23
24#define AR7_GPIO_MAX 32
25#define TITAN_GPIO_MAX 51
26#define NR_BUILTIN_GPIO TITAN_GPIO_MAX
27
28#define gpio_to_irq(gpio) -1
29
30#define gpio_get_value __gpio_get_value
31#define gpio_set_value __gpio_set_value
32
33#define gpio_cansleep __gpio_cansleep
34
35/* Board specific GPIO functions */
36int ar7_gpio_enable(unsigned gpio);
37int ar7_gpio_disable(unsigned gpio);
38
39#include <asm-generic/gpio.h>
40
41#endif
diff --git a/arch/mips/include/asm/mach-ath25/gpio.h b/arch/mips/include/asm/mach-ath25/gpio.h
deleted file mode 100644
index 713564b8e8ef..000000000000
--- a/arch/mips/include/asm/mach-ath25/gpio.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_MACH_ATH25_GPIO_H
2#define __ASM_MACH_ATH25_GPIO_H
3
4#include <asm-generic/gpio.h>
5
6#define gpio_get_value __gpio_get_value
7#define gpio_set_value __gpio_set_value
8#define gpio_cansleep __gpio_cansleep
9#define gpio_to_irq __gpio_to_irq
10
11static inline int irq_to_gpio(unsigned irq)
12{
13 return -EINVAL;
14}
15
16#endif /* __ASM_MACH_ATH25_GPIO_H */
diff --git a/arch/mips/include/asm/mach-ath79/gpio.h b/arch/mips/include/asm/mach-ath79/gpio.h
deleted file mode 100644
index 60dcb62785b4..000000000000
--- a/arch/mips/include/asm/mach-ath79/gpio.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Atheros AR71XX/AR724X/AR913X GPIO API definitions
3 *
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 *
11 */
12
13#ifndef __ASM_MACH_ATH79_GPIO_H
14#define __ASM_MACH_ATH79_GPIO_H
15
16#define ARCH_NR_GPIOS 64
17#include <asm-generic/gpio.h>
18
19int gpio_to_irq(unsigned gpio);
20int irq_to_gpio(unsigned irq);
21int gpio_get_value(unsigned gpio);
22void gpio_set_value(unsigned gpio, int value);
23
24#define gpio_cansleep __gpio_cansleep
25
26#endif /* __ASM_MACH_ATH79_GPIO_H */
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
index 9785e4ebb450..adde1fa5097e 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
@@ -266,6 +266,17 @@ static inline int alchemy_gpio1_to_irq(int gpio)
266 return -ENXIO; 266 return -ENXIO;
267} 267}
268 268
269/* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before
270 * SYS_PININPUTEN is written to at least once. On Au1550/Au1200/Au1300 this
271 * register enables use of GPIOs as wake source.
272 */
273static inline void alchemy_gpio1_input_enable(void)
274{
275 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
276 __raw_writel(0, base + 0x110); /* the write op is key */
277 wmb();
278}
279
269/* 280/*
270 * GPIO2 block macros for common linux GPIO functions. The 'gpio' 281 * GPIO2 block macros for common linux GPIO functions. The 'gpio'
271 * parameter must be in range of ALCHEMY_GPIO2_BASE..ALCHEMY_GPIO2_MAX. 282 * parameter must be in range of ALCHEMY_GPIO2_BASE..ALCHEMY_GPIO2_MAX.
@@ -518,141 +529,4 @@ static inline int alchemy_irq_to_gpio(int irq)
518 return -ENXIO; 529 return -ENXIO;
519} 530}
520 531
521/**********************************************************************/
522
523/* Linux gpio framework integration.
524 *
525 * 4 use cases of Au1000-Au1200 GPIOS:
526 *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
527 * Board must register gpiochips.
528 *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
529 * 2 (1 for Au1000) gpio_chips are registered.
530 *
531 *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
532 * the boards' gpio.h must provide the linux gpio wrapper functions,
533 *
534 *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
535 * inlinable gpio functions are provided which enable access to the
536 * Au1000 gpios only by using the numbers straight out of the data-
537 * sheets.
538
539 * Cases 1 and 3 are intended for boards which want to provide their own
540 * GPIO namespace and -operations (i.e. for example you have 8 GPIOs
541 * which are in part provided by spare Au1000 GPIO pins and in part by
542 * an external FPGA but you still want them to be accssible in linux
543 * as gpio0-7. The board can of course use the alchemy_gpioX_* functions
544 * as required).
545 */
546
547#ifndef CONFIG_GPIOLIB
548
549#ifdef CONFIG_ALCHEMY_GPIOINT_AU1000
550
551#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */
552
553static inline int gpio_direction_input(int gpio)
554{
555 return alchemy_gpio_direction_input(gpio);
556}
557
558static inline int gpio_direction_output(int gpio, int v)
559{
560 return alchemy_gpio_direction_output(gpio, v);
561}
562
563static inline int gpio_get_value(int gpio)
564{
565 return alchemy_gpio_get_value(gpio);
566}
567
568static inline void gpio_set_value(int gpio, int v)
569{
570 alchemy_gpio_set_value(gpio, v);
571}
572
573static inline int gpio_get_value_cansleep(unsigned gpio)
574{
575 return gpio_get_value(gpio);
576}
577
578static inline void gpio_set_value_cansleep(unsigned gpio, int value)
579{
580 gpio_set_value(gpio, value);
581}
582
583static inline int gpio_is_valid(int gpio)
584{
585 return alchemy_gpio_is_valid(gpio);
586}
587
588static inline int gpio_cansleep(int gpio)
589{
590 return alchemy_gpio_cansleep(gpio);
591}
592
593static inline int gpio_to_irq(int gpio)
594{
595 return alchemy_gpio_to_irq(gpio);
596}
597
598static inline int irq_to_gpio(int irq)
599{
600 return alchemy_irq_to_gpio(irq);
601}
602
603static inline int gpio_request(unsigned gpio, const char *label)
604{
605 return 0;
606}
607
608static inline int gpio_request_one(unsigned gpio,
609 unsigned long flags, const char *label)
610{
611 return 0;
612}
613
614static inline int gpio_request_array(struct gpio *array, size_t num)
615{
616 return 0;
617}
618
619static inline void gpio_free(unsigned gpio)
620{
621}
622
623static inline void gpio_free_array(struct gpio *array, size_t num)
624{
625}
626
627static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
628{
629 return -ENOSYS;
630}
631
632static inline int gpio_export(unsigned gpio, bool direction_may_change)
633{
634 return -ENOSYS;
635}
636
637static inline int gpio_export_link(struct device *dev, const char *name,
638 unsigned gpio)
639{
640 return -ENOSYS;
641}
642
643static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
644{
645 return -ENOSYS;
646}
647
648static inline void gpio_unexport(unsigned gpio)
649{
650}
651
652#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
653
654#endif /* CONFIG_ALCHEMY_GPIOINT_AU1000 */
655
656#endif /* !CONFIG_GPIOLIB */
657
658#endif /* _ALCHEMY_GPIO_AU1000_H_ */ 532#endif /* _ALCHEMY_GPIO_AU1000_H_ */
diff --git a/arch/mips/include/asm/mach-au1x00/gpio.h b/arch/mips/include/asm/mach-au1x00/gpio.h
deleted file mode 100644
index 22e7ff17fc48..000000000000
--- a/arch/mips/include/asm/mach-au1x00/gpio.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * Alchemy GPIO support.
3 *
4 * With CONFIG_GPIOLIB=y different types of on-chip GPIO can be supported within
5 * the same kernel image.
6 * With CONFIG_GPIOLIB=n, your board must select ALCHEMY_GPIOINT_AU1XXX for the
7 * appropriate CPU type (AU1000 currently).
8 */
9
10#ifndef _ALCHEMY_GPIO_H_
11#define _ALCHEMY_GPIO_H_
12
13#include <asm/mach-au1x00/au1000.h>
14#include <asm/mach-au1x00/gpio-au1000.h>
15#include <asm/mach-au1x00/gpio-au1300.h>
16
17/* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before
18 * SYS_PININPUTEN is written to at least once. On Au1550/Au1200/Au1300 this
19 * register enables use of GPIOs as wake source.
20 */
21static inline void alchemy_gpio1_input_enable(void)
22{
23 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
24 __raw_writel(0, base + 0x110); /* the write op is key */
25 wmb();
26}
27
28
29/* Linux gpio framework integration.
30*
31* 4 use cases of Alchemy GPIOS:
32*(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
33* Board must register gpiochips.
34*(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
35* A gpiochip for the 75 GPIOs is registered.
36*
37*(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
38* the boards' gpio.h must provide the linux gpio wrapper functions,
39*
40*(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
41* inlinable gpio functions are provided which enable access to the
42* Au1300 gpios only by using the numbers straight out of the data-
43* sheets.
44
45* Cases 1 and 3 are intended for boards which want to provide their own
46* GPIO namespace and -operations (i.e. for example you have 8 GPIOs
47* which are in part provided by spare Au1300 GPIO pins and in part by
48* an external FPGA but you still want them to be accssible in linux
49* as gpio0-7. The board can of course use the alchemy_gpioX_* functions
50* as required).
51*/
52
53#ifdef CONFIG_GPIOLIB
54
55/* wraps the cpu-dependent irq_to_gpio functions */
56/* FIXME: gpiolib needs an irq_to_gpio hook */
57static inline int __au_irq_to_gpio(unsigned int irq)
58{
59 switch (alchemy_get_cputype()) {
60 case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200:
61 return alchemy_irq_to_gpio(irq);
62 case ALCHEMY_CPU_AU1300:
63 return au1300_irq_to_gpio(irq);
64 }
65 return -EINVAL;
66}
67
68
69/* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */
70#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (2) */
71
72/* get everything through gpiolib */
73#define gpio_to_irq __gpio_to_irq
74#define gpio_get_value __gpio_get_value
75#define gpio_set_value __gpio_set_value
76#define gpio_cansleep __gpio_cansleep
77#define irq_to_gpio __au_irq_to_gpio
78
79#include <asm-generic/gpio.h>
80
81#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
82
83
84#endif /* CONFIG_GPIOLIB */
85
86#endif /* _ALCHEMY_GPIO_H_ */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
deleted file mode 100644
index 90daefa24a4d..000000000000
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __ASM_MIPS_MACH_BCM47XX_GPIO_H
2#define __ASM_MIPS_MACH_BCM47XX_GPIO_H
3
4#include <asm-generic/gpio.h>
5
6#define gpio_get_value __gpio_get_value
7#define gpio_set_value __gpio_set_value
8
9#define gpio_cansleep __gpio_cansleep
10#define gpio_to_irq __gpio_to_irq
11
12static inline int irq_to_gpio(unsigned int irq)
13{
14 return -EINVAL;
15}
16
17#endif
diff --git a/arch/mips/include/asm/mach-bcm63xx/gpio.h b/arch/mips/include/asm/mach-bcm63xx/gpio.h
deleted file mode 100644
index 1eb534de8e3b..000000000000
--- a/arch/mips/include/asm/mach-bcm63xx/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef __ASM_MIPS_MACH_BCM63XX_GPIO_H
2#define __ASM_MIPS_MACH_BCM63XX_GPIO_H
3
4#include <bcm63xx_gpio.h>
5
6#define gpio_to_irq(gpio) -1
7
8#define gpio_get_value __gpio_get_value
9#define gpio_set_value __gpio_set_value
10
11#define gpio_cansleep __gpio_cansleep
12
13#include <asm-generic/gpio.h>
14
15#endif /* __ASM_MIPS_MACH_BCM63XX_GPIO_H */
diff --git a/arch/mips/include/asm/mach-cavium-octeon/gpio.h b/arch/mips/include/asm/mach-cavium-octeon/gpio.h
deleted file mode 100644
index 34e9f7aabab4..000000000000
--- a/arch/mips/include/asm/mach-cavium-octeon/gpio.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_MACH_CAVIUM_OCTEON_GPIO_H
2#define __ASM_MACH_CAVIUM_OCTEON_GPIO_H
3
4#ifdef CONFIG_GPIOLIB
5#define gpio_get_value __gpio_get_value
6#define gpio_set_value __gpio_set_value
7#define gpio_cansleep __gpio_cansleep
8#else
9int gpio_request(unsigned gpio, const char *label);
10void gpio_free(unsigned gpio);
11int gpio_direction_input(unsigned gpio);
12int gpio_direction_output(unsigned gpio, int value);
13int gpio_get_value(unsigned gpio);
14void gpio_set_value(unsigned gpio, int value);
15#endif
16
17#include <asm-generic/gpio.h>
18
19#define gpio_to_irq __gpio_to_irq
20
21#endif /* __ASM_MACH_GENERIC_GPIO_H */
diff --git a/arch/mips/include/asm/mach-generic/gpio.h b/arch/mips/include/asm/mach-generic/gpio.h
deleted file mode 100644
index b4e70208da64..000000000000
--- a/arch/mips/include/asm/mach-generic/gpio.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_MACH_GENERIC_GPIO_H
2#define __ASM_MACH_GENERIC_GPIO_H
3
4#ifdef CONFIG_GPIOLIB
5#define gpio_get_value __gpio_get_value
6#define gpio_set_value __gpio_set_value
7#define gpio_cansleep __gpio_cansleep
8#else
9int gpio_request(unsigned gpio, const char *label);
10void gpio_free(unsigned gpio);
11int gpio_direction_input(unsigned gpio);
12int gpio_direction_output(unsigned gpio, int value);
13int gpio_get_value(unsigned gpio);
14void gpio_set_value(unsigned gpio, int value);
15#endif
16int gpio_to_irq(unsigned gpio);
17int irq_to_gpio(unsigned irq);
18
19#include <asm-generic/gpio.h> /* cansleep wrappers */
20
21#endif /* __ASM_MACH_GENERIC_GPIO_H */
diff --git a/arch/mips/include/asm/mach-jz4740/gpio.h b/arch/mips/include/asm/mach-jz4740/gpio.h
index eaacba79cf18..bf8c3e1860e7 100644
--- a/arch/mips/include/asm/mach-jz4740/gpio.h
+++ b/arch/mips/include/asm/mach-jz4740/gpio.h
@@ -73,8 +73,6 @@ int jz_gpio_port_direction_output(int port, uint32_t mask);
73void jz_gpio_port_set_value(int port, uint32_t value, uint32_t mask); 73void jz_gpio_port_set_value(int port, uint32_t value, uint32_t mask);
74uint32_t jz_gpio_port_get_value(int port, uint32_t mask); 74uint32_t jz_gpio_port_get_value(int port, uint32_t mask);
75 75
76#include <asm/mach-generic/gpio.h>
77
78#define JZ_GPIO_PORTA(x) ((x) + 32 * 0) 76#define JZ_GPIO_PORTA(x) ((x) + 32 * 0)
79#define JZ_GPIO_PORTB(x) ((x) + 32 * 1) 77#define JZ_GPIO_PORTB(x) ((x) + 32 * 1)
80#define JZ_GPIO_PORTC(x) ((x) + 32 * 2) 78#define JZ_GPIO_PORTC(x) ((x) + 32 * 2)
diff --git a/arch/mips/include/asm/mach-lantiq/gpio.h b/arch/mips/include/asm/mach-lantiq/gpio.h
deleted file mode 100644
index 9ba1caebca5f..000000000000
--- a/arch/mips/include/asm/mach-lantiq/gpio.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_MIPS_MACH_LANTIQ_GPIO_H
2#define __ASM_MIPS_MACH_LANTIQ_GPIO_H
3
4#define gpio_to_irq __gpio_to_irq
5
6#define gpio_get_value __gpio_get_value
7#define gpio_set_value __gpio_set_value
8
9#define gpio_cansleep __gpio_cansleep
10
11#include <asm-generic/gpio.h>
12
13#endif
diff --git a/arch/mips/include/asm/mach-loongson64/gpio.h b/arch/mips/include/asm/mach-loongson64/gpio.h
deleted file mode 100644
index b3b216904a9a..000000000000
--- a/arch/mips/include/asm/mach-loongson64/gpio.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * Loongson GPIO Support
3 *
4 * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
5 * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
6 * Copyright (c) 2014 Huacai Chen <chenhc@lemote.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef __LOONGSON_GPIO_H
15#define __LOONGSON_GPIO_H
16
17#include <asm-generic/gpio.h>
18
19#define gpio_get_value __gpio_get_value
20#define gpio_set_value __gpio_set_value
21#define gpio_cansleep __gpio_cansleep
22
23/* The chip can do interrupt
24 * but it has not been tested and doc not clear
25 */
26static inline int gpio_to_irq(int gpio)
27{
28 return -EINVAL;
29}
30
31static inline int irq_to_gpio(int gpio)
32{
33 return -EINVAL;
34}
35
36#endif /* __LOONGSON_GPIO_H */
diff --git a/arch/mips/include/asm/mach-pistachio/gpio.h b/arch/mips/include/asm/mach-pistachio/gpio.h
deleted file mode 100644
index 6c1649c27b8d..000000000000
--- a/arch/mips/include/asm/mach-pistachio/gpio.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * Pistachio IRQ setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_PISTACHIO_GPIO_H
12#define __ASM_MACH_PISTACHIO_GPIO_H
13
14#include <asm-generic/gpio.h>
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21#endif /* __ASM_MACH_PISTACHIO_GPIO_H */
diff --git a/arch/mips/include/asm/mach-rc32434/gpio.h b/arch/mips/include/asm/mach-rc32434/gpio.h
index 4dee0a34250c..db211212ce79 100644
--- a/arch/mips/include/asm/mach-rc32434/gpio.h
+++ b/arch/mips/include/asm/mach-rc32434/gpio.h
@@ -13,18 +13,6 @@
13#ifndef _RC32434_GPIO_H_ 13#ifndef _RC32434_GPIO_H_
14#define _RC32434_GPIO_H_ 14#define _RC32434_GPIO_H_
15 15
16#include <linux/types.h>
17#include <asm-generic/gpio.h>
18
19#define NR_BUILTIN_GPIO 32
20
21#define gpio_get_value __gpio_get_value
22#define gpio_set_value __gpio_set_value
23#define gpio_cansleep __gpio_cansleep
24
25#define gpio_to_irq(gpio) (8 + 4 * 32 + gpio)
26#define irq_to_gpio(irq) (irq - (8 + 4 * 32))
27
28struct rb532_gpio_reg { 16struct rb532_gpio_reg {
29 u32 gpiofunc; /* GPIO Function Register 17 u32 gpiofunc; /* GPIO Function Register
30 * gpiofunc[x]==0 bit = gpio 18 * gpiofunc[x]==0 bit = gpio
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 77df1602f818..6cd69fdaa1c5 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -231,6 +231,13 @@ static int jz_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
231 return 0; 231 return 0;
232} 232}
233 233
234static int jz_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
235{
236 struct jz_gpio_chip *jz_gpio = gpio_chip_to_jz_gpio_chip(chip);
237
238 return jz_gpio->irq_base + gpio;
239}
240
234int jz_gpio_port_direction_input(int port, uint32_t mask) 241int jz_gpio_port_direction_input(int port, uint32_t mask)
235{ 242{
236 writel(mask, GPIO_TO_REG(port, JZ_REG_GPIO_DIRECTION_CLEAR)); 243 writel(mask, GPIO_TO_REG(port, JZ_REG_GPIO_DIRECTION_CLEAR));
@@ -262,18 +269,6 @@ uint32_t jz_gpio_port_get_value(int port, uint32_t mask)
262} 269}
263EXPORT_SYMBOL(jz_gpio_port_get_value); 270EXPORT_SYMBOL(jz_gpio_port_get_value);
264 271
265int gpio_to_irq(unsigned gpio)
266{
267 return JZ4740_IRQ_GPIO(0) + gpio;
268}
269EXPORT_SYMBOL_GPL(gpio_to_irq);
270
271int irq_to_gpio(unsigned irq)
272{
273 return irq - JZ4740_IRQ_GPIO(0);
274}
275EXPORT_SYMBOL_GPL(irq_to_gpio);
276
277#define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f) 272#define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f)
278 273
279static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq) 274static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq)
@@ -403,6 +398,7 @@ static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
403 .get = jz_gpio_get_value, \ 398 .get = jz_gpio_get_value, \
404 .direction_output = jz_gpio_direction_output, \ 399 .direction_output = jz_gpio_direction_output, \
405 .direction_input = jz_gpio_direction_input, \ 400 .direction_input = jz_gpio_direction_input, \
401 .to_irq = jz_gpio_to_irq, \
406 .base = JZ4740_GPIO_BASE_ ## _bank, \ 402 .base = JZ4740_GPIO_BASE_ ## _bank, \
407 .ngpio = JZ4740_GPIO_NUM_ ## _bank, \ 403 .ngpio = JZ4740_GPIO_NUM_ ## _bank, \
408 }, \ 404 }, \
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index c5347d99cf3a..6a15dbd085aa 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -20,7 +20,6 @@
20#include <linux/of_irq.h> 20#include <linux/of_irq.h>
21#include <linux/of_pci.h> 21#include <linux/of_pci.h>
22 22
23#include <asm/gpio.h>
24#include <asm/addrspace.h> 23#include <asm/addrspace.h>
25 24
26#include <lantiq_soc.h> 25#include <lantiq_soc.h>
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index e31e8cdcb296..9bd7a2de0765 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -23,6 +23,7 @@
23#include <linux/mtd/nand.h> 23#include <linux/mtd/nand.h>
24#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/gpio.h>
26#include <linux/gpio_keys.h> 27#include <linux/gpio_keys.h>
27#include <linux/input.h> 28#include <linux/input.h>
28#include <linux/serial_8250.h> 29#include <linux/serial_8250.h>
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 5aa3df853082..650d5d39f34d 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -140,6 +140,11 @@ static int rb532_gpio_direction_output(struct gpio_chip *chip,
140 return 0; 140 return 0;
141} 141}
142 142
143static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
144{
145 return 8 + 4 * 32 + gpio;
146}
147
143static struct rb532_gpio_chip rb532_gpio_chip[] = { 148static struct rb532_gpio_chip rb532_gpio_chip[] = {
144 [0] = { 149 [0] = {
145 .chip = { 150 .chip = {
@@ -148,6 +153,7 @@ static struct rb532_gpio_chip rb532_gpio_chip[] = {
148 .direction_output = rb532_gpio_direction_output, 153 .direction_output = rb532_gpio_direction_output,
149 .get = rb532_gpio_get, 154 .get = rb532_gpio_get,
150 .set = rb532_gpio_set, 155 .set = rb532_gpio_set,
156 .to_irq = rb532_gpio_to_irq,
151 .base = 0, 157 .base = 0,
152 .ngpio = 32, 158 .ngpio = 32,
153 }, 159 },
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 2791b8641df6..9d9962ab7d25 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -117,22 +117,6 @@ void clk_put(struct clk *clk)
117} 117}
118EXPORT_SYMBOL(clk_put); 118EXPORT_SYMBOL(clk_put);
119 119
120/* GPIO support */
121
122#ifdef CONFIG_GPIOLIB
123int gpio_to_irq(unsigned gpio)
124{
125 return -EINVAL;
126}
127EXPORT_SYMBOL(gpio_to_irq);
128
129int irq_to_gpio(unsigned irq)
130{
131 return -EINVAL;
132}
133EXPORT_SYMBOL(irq_to_gpio);
134#endif
135
136#define BOARD_VEC(board) extern struct txx9_board_vec board; 120#define BOARD_VEC(board) extern struct txx9_board_vec board;
137#include <asm/txx9/boards.h> 121#include <asm/txx9/boards.h>
138#undef BOARD_VEC 122#undef BOARD_VEC
diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c
index 6d08446b877c..12fe0f3bb7e9 100644
--- a/drivers/ata/pata_rb532_cf.c
+++ b/drivers/ata/pata_rb532_cf.c
@@ -27,12 +27,11 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/irq.h> 29#include <linux/irq.h>
30#include <linux/gpio.h>
30 31
31#include <linux/libata.h> 32#include <linux/libata.h>
32#include <scsi/scsi_host.h> 33#include <scsi/scsi_host.h>
33 34
34#include <asm/gpio.h>
35
36#define DRV_NAME "pata-rb532-cf" 35#define DRV_NAME "pata-rb532-cf"
37#define DRV_VERSION "0.1.0" 36#define DRV_VERSION "0.1.0"
38#define DRV_DESC "PATA driver for RouterBOARD 532 Compact Flash" 37#define DRV_DESC "PATA driver for RouterBOARD 532 Compact Flash"
diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c
index c3c92eb56e04..03b995304ad6 100644
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -202,35 +202,3 @@ static struct platform_driver ath79_gpio_driver = {
202}; 202};
203 203
204module_platform_driver(ath79_gpio_driver); 204module_platform_driver(ath79_gpio_driver);
205
206int gpio_get_value(unsigned gpio)
207{
208 if (gpio < ath79_gpio_count)
209 return __ath79_gpio_get_value(gpio);
210
211 return __gpio_get_value(gpio);
212}
213EXPORT_SYMBOL(gpio_get_value);
214
215void gpio_set_value(unsigned gpio, int value)
216{
217 if (gpio < ath79_gpio_count)
218 __ath79_gpio_set_value(gpio, value);
219 else
220 __gpio_set_value(gpio, value);
221}
222EXPORT_SYMBOL(gpio_set_value);
223
224int gpio_to_irq(unsigned gpio)
225{
226 /* FIXME */
227 return -EINVAL;
228}
229EXPORT_SYMBOL(gpio_to_irq);
230
231int irq_to_gpio(unsigned irq)
232{
233 /* FIXME */
234 return -EINVAL;
235}
236EXPORT_SYMBOL(irq_to_gpio);
diff --git a/drivers/input/misc/rb532_button.c b/drivers/input/misc/rb532_button.c
index e956e81cd4e6..62c5814c796b 100644
--- a/drivers/input/misc/rb532_button.c
+++ b/drivers/input/misc/rb532_button.c
@@ -7,6 +7,7 @@
7#include <linux/input-polldev.h> 7#include <linux/input-polldev.h>
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/gpio.h>
10 11
11#include <asm/mach-rc32434/gpio.h> 12#include <asm/mach-rc32434/gpio.h>
12#include <asm/mach-rc32434/rb.h> 13#include <asm/mach-rc32434/rb.h>
diff --git a/drivers/net/ethernet/ti/cpmac.c b/drivers/net/ethernet/ti/cpmac.c
index dd9430043536..cba3d9fcb465 100644
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -41,6 +41,8 @@
41#include <linux/gpio.h> 41#include <linux/gpio.h>
42#include <linux/atomic.h> 42#include <linux/atomic.h>
43 43
44#include <asm/mach-ar7/ar7.h>
45
44MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>"); 46MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>");
45MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)"); 47MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
46MODULE_LICENSE("GPL"); 48MODULE_LICENSE("GPL");