diff options
author | Viresh Kumar <viresh.kumar@linaro.org> | 2015-02-27 03:09:52 -0500 |
---|---|---|
committer | Viresh Kumar <viresh.kumar@linaro.org> | 2015-07-16 22:55:49 -0400 |
commit | 7cfa3c69ca97acfd7cac19652d82aa610015bab8 (patch) | |
tree | 02b0ced9daa3b98382f67cc9ca431a19fdd0e3ec | |
parent | cea50eeef15c8498181c4a1ff804a7cdef29aebb (diff) |
ARM/ks8695/time: Migrate to new 'set-state' interface
Migrate ks8695 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.
This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
There is nothing to be done for oneshot or shutdown states and so are
not implemented.
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-rw-r--r-- | arch/arm/mach-ks8695/time.c | 43 |
1 files changed, 21 insertions, 22 deletions
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index a197874bf382..18eb0fbd8d82 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c | |||
@@ -54,28 +54,25 @@ | |||
54 | /* Timer0 Timeout Counter Register */ | 54 | /* Timer0 Timeout Counter Register */ |
55 | #define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ | 55 | #define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ |
56 | 56 | ||
57 | static void ks8695_set_mode(enum clock_event_mode mode, | 57 | static int ks8695_set_periodic(struct clock_event_device *evt) |
58 | struct clock_event_device *evt) | ||
59 | { | 58 | { |
59 | u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ); | ||
60 | u32 half = DIV_ROUND_CLOSEST(rate, 2); | ||
60 | u32 tmcon; | 61 | u32 tmcon; |
61 | 62 | ||
62 | if (mode == CLOCK_EVT_FEAT_PERIODIC) { | 63 | /* Disable timer 1 */ |
63 | u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ); | 64 | tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); |
64 | u32 half = DIV_ROUND_CLOSEST(rate, 2); | 65 | tmcon &= ~TMCON_T1EN; |
65 | 66 | writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); | |
66 | /* Disable timer 1 */ | ||
67 | tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); | ||
68 | tmcon &= ~TMCON_T1EN; | ||
69 | writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); | ||
70 | 67 | ||
71 | /* Both registers need to count down */ | 68 | /* Both registers need to count down */ |
72 | writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); | 69 | writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); |
73 | writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); | 70 | writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); |
74 | 71 | ||
75 | /* Re-enable timer1 */ | 72 | /* Re-enable timer1 */ |
76 | tmcon |= TMCON_T1EN; | 73 | tmcon |= TMCON_T1EN; |
77 | writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); | 74 | writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); |
78 | } | 75 | return 0; |
79 | } | 76 | } |
80 | 77 | ||
81 | static int ks8695_set_next_event(unsigned long cycles, | 78 | static int ks8695_set_next_event(unsigned long cycles, |
@@ -102,11 +99,13 @@ static int ks8695_set_next_event(unsigned long cycles, | |||
102 | } | 99 | } |
103 | 100 | ||
104 | static struct clock_event_device clockevent_ks8695 = { | 101 | static struct clock_event_device clockevent_ks8695 = { |
105 | .name = "ks8695_t1tc", | 102 | .name = "ks8695_t1tc", |
106 | .rating = 300, /* Reasonably fast and accurate clock event */ | 103 | /* Reasonably fast and accurate clock event */ |
107 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, | 104 | .rating = 300, |
108 | .set_next_event = ks8695_set_next_event, | 105 | .features = CLOCK_EVT_FEAT_ONESHOT | |
109 | .set_mode = ks8695_set_mode, | 106 | CLOCK_EVT_FEAT_PERIODIC, |
107 | .set_next_event = ks8695_set_next_event, | ||
108 | .set_state_periodic = ks8695_set_periodic, | ||
110 | }; | 109 | }; |
111 | 110 | ||
112 | /* | 111 | /* |