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authorReinder de Haan <patchesrdh@mveas.com>2015-11-15 14:46:13 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-11-20 07:50:19 -0500
commit7bec0200ac214b5cba44e2c2c4385815be4b9f00 (patch)
treec089a7e37a59f3b9b567471721d7f0c1f4ce832b
parent8005c49d9aea74d382f474ce11afbbc7d7130bec (diff)
clk: sunxi: Add support for the H3 usb phy clocks
The H3 has a usb-phy clk register which is similar to that of earlier SoCs, but with support for a larger number of phys. So we can simply add a new set of clk-data and a new compatible and be done with it. Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Reinder de Haan <patchesrdh@mveas.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt1
-rw-r--r--drivers/clk/sunxi/clk-usb.c12
2 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index 8a47b77abfca..a94bb56a0e9e 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -68,6 +68,7 @@ Required properties:
68 "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13 68 "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
69 "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31 69 "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
70 "allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23 70 "allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
71 "allwinner,sun8i-h3-usb-clk" - for usb gates + resets on H3
71 "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 72 "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
72 "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 73 "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
73 74
diff --git a/drivers/clk/sunxi/clk-usb.c b/drivers/clk/sunxi/clk-usb.c
index 1a72cd672839..67b8e38f4ee9 100644
--- a/drivers/clk/sunxi/clk-usb.c
+++ b/drivers/clk/sunxi/clk-usb.c
@@ -243,3 +243,15 @@ static void __init sun9i_a80_usb_phy_setup(struct device_node *node)
243 sunxi_usb_clk_setup(node, &sun9i_a80_usb_phy_data, &a80_usb_phy_lock); 243 sunxi_usb_clk_setup(node, &sun9i_a80_usb_phy_data, &a80_usb_phy_lock);
244} 244}
245CLK_OF_DECLARE(sun9i_a80_usb_phy, "allwinner,sun9i-a80-usb-phy-clk", sun9i_a80_usb_phy_setup); 245CLK_OF_DECLARE(sun9i_a80_usb_phy, "allwinner,sun9i-a80-usb-phy-clk", sun9i_a80_usb_phy_setup);
246
247static const struct usb_clk_data sun8i_h3_usb_clk_data __initconst = {
248 .clk_mask = BIT(19) | BIT(18) | BIT(17) | BIT(16) |
249 BIT(11) | BIT(10) | BIT(9) | BIT(8),
250 .reset_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
251};
252
253static void __init sun8i_h3_usb_setup(struct device_node *node)
254{
255 sunxi_usb_clk_setup(node, &sun8i_h3_usb_clk_data, &sun4i_a10_usb_lock);
256}
257CLK_OF_DECLARE(sun8i_h3_usb, "allwinner,sun8i-h3-usb-clk", sun8i_h3_usb_setup);