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authorIyappan Subramanian <isubramanian@apm.com>2016-07-25 20:12:46 -0400
committerDavid S. Miller <davem@davemloft.net>2016-07-26 00:51:44 -0400
commit792a1107fe713347ed230bc79a53e875b6abe7c7 (patch)
treeece2c8049b70610bfef4a9864420c61c1ef419ef
parent8e694cd2762c36b4104bbddaaf72740e59fdee5e (diff)
Documentation: dtb: xgene: Add MDIO node
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Fushen Chen <fchen@apm.com> Tested-by: Toan Le <toanle@apm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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1APM X-Gene SoC MDIO node
2
3MDIO node is defined to describe on-chip MDIO controller.
4
5Required properties:
6 - compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi"
7 - #address-cells: Must be <1>.
8 - #size-cells: Must be <0>.
9 - reg: Address and length of the register set
10 - clocks: Reference to the clock entry
11
12For the phys on the mdio bus, there must be a node with the following fields:
13 - compatible: PHY identifier. Please refer ./phy.txt for the format.
14 - reg: The ID number for the phy.
15
16Example:
17
18 mdio: mdio@17020000 {
19 compatible = "apm,xgene-mdio-rgmii";
20 #address-cells = <1>;
21 #size-cells = <0>;
22 reg = <0x0 0x17020000 0x0 0xd100>;
23 clocks = <&menetclk 0>;
24 };
25
26 /* Board-specific peripheral configurations */
27 &mdio {
28 menetphy: phy@3 {
29 reg = <0x3>;
30 };
31 sgenet0phy: phy@4 {
32 reg = <0x4>;
33 };
34 sgenet1phy: phy@5 {
35 reg = <0x5>;
36 };
37 };