diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-08-24 16:56:21 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-08-25 11:21:43 -0400 |
commit | 75c65480ba7d56e2ee164057ce8ab879931a3978 (patch) | |
tree | 206539d4b9cbd5495b699b069f098d0de212e1f5 | |
parent | 810ddc3ab52dd84f4cd28ee8673678aece457a59 (diff) |
drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value. This allows
different versions to expose more or less rings.
No functional change.
Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 57 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 37 |
4 files changed, 45 insertions, 52 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 849451432a3f..0cd1c9316974 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -1686,6 +1686,7 @@ struct amdgpu_vce { | |||
1686 | unsigned harvest_config; | 1686 | unsigned harvest_config; |
1687 | struct amd_sched_entity entity; | 1687 | struct amd_sched_entity entity; |
1688 | uint32_t srbm_soft_reset; | 1688 | uint32_t srbm_soft_reset; |
1689 | unsigned num_rings; | ||
1689 | }; | 1690 | }; |
1690 | 1691 | ||
1691 | /* | 1692 | /* |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index b78e74048f3d..f1b9e0f2869f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | |||
@@ -296,7 +296,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file | |||
296 | break; | 296 | break; |
297 | case AMDGPU_HW_IP_VCE: | 297 | case AMDGPU_HW_IP_VCE: |
298 | type = AMD_IP_BLOCK_TYPE_VCE; | 298 | type = AMD_IP_BLOCK_TYPE_VCE; |
299 | for (i = 0; i < AMDGPU_MAX_VCE_RINGS; i++) | 299 | for (i = 0; i < adev->vce.num_rings; i++) |
300 | ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) << i); | 300 | ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) << i); |
301 | ib_start_alignment = AMDGPU_GPU_PAGE_SIZE; | 301 | ib_start_alignment = AMDGPU_GPU_PAGE_SIZE; |
302 | ib_size_alignment = 1; | 302 | ib_size_alignment = 1; |
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c index 5fa55b52c00e..3fcc33f9ae70 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | |||
@@ -193,6 +193,8 @@ static int vce_v2_0_early_init(void *handle) | |||
193 | { | 193 | { |
194 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 194 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
195 | 195 | ||
196 | adev->vce.num_rings = 2; | ||
197 | |||
196 | vce_v2_0_set_ring_funcs(adev); | 198 | vce_v2_0_set_ring_funcs(adev); |
197 | vce_v2_0_set_irq_funcs(adev); | 199 | vce_v2_0_set_irq_funcs(adev); |
198 | 200 | ||
@@ -202,7 +204,7 @@ static int vce_v2_0_early_init(void *handle) | |||
202 | static int vce_v2_0_sw_init(void *handle) | 204 | static int vce_v2_0_sw_init(void *handle) |
203 | { | 205 | { |
204 | struct amdgpu_ring *ring; | 206 | struct amdgpu_ring *ring; |
205 | int r; | 207 | int r, i; |
206 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 208 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
207 | 209 | ||
208 | /* VCE */ | 210 | /* VCE */ |
@@ -219,19 +221,14 @@ static int vce_v2_0_sw_init(void *handle) | |||
219 | if (r) | 221 | if (r) |
220 | return r; | 222 | return r; |
221 | 223 | ||
222 | ring = &adev->vce.ring[0]; | 224 | for (i = 0; i < adev->vce.num_rings; i++) { |
223 | sprintf(ring->name, "vce0"); | 225 | ring = &adev->vce.ring[i]; |
224 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, | 226 | sprintf(ring->name, "vce%d", i); |
225 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); | 227 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, |
226 | if (r) | 228 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); |
227 | return r; | 229 | if (r) |
228 | 230 | return r; | |
229 | ring = &adev->vce.ring[1]; | 231 | } |
230 | sprintf(ring->name, "vce1"); | ||
231 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, | ||
232 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); | ||
233 | if (r) | ||
234 | return r; | ||
235 | 232 | ||
236 | return r; | 233 | return r; |
237 | } | 234 | } |
@@ -254,29 +251,23 @@ static int vce_v2_0_sw_fini(void *handle) | |||
254 | 251 | ||
255 | static int vce_v2_0_hw_init(void *handle) | 252 | static int vce_v2_0_hw_init(void *handle) |
256 | { | 253 | { |
257 | struct amdgpu_ring *ring; | 254 | int r, i; |
258 | int r; | ||
259 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 255 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
260 | 256 | ||
261 | r = vce_v2_0_start(adev); | 257 | r = vce_v2_0_start(adev); |
258 | /* this error mean vcpu not in running state, so just skip ring test, not stop driver initialize */ | ||
262 | if (r) | 259 | if (r) |
263 | /* this error mean vcpu not in running state, so just skip ring test, not stop driver initialize */ | ||
264 | return 0; | 260 | return 0; |
265 | 261 | ||
266 | ring = &adev->vce.ring[0]; | 262 | for (i = 0; i < adev->vce.num_rings; i++) |
267 | ring->ready = true; | 263 | adev->vce.ring[i].ready = false; |
268 | r = amdgpu_ring_test_ring(ring); | ||
269 | if (r) { | ||
270 | ring->ready = false; | ||
271 | return r; | ||
272 | } | ||
273 | 264 | ||
274 | ring = &adev->vce.ring[1]; | 265 | for (i = 0; i < adev->vce.num_rings; i++) { |
275 | ring->ready = true; | 266 | r = amdgpu_ring_test_ring(&adev->vce.ring[i]); |
276 | r = amdgpu_ring_test_ring(ring); | 267 | if (r) |
277 | if (r) { | 268 | return r; |
278 | ring->ready = false; | 269 | else |
279 | return r; | 270 | adev->vce.ring[i].ready = true; |
280 | } | 271 | } |
281 | 272 | ||
282 | DRM_INFO("VCE initialized successfully.\n"); | 273 | DRM_INFO("VCE initialized successfully.\n"); |
@@ -618,8 +609,10 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = { | |||
618 | 609 | ||
619 | static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev) | 610 | static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev) |
620 | { | 611 | { |
621 | adev->vce.ring[0].funcs = &vce_v2_0_ring_funcs; | 612 | int i; |
622 | adev->vce.ring[1].funcs = &vce_v2_0_ring_funcs; | 613 | |
614 | for (i = 0; i < adev->vce.num_rings; i++) | ||
615 | adev->vce.ring[i].funcs = &vce_v2_0_ring_funcs; | ||
623 | } | 616 | } |
624 | 617 | ||
625 | static const struct amdgpu_irq_src_funcs vce_v2_0_irq_funcs = { | 618 | static const struct amdgpu_irq_src_funcs vce_v2_0_irq_funcs = { |
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c index 615b8b16ad04..27acd2862d8a 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | |||
@@ -345,6 +345,8 @@ static int vce_v3_0_early_init(void *handle) | |||
345 | (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) | 345 | (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) |
346 | return -ENOENT; | 346 | return -ENOENT; |
347 | 347 | ||
348 | adev->vce.num_rings = 2; | ||
349 | |||
348 | vce_v3_0_set_ring_funcs(adev); | 350 | vce_v3_0_set_ring_funcs(adev); |
349 | vce_v3_0_set_irq_funcs(adev); | 351 | vce_v3_0_set_irq_funcs(adev); |
350 | 352 | ||
@@ -355,7 +357,7 @@ static int vce_v3_0_sw_init(void *handle) | |||
355 | { | 357 | { |
356 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 358 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
357 | struct amdgpu_ring *ring; | 359 | struct amdgpu_ring *ring; |
358 | int r; | 360 | int r, i; |
359 | 361 | ||
360 | /* VCE */ | 362 | /* VCE */ |
361 | r = amdgpu_irq_add_id(adev, 167, &adev->vce.irq); | 363 | r = amdgpu_irq_add_id(adev, 167, &adev->vce.irq); |
@@ -371,19 +373,14 @@ static int vce_v3_0_sw_init(void *handle) | |||
371 | if (r) | 373 | if (r) |
372 | return r; | 374 | return r; |
373 | 375 | ||
374 | ring = &adev->vce.ring[0]; | 376 | for (i = 0; i < adev->vce.num_rings; i++) { |
375 | sprintf(ring->name, "vce0"); | 377 | ring = &adev->vce.ring[i]; |
376 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, | 378 | sprintf(ring->name, "vce%d", i); |
377 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); | 379 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, |
378 | if (r) | 380 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); |
379 | return r; | 381 | if (r) |
380 | 382 | return r; | |
381 | ring = &adev->vce.ring[1]; | 383 | } |
382 | sprintf(ring->name, "vce1"); | ||
383 | r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf, | ||
384 | &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE); | ||
385 | if (r) | ||
386 | return r; | ||
387 | 384 | ||
388 | return r; | 385 | return r; |
389 | } | 386 | } |
@@ -413,10 +410,10 @@ static int vce_v3_0_hw_init(void *handle) | |||
413 | if (r) | 410 | if (r) |
414 | return r; | 411 | return r; |
415 | 412 | ||
416 | adev->vce.ring[0].ready = false; | 413 | for (i = 0; i < adev->vce.num_rings; i++) |
417 | adev->vce.ring[1].ready = false; | 414 | adev->vce.ring[i].ready = false; |
418 | 415 | ||
419 | for (i = 0; i < 2; i++) { | 416 | for (i = 0; i < adev->vce.num_rings; i++) { |
420 | r = amdgpu_ring_test_ring(&adev->vce.ring[i]); | 417 | r = amdgpu_ring_test_ring(&adev->vce.ring[i]); |
421 | if (r) | 418 | if (r) |
422 | return r; | 419 | return r; |
@@ -800,8 +797,10 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_funcs = { | |||
800 | 797 | ||
801 | static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev) | 798 | static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev) |
802 | { | 799 | { |
803 | adev->vce.ring[0].funcs = &vce_v3_0_ring_funcs; | 800 | int i; |
804 | adev->vce.ring[1].funcs = &vce_v3_0_ring_funcs; | 801 | |
802 | for (i = 0; i < adev->vce.num_rings; i++) | ||
803 | adev->vce.ring[i].funcs = &vce_v3_0_ring_funcs; | ||
805 | } | 804 | } |
806 | 805 | ||
807 | static const struct amdgpu_irq_src_funcs vce_v3_0_irq_funcs = { | 806 | static const struct amdgpu_irq_src_funcs vce_v3_0_irq_funcs = { |