aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPaul Parsons <lost.distance@yahoo.com>2011-05-15 10:13:11 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2011-05-26 13:45:51 -0400
commit74e32d1b68f177f9c998041d789253df9c7f3575 (patch)
tree62b2d36ed8025f0034ef2fce1b1eaa98e9437180
parentd910774f13678caf68fc9cbbef325f08f7f951a3 (diff)
mfd: Fix ASIC3 SD Host Controller Configuration size
The size of the TC6380AF SD Host Controller Configuration area is 0x200 bytes (assuming registers are aligned on 32-bit boundaries), not 0x400 bytes. Source: Toshiba TC6380AF Specification sections 4.2 and 4.3.1 Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r--drivers/mfd/asic3.c3
-rw-r--r--include/linux/mfd/asic3.h1
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 52e56ea43a85..c27fd1fc3b86 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -856,7 +856,8 @@ static int __init asic3_mfd_probe(struct platform_device *pdev,
856 856
857 /* MMC */ 857 /* MMC */
858 asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> asic->bus_shift) + 858 asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> asic->bus_shift) +
859 mem_sdio->start, 0x400 >> asic->bus_shift); 859 mem_sdio->start,
860 ASIC3_SD_CONFIG_SIZE >> asic->bus_shift);
860 if (!asic->tmio_cnf) { 861 if (!asic->tmio_cnf) {
861 ret = -ENOMEM; 862 ret = -ENOMEM;
862 dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n"); 863 dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n");
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index d0dd3ebd8488..ed793b77a1c5 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -297,6 +297,7 @@ struct asic3_platform_data {
297 * 297 *
298 *****************************************************************************/ 298 *****************************************************************************/
299#define ASIC3_SD_CONFIG_BASE 0x0400 /* Assumes 32 bit addressing */ 299#define ASIC3_SD_CONFIG_BASE 0x0400 /* Assumes 32 bit addressing */
300#define ASIC3_SD_CONFIG_SIZE 0x0200 /* Assumes 32 bit addressing */
300#define ASIC3_SD_CTRL_BASE 0x1000 301#define ASIC3_SD_CTRL_BASE 0x1000
301#define ASIC3_SDIO_CTRL_BASE 0x1200 302#define ASIC3_SDIO_CTRL_BASE 0x1200
302 303