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authorVivien Didelot <vivien.didelot@savoirfairelinux.com>2016-09-29 12:21:55 -0400
committerDavid S. Miller <davem@davemloft.net>2016-09-30 01:25:59 -0400
commit6dc10bbc467d6f76e2665b865d0d8f9e0049b3e6 (patch)
treee67d28fbda8009a26c47f3a6bb959f3e74ccae32
parent9fe850fb219e3fb729277b11229c2943bc5096a9 (diff)
net: dsa: mv88e6xxx: add flags for FID registers
Add flags to describe the presence of Global 1 ATU FID register (0x01) and VTU FID register (0x02), instead of checking families. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/dsa/mv88e6xxx/chip.c16
-rw-r--r--drivers/net/dsa/mv88e6xxx/mv88e6xxx.h24
2 files changed, 23 insertions, 17 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 98dee2c63163..b7eecc957bcc 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -565,16 +565,6 @@ static unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip)
565 return chip->info->num_databases; 565 return chip->info->num_databases;
566} 566}
567 567
568static bool mv88e6xxx_has_fid_reg(struct mv88e6xxx_chip *chip)
569{
570 /* Does the device have dedicated FID registers for ATU and VTU ops? */
571 if (mv88e6xxx_6097_family(chip) || mv88e6xxx_6165_family(chip) ||
572 mv88e6xxx_6351_family(chip) || mv88e6xxx_6352_family(chip))
573 return true;
574
575 return false;
576}
577
578/* We expect the switch to perform auto negotiation if there is a real 568/* We expect the switch to perform auto negotiation if there is a real
579 * phy. However, in the case of a fixed link phy, we force the port 569 * phy. However, in the case of a fixed link phy, we force the port
580 * settings from the fixed link settings. 570 * settings from the fixed link settings.
@@ -978,7 +968,7 @@ static int _mv88e6xxx_atu_cmd(struct mv88e6xxx_chip *chip, u16 fid, u16 cmd)
978 u16 val; 968 u16 val;
979 int err; 969 int err;
980 970
981 if (mv88e6xxx_has_fid_reg(chip)) { 971 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G1_ATU_FID)) {
982 err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_FID, fid); 972 err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_FID, fid);
983 if (err) 973 if (err)
984 return err; 974 return err;
@@ -1386,7 +1376,7 @@ static int _mv88e6xxx_vtu_getnext(struct mv88e6xxx_chip *chip,
1386 if (err) 1376 if (err)
1387 return err; 1377 return err;
1388 1378
1389 if (mv88e6xxx_has_fid_reg(chip)) { 1379 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G1_VTU_FID)) {
1390 err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_FID, &val); 1380 err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_FID, &val);
1391 if (err) 1381 if (err)
1392 return err; 1382 return err;
@@ -1498,7 +1488,7 @@ static int _mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_chip *chip,
1498 return err; 1488 return err;
1499 } 1489 }
1500 1490
1501 if (mv88e6xxx_has_fid_reg(chip)) { 1491 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G1_VTU_FID)) {
1502 reg = entry->fid & GLOBAL_VTU_FID_MASK; 1492 reg = entry->fid & GLOBAL_VTU_FID_MASK;
1503 err = mv88e6xxx_g1_write(chip, GLOBAL_VTU_FID, reg); 1493 err = mv88e6xxx_g1_write(chip, GLOBAL_VTU_FID, reg);
1504 if (err) 1494 if (err)
diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
index 2f1010818a92..6c8584f14388 100644
--- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
+++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
@@ -170,8 +170,8 @@
170#define GLOBAL_MAC_01 0x01 170#define GLOBAL_MAC_01 0x01
171#define GLOBAL_MAC_23 0x02 171#define GLOBAL_MAC_23 0x02
172#define GLOBAL_MAC_45 0x03 172#define GLOBAL_MAC_45 0x03
173#define GLOBAL_ATU_FID 0x01 /* 6097 6165 6351 6352 */ 173#define GLOBAL_ATU_FID 0x01
174#define GLOBAL_VTU_FID 0x02 /* 6097 6165 6351 6352 */ 174#define GLOBAL_VTU_FID 0x02
175#define GLOBAL_VTU_FID_MASK 0xfff 175#define GLOBAL_VTU_FID_MASK 0xfff
176#define GLOBAL_VTU_SID 0x03 /* 6097 6165 6351 6352 */ 176#define GLOBAL_VTU_SID 0x03 /* 6097 6165 6351 6352 */
177#define GLOBAL_VTU_SID_MASK 0x3f 177#define GLOBAL_VTU_SID_MASK 0x3f
@@ -408,6 +408,11 @@ enum mv88e6xxx_cap {
408 */ 408 */
409 MV88E6XXX_CAP_SERDES, 409 MV88E6XXX_CAP_SERDES,
410 410
411 /* Switch Global (1) Registers.
412 */
413 MV88E6XXX_CAP_G1_ATU_FID, /* (0x01) ATU FID Register */
414 MV88E6XXX_CAP_G1_VTU_FID, /* (0x02) VTU FID Register */
415
411 /* Switch Global 2 Registers. 416 /* Switch Global 2 Registers.
412 * The device contains a second set of global 16-bit registers. 417 * The device contains a second set of global 16-bit registers.
413 */ 418 */
@@ -460,6 +465,9 @@ enum mv88e6xxx_cap {
460 465
461#define MV88E6XXX_FLAG_SERDES BIT_ULL(MV88E6XXX_CAP_SERDES) 466#define MV88E6XXX_FLAG_SERDES BIT_ULL(MV88E6XXX_CAP_SERDES)
462 467
468#define MV88E6XXX_FLAG_G1_ATU_FID BIT_ULL(MV88E6XXX_CAP_G1_ATU_FID)
469#define MV88E6XXX_FLAG_G1_VTU_FID BIT_ULL(MV88E6XXX_CAP_G1_VTU_FID)
470
463#define MV88E6XXX_FLAG_GLOBAL2 BIT_ULL(MV88E6XXX_CAP_GLOBAL2) 471#define MV88E6XXX_FLAG_GLOBAL2 BIT_ULL(MV88E6XXX_CAP_GLOBAL2)
464#define MV88E6XXX_FLAG_G2_MGMT_EN_2X BIT_ULL(MV88E6XXX_CAP_G2_MGMT_EN_2X) 472#define MV88E6XXX_FLAG_G2_MGMT_EN_2X BIT_ULL(MV88E6XXX_CAP_G2_MGMT_EN_2X)
465#define MV88E6XXX_FLAG_G2_MGMT_EN_0X BIT_ULL(MV88E6XXX_CAP_G2_MGMT_EN_0X) 473#define MV88E6XXX_FLAG_G2_MGMT_EN_0X BIT_ULL(MV88E6XXX_CAP_G2_MGMT_EN_0X)
@@ -519,7 +527,9 @@ enum mv88e6xxx_cap {
519 MV88E6XXX_FLAGS_MULTI_CHIP) 527 MV88E6XXX_FLAGS_MULTI_CHIP)
520 528
521#define MV88E6XXX_FLAGS_FAMILY_6097 \ 529#define MV88E6XXX_FLAGS_FAMILY_6097 \
522 (MV88E6XXX_FLAG_GLOBAL2 | \ 530 (MV88E6XXX_FLAG_G1_ATU_FID | \
531 MV88E6XXX_FLAG_G1_VTU_FID | \
532 MV88E6XXX_FLAG_GLOBAL2 | \
523 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ 533 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
524 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 534 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
525 MV88E6XXX_FLAG_G2_POT | \ 535 MV88E6XXX_FLAG_G2_POT | \
@@ -531,7 +541,9 @@ enum mv88e6xxx_cap {
531 MV88E6XXX_FLAGS_PVT) 541 MV88E6XXX_FLAGS_PVT)
532 542
533#define MV88E6XXX_FLAGS_FAMILY_6165 \ 543#define MV88E6XXX_FLAGS_FAMILY_6165 \
534 (MV88E6XXX_FLAG_GLOBAL2 | \ 544 (MV88E6XXX_FLAG_G1_ATU_FID | \
545 MV88E6XXX_FLAG_G1_VTU_FID | \
546 MV88E6XXX_FLAG_GLOBAL2 | \
535 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ 547 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
536 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 548 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
537 MV88E6XXX_FLAG_G2_SWITCH_MAC | \ 549 MV88E6XXX_FLAG_G2_SWITCH_MAC | \
@@ -570,6 +582,8 @@ enum mv88e6xxx_cap {
570 582
571#define MV88E6XXX_FLAGS_FAMILY_6351 \ 583#define MV88E6XXX_FLAGS_FAMILY_6351 \
572 (MV88E6XXX_FLAG_EDSA | \ 584 (MV88E6XXX_FLAG_EDSA | \
585 MV88E6XXX_FLAG_G1_ATU_FID | \
586 MV88E6XXX_FLAG_G1_VTU_FID | \
573 MV88E6XXX_FLAG_GLOBAL2 | \ 587 MV88E6XXX_FLAG_GLOBAL2 | \
574 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ 588 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
575 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 589 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
@@ -587,6 +601,8 @@ enum mv88e6xxx_cap {
587#define MV88E6XXX_FLAGS_FAMILY_6352 \ 601#define MV88E6XXX_FLAGS_FAMILY_6352 \
588 (MV88E6XXX_FLAG_EDSA | \ 602 (MV88E6XXX_FLAG_EDSA | \
589 MV88E6XXX_FLAG_EEE | \ 603 MV88E6XXX_FLAG_EEE | \
604 MV88E6XXX_FLAG_G1_ATU_FID | \
605 MV88E6XXX_FLAG_G1_VTU_FID | \
590 MV88E6XXX_FLAG_GLOBAL2 | \ 606 MV88E6XXX_FLAG_GLOBAL2 | \
591 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ 607 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
592 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 608 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \