Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...

333 files changed, 19552 insertions, 4367 deletions

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt
index 6b0f49f6f499..8608a776caa7 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt
@@ -5,4 +5,11 @@ Boards with the BCM4708 SoC shall have the following properties:
 
 Required root node property:
 
+bcm4708
 compatible = "brcm,bcm4708";
+
+bcm4709
+compatible = "brcm,bcm4709";
+
+bcm53012
+compatible = "brcm,bcm53012";
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
new file mode 100644
index 000000000000..677ef9d9f445
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
@@ -0,0 +1,39 @@
+Broadcom Northstar Plus SoC CPU Enable Method
+---------------------------------------------
+This binding defines the enable method used for starting secondary
+CPU in the following Broadcom SoCs:
+  BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
+
+The enable method is specified by defining the following required
+properties in the corresponding secondary "cpu" device tree node:
+  - enable-method = "brcm,bcm-nsp-smp";
+  - secondary-boot-reg = <...>;
+
+The secondary-boot-reg property is a u32 value that specifies the
+physical address of the register which should hold the common
+entry point for a secondary CPU. This entry is cpu node specific
+and should be added per cpu. E.g., in case of NSP (BCM58625) which
+is a dual core CPU SoC, this entry should be added to cpu1 node.
+
+
+Example:
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&L2>;
+                        reg = <0>;
+                };
+
+                cpu1: cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&L2>;
+                        enable-method = "brcm,bcm-nsp-smp";
+                        secondary-boot-reg = <0xffff042c>;
+                        reg = <1>;
+                };
+        };
diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt b/Documentation/devicetree/bindings/arm/compulab-boards.txt
new file mode 100644
index 000000000000..42a10285af9c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/compulab-boards.txt
@@ -0,0 +1,25 @@
+CompuLab SB-SOM is a multi-module baseboard capable of carrying:
+ - CM-T43
+ - CM-T54
+ - CM-QS600
+ - CL-SOM-AM57x
+ - CL-SOM-iMX7
+modules with minor modifications to the SB-SOM assembly.
+
+Required root node properties:
+    - compatible = should be "compulab,sb-som"
+
+Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on
+Freescale i.MX7 ARM Cortex-A7 System-on-Chip.
+
+Required root node properties:
+    - compatible = "compulab,cl-som-imx7", "fsl,imx7d";
+
+Compulab SBC-iMX7 is a single board computer based on the
+Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
+the CL-SOM-iMX7 System-on-Module providing most of the functions,
+and SB-SOM-iMX7 carrier board providing additional peripheral
+functions and connectors.
+
+Required root node properties:
+    - compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 9bddd9fc7b5a..ae9be074d09f 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -192,6 +192,7 @@ nodes to be present and contain the properties described below.
                             "allwinner,sun8i-a23"
                             "arm,psci"
                             "arm,realview-smp"
+                            "brcm,bcm-nsp-smp"
                             "brcm,brahma-b15"
                             "marvell,armada-375-smp"
                             "marvell,armada-380-smp"
diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
index 5171ad8f48ff..ab0c9cdf388e 100644
--- a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
@@ -24,6 +24,8 @@ board. Currently known boards are:
 "buffalo,lswxl"
 "buffalo,lsxhl"
 "buffalo,lsxl"
+"cloudengines,pogo02"
+"cloudengines,pogoplugv4"
 "dlink,dns-320"
 "dlink,dns-320-a1"
 "dlink,dns-325"
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
index 618a91994a18..54f43bc2df44 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek.txt
@@ -6,6 +6,7 @@ following property:
 Required root node property:
 
 compatible: Must contain one of
+   "mediatek,mt2701"
    "mediatek,mt6580"
    "mediatek,mt6589"
    "mediatek,mt6592"
@@ -17,6 +18,9 @@ compatible: Must contain one of
 
 Supported boards:
 
+- Evaluation board for MT2701:
+    Required root node properties:
+      - compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
 - Evaluation board for MT6580:
     Required root node properties:
       - compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580";
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
index f6cd3e4192ff..aaf8d1460c4d 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
@@ -18,7 +18,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h.
 Also it uses the common reset controller binding from
 Documentation/devicetree/bindings/reset/reset.txt.
 The available reset outputs are defined in
-dt-bindings/reset-controller/mt*-resets.h
+dt-bindings/reset/mt*-resets.h
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
index f25b85499a6f..2f6ff86df49f 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
@@ -18,7 +18,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h.
 Also it uses the common reset controller binding from
 Documentation/devicetree/bindings/reset/reset.txt.
 The available reset outputs are defined in
-dt-bindings/reset-controller/mt*-resets.h
+dt-bindings/reset/mt*-resets.h
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 9f4e5136e568..a2bd593881ca 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -138,9 +138,21 @@ Boards:
 - AM335X phyBOARD-WEGA: Single Board Computer dev kit
   compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"
 
+- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4
+  compatible = "compulab,cm-t335", "ti,am33xx"
+
+- AM335X SBC-T335 : single board computer, built around the Sitara AM3352/4
+  compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx"
+
 - OMAP5 EVM : Evaluation Module
   compatible = "ti,omap5-evm", "ti,omap5"
 
+- AM437x CM-T43
+  compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"
+
+- AM437x SBC-T43
+  compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"
+
 - AM43x EPOS EVM
   compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
 
@@ -150,6 +162,12 @@ Boards:
 - AM437x SK EVM: AM437x StarterKit Evaluation Module
   compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43"
 
+- AM57XX CL-SOM-AM57x
+  compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
+
+- AM57XX SBC-AM57x
+  compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
+
 - DRA742 EVM:  Software Development Board for DRA742
   compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
 
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 8e985dd2f181..c980b2b81227 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -1,6 +1,10 @@
 Rockchip platforms device tree bindings
 ---------------------------------------
 
+- Kylin RK3036 board:
+    Required root node properties:
+      - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";
+
 - MarsBoard RK3066 board:
     Required root node properties:
       - compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
@@ -35,6 +39,11 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "netxeon,r89", "rockchip,rk3288";
 
+- Google Brain (dev-board):
+    Required root node properties:
+      - compatible = "google,veyron-brain-rev0", "google,veyron-brain",
+                     "google,veyron", "rockchip,rk3288";
+
 - Google Jaq (Haier Chromebook 11 and more):
     Required root node properties:
       - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
@@ -49,6 +58,15 @@ Rockchip platforms device tree bindings
                      "google,veyron-jerry-rev3", "google,veyron-jerry",
                      "google,veyron", "rockchip,rk3288";
 
+- Google Mickey (Asus Chromebit CS10):
+    Required root node properties:
+      - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
+                     "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
+                     "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
+                     "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
+                     "google,veyron-mickey-rev0", "google,veyron-mickey",
+                     "google,veyron", "rockchip,rk3288";
+
 - Google Minnie (Asus Chromebook Flip C100P):
     Required root node properties:
       - compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
@@ -72,3 +90,7 @@ Rockchip platforms device tree bindings
 - Rockchip R88 board:
     Required root node properties:
       - compatible = "rockchip,r88", "rockchip,rk3368";
+
+- Rockchip RK3228 Evaluation board:
+    Required root node properties:
+      - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
diff --git a/Documentation/devicetree/bindings/arm/scu.txt b/Documentation/devicetree/bindings/arm/scu.txt
index c447680519bb..08a587875996 100644
--- a/Documentation/devicetree/bindings/arm/scu.txt
+++ b/Documentation/devicetree/bindings/arm/scu.txt
@@ -10,10 +10,13 @@ References:
   Revision r2p0
 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
   Revision r0p1
+- ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference
+  Manial Revision r2p0
 
 - compatible : Should be:
         "arm,cortex-a9-scu"
         "arm,cortex-a5-scu"
+        "arm,arm11mp-scu"
 
 - reg : Specify the base address and the size of the SCU register window.
 
diff --git a/Documentation/devicetree/bindings/arm/technologic.txt b/Documentation/devicetree/bindings/arm/technologic.txt
new file mode 100644
index 000000000000..842298894cf0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/technologic.txt
@@ -0,0 +1,6 @@
+Technologic Systems Platforms Device Tree Bindings
+--------------------------------------------------
+
+TS-4800 board
+Required root node properties:
+        - compatible = "technologic,imx51-ts4800", "fsl,imx51";
diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
new file mode 100644
index 000000000000..8b7177cecb36
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
@@ -0,0 +1,40 @@
+ARM System Controller ICST clocks
+
+The ICS525 and ICS307 oscillators are produced by Integrated Devices
+Technology (IDT). ARM integrated these oscillators deeply into their
+reference designs by adding special control registers that manage such
+oscillators to their system controllers.
+
+The ARM system controller contains logic to serialize and initialize
+an ICST clock request after a write to the 32 bit register at an offset
+into the system controller. Furthermore, to even be able to alter one of
+these frequencies, the system controller must first be unlocked by
+writing a special token to another offset in the system controller.
+
+The ICST oscillator must be provided inside a system controller node.
+
+Required properties:
+- lock-offset: the offset address into the system controller where the
+  unlocking register is located
+- vco-offset: the offset address into the system controller where the
+  ICST control register is located (even 32 bit address)
+- compatible: must be one of "arm,syscon-icst525" or "arm,syscon-icst307"
+- #clock-cells: must be <0>
+- clocks: parent clock, since the ICST needs a parent clock to derive its
+  frequency from, this attribute is compulsory.
+
+Example:
+
+syscon: syscon@10000000 {
+        compatible = "syscon";
+        reg = <0x10000000 0x1000>;
+
+        oscclk0: osc0@0c {
+                compatible = "arm,syscon-icst307";
+                #clock-cells = <0>;
+                lock-offset = <0x20>;
+                vco-offset = <0x0c>;
+                clocks = <&xtal24mhz>;
+        };
+        (...)
+};
diff --git a/Documentation/devicetree/bindings/clock/dove-divider-clock.txt b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt
new file mode 100644
index 000000000000..e3eb0f657c5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt
@@ -0,0 +1,28 @@
+PLL divider based Dove clocks
+
+Marvell Dove has a 2GHz PLL, which feeds into a set of dividers to provide
+high speed clocks for a number of peripherals.  These dividers are part of
+the PMU, and thus this node should be a child of the PMU node.
+
+The following clocks are provided:
+
+ID      Clock
+-------------
+0       AXI bus clock
+1       GPU clock
+2       VMeta clock
+3       LCD clock
+
+Required properties:
+- compatible : shall be "marvell,dove-divider-clock"
+- reg : shall be the register address of the Core PLL and Clock Divider
+   Control 0 register.  This will cover that register, as well as the
+   Core PLL and Clock Divider Control 1 register.  Thus, it will have
+   a size of 8.
+- #clock-cells : from common clock binding; shall be set to 1
+
+divider_clk: core-clock@0064 {
+        compatible = "marvell,dove-divider-clock";
+        reg = <0x0064 0x8>;
+        #clock-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
index 1fd8cf9cbfac..d474f59be6d6 100644
--- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
@@ -2,10 +2,9 @@ Device-Tree bindings for drm hdmi driver
 
 Required properties:
 - compatible: value should be one among the following:
-        1) "samsung,exynos5-hdmi" <DEPRECATED>
-        2) "samsung,exynos4210-hdmi"
-        3) "samsung,exynos4212-hdmi"
-        4) "samsung,exynos5420-hdmi"
+        1) "samsung,exynos4210-hdmi"
+        2) "samsung,exynos4212-hdmi"
+        3) "samsung,exynos5420-hdmi"
 - reg: physical base address of the hdmi and length of memory mapped
         region.
 - interrupts: interrupt number to the cpu.
diff --git a/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt b/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt
new file mode 100644
index 000000000000..70cd8d18d841
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt
@@ -0,0 +1,4 @@
+Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
+
+Required properties:
+- compatible: should be "startek,startek-kd050c"
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
index afef6a85ac51..b8e1674c7837 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
@@ -14,6 +14,7 @@ Required properties:
         "mediatek,mt6582-sysirq"
         "mediatek,mt6580-sysirq"
         "mediatek,mt6577-sysirq"
+        "mediatek,mt2701-sysirq"
 - interrupt-controller : Identifies the node as an interrupt controller
 - #interrupt-cells : Use the same format as specified by GIC in
   Documentation/devicetree/bindings/arm/gic.txt
diff --git a/Documentation/devicetree/bindings/regulator/tps65217.txt b/Documentation/devicetree/bindings/regulator/tps65217.txt
index 4f05d208c95c..d18109657da6 100644
--- a/Documentation/devicetree/bindings/regulator/tps65217.txt
+++ b/Documentation/devicetree/bindings/regulator/tps65217.txt
@@ -26,7 +26,11 @@ Example:
                 ti,pmic-shutdown-controller;
 
                 regulators {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
                         dcdc1_reg: dcdc1 {
+                                reg = <0>;
                                 regulator-min-microvolt = <900000>;
                                 regulator-max-microvolt = <1800000>;
                                 regulator-boot-on;
@@ -34,6 +38,7 @@ Example:
                         };
 
                         dcdc2_reg: dcdc2 {
+                                reg = <1>;
                                 regulator-min-microvolt = <900000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-boot-on;
@@ -41,6 +46,7 @@ Example:
                         };
 
                         dcdc3_reg: dcc3 {
+                                reg = <2>;
                                 regulator-min-microvolt = <900000>;
                                 regulator-max-microvolt = <1500000>;
                                 regulator-boot-on;
@@ -48,6 +54,7 @@ Example:
                         };
 
                         ldo1_reg: ldo1 {
+                                reg = <3>;
                                 regulator-min-microvolt = <1000000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-boot-on;
@@ -55,6 +62,7 @@ Example:
                         };
 
                         ldo2_reg: ldo2 {
+                                reg = <4>;
                                 regulator-min-microvolt = <900000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-boot-on;
@@ -62,6 +70,7 @@ Example:
                         };
 
                         ldo3_reg: ldo3 {
+                                reg = <5>;
                                 regulator-min-microvolt = <1800000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-boot-on;
@@ -69,6 +78,7 @@ Example:
                         };
 
                         ldo4_reg: ldo4 {
+                                reg = <6>;
                                 regulator-min-microvolt = <1800000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-boot-on;
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index 2d47add34765..a833a016f656 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -2,15 +2,15 @@
 
 Required properties:
 - compatible should contain:
-  * "mediatek,mt8135-uart" for MT8135 compatible UARTS
+  * "mediatek,mt2701-uart" for MT2701 compatible UARTS
+  * "mediatek,mt6580-uart" for MT6580 compatible UARTS
+  * "mediatek,mt6582-uart" for MT6582 compatible UARTS
+  * "mediatek,mt6589-uart" for MT6589 compatible UARTS
+  * "mediatek,mt6795-uart" for MT6795 compatible UARTS
   * "mediatek,mt8127-uart" for MT8127 compatible UARTS
+  * "mediatek,mt8135-uart" for MT8135 compatible UARTS
   * "mediatek,mt8173-uart" for MT8173 compatible UARTS
-  * "mediatek,mt6795-uart" for MT6795 compatible UARTS
-  * "mediatek,mt6589-uart" for MT6589 compatible UARTS
-  * "mediatek,mt6582-uart" for MT6582 compatible UARTS
-  * "mediatek,mt6580-uart" for MT6580 compatible UARTS
-  * "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6795,
-        MT6589, MT6582, MT6580, MT6577)
+  * "mediatek,mt6577-uart" for MT6577 and all of the above
 
 - reg: The base address of the UART register bank.
 
diff --git a/Documentation/devicetree/bindings/soc/dove/pmu.txt b/Documentation/devicetree/bindings/soc/dove/pmu.txt
new file mode 100644
index 000000000000..edd40b796b74
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/dove/pmu.txt
@@ -0,0 +1,56 @@
+Device Tree bindings for Marvell PMU
+
+Required properties:
+ - compatible: value should be "marvell,dove-pmu".
+    May also include "simple-bus" if there are child devices, in which
+    case the ranges node is required.
+ - reg: two base addresses and sizes of the PM controller and PMU.
+ - interrupts: single interrupt number for the PMU interrupt
+ - interrupt-controller: must be specified as the PMU itself is an
+    interrupt controller.
+ - #interrupt-cells: must be 1.
+ - #reset-cells: must be 1.
+ - domains: sub-node containing domain descriptions
+
+Optional properties:
+ - ranges: defines the address mapping for child devices, as per the
+   standard property of this name.  Required when compatible includes
+   "simple-bus".
+
+Power domain descriptions are listed as child nodes of the "domains"
+sub-node.  Each domain has the following properties:
+
+Required properties:
+ - #power-domain-cells: must be 0.
+
+Optional properties:
+ - marvell,pmu_pwr_mask: specifies the mask value for PMU power register
+ - marvell,pmu_iso_mask: specifies the mask value for PMU isolation register
+ - resets: points to the reset manager (PMU node) and reset index.
+
+Example:
+
+        pmu: power-management@d0000 {
+                compatible = "marvell,dove-pmu";
+                reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
+                interrupts = <33>;
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                #reset-cells = <1>;
+
+                domains {
+                        vpu_domain: vpu-domain {
+                                #power-domain-cells = <0>;
+                                marvell,pmu_pwr_mask = <0x00000008>;
+                                marvell,pmu_iso_mask = <0x00000001>;
+                                resets = <&pmu 16>;
+                        };
+
+                        gpu_domain: gpu-domain {
+                                #power-domain-cells = <0>;
+                                marvell,pmu_pwr_mask = <0x00000004>;
+                                marvell,pmu_iso_mask = <0x00000002>;
+                                resets = <&pmu 18>;
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index a6c8afc8385a..e8f15e34027f 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -21,6 +21,18 @@ Required properties:
                       These are the clocks which hardware needs to be enabled
                       before enabling certain power domains.
 
+Optional properties:
+- vdec-supply: Power supply for the vdec power domain
+- venc-supply: Power supply for the venc power domain
+- isp-supply: Power supply for the isp power domain
+- mm-supply: Power supply for the mm power domain
+- venc_lt-supply: Power supply for the venc_lt power domain
+- audio-supply: Power supply for the audio power domain
+- usb-supply: Power supply for the usb power domain
+- mfg_async-supply: Power supply for the mfg_async power domain
+- mfg_2d-supply: Power supply for the mfg_2d power domain
+- mfg-supply: Power supply for the mfg power domain
+
 Example:
 
         scpsys: scpsys@10006000 {
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
new file mode 100644
index 000000000000..5cc82b8353d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
@@ -0,0 +1,104 @@
+Qualcomm Shared Memory Point 2 Point binding
+
+The Shared Memory Point to Point (SMP2P) protocol facilitates communication of
+a single 32-bit value between two processors.  Each value has a single writer
+(the local side) and a single reader (the remote side).  Values are uniquely
+identified in the system by the directed edge (local processor ID to remote
+processor ID) and a string identifier.
+
+- compatible:
+        Usage: required
+        Value type: <string>
+        Definition: must be one of:
+                    "qcom,smp2p"
+
+- interrupts:
+        Usage: required
+        Value type: <prop-encoded-array>
+        Definition: one entry specifying the smp2p notification interrupt
+
+- qcom,ipc:
+        Usage: required
+        Value type: <prop-encoded-array>
+        Definition: three entries specifying the outgoing ipc bit used for
+                    signaling the remote end of the smp2p edge:
+                    - phandle to a syscon node representing the apcs registers
+                    - u32 representing offset to the register within the syscon
+                    - u32 representing the ipc bit within the register
+
+- qcom,smem:
+        Usage: required
+        Value type: <u32 array>
+        Definition: two identifiers of the inbound and outbound smem items used
+                    for this edge
+
+- qcom,local-pid:
+        Usage: required
+        Value type: <u32>
+        Definition: specifies the identfier of the local endpoint of this edge
+
+- qcom,remote-pid:
+        Usage: required
+        Value type: <u32>
+        Definition: specifies the identfier of the remote endpoint of this edge
+
+= SUBNODES
+Each SMP2P pair contain a set of inbound and outbound entries, these are
+described in subnodes of the smp2p device node. The node names are not
+important.
+
+- qcom,entry-name:
+        Usage: required
+        Value type: <string>
+        Definition: specifies the name of this entry, for inbound entries this
+                    will be used to match against the remotely allocated entry
+                    and for outbound entries this name is used for allocating
+                    entries
+
+- interrupt-controller:
+        Usage: required for incoming entries
+        Value type: <empty>
+        Definition: marks the entry as inbound; the node should be specified
+                    as a two cell interrupt-controller as defined in
+                    "../interrupt-controller/interrupts.txt"
+                    If not specified this node will denote the outgoing entry
+
+- #interrupt-cells:
+        Usage: required for incoming entries
+        Value type: <u32>
+        Definition: must be 2 - denoting the bit in the entry and IRQ flags
+
+- #qcom,state-cells:
+        Usage: required for outgoing entries
+        Value type: <u32>
+        Definition: must be 1 - denoting the bit in the entry
+
+= EXAMPLE
+The following example shows the SMP2P setup with the wireless processor,
+defined from the 8974 apps processor's point-of-view. It encompasses one
+inbound and one outbound entry:
+
+wcnss-smp2p {
+        compatible = "qcom,smp2p";
+        qcom,smem = <431>, <451>;
+
+        interrupts = <0 143 1>;
+
+        qcom,ipc = <&apcs 8 18>;
+
+        qcom,local-pid = <0>;
+        qcom,remote-pid = <4>;
+
+        wcnss_smp2p_out: master-kernel {
+                qcom,entry-name = "master-kernel";
+
+                #qcom,state-cells = <1>;
+        };
+
+        wcnss_smp2p_in: slave-kernel {
+                qcom,entry-name = "slave-kernel";
+
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
new file mode 100644
index 000000000000..a6634c70850d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
@@ -0,0 +1,104 @@
+Qualcomm Shared Memory State Machine
+
+The Shared Memory State Machine facilitates broadcasting of single bit state
+information between the processors in a Qualcomm SoC. Each processor is
+assigned 32 bits of state that can be modified. A processor can through a
+matrix of bitmaps signal subscription of notifications upon changes to a
+certain bit owned by a certain remote processor.
+
+- compatible:
+        Usage: required
+        Value type: <string>
+        Definition: must be one of:
+                    "qcom,smsm"
+
+- qcom,ipc-N:
+        Usage: required
+        Value type: <prop-encoded-array>
+        Definition: three entries specifying the outgoing ipc bit used for
+                    signaling the N:th remote processor
+                    - phandle to a syscon node representing the apcs registers
+                    - u32 representing offset to the register within the syscon
+                    - u32 representing the ipc bit within the register
+
+- qcom,local-host:
+        Usage: optional
+        Value type: <u32>
+        Definition: identifier of the local processor in the list of hosts, or
+                    in other words specifier of the column in the subscription
+                    matrix representing the local processor
+                    defaults to host 0
+
+- #address-cells:
+        Usage: required
+        Value type: <u32>
+        Definition: must be 1
+
+- #size-cells:
+        Usage: required
+        Value type: <u32>
+        Definition: must be 0
+
+= SUBNODES
+Each processor's state bits are described by a subnode of the smsm device node.
+Nodes can either be flagged as an interrupt-controller to denote a remote
+processor's state bits or the local processors bits.  The node names are not
+important.
+
+- reg:
+        Usage: required
+        Value type: <u32>
+        Definition: specifies the offset, in words, of the first bit for this
+                    entry
+
+- #qcom,state-cells:
+        Usage: required for local entry
+        Value type: <u32>
+        Definition: must be 1 - denotes bit number
+
+- interrupt-controller:
+        Usage: required for remote entries
+        Value type: <empty>
+        Definition: marks the entry as a interrupt-controller and the state bits
+                    to belong to a remote processor
+
+- #interrupt-cells:
+        Usage: required for remote entries
+        Value type: <u32>
+        Definition: must be 2 - denotes bit number and IRQ flags
+
+- interrupts:
+        Usage: required for remote entries
+        Value type: <prop-encoded-array>
+        Definition: one entry specifying remote IRQ used by the remote processor
+                    to signal changes of its state bits
+
+
+= EXAMPLE
+The following example shows the SMEM setup for controlling properties of the
+wireless processor, defined from the 8974 apps processor's point-of-view. It
+encompasses one outbound entry and the outgoing interrupt for the wireless
+processor.
+
+smsm {
+        compatible = "qcom,smsm";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        qcom,ipc-3 = <&apcs 8 19>;
+
+        apps_smsm: apps@0 {
+                reg = <0>;
+
+                #qcom,state-cells = <1>;
+        };
+
+        wcnss_smsm: wcnss@7 {
+                reg = <7>;
+                interrupts = <0 144 1>;
+
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt
index 601a360531a5..cc8304aa64ac 100644
--- a/Documentation/devicetree/bindings/spi/ti_qspi.txt
+++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt
@@ -15,14 +15,32 @@ Recommended properties:
 - spi-max-frequency: Definition as per
                      Documentation/devicetree/bindings/spi/spi-bus.txt
 
+Optional properties:
+- syscon-chipselects: Handle to system control region contains QSPI
+                      chipselect register and offset of that register.
+
 Example:
 
+For am4372:
 qspi: qspi@4b300000 {
-        compatible = "ti,dra7xxx-qspi";
-        reg = <0x47900000 0x100>, <0x30000000 0x3ffffff>;
+        compatible = "ti,am4372-qspi";
+        reg = <0x47900000 0x100>, <0x30000000 0x4000000>;
         reg-names = "qspi_base", "qspi_mmap";
         #address-cells = <1>;
         #size-cells = <0>;
         spi-max-frequency = <25000000>;
         ti,hwmods = "qspi";
 };
+
+For dra7xx:
+qspi: qspi@4b300000 {
+        compatible = "ti,dra7xxx-qspi";
+        reg = <0x4b300000 0x100>,
+              <0x5c000000 0x4000000>,
+        reg-names = "qspi_base", "qspi_mmap";
+        syscon-chipselects = <&scm_conf 0x558>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        spi-max-frequency = <48000000>;
+        ti,hwmods = "qspi";
+};
diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
index 64083bc5633c..8ff54eb464dc 100644
--- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -3,6 +3,7 @@ Mediatek MT6577, MT6572 and MT6589 Timers
 
 Required properties:
 - compatible should contain:
+        * "mediatek,mt2701-timer" for MT2701 compatible timers
         * "mediatek,mt6580-timer" for MT6580 compatible timers
         * "mediatek,mt6589-timer" for MT6589 compatible timers
         * "mediatek,mt8127-timer" for MT8127 compatible timers
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 084439d35747..72e2c5a2b327 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -124,6 +124,7 @@ jedec	JEDEC Solid State Technology Association
 karo    Ka-Ro electronics GmbH
 keymile Keymile GmbH
 kinetic Kinetic Technologies
+kosagi  Sutajio Ko-Usagi PTE Ltd.
 kyo     Kyocera Corporation
 lacie   LaCie
 lantiq  Lantiq Semiconductor
@@ -222,11 +223,13 @@ sony	Sony Corporation
 spansion        Spansion Inc.
 sprd    Spreadtrum Communications Inc.
 st      STMicroelectronics
+startek Startek
 ste     ST-Ericsson
 stericsson      ST-Ericsson
 synology        Synology, Inc.
 tbs     TBS Technologies
 tcl     Toby Churchill Ltd.
+technologic     Technologic Systems
 thine   THine Electronics, Inc.
 ti      Texas Instruments
 tlm     Trusted Logic Mobility
diff --git a/Documentation/devicetree/bindings/watchdog/meson6-wdt.txt b/Documentation/devicetree/bindings/watchdog/meson-wdt.txt
index 9200fc2d508c..ae70185d96e6 100644
--- a/Documentation/devicetree/bindings/watchdog/meson6-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/meson-wdt.txt
@@ -2,7 +2,7 @@ Meson SoCs Watchdog timer
 
 Required properties:
 
-- compatible : should be "amlogic,meson6-wdt"
+- compatible : should be "amlogic,meson6-wdt" or "amlogic,meson8b-wdt"
 - reg : Specifies base physical address and size of the registers.
 
 Example:
diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index af9eb5b8a253..6a00939a059a 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -2,7 +2,11 @@ Mediatek SoCs Watchdog timer
 
 Required properties:
 
-- compatible : should be "mediatek,mt6589-wdt"
+- compatible should contain:
+        * "mediatek,mt2701-wdt" for MT2701 compatible watchdog timers
+        * "mediatek,mt6589-wdt" for all compatible watchdog timers (MT2701,
+                MT6589)
+
 - reg : Specifies base physical address and size of the registers.
 
 Example:
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 30bbc3746130..a4a6d70e8b26 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -48,8 +48,10 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
         sama5d34ek.dtb \
         sama5d35ek.dtb \
         sama5d36ek.dtb \
+        at91-sama5d4_ma5d4evk.dtb \
         at91-sama5d4_xplained.dtb \
-        at91-sama5d4ek.dtb
+        at91-sama5d4ek.dtb \
+        at91-vinco.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
         atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
@@ -60,7 +62,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
         bcm2835-rpi-b.dtb \
         bcm2835-rpi-b-rev2.dtb \
         bcm2835-rpi-b-plus.dtb \
-        bcm2835-rpi-a-plus.dtb
+        bcm2835-rpi-a-plus.dtb \
+        bcm2836-rpi-2-b.dtb
 dtb-$(CONFIG_ARCH_BCM_5301X) += \
         bcm4708-asus-rt-ac56u.dtb \
         bcm4708-asus-rt-ac68u.dtb \
@@ -75,7 +78,10 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
         bcm4709-asus-rt-ac87u.dtb \
         bcm4709-buffalo-wxr-1900dhp.dtb \
         bcm4709-netgear-r7000.dtb \
-        bcm4709-netgear-r8000.dtb
+        bcm4709-netgear-r8000.dtb \
+        bcm94708.dtb \
+        bcm94709.dtb \
+        bcm953012k.dtb
 dtb-$(CONFIG_ARCH_BCM_63XX) += \
         bcm963138dvt.dtb
 dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
@@ -200,12 +206,14 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
         kirkwood-ns2mini.dtb \
         kirkwood-nsa310.dtb \
         kirkwood-nsa310a.dtb \
+        kirkwood-nsa325.dtb \
         kirkwood-openblocks_a6.dtb \
         kirkwood-openblocks_a7.dtb \
         kirkwood-openrd-base.dtb \
         kirkwood-openrd-client.dtb \
         kirkwood-openrd-ultimate.dtb \
         kirkwood-pogo_e02.dtb \
+        kirkwood-pogoplug-series-4.dtb \
         kirkwood-rd88f6192.dtb \
         kirkwood-rd88f6281-z0.dtb \
         kirkwood-rd88f6281-a.dtb \
@@ -268,7 +276,8 @@ dtb-$(CONFIG_SOC_IMX51) += \
         imx51-apf51dev.dtb \
         imx51-babbage.dtb \
         imx51-digi-connectcore-jsk.dtb \
-        imx51-eukrea-mbimxsd51-baseboard.dtb
+        imx51-eukrea-mbimxsd51-baseboard.dtb \
+        imx51-ts4800.dtb
 dtb-$(CONFIG_SOC_IMX53) += \
         imx53-ard.dtb \
         imx53-m53evk.dtb \
@@ -325,6 +334,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
         imx6q-hummingboard.dtb \
         imx6q-nitrogen6x.dtb \
         imx6q-nitrogen6_max.dtb \
+        imx6q-novena.dtb \
         imx6q-phytec-pbab01.dtb \
         imx6q-rex-pro.dtb \
         imx6q-sabreauto.dtb \
@@ -350,6 +360,8 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
 dtb-$(CONFIG_SOC_IMX6UL) += \
         imx6ul-14x14-evk.dtb
 dtb-$(CONFIG_SOC_IMX7D) += \
+        imx7d-cl-som-imx7.dtb \
+        imx7d-sbc-imx7.dtb \
         imx7d-sdb.dtb
 dtb-$(CONFIG_SOC_LS1021A) += \
         ls1021a-qds.dtb \
@@ -359,6 +371,7 @@ dtb-$(CONFIG_SOC_VF610) += \
         vf610-colibri-eval-v3.dtb \
         vf610m4-colibri.dtb \
         vf610-cosmic.dtb \
+        vf610m4-cosmic.dtb \
         vf610-twr.dtb
 dtb-$(CONFIG_ARCH_MXS) += \
         imx23-evk.dtb \
@@ -452,20 +465,24 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
 dtb-$(CONFIG_SOC_TI81XX) += \
         dm8148-evm.dtb \
         dm8148-t410.dtb \
-        dm8168-evm.dtb
+        dm8168-evm.dtb \
+        dra62x-j5eco-evm.dtb
 dtb-$(CONFIG_SOC_AM33XX) += \
         am335x-baltos-ir5221.dtb \
         am335x-base0033.dtb \
         am335x-bone.dtb \
         am335x-boneblack.dtb \
         am335x-bonegreen.dtb \
-        am335x-sl50.dtb \
+        am335x-chiliboard.dtb \
+        am335x-cm-t335.dtb \
         am335x-evm.dtb \
         am335x-evmsk.dtb \
+        am335x-lxm.dtb \
         am335x-nano.dtb \
         am335x-pepper.dtb \
-        am335x-lxm.dtb \
-        am335x-chiliboard.dtb \
+        am335x-shc.dtb \
+        am335x-sbc-t335.dtb \
+        am335x-sl50.dtb \
         am335x-wega-rdk.dtb
 dtb-$(CONFIG_ARCH_OMAP4) += \
         omap4-duovero-parlor.dtb \
@@ -478,17 +495,21 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
         omap4-var-stk-om44.dtb
 dtb-$(CONFIG_SOC_AM43XX) += \
         am43x-epos-evm.dtb \
-        am437x-sk-evm.dtb \
+        am437x-cm-t43.dtb \
+        am437x-gp-evm.dtb \
         am437x-idk-evm.dtb \
-        am437x-gp-evm.dtb
+        am437x-sbc-t43.dtb \
+        am437x-sk-evm.dtb
 dtb-$(CONFIG_SOC_OMAP5) += \
         omap5-cm-t54.dtb \
         omap5-igep0050.dtb \
         omap5-sbc-t54.dtb \
         omap5-uevm.dtb
 dtb-$(CONFIG_SOC_DRA7XX) += \
-        dra7-evm.dtb \
         am57xx-beagle-x15.dtb \
+        am57xx-cl-som-am57x.dtb \
+        am57xx-sbc-am57x.dtb \
+        dra7-evm.dtb \
         dra72-evm.dtb
 dtb-$(CONFIG_ARCH_ORION5X) += \
         orion5x-lacie-d2-network.dtb \
@@ -502,6 +523,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \
 dtb-$(CONFIG_ARCH_QCOM) += \
         qcom-apq8064-cm-qs600.dtb \
         qcom-apq8064-ifc6410.dtb \
+        qcom-apq8064-sony-xperia-yuga.dtb \
         qcom-apq8074-dragonboard.dtb \
         qcom-apq8084-ifc6540.dtb \
         qcom-apq8084-mtp.dtb \
@@ -510,12 +532,16 @@ dtb-$(CONFIG_ARCH_QCOM) += \
         qcom-msm8960-cdp.dtb \
         qcom-msm8974-sony-xperia-honami.dtb
 dtb-$(CONFIG_ARCH_REALVIEW) += \
-        arm-realview-pb1176.dtb
+        arm-realview-pb1176.dtb \
+        arm-realview-pb11mp.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+        rk3036-evb.dtb \
+        rk3036-kylin.dtb \
         rk3066a-bqcurie2.dtb \
         rk3066a-marsboard.dtb \
         rk3066a-rayeager.dtb \
         rk3188-radxarock.dtb \
+        rk3228-evb.dtb \
         rk3288-evb-act8846.dtb \
         rk3288-evb-rk808.dtb \
         rk3288-firefly-beta.dtb \
@@ -523,8 +549,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
         rk3288-popmetal.dtb \
         rk3288-r89.dtb \
         rk3288-rock2-square.dtb \
+        rk3288-veyron-brain.dtb \
         rk3288-veyron-jaq.dtb \
         rk3288-veyron-jerry.dtb \
+        rk3288-veyron-mickey.dtb \
         rk3288-veyron-minnie.dtb \
         rk3288-veyron-pinky.dtb \
         rk3288-veyron-speedy.dtb
@@ -547,7 +575,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
         r8a7778-bockw.dtb \
         r8a7779-marzen.dtb \
         r8a7790-lager.dtb \
-        r8a7791-henninger.dtb \
         r8a7791-koelsch.dtb \
         r8a7791-porter.dtb \
         r8a7793-gose.dtb \
@@ -557,6 +584,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
         socfpga_arria5_socdk.dtb \
         socfpga_arria10_socdk_sdmmc.dtb \
+        socfpga_cyclone5_mcvevk.dtb \
         socfpga_cyclone5_socdk.dtb \
         socfpga_cyclone5_de0_sockit.dtb \
         socfpga_cyclone5_sockit.dtb \
@@ -612,6 +640,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
         sun5i-a10s-olinuxino-micro.dtb \
         sun5i-a10s-r7-tv-dongle.dtb \
         sun5i-a10s-wobo-i5.dtb \
+        sun5i-a13-empire-electronix-d709.dtb \
         sun5i-a13-hsg-h702.dtb \
         sun5i-a13-inet-98v-rev2.dtb \
         sun5i-a13-olinuxino.dtb \
@@ -638,6 +667,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
         sun7i-a20-cubietruck.dtb \
         sun7i-a20-hummingbird.dtb \
         sun7i-a20-i12-tvbox.dtb \
+        sun7i-a20-icnova-swac.dtb \
         sun7i-a20-m3.dtb \
         sun7i-a20-mk808c.dtb \
         sun7i-a20-olimex-som-evb.dtb \
@@ -660,10 +690,13 @@ dtb-$(CONFIG_MACH_SUN8I) += \
         sun8i-a33-ga10h-v1.1.dtb \
         sun8i-a33-ippo-q8h-v1.2.dtb \
         sun8i-a33-q8-tablet.dtb \
-        sun8i-a33-sinlinx-sina33.dtb
+        sun8i-a33-sinlinx-sina33.dtb \
+        sun8i-h3-orangepi-plus.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
         sun9i-a80-optimus.dtb \
         sun9i-a80-cubieboard4.dtb
+dtb-$(CONFIG_ARCH_TANGO) += \
+        tango4-vantage-1172.dtb
 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
         tegra20-harmony.dtb \
         tegra20-iris-512.dtb \
@@ -748,6 +781,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
         armada-385-db-ap.dtb \
         armada-385-linksys-caiman.dtb \
         armada-385-linksys-cobra.dtb \
+        armada-388-clearfog.dtb \
         armada-388-db.dtb \
         armada-388-gp.dtb \
         armada-388-rd.dtb
@@ -771,6 +805,7 @@ dtb-$(CONFIG_MACH_DOVE) += \
         dove-dove-db.dtb \
         dove-sbc-a510.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
+        mt2701-evb.dtb \
         mt6580-evbp1.dtb \
         mt6589-aquaris5.dtb \
         mt6592-evb.dtb \
diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
index 7d36601697da..ded1eb64ea52 100644
--- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts
+++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts
@@ -56,175 +56,171 @@
 &am33xx_pinmux {
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x020 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad8.mmc1_dat0_mux0 */
-                        0x024 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad9.mmc1_dat1_mux0 */
-                        0x028 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad10.mmc1_dat2_mux0 */
-                        0x02c (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad11.mmc1_dat3_mux0 */
-                        0x080 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn1.mmc1_clk_mux0 */
-                        0x084 (PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn2.mmc1_cmd_mux0 */
-                        0x1e4 (PIN_INPUT_PULLUP | MUX_MODE7)      /* emu0.gpio3[7] */
+                        AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad8.mmc1_dat0_mux0 */
+                        AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad9.mmc1_dat1_mux0 */
+                        AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad10.mmc1_dat2_mux0 */
+                        AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_ad11.mmc1_dat3_mux0 */
+                        AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn1.mmc1_clk_mux0 */
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)      /* gpmc_csn2.mmc1_cmd_mux0 */
+                        AM33XX_IOPAD(0x9e4, PIN_INPUT_PULLUP | MUX_MODE7)      /* emu0.gpio3[7] */
                 >;
         };
 
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0x1e8 (PIN_OUTPUT_PULLUP | MUX_MODE7)      /* emu1.gpio3[8] */
+                        AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* emu1.gpio3[8] */
                 >;
         };
 
         tps65910_pins: pinmux_tps65910_pins {
                 pinctrl-single,pins = <
-                        0x078 (PIN_INPUT_PULLUP | MUX_MODE7)      /* gpmc_ben1.gpio1[28] */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE7)      /* gpmc_ben1.gpio1[28] */
                 >;
         };
 
         tca6416_pins: pinmux_tca6416_pins {
                 pinctrl-single,pins = <
-                        0x1b4 (PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
+                        AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x158 0x2a      /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
-                        0x15c 0x2a      /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
+                        AM33XX_IOPAD(0x958, PIN_INPUT | MUX_MODE2)      /* spi0_d1.i2c1_sda_mux3 */
+                        AM33XX_IOPAD(0x95c, PIN_INPUT | MUX_MODE2)      /* spi0_cs0.i2c1_scl_mux3 */
                 >;
         };
 
         dcan1_pins: pinmux_dcan1_pins {
                 pinctrl-single,pins = <
-                        0x168 0x0a      /* uart0_ctsn.dcan1_tx_mux0, OUTPUT | MODE2 */
-                        0x16c 0x2a      /* uart0_rtsn.dcan1_rx_mux0, INPUT | MODE2 */
+                        AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2)      /* uart0_ctsn.dcan1_tx_mux0 */
+                        AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE2)      /* uart0_rtsn.dcan1_rx_mux0 */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)         /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)            /* uart0_txd.uart0_txd */
                 >;
         };
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x180 0x28      /* uart1_rxd, INPUT | MODE0 */
-                        0x184 0x28      /* uart1_txd, INPUT | MODE0 */
-                        /*0x178 0x28*/      /* uart1_ctsn, INPUT | MODE0 */
-                        /*0x17c 0x08*/      /* uart1_rtsn, OUTPUT | MODE0 */
-                        0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* uart1_ctsn, INPUT | MODE0 */
-                        0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* uart1_rtsn, OUTPUT | MODE0 */
-                        0x0e0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
-                        0x0e4 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
-                        0x0e8 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
-                        0x0ec (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
+                        AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)      /* uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0)      /* uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* uart1_ctsn, INPUT | MODE0 */
+                        AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* uart1_rtsn, OUTPUT | MODE0 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
+                        AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
+                        AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
+                        AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
                 >;
         };
 
         uart2_pins: pinmux_uart2_pins {
                 pinctrl-single,pins = <
-                        0x150 0x29      /* spi0_sclk.uart2_rxd_mux3, INPUT | MODE1 */
-                        0x154 0x09      /* spi0_d0.uart2_txd_mux3, OUTPUT | MODE1 */
-                        /*0x188 0x2a*/      /* i2c0_sda.uart2_ctsn_mux0, INPUT | MODE2 */
-                        /*0x18c 0x2a*/      /* i2c0_scl.uart2_rtsn_mux0, INPUT | MODE2 */
-                        0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* i2c0_sda.uart2_ctsn_mux0 */
-                        0x18c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* i2c0_scl.uart2_rtsn_mux0 */
-                        0x030 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
-                        0x034 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
-                        0x038 (PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
-                        0x03c (PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
-
-                        0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
+                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
+                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* i2c0_sda.uart2_ctsn_mux0 */
+                        AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* i2c0_scl.uart2_rtsn_mux0 */
+                        AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
+                        AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
+                        AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
+                        AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
+
+                        AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)       /* mii1_crs.rmii1_crs_dv */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_tx_en.rmii1_txen */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd1.rmii1_txd1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd0.rmii1_txd0 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd1.rmii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd0.rmii1_rxd0 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)      /* rmii1_ref_clk.rmii1_refclk */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)       /* mii1_crs.rmii1_crs_dv */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_tx_en.rmii1_txen */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd1.rmii1_txd1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd0.rmii1_txd0 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd1.rmii1_rxd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd0.rmii1_rxd0 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* rmii1_ref_clk.rmii1_refclk */
 
 
                         /* Slave 2 */
-                        0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a0.rgmii2_tctl */
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a1.rgmii2_rctl */
-                        0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a2.rgmii2_td3 */
-                        0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a3.rgmii2_td2 */
-                        0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a4.rgmii2_td1 */
-                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a5.rgmii2_td0 */
-                        0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a6.rgmii2_tclk */
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a7.rgmii2_rclk */
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a8.rgmii2_rd3 */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a9.rgmii2_rd2 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a10.rgmii2_rd1 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a11.rgmii2_rd0 */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a0.rgmii2_tctl */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a1.rgmii2_rctl */
+                        AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a2.rgmii2_td3 */
+                        AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a3.rgmii2_td2 */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a4.rgmii2_td1 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a5.rgmii2_td0 */
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a6.rgmii2_tclk */
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a7.rgmii2_rclk */
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a8.rgmii2_rd3 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a9.rgmii2_rd2 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a10.rgmii2_rd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a11.rgmii2_rd0 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 
                         /* Slave 2 reset value*/
-                        0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         nandflash_pins_s0: nandflash_pins_s0 {
                 pinctrl-single,pins = <
-                        0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
-                        0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
-                        0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
-                        0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
-                        0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
-                        0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_wpn.gpio0_30 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 5d370d54bd30..f3db13d2d90e 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -67,112 +67,112 @@
 
         user_leds_s0: user_leds_s0 {
                 pinctrl-single,pins = <
-                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
-                        0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a6.gpio1_22 */
-                        0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a7.gpio1_23 */
-                        0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a8.gpio1_24 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a5.gpio1_21 */
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a6.gpio1_22 */
+                        AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a7.gpio1_23 */
+                        AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a8.gpio1_24 */
                 >;
         };
 
         i2c0_pins: pinmux_i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
-                        0x178 (PIN_INPUT_PULLUP | MUX_MODE3)    /* uart1_ctsn.i2c2_sda */
-                        0x17c (PIN_INPUT_PULLUP | MUX_MODE3)    /* uart1_rtsn.i2c2_scl */
+                        AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_ctsn.i2c2_sda */
+                        AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_rtsn.i2c2_scl */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
 
         clkout2_pin: pinmux_clkout2_pin {
                 pinctrl-single,pins = <
-                        0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+                        AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxerr.mii1_rxerr */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
-                        0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxdv.mii1_rxdv */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
-                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_txclk.mii1_txclk */
-                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxclk.mii1_rxclk */
-                        0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd3.mii1_rxd3 */
-                        0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd2.mii1_rxd2 */
-                        0x13c (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd1.mii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd0.mii1_rxd0 */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxerr.mii1_rxerr */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txen.mii1_txen */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxdv.mii1_rxdv */
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd3.mii1_txd3 */
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd2.mii1_txd2 */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd1.mii1_txd1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd0.mii1_txd0 */
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_txclk.mii1_txclk */
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxclk.mii1_rxclk */
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd3.mii1_rxd3 */
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd2.mii1_rxd2 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd1.mii1_rxd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd0.mii1_rxd0 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
                 >;
         };
 
         emmc_pins: pinmux_emmc_pins {
                 pinctrl-single,pins = <
-                        0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
-                        0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
-                        0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
-                        0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
-                        0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
-                        0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+                        AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
                 >;
         };
 };
@@ -285,10 +285,8 @@
         };
 };
 
-
-/include/ "tps65217.dtsi"
-
 &tps {
+        compatible = "ti,tps65217";
         /*
          * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
          * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
@@ -309,12 +307,17 @@
         ti,pmic-shutdown-controller;
 
         regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 dcdc1_reg: regulator@0 {
+                        reg = <0>;
                         regulator-name = "vdds_dpr";
                         regulator-always-on;
                 };
 
                 dcdc2_reg: regulator@1 {
+                        reg = <1>;
                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
                         regulator-name = "vdd_mpu";
                         regulator-min-microvolt = <925000>;
@@ -324,6 +327,7 @@
                 };
 
                 dcdc3_reg: regulator@2 {
+                        reg = <2>;
                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
                         regulator-name = "vdd_core";
                         regulator-min-microvolt = <925000>;
@@ -333,21 +337,25 @@
                 };
 
                 ldo1_reg: regulator@3 {
+                        reg = <3>;
                         regulator-name = "vio,vrtc,vdds";
                         regulator-always-on;
                 };
 
                 ldo2_reg: regulator@4 {
+                        reg = <4>;
                         regulator-name = "vdd_3v3aux";
                         regulator-always-on;
                 };
 
                 ldo3_reg: regulator@5 {
+                        reg = <5>;
                         regulator-name = "vdd_1v8";
                         regulator-always-on;
                 };
 
                 ldo4_reg: regulator@6 {
+                        reg = <6>;
                         regulator-name = "vdd_3v3a";
                         regulator-always-on;
                 };
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index eadbba32386d..55c0e954b146 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -36,32 +36,32 @@
 &am33xx_pinmux {
         nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
                 pinctrl-single,pins = <
-                        0x1b0 0x03      /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
-                        0xa0 0x08       /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xa4 0x08       /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xa8 0x08       /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xac 0x08       /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xb0 0x08       /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xb4 0x08       /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xb8 0x08       /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xbc 0x08       /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xc0 0x08       /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xc4 0x08       /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xc8 0x08       /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xcc 0x08       /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xd0 0x08       /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xd4 0x08       /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xd8 0x08       /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xdc 0x08       /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
-                        0xe0 0x00       /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
-                        0xe4 0x00       /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
-                        0xe8 0x00       /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
-                        0xec 0x00       /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
+                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_ac_bias_en.lcd_ac_bias_en */
                 >;
         };
         nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
                 pinctrl-single,pins = <
-                        0x1b0 0x03      /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
+                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
index 0f65bdaaa583..dce3c8657e04 100644
--- a/arch/arm/boot/dts/am335x-bonegreen.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
@@ -36,8 +36,8 @@
 &am33xx_pinmux {
         uart2_pins: uart2_pins {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT | MUX_MODE1)   /* spi0_sclk.uart2_rxd */
-                        0x154 (PIN_OUTPUT | MUX_MODE1)  /* spi0_d0.uart2_txd */
+                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd */
+                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)     /* spi0_d0.uart2_txd */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-chiliboard.dts b/arch/arm/boot/dts/am335x-chiliboard.dts
index 310da20a8aa7..15d47ab28865 100644
--- a/arch/arm/boot/dts/am335x-chiliboard.dts
+++ b/arch/arm/boot/dts/am335x-chiliboard.dts
@@ -37,26 +37,26 @@
 &am33xx_pinmux {
         usb1_drvvbus: usb1_drvvbus {
                 pinctrl-single,pins = <
-                        0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
+                        AM33XX_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
                 >;
         };
 
         sd_pins: pinmux_sd_card {
                 pinctrl-single,pins = <
-                        0xf0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
-                        0xf4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
-                        0xf8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
-                        0xfc (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
-                        0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         led_gpio_pins: led_gpio_pins {
                 pinctrl-single,pins = <
-                        0x1e4 (PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */
-                        0x1e8 (PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */
+                        AM33XX_IOPAD(0x9e4, PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */
+                        AM33XX_IOPAD(0x9e8, PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index 7e9a34dffe21..fda457b07e15 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -29,81 +29,81 @@
 
         i2c0_pins: pinmux_i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE1)    /* mii1_rxerr.rmii1_rxerr */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
-                        0x13c (PIN_INPUT_PULLUP | MUX_MODE1)    /* mii1_rxd1.rmii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLUP | MUX_MODE1)    /* mii1_rxd0.rmii1_rxd0 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_ref_clk.rmii_ref_clk */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1)       /* mii1_rxerr.rmii1_rxerr */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txen.rmii1_txen */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd1.rmii1_txd1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd0.rmii1_txd0 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1)       /* mii1_rxd1.rmii1_rxd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1)       /* mii1_rxd0.rmii1_rxd0 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_ref_clk.rmii_ref_clk */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* mdio_data.mdio_data */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
                         /* mdio_clk.mdio_clk */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         nandflash_pins: nandflash_pins {
                 pinctrl-single,pins = <
-                        0x00 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad0.gpmc_ad0 */
-                        0x04 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad1.gpmc_ad1 */
-                        0x08 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad2.gpmc_ad2 */
-                        0x0c (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad7.gpmc_ad7 */
-
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x7c (PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_csn0.gpmc_csn0 */
-                        0x90 (PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_be0n_cle.gpmc_be0n_cle */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)      /* gpmc_csn0.gpmc_csn0 */
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLUP | MUX_MODE0)      /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLUP | MUX_MODE0)      /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLUP | MUX_MODE0)      /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLUP | MUX_MODE0)      /* gpmc_be0n_cle.gpmc_be0n_cle */
                 >;
         };
 };
@@ -128,16 +128,21 @@
 
 };
 
-/include/ "tps65217.dtsi"
-
 &tps {
+        compatible = "ti,tps65217";
+
         regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 dcdc1_reg: regulator@0 {
+                        reg = <0>;
                         regulator-name = "vdds_dpr";
                         regulator-always-on;
                 };
 
                 dcdc2_reg: regulator@1 {
+                        reg = <1>;
                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
                         regulator-name = "vdd_mpu";
                         regulator-min-microvolt = <925000>;
@@ -147,6 +152,7 @@
                 };
 
                 dcdc3_reg: regulator@2 {
+                        reg = <2>;
                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
                         regulator-name = "vdd_core";
                         regulator-min-microvolt = <925000>;
@@ -156,24 +162,28 @@
                 };
 
                 ldo1_reg: regulator@3 {
+                        reg = <3>;
                         regulator-name = "vio,vrtc,vdds";
                         regulator-boot-on;
                         regulator-always-on;
                 };
 
                 ldo2_reg: regulator@4 {
+                        reg = <4>;
                         regulator-name = "vdd_3v3aux";
                         regulator-boot-on;
                         regulator-always-on;
                 };
 
                 ldo3_reg: regulator@5 {
+                        reg = <5>;
                         regulator-name = "vdd_1v8";
                         regulator-boot-on;
                         regulator-always-on;
                 };
 
                 ldo4_reg: regulator@6 {
+                        reg = <6>;
                         regulator-name = "vdd_3v3d";
                         regulator-boot-on;
                         regulator-always-on;
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
new file mode 100644
index 000000000000..42e9b665582a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -0,0 +1,396 @@
+/*
+ * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
+ *
+ * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+
+/ {
+        model = "CompuLab CM-T335";
+        compatible = "compulab,cm-t335", "ti,am33xx";
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x8000000>;   /* 128 MB */
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&gpio_led_pins>;
+                led@0 {
+                        label = "cm_t335:green";
+                        gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;     /* gpio2_0 */
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        /* regulator for mmc */
+        vmmc_fixed: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmc_fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        backlight {
+                compatible = "pwm-backlight";
+                pwms = <&ecap0 0 50000 0>;
+                brightness-levels = <0 51 53 56 62 75 101 152 255>;
+                default-brightness-level = <8>;
+        };
+};
+
+&am33xx_pinmux {
+        pinctrl-names = "default";
+        pinctrl-0 = <&bluetooth_pins>;
+
+        i2c0_pins: pinmux_i2c0_pins {
+                pinctrl-single,pins = <
+                        /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
+                >;
+        };
+
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        /* uart0_ctsn.i2c1_sda */
+                        AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE2)
+                        /* uart0_rtsn.i2c1_scl */
+                        AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2)
+                >;
+        };
+
+        gpio_led_pins: pinmux_gpio_led_pins {
+                pinctrl-single,pins = <
+                        /* gpmc_csn3.gpio2_0 */
+                        AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE7)
+                >;
+        };
+
+        nandflash_pins: pinmux_nandflash_pins {
+                pinctrl-single,pins = <
+                        /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_ad7.gpmc_ad7 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* gpmc_wpn.gpio0_30 */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)
+                        /* gpmc_csn0.gpmc_csn0  */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
+                        /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
+                        /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
+                        /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
+                        /* gpmc_ben0_cle.gpmc_ben0_cle */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
+                >;
+        };
+
+        uart0_pins: pinmux_uart0_pins {
+                pinctrl-single,pins = <
+                        /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+
+        uart1_pins: pinmux_uart1_pins {
+                pinctrl-single,pins = <
+                        /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)
+                        /* uart1_rtsn.uart1_rtsn */
+                        AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+
+        ecap0_pins: pinmux_ecap0_pins {
+                pinctrl-single,pins = <
+                        /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+                        AM33XX_IOPAD(0x964, 0x0)
+                >;
+        };
+
+        cpsw_default: cpsw_default {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        /* mii1_tx_en.rgmii1_tctl */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxdv.rgmii1_rctl */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_txd3.rgmii1_td3 */
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_txd2.rgmii1_td2 */
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_txd1.rgmii1_td1 */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_txd0.rgmii1_td0 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_txclk.rgmii1_tclk */
+                        AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxclk.rgmii1_rclk */
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxd3.rgmii1_rd3 */
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxd2.rgmii1_rd2 */
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxd1.rgmii1_rd1 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                        /* mii1_rxd0.rgmii1_rd0 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)
+                >;
+        };
+
+        cpsw_sleep: cpsw_sleep {
+                pinctrl-single,pins = <
+                        /* Slave 1 reset value */
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                >;
+        };
+
+        davinci_mdio_default: davinci_mdio_default {
+                pinctrl-single,pins = <
+                        /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
+                        /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                >;
+        };
+
+        davinci_mdio_sleep: davinci_mdio_sleep {
+                pinctrl-single,pins = <
+                        /* MDIO reset value */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                >;
+        };
+
+        mmc1_pins: pinmux_mmc1_pins {
+                pinctrl-single,pins = <
+                        /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
+                        /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
+                >;
+        };
+
+        /* wl1271 bluetooth */
+        bluetooth_pins: pinmux_bluetooth_pins {
+                pinctrl-single,pins = <
+                        /* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
+                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE7)
+                >;
+        };
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins>;
+
+        status = "okay";
+};
+
+/* WLS1271 bluetooth */
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+
+status = "okay";
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins>;
+
+        status = "okay";
+        clock-frequency = <400000>;
+        /* CM-T335 board EEPROM */
+        eeprom: 24c02@50 {
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+        /* Real Time Clock */
+        ext_rtc: em3027@56 {
+                compatible = "emmicro,em3027";
+                reg = <0x56>;
+        };
+};
+
+&usb {
+        status = "okay";
+};
+
+&usb_ctrl_mod {
+        status = "okay";
+};
+
+&usb0_phy {
+        status = "okay";
+};
+
+&usb0 {
+        status = "okay";
+};
+
+&cppi41dma  {
+        status = "okay";
+};
+
+&epwmss0 {
+        status = "okay";
+
+        ecap0: ecap@48300100 {
+                status = "okay";
+                pinctrl-names = "default";
+                pinctrl-0 = <&ecap0_pins>;
+        };
+};
+
+&gpmc {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&nandflash_pins>;
+        ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
+        nand@0,0 {
+                reg = <0 0 0>; /* CS0, offset 0 */
+                ti,nand-ecc-opt = "bch8";
+                ti,elm-id = <&elm>;
+                nand-bus-width = <8>;
+                gpmc,device-width = <1>;
+                gpmc,sync-clk-ps = <0>;
+                gpmc,cs-on-ns = <0>;
+                gpmc,cs-rd-off-ns = <44>;
+                gpmc,cs-wr-off-ns = <44>;
+                gpmc,adv-on-ns = <6>;
+                gpmc,adv-rd-off-ns = <34>;
+                gpmc,adv-wr-off-ns = <44>;
+                gpmc,we-on-ns = <0>;
+                gpmc,we-off-ns = <40>;
+                gpmc,oe-on-ns = <0>;
+                gpmc,oe-off-ns = <54>;
+                gpmc,access-ns = <64>;
+                gpmc,rd-cycle-ns = <82>;
+                gpmc,wr-cycle-ns = <82>;
+                gpmc,wait-on-read = "true";
+                gpmc,wait-on-write = "true";
+                gpmc,bus-turnaround-ns = <0>;
+                gpmc,cycle2cycle-delay-ns = <0>;
+                gpmc,clk-activation-ns = <0>;
+                gpmc,wait-monitoring-ns = <0>;
+                gpmc,wr-access-ns = <40>;
+                gpmc,wr-data-mux-bus-ns = <0>;
+                /* MTD partition table */
+                #address-cells = <1>;
+                #size-cells = <1>;
+                partition@0 {
+                        label = "spl";
+                        reg = <0x00000000 0x00200000>;
+                };
+                partition@1 {
+                        label = "uboot";
+                        reg = <0x00200000 0x00100000>;
+                };
+                partition@2 {
+                        label = "uboot environment";
+                        reg = <0x00300000 0x00100000>;
+                };
+                partition@3 {
+                        label = "dtb";
+                        reg = <0x00400000 0x00100000>;
+                };
+                partition@4 {
+                        label = "splash";
+                        reg = <0x00500000 0x00400000>;
+                };
+                partition@5 {
+                        label = "linux";
+                        reg = <0x00900000 0x00600000>;
+                };
+                partition@6 {
+                        label = "rootfs";
+                        reg = <0x00F00000 0>;
+                };
+        };
+};
+
+&elm {
+        status = "okay";
+};
+
+&mac {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&cpsw_default>;
+        pinctrl-1 = <&cpsw_sleep>;
+        slaves = <1>;
+        status = "okay";
+};
+
+&davinci_mdio {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&davinci_mdio_default>;
+        pinctrl-1 = <&davinci_mdio_sleep>;
+        status = "okay";
+};
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii-txid";
+};
+
+&mmc1 {
+        status = "okay";
+        vmmc-supply = <&vmmc_fixed>;
+        bus-width = <4>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins>;
+};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d9d00ab863a2..0d6a68ce434a 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -83,14 +83,14 @@
                         label = "volume-up";
                         linux,code = <115>;
                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 switch@10 {
                         label = "volume-down";
                         linux,code = <114>;
                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
@@ -168,215 +168,215 @@
 
         matrix_keypad_s0: matrix_keypad_s0 {
                 pinctrl-single,pins = <
-                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
-                        0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a6.gpio1_22 */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a9.gpio1_25 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a10.gpio1_26 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a11.gpio1_27 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a5.gpio1_21 */
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a6.gpio1_22 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a9.gpio1_25 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a10.gpio1_26 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a11.gpio1_27 */
                 >;
         };
 
         volume_keys_s0: volume_keys_s0 {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* spi0_sclk.gpio0_2 */
-                        0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* spi0_d0.gpio0_3 */
+                        AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* spi0_sclk.gpio0_2 */
+                        AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* spi0_d0.gpio0_3 */
                 >;
         };
 
         i2c0_pins: pinmux_i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x158 (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_d1.i2c1_sda */
-                        0x15c (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_cs0.i2c1_scl */
+                        AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d1.i2c1_sda */
+                        AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_cs0.i2c1_scl */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x178 (PIN_INPUT | MUX_MODE0)           /* uart1_ctsn.uart1_ctsn */
-                        0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
-                        0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
-                        0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)              /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
                 >;
         };
 
         clkout2_pin: pinmux_clkout2_pin {
                 pinctrl-single,pins = <
-                        0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+                        AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
                 >;
         };
 
         nandflash_pins_s0: nandflash_pins_s0 {
                 pinctrl-single,pins = <
-                        0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
-                        0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
-                        0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
-                        0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
-                        0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
-                        0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_wpn.gpio0_30 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
                 >;
         };
 
         ecap0_pins: backlight_pins {
                 pinctrl-single,pins = <
-                        0x164 0x0       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+                        AM33XX_IOPAD(0x964, MUX_MODE0)  /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
-                        0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rgmii1_rclk */
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd3.rgmii1_rd3 */
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd2.rgmii1_rd2 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
+                        AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rgmii1_rclk */
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         mmc3_pins: pinmux_mmc3_pins {
                 pinctrl-single,pins = <
-                        0x44 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
-                        0x48 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
-                        0x4C (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
-                        0x78 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
-                        0x88 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
-                        0x8C (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
+                        AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
                 >;
         };
 
         wlan_pins: pinmux_wlan_pins {
                 pinctrl-single,pins = <
-                        0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a0.gpio1_16 */
-                        0x19C (PIN_INPUT | MUX_MODE7)           /* mcasp0_ahclkr.gpio3_17 */
-                        0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.gpio1_16 */
+                        AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE7)              /* mcasp0_ahclkr.gpio3_17 */
+                        AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* mcasp0_ahclkx.gpio3_21 */
                 >;
         };
 
         lcd_pins_s0: lcd_pins_s0 {
                 pinctrl-single,pins = <
-                        0x20 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad8.lcd_data23 */
-                        0x24 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad9.lcd_data22 */
-                        0x28 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad10.lcd_data21 */
-                        0x2c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad11.lcd_data20 */
-                        0x30 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad12.lcd_data19 */
-                        0x34 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad13.lcd_data18 */
-                        0x38 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad14.lcd_data17 */
-                        0x3c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad15.lcd_data16 */
-                        0xa0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data0.lcd_data0 */
-                        0xa4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data1.lcd_data1 */
-                        0xa8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data2.lcd_data2 */
-                        0xac (PIN_OUTPUT | MUX_MODE0)           /* lcd_data3.lcd_data3 */
-                        0xb0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data4.lcd_data4 */
-                        0xb4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data5.lcd_data5 */
-                        0xb8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data6.lcd_data6 */
-                        0xbc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data7.lcd_data7 */
-                        0xc0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data8.lcd_data8 */
-                        0xc4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data9.lcd_data9 */
-                        0xc8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data10.lcd_data10 */
-                        0xcc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data11.lcd_data11 */
-                        0xd0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data12.lcd_data12 */
-                        0xd4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data13.lcd_data13 */
-                        0xd8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data14.lcd_data14 */
-                        0xdc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data15.lcd_data15 */
-                        0xe0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_vsync.lcd_vsync */
-                        0xe4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_hsync.lcd_hsync */
-                        0xe8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_pclk.lcd_pclk */
-                        0xec (PIN_OUTPUT | MUX_MODE0)           /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad8.lcd_data23 */
+                        AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad9.lcd_data22 */
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad10.lcd_data21 */
+                        AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad11.lcd_data20 */
+                        AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad12.lcd_data19 */
+                        AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad13.lcd_data18 */
+                        AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad14.lcd_data17 */
+                        AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad15.lcd_data16 */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)             /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)             /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)             /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)             /* lcd_ac_bias_en.lcd_ac_bias_en */
                 >;
         };
 
         mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
-                        0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
+                        AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
                 >;
         };
 
         mcasp1_pins_sleep: mcasp1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         dcan1_pins_default: dcan1_pins_default {
                 pinctrl-single,pins = <
-                        0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
-                        0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
+                        AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
+                        AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
                 >;
         };
 };
@@ -743,8 +743,8 @@
 &mmc3 {
         /* these are on the crossbar and are outlined in the
            xbar-event-map element */
-        dmas = <&edma 12
-                &edma 13>;
+        dmas = <&edma_xbar 12 0 1
+                &edma_xbar 13 0 2>;
         dma-names = "tx", "rx";
         status = "okay";
         vmmc-supply = <&wlan_en_reg>;
@@ -766,11 +766,6 @@
         };
 };
 
-&edma {
-        ti,edma-xbar-event-map = /bits/ 16 <1 12
-                                            2 13>;
-};
-
 &sham {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 89442e98a837..282fe1b37095 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -123,7 +123,7 @@
                         label = "button2";
                         linux,code = <0x102>;
                         gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 switch@4 {
@@ -204,234 +204,234 @@
 
         lcd_pins_default: lcd_pins_default {
                 pinctrl-single,pins = <
-                        0x20 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad8.lcd_data23 */
-                        0x24 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad9.lcd_data22 */
-                        0x28 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad10.lcd_data21 */
-                        0x2c (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad11.lcd_data20 */
-                        0x30 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad12.lcd_data19 */
-                        0x34 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad13.lcd_data18 */
-                        0x38 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad14.lcd_data17 */
-                        0x3c (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad15.lcd_data16 */
-                        0xa0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0.lcd_data0 */
-                        0xa4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1.lcd_data1 */
-                        0xa8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2.lcd_data2 */
-                        0xac (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3.lcd_data3 */
-                        0xb0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4.lcd_data4 */
-                        0xb4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5.lcd_data5 */
-                        0xb8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6.lcd_data6 */
-                        0xbc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7.lcd_data7 */
-                        0xc0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8.lcd_data8 */
-                        0xc4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9.lcd_data9 */
-                        0xc8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10.lcd_data10 */
-                        0xcc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11.lcd_data11 */
-                        0xd0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12.lcd_data12 */
-                        0xd4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13.lcd_data13 */
-                        0xd8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14.lcd_data14 */
-                        0xdc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15.lcd_data15 */
-                        0xe0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync.lcd_vsync */
-                        0xe4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync.lcd_hsync */
-                        0xe8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk.lcd_pclk */
-                        0xec (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad8.lcd_data23 */
+                        AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad9.lcd_data22 */
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad10.lcd_data21 */
+                        AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad11.lcd_data20 */
+                        AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad12.lcd_data19 */
+                        AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad13.lcd_data18 */
+                        AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad14.lcd_data17 */
+                        AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad15.lcd_data16 */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)     /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)     /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)     /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)     /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)     /* lcd_ac_bias_en.lcd_ac_bias_en */
                 >;
         };
 
         lcd_pins_sleep: lcd_pins_sleep {
                 pinctrl-single,pins = <
-                        0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad8.lcd_data23 */
-                        0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad9.lcd_data22 */
-                        0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad10.lcd_data21 */
-                        0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad11.lcd_data20 */
-                        0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad12.lcd_data19 */
-                        0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad13.lcd_data18 */
-                        0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad14.lcd_data17 */
-                        0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ad15.lcd_data16 */
-                        0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
-                        0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
-                        0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
-                        0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
-                        0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
-                        0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
-                        0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
-                        0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
-                        0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
-                        0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
-                        0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
-                        0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
-                        0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
-                        0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
-                        0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
-                        0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
-                        0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* lcd_vsync.lcd_vsync */
-                        0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* lcd_hsync.lcd_hsync */
-                        0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* lcd_pclk.lcd_pclk */
-                        0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad8.lcd_data23 */
+                        AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad9.lcd_data22 */
+                        AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad10.lcd_data21 */
+                        AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad11.lcd_data20 */
+                        AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad12.lcd_data19 */
+                        AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad13.lcd_data18 */
+                        AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad14.lcd_data17 */
+                        AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.lcd_data16 */
+                        AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7)   /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7)   /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7)   /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7)   /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7)   /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7)   /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7)   /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7)   /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7)   /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7)   /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7)   /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7)   /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7)   /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7)   /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7)   /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7)   /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* lcd_ac_bias_en.lcd_ac_bias_en */
                 >;
         };
 
 
         user_leds_s0: user_leds_s0 {
                 pinctrl-single,pins = <
-                        0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_ad4.gpio1_4 */
-                        0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_ad5.gpio1_5 */
-                        0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_ad6.gpio1_6 */
-                        0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_ad7.gpio1_7 */
+                        AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad4.gpio1_4 */
+                        AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad5.gpio1_5 */
+                        AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad6.gpio1_6 */
+                        AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad7.gpio1_7 */
                 >;
         };
 
         gpio_keys_s0: gpio_keys_s0 {
                 pinctrl-single,pins = <
-                        0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_oen_ren.gpio2_3 */
-                        0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_advn_ale.gpio2_2 */
-                        0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_wait0.gpio0_30 */
-                        0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_ben0_cle.gpio2_5 */
+                        AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_oen_ren.gpio2_3 */
+                        AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_advn_ale.gpio2_2 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_wait0.gpio0_30 */
+                        AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ben0_cle.gpio2_5 */
                 >;
         };
 
         i2c0_pins: pinmux_i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)         /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
 
         clkout2_pin: pinmux_clkout2_pin {
                 pinctrl-single,pins = <
-                        0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)         /* xdma_event_intr1.clkout2 */
+                        AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
                 >;
         };
 
         ecap2_pins: backlight_pins {
                 pinctrl-single,pins = <
-                        0x19c 0x4       /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
+                        AM33XX_IOPAD(0x99c, MUX_MODE4)  /* mcasp0_ahclkr.ecap2_in_pwm2_out */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
-                        0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rgmii1_rclk */
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd3.rgmii1_rd3 */
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd2.rgmii1_rd2 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
+                        AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rgmii1_rclk */
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 
                         /* Slave 2 */
-                        0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a0.rgmii2_tctl */
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a1.rgmii2_rctl */
-                        0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a2.rgmii2_td3 */
-                        0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a3.rgmii2_td2 */
-                        0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a4.rgmii2_td1 */
-                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a5.rgmii2_td0 */
-                        0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a6.rgmii2_tclk */
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a7.rgmii2_rclk */
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a8.rgmii2_rd3 */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a9.rgmii2_rd2 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a10.rgmii2_rd1 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a11.rgmii2_rd0 */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a0.rgmii2_tctl */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a1.rgmii2_rctl */
+                        AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a2.rgmii2_td3 */
+                        AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a3.rgmii2_td2 */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a4.rgmii2_td1 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a5.rgmii2_td0 */
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a6.rgmii2_tclk */
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a7.rgmii2_rclk */
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a8.rgmii2_rd3 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a9.rgmii2_rd2 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a10.rgmii2_rd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a11.rgmii2_rd0 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 
                         /* Slave 2 reset value*/
-                        0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
-                        0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
+                        AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
                 >;
         };
 
         mcasp1_pins_sleep: mcasp1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
-                        0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
-                        0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
-                        0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
-                        0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
-                        0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
-                        0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
+                        AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
                 >;
         };
 
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index 5c5667a3624d..d97b0efa43f3 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -46,109 +46,109 @@
 &am33xx_pinmux {
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat3 */
-                        0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat2 */
-                        0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat1 */
-                        0xfc (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat0 */
-                        0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk */
-                        0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd */
                 >;
         };
 
         i2c0_pins: pinmux_i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT | MUX_MODE0)   /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT | MUX_MODE0)   /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)      /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)      /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii1_int */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* rmii1_crs_dv */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* rmii1_rxer */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* rmii1_rd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* rmii1_rd0 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_refclk */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_int */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* rmii1_crs_dv */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* rmii1_rxer */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* rmii1_txen */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* rmii1_td1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* rmii1_td0 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* rmii1_rd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* rmii1_rd0 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk */
 
                         /* Slave 2 */
-                        0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)  /* rmii2_txen */
-                        0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)  /* rmii2_td1 */
-                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)  /* rmii2_td0 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* rmii2_rd1 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* rmii2_rd0 */
-                        0x70 (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* rmii2_crs_dv */
-                        0x74 (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* rmii2_rxer */
-                        0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_int */
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* rmii2_refclk */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* rmii2_txen */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* rmii2_td1 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* rmii2_td0 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* rmii2_rd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* rmii2_rd0 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* rmii2_crs_dv */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* rmii2_rxer */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_int */
+                        AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* rmii2_refclk */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii1_int */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_crs_dv */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_rxer */
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_txen */
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_td1 */
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_td0 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_rd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_rd0 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii1_refclk */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_int */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_crs_dv */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_rxer */
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_txen */
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_td1 */
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_td0 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_rd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_rd0 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_refclk */
 
                         /* Slave 2 reset value*/
-                        0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_txen */
-                        0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_td1 */
-                        0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_td0 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_rd1 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_rd0 */
-                        0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_crs_dv */
-                        0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_rxer */
-                        0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* rmii2_int */
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* rmii2_refclk */
+                        AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_txen */
+                        AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_td1 */
+                        AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_td0 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_rd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_rd0 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_crs_dv */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_rxer */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_int */
+                        AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii2_refclk */
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         emmc_pins: pinmux_emmc_pins {
                 pinctrl-single,pins = <
-                        0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
-                        0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
-                        0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
-                        0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
-                        0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
-                        0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+                        AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
                 >;
         };
 
         uart0_pins: pinmux_uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index 5ed4ca6eaf55..77559a1ded60 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -41,121 +41,121 @@
 
         misc_pins: misc_pins {
                 pinctrl-single,pins = <
-                        0x15c (PIN_OUTPUT | MUX_MODE7)  /* spi0_cs0.gpio0_5 */
+                        AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7)     /* spi0_cs0.gpio0_5 */
                 >;
         };
 
         gpmc_pins: gpmc_pins {
                 pinctrl-single,pins = <
-                        0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
-                        0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
-                        0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
-                        0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
-                        0x20 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad8.gpmc_ad8 */
-                        0x24 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad9.gpmc_ad9 */
-                        0x28 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad10.gpmc_ad10 */
-                        0x2c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad11.gpmc_ad11 */
-                        0x30 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad12.gpmc_ad12 */
-                        0x34 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad13.gpmc_ad13 */
-                        0x38 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad14.gpmc_ad14 */
-                        0x3c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad15.gpmc_ad15 */
-
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
-                        0x80 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn1.gpmc_csn1 */
-                        0x84 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn2.gpmc_csn2 */
-                        0x88 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn3.gpmc_csn3 */
-
-                        0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_ben0_cle.gpmc_ben0_cle */
-
-                        0xa4 (PIN_OUTPUT | MUX_MODE1)           /* lcd_data1.gpmc_a1 */
-                        0xa8 (PIN_OUTPUT | MUX_MODE1)           /* lcd_data2.gpmc_a2 */
-                        0xac (PIN_OUTPUT | MUX_MODE1)           /* lcd_data3.gpmc_a3 */
-                        0xb0 (PIN_OUTPUT | MUX_MODE1)           /* lcd_data4.gpmc_a4 */
-                        0xb4 (PIN_OUTPUT | MUX_MODE1)           /* lcd_data5.gpmc_a5 */
-                        0xb8 (PIN_OUTPUT | MUX_MODE1)           /* lcd_data6.gpmc_a6 */
-                        0xbc (PIN_OUTPUT | MUX_MODE1)           /* lcd_data7.gpmc_a7 */
-
-                        0xe0 (PIN_OUTPUT | MUX_MODE1)           /* lcd_vsync.gpmc_a8 */
-                        0xe4 (PIN_OUTPUT | MUX_MODE1)           /* lcd_hsync.gpmc_a9 */
-                        0xe8 (PIN_OUTPUT | MUX_MODE1)           /* lcd_pclk.gpmc_a10 */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
+                        AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad8.gpmc_ad8 */
+                        AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad9.gpmc_ad9 */
+                        AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad10.gpmc_ad10 */
+                        AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad11.gpmc_ad11 */
+                        AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad12.gpmc_ad12 */
+                        AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad13.gpmc_ad13 */
+                        AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad14.gpmc_ad14 */
+                        AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad15.gpmc_ad15 */
+
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0 */
+                        AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn1.gpmc_csn1 */
+                        AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn2.gpmc_csn2 */
+                        AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn3.gpmc_csn3 */
+
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_ben0_cle.gpmc_ben0_cle */
+
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE1)             /* lcd_data1.gpmc_a1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE1)             /* lcd_data2.gpmc_a2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE1)             /* lcd_data3.gpmc_a3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE1)             /* lcd_data4.gpmc_a4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE1)             /* lcd_data5.gpmc_a5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE1)             /* lcd_data6.gpmc_a6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE1)             /* lcd_data7.gpmc_a7 */
+
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE1)             /* lcd_vsync.gpmc_a8 */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE1)             /* lcd_hsync.gpmc_a9 */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE1)             /* lcd_pclk.gpmc_a10 */
                 >;
         };
 
         i2c0_pins: i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         uart0_pins: uart0_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT | MUX_MODE0)          /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0)             /* uart0_txd.uart0_txd */
                 >;
         };
 
         uart1_pins: uart1_pins {
                 pinctrl-single,pins = <
-                        0x178 (PIN_OUTPUT | MUX_MODE7)          /* uart1_ctsn.uart1_ctsn */
-                        0x17c (PIN_OUTPUT | MUX_MODE7)          /* uart1_rtsn.uart1_rtsn */
-                        0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
-                        0x184 (PIN_OUTPUT | MUX_MODE0)          /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE7)             /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x97c, PIN_OUTPUT | MUX_MODE7)             /* uart1_rtsn.uart1_rtsn */
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0)             /* uart1_txd.uart1_txd */
                 >;
         };
 
         uart2_pins: uart2_pins {
                 pinctrl-single,pins = <
-                        0xc0 (PIN_INPUT_PULLUP | MUX_MODE7)     /* lcd_data8.gpio2[14] */
-                        0xc4 (PIN_OUTPUT | MUX_MODE7)           /* lcd_data9.gpio2[15] */
-                        0x150 (PIN_INPUT | MUX_MODE1)           /* spi0_sclk.uart2_rxd */
-                        0x154 (PIN_OUTPUT | MUX_MODE1)          /* spi0_d0.uart2_txd */
+                        AM33XX_IOPAD(0x8c0, PIN_INPUT_PULLUP | MUX_MODE7)       /* lcd_data8.gpio2[14] */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7)             /* lcd_data9.gpio2[15] */
+                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)              /* spi0_sclk.uart2_rxd */
+                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)             /* spi0_d0.uart2_txd */
                 >;
         };
 
         uart3_pins: uart3_pins {
                 pinctrl-single,pins = <
-                        0xc8 (PIN_INPUT_PULLUP | MUX_MODE6)     /* lcd_data10.uart3_ctsn */
-                        0xcc (PIN_OUTPUT | MUX_MODE6)           /* lcd_data11.uart3_rtsn */
-                        0x160 (PIN_INPUT | MUX_MODE1)           /* spi0_cs1.uart3_rxd */
-                        0x164 (PIN_OUTPUT | MUX_MODE1)          /* ecap0_in_pwm0_out.uart3_txd */
+                        AM33XX_IOPAD(0x8c8, PIN_INPUT_PULLUP | MUX_MODE6)       /* lcd_data10.uart3_ctsn */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE6)             /* lcd_data11.uart3_rtsn */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE1)              /* spi0_cs1.uart3_rxd */
+                        AM33XX_IOPAD(0x964, PIN_OUTPUT | MUX_MODE1)             /* ecap0_in_pwm0_out.uart3_txd */
                 >;
         };
 
         uart4_pins: uart4_pins {
                 pinctrl-single,pins = <
-                        0xd0 (PIN_INPUT_PULLUP | MUX_MODE6)     /* lcd_data12.uart4_ctsn */
-                        0xd4 (PIN_OUTPUT | MUX_MODE6)           /* lcd_data13.uart4_rtsn */
-                        0x168 (PIN_INPUT | MUX_MODE1)           /* uart0_ctsn.uart4_rxd */
-                        0x16c (PIN_OUTPUT | MUX_MODE1)          /* uart0_rtsn.uart4_txd */
+                        AM33XX_IOPAD(0x8d0, PIN_INPUT_PULLUP | MUX_MODE6)       /* lcd_data12.uart4_ctsn */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE6)             /* lcd_data13.uart4_rtsn */
+                        AM33XX_IOPAD(0x968, PIN_INPUT | MUX_MODE1)              /* uart0_ctsn.uart4_rxd */
+                        AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE1)             /* uart0_rtsn.uart4_txd */
                 >;
         };
 
         uart5_pins: uart5_pins {
                 pinctrl-single,pins = <
-                        0xd8 (PIN_INPUT | MUX_MODE4)            /* lcd_data14.uart5_rxd */
-                        0x144 (PIN_OUTPUT | MUX_MODE3)          /* rmiii1_refclk.uart5_txd */
+                        AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE4)              /* lcd_data14.uart5_rxd */
+                        AM33XX_IOPAD(0x944, PIN_OUTPUT | MUX_MODE3)             /* rmiii1_refclk.uart5_txd */
                 >;
         };
 
         mmc1_pins: mmc1_pins {
                 pinctrl-single,pins = <
-                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat0.mmc0_dat0 */
-                        0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat1.mmc0_dat1 */
-                        0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat2.mmc0_dat2 */
-                        0xfc (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat3.mmc0_dat3 */
-                        0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
-                        0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7)    /* emu1.gpio3[8] */
-                        0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7)    /* mcasp0_aclkr.gpio3[18] */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE7)       /* emu1.gpio3[8] */
+                        AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)       /* mcasp0_aclkr.gpio3[18] */
                 >;
         };
 };
@@ -375,11 +375,15 @@
         wp-gpios = <&gpio3 18 0>;
 };
 
-#include "tps65217.dtsi"
-
 &tps {
+        compatible = "ti,tps65217";
+
         regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 dcdc1_reg: regulator@0 {
+                        reg = <0>;
                         /* +1.5V voltage with ±4% tolerance */
                         regulator-min-microvolt = <1450000>;
                         regulator-max-microvolt = <1550000>;
@@ -388,6 +392,7 @@
                 };
 
                 dcdc2_reg: regulator@1 {
+                        reg = <1>;
                         /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
                         regulator-name = "vdd_mpu";
                         regulator-min-microvolt = <915000>;
@@ -397,6 +402,7 @@
                 };
 
                 dcdc3_reg: regulator@2 {
+                        reg = <2>;
                         /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
                         regulator-name = "vdd_core";
                         regulator-min-microvolt = <915000>;
@@ -406,6 +412,7 @@
                 };
 
                 ldo1_reg: regulator@3 {
+                        reg = <3>;
                         /* +1.8V voltage with ±4% tolerance */
                         regulator-min-microvolt = <1750000>;
                         regulator-max-microvolt = <1870000>;
@@ -414,6 +421,7 @@
                 };
 
                 ldo2_reg: regulator@4 {
+                        reg = <4>;
                         /* +3.3V voltage with ±4% tolerance */
                         regulator-min-microvolt = <3175000>;
                         regulator-max-microvolt = <3430000>;
@@ -422,6 +430,7 @@
                 };
 
                 ldo3_reg: regulator@5 {
+                        reg = <5>;
                         /* +1.8V voltage with ±4% tolerance */
                         regulator-min-microvolt = <1750000>;
                         regulator-max-microvolt = <1870000>;
@@ -430,6 +439,7 @@
                 };
 
                 ldo4_reg: regulator@6 {
+                        reg = <6>;
                         /* +3.3V voltage with ±4% tolerance */
                         regulator-min-microvolt = <3175000>;
                         regulator-max-microvolt = <3430000>;
diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts
index 7106114c7464..471a3a70ea1f 100644
--- a/arch/arm/boot/dts/am335x-pepper.dts
+++ b/arch/arm/boot/dts/am335x-pepper.dts
@@ -93,14 +93,14 @@
 &am33xx_pinmux {
         i2c0_pins: pinmux_i2c0 {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                 >;
         };
         i2c1_pins: pinmux_i2c1 {
                 pinctrl-single,pins = <
-                        0x10C (PIN_INPUT_PULLUP | MUX_MODE3)    /* mii1_crs,i2c1_sda */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE3)    /* mii1_rxerr,i2c1_scl */
+                        AM33XX_IOPAD(0x90C, PIN_INPUT_PULLUP | MUX_MODE3)       /* mii1_crs,i2c1_sda */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE3)       /* mii1_rxerr,i2c1_scl */
                 >;
         };
 };
@@ -130,7 +130,7 @@
 &am33xx_pinmux {
         accel_pins: pinmux_accel {
                 pinctrl-single,pins = <
-                        0x98 (PIN_INPUT | MUX_MODE7)   /* gpmc_wen.gpio2_4 */
+                        AM33XX_IOPAD(0x898, PIN_INPUT | MUX_MODE7)   /* gpmc_wen.gpio2_4 */
                 >;
         };
 };
@@ -177,12 +177,12 @@
 &am33xx_pinmux {
         audio_pins: pinmux_audio {
                 pinctrl-single,pins = <
-                        0x1AC (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_ahcklx.mcasp0_ahclkx */
-                        0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_fsx.mcasp0_fsx */
-                        0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_aclkx.mcasp0_aclkx */
-                        0x198 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_axr0.mcasp0_axr0 */
-                        0x1A8 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_axr1.mcasp0_axr1 */
-                        0x40 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_a0.gpio1_16 */
+                        AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_ahcklx.mcasp0_ahclkx */
+                        AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_fsx.mcasp0_fsx */
+                        AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_aclkx.mcasp0_aclkx */
+                        AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_axr0.mcasp0_axr0 */
+                        AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_axr1.mcasp0_axr1 */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a0.gpio1_16 */
                 >;
         };
 };
@@ -228,36 +228,36 @@
 &am33xx_pinmux {
         lcd_pins: pinmux_lcd {
                 pinctrl-single,pins = <
-                        0xa0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0.lcd_data0 */
-                        0xa4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1.lcd_data1 */
-                        0xa8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2.lcd_data2 */
-                        0xac (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3.lcd_data3 */
-                        0xb0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4.lcd_data4 */
-                        0xb4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5.lcd_data5 */
-                        0xb8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6.lcd_data6 */
-                        0xbc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7.lcd_data7 */
-                        0xc0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8.lcd_data8 */
-                        0xc4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9.lcd_data9 */
-                        0xc8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10.lcd_data10 */
-                        0xcc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11.lcd_data11 */
-                        0xd0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12.lcd_data12 */
-                        0xd4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13.lcd_data13 */
-                        0xd8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14.lcd_data14 */
-                        0xdc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15.lcd_data15 */
-                        0x20 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad8.lcd_data16 */
-                        0x24 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad9.lcd_data17 */
-                        0x28 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad10.lcd_data18 */
-                        0x2c (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad11.lcd_data19 */
-                        0x30 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad12.lcd_data20 */
-                        0x34 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad13.lcd_data21 */
-                        0x38 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad14.lcd_data22 */
-                        0x3c (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad15.lcd_data23 */
-                        0xe0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync.lcd_vsync */
-                        0xe4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync.lcd_hsync */
-                        0xe8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk.lcd_pclk */
-                        0xec (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)     /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)     /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)     /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)     /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)     /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad8.lcd_data16 */
+                        AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad9.lcd_data17 */
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad10.lcd_data18 */
+                        AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad11.lcd_data19 */
+                        AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad12.lcd_data20 */
+                        AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad13.lcd_data21 */
+                        AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad14.lcd_data22 */
+                        AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)     /* gpmc_ad15.lcd_data23 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)     /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)     /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)     /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)     /* lcd_ac_bias_en.lcd_ac_bias_en */
                         /* Display Enable */
-                        0x6c (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a11.gpio1_27 */
+                        AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a11.gpio1_27 */
                 >;
         };
 };
@@ -291,29 +291,29 @@
 &am33xx_pinmux {
         ethernet_pins: pinmux_ethernet {
                 pinctrl-single,pins = <
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
-                        0x118 (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxdv.rgmii1_rctl */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
-                        0x12c (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
-                        0x130 (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxclk.rgmii1_rclk */
-                        0x134 (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxd3.rgmii1_rxd3 */
-                        0x138 (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxd2.rgmii1_rxd2 */
-                        0x13c (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxd1.rgmii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLUP | MUX_MODE2)    /* mii1_rxd0.rgmii1_rxd0 */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxdv.rgmii1_rctl */
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_txclk.rgmii1_tclk */
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxclk.rgmii1_rclk */
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxd3.rgmii1_rxd3 */
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxd2.rgmii1_rxd2 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxd1.rgmii1_rxd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2)       /* mii1_rxd0.rgmii1_rxd0 */
                         /* ethernet interrupt */
-                        0x144 (PIN_INPUT_PULLUP | MUX_MODE7)    /* rmii2_refclk.gpio0_29 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE7)       /* rmii2_refclk.gpio0_29 */
                         /* ethernet PHY nReset */
-                        0x108 (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* mii1_col.gpio3_0 */
+                        AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* mii1_col.gpio3_0 */
                 >;
         };
 
         mdio_pins: pinmux_mdio {
                 pinctrl-single,pins = <
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 };
@@ -339,13 +339,6 @@
         ti,non-removable;
 };
 
-&edma {
-        /* Map eDMA MMC2 Events from Crossbar */
-        ti,edma-xbar-event-map = /bits/ 16 <1 12
-                                            2 13>;
-};
-
-
 &mmc3 {
         /* Wifi & Bluetooth on MMC #3 */
         status = "okay";
@@ -354,8 +347,8 @@
         vmmmc-supply = <&v3v3c_reg>;
         bus-width = <4>;
         ti,non-removable;
-        dmas = <&edma 12
-                &edma 13>;
+        dmas = <&edma_xbar 12 0 1
+                &edma_xbar 13 0 2>;
         dma-names = "tx", "rx";
 };
 
@@ -363,45 +356,45 @@
 &am33xx_pinmux {
         sd_pins: pinmux_sd_card {
                 pinctrl-single,pins = <
-                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat0.mmc0_dat0 */
-                        0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat1.mmc0_dat1 */
-                        0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat2.mmc0_dat2 */
-                        0xfc (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat3.mmc0_dat3 */
-                        0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
-                        0x160 (PIN_INPUT | MUX_MODE7)           /* spi0_cs1.gpio0_6 */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)              /* spi0_cs1.gpio0_6 */
                 >;
         };
         emmc_pins: pinmux_emmc {
                 pinctrl-single,pins = <
-                        0x80 (PIN_INPUT_PULLUP | MUX_MODE2)     /* gpmc_csn1.mmc1_clk */
-                        0x84 (PIN_INPUT_PULLUP | MUX_MODE2)     /* gpmc_csn2.mmc1_cmd */
-                        0x00 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad0.mmc1_dat0 */
-                        0x04 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad1.mmc1_dat1 */
-                        0x08 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad2.mmc1_dat2 */
-                        0x0c (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad3.mmc1_dat3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad4.mmc1_dat4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad5.mmc1_dat5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad6.mmc1_dat6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE1)     /* gpmc_ad7.mmc1_dat7 */
+                        AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad0.mmc1_dat0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad1.mmc1_dat1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad2.mmc1_dat2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad3.mmc1_dat3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad4.mmc1_dat4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad5.mmc1_dat5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad6.mmc1_dat6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad7.mmc1_dat7 */
                         /* EMMC nReset */
-                        0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_wpn.gpio0_31 */
+                        AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpio0_31 */
                 >;
         };
         wireless_pins: pinmux_wireless {
                 pinctrl-single,pins = <
-                        0x44 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a1.mmc2_dat0 */
-                        0x48 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a2.mmc2_dat1 */
-                        0x4c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_a3.mmc2_dat2 */
-                        0x78 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_ben1.mmc2_dat3 */
-                        0x88 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_csn3.mmc2_cmd */
-                        0x8c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_clk.mmc1_clk */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a1.mmc2_dat0 */
+                        AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a2.mmc2_dat1 */
+                        AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a3.mmc2_dat2 */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ben1.mmc2_dat3 */
+                        AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_csn3.mmc2_cmd */
+                        AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_clk.mmc1_clk */
                         /* WLAN nReset */
-                        0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a8.gpio1_24 */
+                        AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a8.gpio1_24 */
                         /* WLAN nPower down */
-                        0x70 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_wait0.gpio0_30 */
+                        AM33XX_IOPAD(0x870, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wait0.gpio0_30 */
                         /* 32kHz Clock */
-                        0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+                        AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
                 >;
         };
 };
@@ -427,9 +420,9 @@
         vin-supply = <&vbat>;
 };
 
-/include/ "tps65217.dtsi"
-
 &tps {
+        compatible = "ti,tps65217";
+
         backlight {
                 isel = <1>; /* ISET1 */
                 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
@@ -437,12 +430,17 @@
         };
 
         regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 dcdc1_reg: regulator@0 {
+                        reg = <0>;
                         /* VDD_1V8 system supply */
                         regulator-always-on;
                 };
 
                 dcdc2_reg: regulator@1 {
+                        reg = <1>;
                         /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
                         regulator-name = "vdd_core";
                         regulator-min-microvolt = <925000>;
@@ -452,6 +450,7 @@
                 };
 
                 dcdc3_reg: regulator@2 {
+                        reg = <2>;
                         /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
                         regulator-name = "vdd_mpu";
                         regulator-min-microvolt = <925000>;
@@ -461,18 +460,21 @@
                 };
 
                 ldo1_reg: regulator@3 {
+                        reg = <3>;
                         /* VRTC 1.8V always-on supply */
                         regulator-name = "vrtc,vdds";
                         regulator-always-on;
                 };
 
                 ldo2_reg: regulator@4 {
+                        reg = <4>;
                         /* 3.3V rail */
                         regulator-name = "vdd_3v3aux";
                         regulator-always-on;
                 };
 
                 ldo3_reg: regulator@5 {
+                        reg = <5>;
                         /* VDD_3V3A 3.3V rail */
                         regulator-name = "vdd_3v3a";
                         regulator-min-microvolt = <3300000>;
@@ -480,6 +482,7 @@
                 };
 
                 ldo4_reg: regulator@6 {
+                        reg = <6>;
                         /* VDD_3V3B 3.3V rail */
                         regulator-name = "vdd_3v3b";
                         regulator-always-on;
@@ -497,10 +500,10 @@
 &am33xx_pinmux {
         spi0_pins: pinmux_spi0 {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
-                        0x15C (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
-                        0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
-                        0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
+                        AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+                        AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+                        AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
+                        AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
                 >;
         };
 };
@@ -538,16 +541,16 @@
 &am33xx_pinmux {
         uart0_pins: pinmux_uart0 {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
                 >;
         };
         uart1_pins: pinmux_uart1 {
                 pinctrl-single,pins = <
-                        0x178 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_ctsn.uart1_ctsn */
-                        0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
-                        0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
-                        0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
                 >;
         };
 };
@@ -590,9 +593,9 @@
         usb_pins: pinmux_usb {
                 pinctrl-single,pins = <
                         /* USB0 Over-Current (active low) */
-                        0x64 (PIN_INPUT | MUX_MODE7)    /* gpmc_a9.gpio1_25 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7)      /* gpmc_a9.gpio1_25 */
                         /* USB1 Over-Current (active low) */
-                        0x68 (PIN_INPUT | MUX_MODE7)    /* gpmc_a10.gpio1_26 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7)      /* gpmc_a10.gpio1_26 */
                 >;
         };
 };
@@ -627,37 +630,37 @@
                 label = "home";
                 linux,code = <KEY_HOME>;
                 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
-                gpio-key,wakeup;
+                wakeup-source;
         };
 
         button@1 {
                 label = "menu";
                 linux,code = <KEY_MENU>;
                 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
-                gpio-key,wakeup;
+                wakeup-source;
         };
 
         buttons@2 {
                 label = "power";
                 linux,code = <KEY_POWER>;
                 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-                gpio-key,wakeup;
+                wakeup-source;
         };
 };
 
 &am33xx_pinmux {
         user_leds_pins: pinmux_user_leds {
                 pinctrl-single,pins = <
-                        0x50 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_a4.gpio1_20 */
-                        0x54 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_a5.gpio1_21 */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a4.gpio1_20 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a5.gpio1_21 */
                 >;
         };
 
         user_buttons_pins: pinmux_user_buttons {
                 pinctrl-single,pins = <
-                        0x58 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a6.gpio1_22 */
-                        0x5C (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a7.gpio1_21 */
-                        0x164 (PIN_INPUT_PULLUP | MUX_MODE7)    /* gpmc_a8.gpio0_7 */
+                        AM33XX_IOPAD(0x858, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a6.gpio1_22 */
+                        AM33XX_IOPAD(0x85C, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a7.gpio1_21 */
+                        AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a8.gpio0_7 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 2f43e458ea4a..c20ae6c6f6c7 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -56,22 +56,22 @@
 &am33xx_pinmux {
         ethernet0_pins: pinmux_ethernet0 {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs_dv */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxerr.rmii1_rxerr */
-                        0x114 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txen.rmii1_txen */
-                        0x124 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd1.rmii1_txd1 */
-                        0x128 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd0.rmii1_txd0 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.rmii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.rmii1_rxd0 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_refclk.rmii1_refclk */
+                        AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs_dv */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE1)             /* mii1_txen.rmii1_txen */
+                        AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE1)             /* mii1_txd1.rmii1_txd1 */
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE1)             /* mii1_txd0.rmii1_txd0 */
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
                 >;
         };
 
         mdio_pins: pinmux_mdio {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 };
@@ -103,8 +103,8 @@
 &am33xx_pinmux {
         i2c0_pins: pinmux_i2c0 {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT | MUX_MODE0)   /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT | MUX_MODE0)   /* i2c0_scl.i2c0_scl */
+                        AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)      /* i2c0_sda.i2c0_sda */
+                        AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)      /* i2c0_scl.i2c0_scl */
                 >;
         };
 };
@@ -137,20 +137,20 @@
 &am33xx_pinmux {
                 nandflash_pins: pinmux_nandflash {
                         pinctrl-single,pins = <
-                        0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
-                        0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
-                        0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
-                        0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
-                        0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0 */
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
                 >;
         };
 };
@@ -324,10 +324,10 @@
 &am33xx_pinmux {
         spi0_pins: pinmux_spi0 {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_clk.spi0_clk */
-                        0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d0.spi0_d0 */
-                        0x158 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d1.spi0_d1 */
-                        0x15c (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_cs0.spi0_cs0 */
+                        AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* spi0_clk.spi0_clk */
+                        AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* spi0_d0.spi0_d0 */
+                        AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)       /* spi0_d1.spi0_d1 */
+                        AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0)       /* spi0_cs0.spi0_cs0 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am335x-sbc-t335.dts b/arch/arm/boot/dts/am335x-sbc-t335.dts
new file mode 100644
index 000000000000..917d7ccc9109
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-sbc-t335.dts
@@ -0,0 +1,219 @@
+/*
+ * am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
+ *
+ * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am335x-cm-t335.dts"
+
+/ {
+        model = "CompuLab CM-T335 on SB-T335";
+        compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";
+
+        /* DRM display driver */
+        panel {
+                compatible = "ti,tilcdc,panel";
+                status = "okay";
+                pinctrl-names = "default", "sleep";
+                pinctrl-0 = <&lcd_pins_default>;
+                pinctrl-1 = <&lcd_pins_sleep>;
+
+                panel-info {
+                        ac-bias           = <255>;
+                        ac-bias-intrpt    = <0>;
+                        dma-burst-sz      = <16>;
+                        bpp               = <32>;
+                        fdd               = <0x80>;
+                        sync-edge         = <0>;
+                        sync-ctrl         = <1>;
+                        raster-order      = <0>;
+                        fifo-th           = <0>;
+                };
+                display-timings {
+                        /* Timing selection performed by U-Boot */
+                        timing0: lcd {/* 800x480p62 */
+                                clock-frequency = <30000000>;
+                                hactive = <800>;
+                                vactive = <480>;
+                                hfront-porch = <39>;
+                                hback-porch = <39>;
+                                hsync-len = <47>;
+                                vback-porch = <29>;
+                                vfront-porch = <13>;
+                                vsync-len = <2>;
+                                hsync-active = <1>;
+                                vsync-active = <1>;
+                        };
+                        timing1: dvi { /* 1024x768p60 */
+                                clock-frequency = <65000000>;
+                                hactive = <1024>;
+                                hfront-porch = <24>;
+                                hback-porch = <160>;
+                                hsync-len = <136>;
+                                vactive = <768>;
+                                vfront-porch = <3>;
+                                vback-porch = <29>;
+                                vsync-len = <6>;
+                                hsync-active = <0>;
+                                vsync-active = <0>;
+                        };
+                };
+        };
+};
+
+&am33xx_pinmux {
+        /* Display */
+        lcd_pins_default: lcd_pins_default {
+                pinctrl-single,pins = <
+                        /* gpmc_ad8.lcd_data23 */
+                        AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad9.lcd_data22 */
+                        AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad10.lcd_data21 */
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad11.lcd_data20 */
+                        AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad12.lcd_data19 */
+                        AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad13.lcd_data18 */
+                        AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad14.lcd_data17 */
+                        AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
+                        /* gpmc_ad15.lcd_data16 */
+                        AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)
+                        /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)
+                        /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)
+                >;
+        };
+
+        lcd_pins_sleep: lcd_pins_sleep {
+                pinctrl-single,pins = <
+                        /* gpmc_ad8.lcd_data23 */
+                        AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad9.lcd_data22 */
+                        AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad10.lcd_data21 */
+                        AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad11.lcd_data20 */
+                        AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad12.lcd_data19 */
+                        AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad13.lcd_data18 */
+                        AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad14.lcd_data17 */
+                        AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* gpmc_ad15.lcd_data16 */
+                        AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7)
+                        /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        /* lcd_ac_bias_en.lcd_ac_bias_en */
+                        AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                >;
+        };
+};
+
+&i2c0 {
+        /* GPIO extender */
+        gpio_ext: pca9555@26 {
+                compatible = "nxp,pca9555";
+                pinctrl-names = "default";
+                gpio-controller;
+                #gpio-cells = <2>;
+                reg = <0x26>;
+                dvi_ena {
+                        gpio-hog;
+                        gpios = <13 GPIO_ACTIVE_HIGH>;
+                        output-high;
+                        line-name = "dvi-enable";
+                };
+                lcd_ena {
+                        gpio-hog;
+                        gpios = <11 GPIO_ACTIVE_HIGH>;
+                        output-high;
+                        line-name = "lcd-enable";
+                };
+        };
+};
+
+/* Display */
+&lcdc {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
new file mode 100644
index 000000000000..1b5b044fcd91
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-shc.dts
@@ -0,0 +1,577 @@
+/*
+ * support for the bosch am335x based shc c3 board
+ *
+ * Copyright, C) 2015 Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+        model = "Bosch SHC";
+        compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
+
+        aliases {
+                mmcblk0 = &mmc1;
+                mmcblk1 = &mmc2;
+        };
+
+        cpus {
+                cpu@0 {
+                        /*
+                         * To consider voltage drop between PMIC and SoC,
+                         * tolerance value is reduced to 2% from 4% and
+                         * voltage value is increased as a precaution.
+                         */
+                        operating-points = <
+                                /* kHz    uV */
+                                594000  1225000
+                                294000  1125000
+                        >;
+                        voltage-tolerance = <2>; /* 2 percentage */
+                        cpu0-supply = <&dcdc2_reg>;
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+
+                back_button {
+                        label = "Back Button";
+                        gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+                        linux,code = <KEY_BACK>;
+                        debounce-interval = <1000>;
+                        gpio-key,wakeup;
+                };
+
+                front_button {
+                        label = "Front Button";
+                        gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
+                        linux,code = <KEY_FRONT>;
+                        debounce-interval = <1000>;
+                        gpio-key,wakeup;
+                };
+        };
+
+        leds {
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_s0>;
+
+                compatible = "gpio-leds";
+
+                led@1 {
+                        label = "shc:power:red";
+                        gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                led@2 {
+                        label = "shc:power:bl";
+                        gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "timer";
+                        default-state = "on";
+                };
+
+                led@3 {
+                        label = "shc:lan:red";
+                        gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                led@4 {
+                        label = "shc:lan:bl";
+                        gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                led@5 {
+                        label = "shc:cloud:red";
+                        gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                led@6 {
+                        label = "shc:cloud:bl";
+                        gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x20000000>; /* 512 MB */
+        };
+
+        vmmcsd_fixed: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmcsd_fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+};
+
+&aes {
+        status = "okay";
+};
+
+&cppi41dma  {
+        status = "okay";
+};
+
+&davinci_mdio {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&davinci_mdio_default>;
+        pinctrl-1 = <&davinci_mdio_sleep>;
+        status = "okay";
+
+        ethernetphy0: ethernet-phy@0 {
+                reg = <0>;
+                smsc,disable-energy-detect;
+        };
+};
+
+&epwmss1 {
+        status = "okay";
+
+        ehrpwm1: ehrpwm@48302200 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&ehrpwm1_pins>;
+                status = "okay";
+        };
+};
+
+&gpio1 {
+        hmtc_rst {
+                gpio-hog;
+                gpios = <24 GPIO_ACTIVE_LOW>;
+                output-high;
+                line-name = "homematic_reset";
+        };
+
+        hmtc_prog {
+                gpio-hog;
+                gpios = <27 GPIO_ACTIVE_LOW>;
+                output-high;
+                line-name = "homematic_program";
+        };
+};
+
+&gpio3 {
+        zgb_rst {
+                gpio-hog;
+                gpios = <18 GPIO_ACTIVE_LOW>;
+                output-low;
+                line-name = "zigbee_reset";
+        };
+
+        zgb_boot {
+                gpio-hog;
+                gpios = <19 GPIO_ACTIVE_HIGH>;
+                output-high;
+                line-name = "zigbee_boot";
+        };
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins>;
+        status = "okay";
+        clock-frequency = <400000>;
+
+        tps: tps@24 {
+                reg = <0x24>;
+        };
+
+        at24@50 {
+                compatible = "at24,24c32";
+                pagesize = <32>;
+                reg = <0x50>;
+        };
+
+        pcf8563@51 {
+                compatible = "nxp,pcf8563";
+                reg = <0x51>;
+        };
+};
+
+&mac {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&cpsw_default>;
+        pinctrl-1 = <&cpsw_sleep>;
+        status = "okay";
+        slaves = <1>;
+        cpsw_emac0: slave@4a100200  {
+                phy_id = <&davinci_mdio>, <0>;
+                phy-mode = "mii";
+                phy-handle = <&ethernetphy0>;
+        };
+};
+
+&mmc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins>;
+        bus-width = <0x4>;
+        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+        cd-inverted;
+        max-frequency = <26000000>;
+        vmmc-supply = <&vmmcsd_fixed>;
+        status = "okay";
+};
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&emmc_pins>;
+        bus-width = <8>;
+        max-frequency = <26000000>;
+        sd-uhs-sdr25;
+        vmmc-supply = <&vmmcsd_fixed>;
+        status = "okay";
+};
+
+&mmc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc3_pins>;
+        bus-width = <4>;
+        cap-power-off-card;
+        max-frequency = <26000000>;
+        sd-uhs-sdr25;
+        vmmc-supply = <&vmmcsd_fixed>;
+        status = "okay";
+};
+
+&rtc {
+        ti,no-init;
+};
+
+&sham {
+        status = "okay";
+};
+
+&tps {
+        compatible = "ti,tps65217";
+        ti,pmic-shutdown-controller;
+
+        regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                dcdc1_reg: regulator@0 {
+                        reg = <0>;
+                        regulator-name = "vdds_dpr";
+                        regulator-compatible = "dcdc1";
+                        regulator-min-microvolt = <1300000>;
+                        regulator-max-microvolt = <1450000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                dcdc2_reg: regulator@1 {
+                        reg = <1>;
+                        /*
+                         * VDD_MPU voltage limits 0.95V - 1.26V with
+                         * +/-4% tolerance
+                         */
+                        regulator-compatible = "dcdc2";
+                        regulator-name = "vdd_mpu";
+                        regulator-min-microvolt = <925000>;
+                        regulator-max-microvolt = <1375000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                        regulator-ramp-delay = <70000>;
+                };
+
+                dcdc3_reg: regulator@2 {
+                        reg = <2>;
+                        /*
+                         * VDD_CORE voltage limits 0.95V - 1.1V with
+                         * +/-4% tolerance
+                         */
+                        regulator-name = "vdd_core";
+                        regulator-compatible = "dcdc3";
+                        regulator-min-microvolt = <925000>;
+                        regulator-max-microvolt = <1125000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                ldo1_reg: regulator@3 {
+                        reg = <3>;
+                        regulator-name = "vio,vrtc,vdds";
+                        regulator-compatible = "ldo1";
+                        regulator-min-microvolt = <1000000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-always-on;
+                };
+
+                ldo2_reg: regulator@4 {
+                        reg = <4>;
+                        regulator-name = "vdd_3v3aux";
+                        regulator-compatible = "ldo2";
+                        regulator-min-microvolt = <900000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+
+                ldo3_reg: regulator@5 {
+                        reg = <5>;
+                        regulator-name = "vdd_1v8";
+                        regulator-compatible = "ldo3";
+                        regulator-min-microvolt = <900000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-always-on;
+                };
+
+                ldo4_reg: regulator@6 {
+                        reg = <6>;
+                        regulator-name = "vdd_3v3a";
+                        regulator-compatible = "ldo4";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+        };
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+        status = "okay";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
+        status = "okay";
+};
+
+&uart4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart4_pins>;
+        status = "okay";
+};
+
+&usb {
+        status = "okay";
+};
+
+&usb_ctrl_mod {
+        status = "okay";
+};
+
+&usb1_phy {
+        status = "okay";
+};
+
+&usb1 {
+        status = "okay";
+        dr_mode = "host";
+};
+
+&am33xx_pinmux {
+        pinctrl-names = "default";
+        pinctrl-0 = <&clkout2_pin>;
+
+        clkout2_pin: pinmux_clkout2_pin {
+                pinctrl-single,pins = <
+                        /* xdma_event_intr1.clkout2 */
+                        AM33XX_IOPAD(0x9b4, PIN_INPUT | MUX_MODE6)
+                >;
+        };
+
+        cpsw_default: cpsw_default {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+
+        cpsw_sleep: cpsw_sleep {
+                pinctrl-single,pins = <
+                        /* Slave 1 reset value */
+                        AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                >;
+        };
+
+        davinci_mdio_default: davinci_mdio_default {
+                pinctrl-single,pins = <
+                        /* mdio_data.mdio_data */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
+                        /* mdio_clk.mdio_clk */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                >;
+        };
+
+        davinci_mdio_sleep: davinci_mdio_sleep {
+                pinctrl-single,pins = <
+                        /* MDIO reset value */
+                        AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                >;
+        };
+
+        ehrpwm1_pins: pinmux_ehrpwm1 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.gpio1_19 */
+                >;
+        };
+
+        emmc_pins: pinmux_emmc_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x880, PIN_INPUT | MUX_MODE2)
+                        AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)
+                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)
+                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)
+                >;
+        };
+
+        i2c0_pins: pinmux_i2c0_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)
+                        AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)
+                >;
+        };
+
+        mmc1_pins: pinmux_mmc1_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE5)
+                >;
+        };
+
+        mmc3_pins: pinmux_mmc3_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x830, PIN_INPUT | MUX_MODE3)
+                        AM33XX_IOPAD(0x834, PIN_INPUT | MUX_MODE3)
+                        AM33XX_IOPAD(0x838, PIN_INPUT | MUX_MODE3)
+                        AM33XX_IOPAD(0x83c, PIN_INPUT | MUX_MODE3)
+                        AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE3)
+                        AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE3)
+                >;
+        };
+
+        uart0_pins: pinmux_uart0_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE0)
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0)
+                >;
+        };
+
+        uart1_pins: pinmux_uart1 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)
+                        AM33XX_IOPAD(0x97C, PIN_OUTPUT | MUX_MODE0)
+                        AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0)
+                >;
+        };
+
+        uart2_pins: pinmux_uart2_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)
+                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)
+                >;
+        };
+
+        uart4_pins: pinmux_uart4_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)
+                        AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE6)
+                >;
+        };
+
+        user_leds_s0: user_leds_s0 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLUP | MUX_MODE7)
+                        AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE7)
+                        AM33XX_IOPAD(0x87c, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x894, PIN_INPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x958, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7)
+                        AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7)
+                        AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE7)
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index 3303c281697b..d38edfa53bb9 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -375,16 +375,19 @@
         pinctrl-0 = <&uart4_pins>;
 };
 
-#include "tps65217.dtsi"
-
 &tps {
+        compatible = "ti,tps65217";
         ti,pmic-shutdown-controller;
 
         interrupt-parent = <&intc>;
         interrupts = <7>;       /* NNMI */
 
         regulators {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 dcdc1_reg: regulator@0 {
+                        reg = <0>;
                         /* VDDS_DDR */
                         regulator-min-microvolt = <1500000>;
                         regulator-max-microvolt = <1500000>;
@@ -392,6 +395,7 @@
                 };
 
                 dcdc2_reg: regulator@1 {
+                        reg = <1>;
                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
                         regulator-name = "vdd_mpu";
                         regulator-min-microvolt = <925000>;
@@ -401,6 +405,7 @@
                 };
 
                 dcdc3_reg: regulator@2 {
+                        reg = <2>;
                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
                         regulator-name = "vdd_core";
                         regulator-min-microvolt = <925000>;
@@ -410,6 +415,7 @@
                 };
 
                 ldo1_reg: regulator@3 {
+                        reg = <3>;
                         /* VRTC / VIO / VDDS*/
                         regulator-always-on;
                         regulator-min-microvolt = <1800000>;
@@ -417,6 +423,7 @@
                 };
 
                 ldo2_reg: regulator@4 {
+                        reg = <4>;
                         /* VDD_3V3AUX */
                         regulator-always-on;
                         regulator-min-microvolt = <3300000>;
@@ -424,6 +431,7 @@
                 };
 
                 ldo3_reg: regulator@5 {
+                        reg = <5>;
                         /* VDD_1V8 */
                         regulator-min-microvolt = <1800000>;
                         regulator-max-microvolt = <1800000>;
@@ -431,6 +439,7 @@
                 };
 
                 ldo4_reg: regulator@6 {
+                        reg = <6>;
                         /* VDD_3V3A */
                         regulator-min-microvolt = <3300000>;
                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
index 2cecb3951e1b..282f6d4b27bc 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -28,8 +28,8 @@
 &am33xx_pinmux {
         dcan1_pins: pinmux_dcan1 {
                 pinctrl-single,pins = <
-                        0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
-                        0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
+                        AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
+                        AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
                 >;
         };
 };
@@ -44,20 +44,20 @@
 &am33xx_pinmux {
         ethernet1_pins: pinmux_ethernet1 {
                 pinctrl-single,pins = <
-                        0x40 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a0.mii2_txen */
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a1.mii2_rxdv */
-                        0x48 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a2.mii2_txd3 */
-                        0x4c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a3.mii2_txd2 */
-                        0x50 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a4.mii2_txd1 */
-                        0x54 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a5.mii2_txd0 */
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a6.mii2_txclk */
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a7.mii2_rxclk */
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a8.mii2_rxd3 */
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a9.mii2_rxd2 */
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a10.mii2_rxd1 */
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a11.mii2_rxd0 */
-                        0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_wpn.mii2_rxerr */
-                        0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_ben1.mii2_col */
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a0.mii2_txen */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a1.mii2_rxdv */
+                        AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a2.mii2_txd3 */
+                        AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a3.mii2_txd2 */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a4.mii2_txd1 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a5.mii2_txd0 */
+                        AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a6.mii2_txclk */
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a7.mii2_rxclk */
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a8.mii2_rxd3 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a9.mii2_rxd2 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a10.mii2_rxd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a11.mii2_rxd0 */
+                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_wpn.mii2_rxerr */
+                        AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_ben1.mii2_col */
                 >;
         };
 };
@@ -79,13 +79,13 @@
 &am33xx_pinmux {
         mmc1_pins: pinmux_mmc1 {
                 pinctrl-single,pins = <
-                        0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat3.mmc0_dat3 */
-                        0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat2.mmc0_dat2 */
-                        0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat1.mmc0_dat1 */
-                        0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat0.mmc0_dat0 */
-                        0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
-                        0x160 (PIN_INPUT_PULLUP | MUX_MODE7)    /* spi0_cs1.mmc0_sdcd */
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7)       /* spi0_cs1.mmc0_sdcd */
                 >;
         };
 };
@@ -103,17 +103,17 @@
 &am33xx_pinmux {
         uart0_pins: pinmux_uart0 {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
-                        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
                 >;
         };
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
-                        0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
-                        0x178 (PIN_INPUT | MUX_MODE0)           /* uart1_ctsn.uart1_ctsn */
-                        0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)         /* uart1_rtsn.uart1_rtsn */
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)              /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index d23e2524d694..04885f9f959e 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -161,6 +161,14 @@
                                         mboxes = <&mailbox &mbox_wkupm3>;
                                 };
 
+                                edma_xbar: dma-router@f90 {
+                                        compatible = "ti,am335x-edma-crossbar";
+                                        reg = <0xf90 0x40>;
+                                        #dma-cells = <3>;
+                                        dma-requests = <32>;
+                                        dma-masters = <&edma>;
+                                };
+
                                 scm_clockdomains: clockdomains {
                                 };
                         };
@@ -174,12 +182,44 @@
                 };
 
                 edma: edma@49000000 {
-                        compatible = "ti,edma3";
-                        ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
-                        reg =   <0x49000000 0x10000>,
-                                <0x44e10f90 0x40>;
+                        compatible = "ti,edma3-tpcc";
+                        ti,hwmods = "tpcc";
+                        reg =   <0x49000000 0x10000>;
+                        reg-names = "edma3_cc";
                         interrupts = <12 13 14>;
-                        #dma-cells = <1>;
+                        interrupt-names = "edma3_ccint", "emda3_mperr",
+                                          "edma3_ccerrint";
+                        dma-requests = <64>;
+                        #dma-cells = <2>;
+
+                        ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+                                   <&edma_tptc2 0>;
+
+                        ti,edma-memcpy-channels = <20 21>;
+                };
+
+                edma_tptc0: tptc@49800000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc0";
+                        reg =   <0x49800000 0x100000>;
+                        interrupts = <112>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc1: tptc@49900000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc1";
+                        reg =   <0x49900000 0x100000>;
+                        interrupts = <113>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc2: tptc@49a00000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc2";
+                        reg =   <0x49a00000 0x100000>;
+                        interrupts = <114>;
+                        interrupt-names = "edma3_tcerrint";
                 };
 
                 gpio0: gpio@44e07000 {
@@ -233,7 +273,7 @@
                         reg = <0x44e09000 0x2000>;
                         interrupts = <72>;
                         status = "disabled";
-                        dmas = <&edma 26>, <&edma 27>;
+                        dmas = <&edma 26 0>, <&edma 27 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -244,7 +284,7 @@
                         reg = <0x48022000 0x2000>;
                         interrupts = <73>;
                         status = "disabled";
-                        dmas = <&edma 28>, <&edma 29>;
+                        dmas = <&edma 28 0>, <&edma 29 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -255,7 +295,7 @@
                         reg = <0x48024000 0x2000>;
                         interrupts = <74>;
                         status = "disabled";
-                        dmas = <&edma 30>, <&edma 31>;
+                        dmas = <&edma 30 0>, <&edma 31 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -322,8 +362,8 @@
                         ti,dual-volt;
                         ti,needs-special-reset;
                         ti,needs-special-hs-handling;
-                        dmas = <&edma 24
-                                &edma 25>;
+                        dmas = <&edma_xbar 24 0 0
+                                &edma_xbar 25 0 0>;
                         dma-names = "tx", "rx";
                         interrupts = <64>;
                         interrupt-parent = <&intc>;
@@ -335,8 +375,8 @@
                         compatible = "ti,omap4-hsmmc";
                         ti,hwmods = "mmc2";
                         ti,needs-special-reset;
-                        dmas = <&edma 2
-                                &edma 3>;
+                        dmas = <&edma 2 0
+                                &edma 3 0>;
                         dma-names = "tx", "rx";
                         interrupts = <28>;
                         interrupt-parent = <&intc>;
@@ -474,10 +514,10 @@
                         interrupts = <65>;
                         ti,spi-num-cs = <2>;
                         ti,hwmods = "spi0";
-                        dmas = <&edma 16
-                                &edma 17
-                                &edma 18
-                                &edma 19>;
+                        dmas = <&edma 16 0
+                                &edma 17 0
+                                &edma 18 0
+                                &edma 19 0>;
                         dma-names = "tx0", "rx0", "tx1", "rx1";
                         status = "disabled";
                 };
@@ -490,10 +530,10 @@
                         interrupts = <125>;
                         ti,spi-num-cs = <2>;
                         ti,hwmods = "spi1";
-                        dmas = <&edma 42
-                                &edma 43
-                                &edma 44
-                                &edma 45>;
+                        dmas = <&edma 42 0
+                                &edma 43 0
+                                &edma 44 0
+                                &edma 45 0>;
                         dma-names = "tx0", "rx0", "tx1", "rx1";
                         status = "disabled";
                 };
@@ -819,6 +859,8 @@
                         ti,no-idle-on-init;
                         reg = <0x50000000 0x2000>;
                         interrupts = <100>;
+                        dmas = <&edma 52>;
+                        dma-names = "rxtx";
                         gpmc,num-cs = <7>;
                         gpmc,num-waitpins = <2>;
                         #address-cells = <2>;
@@ -831,7 +873,7 @@
                         ti,hwmods = "sham";
                         reg = <0x53100000 0x200>;
                         interrupts = <109>;
-                        dmas = <&edma 36>;
+                        dmas = <&edma 36 0>;
                         dma-names = "rx";
                 };
 
@@ -840,8 +882,8 @@
                         ti,hwmods = "aes";
                         reg = <0x53500000 0xa0>;
                         interrupts = <103>;
-                        dmas = <&edma 6>,
-                               <&edma 5>;
+                        dmas = <&edma 6 0>,
+                               <&edma 5 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -854,8 +896,8 @@
                         interrupts = <80>, <81>;
                         interrupt-names = "tx", "rx";
                         status = "disabled";
-                        dmas = <&edma 8>,
-                                <&edma 9>;
+                        dmas = <&edma 8 2>,
+                                <&edma 9 2>;
                         dma-names = "tx", "rx";
                 };
 
@@ -868,8 +910,8 @@
                         interrupts = <82>, <83>;
                         interrupt-names = "tx", "rx";
                         status = "disabled";
-                        dmas = <&edma 10>,
-                                <&edma 11>;
+                        dmas = <&edma 10 2>,
+                                <&edma 11 2>;
                         dma-names = "tx", "rx";
                 };
 
diff --git a/arch/arm/boot/dts/am3517-craneboard.dts b/arch/arm/boot/dts/am3517-craneboard.dts
index 2d40b3f241cd..cb7de1d4e05f 100644
--- a/arch/arm/boot/dts/am3517-craneboard.dts
+++ b/arch/arm/boot/dts/am3517-craneboard.dts
@@ -77,7 +77,7 @@
 &omap3_pmx_core {
         tps_pins: pinmux_tps_pins {
                 pinctrl-single,pins = <
-                        0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
+                        OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index de8791a4d131..df955ba4dc62 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -30,6 +30,7 @@
                 serial5 = &uart5;
                 ethernet0 = &cpsw_emac0;
                 ethernet1 = &cpsw_emac1;
+                spi0 = &qspi;
         };
 
         cpus {
@@ -171,6 +172,14 @@
                                         mboxes = <&mailbox &mbox_wkupm3>;
                                 };
 
+                                edma_xbar: dma-router@f90 {
+                                        compatible = "ti,am335x-edma-crossbar";
+                                        reg = <0xf90 0x40>;
+                                        #dma-cells = <3>;
+                                        dma-requests = <64>;
+                                        dma-masters = <&edma>;
+                                };
+
                                 scm_clockdomains: clockdomains {
                                 };
                         };
@@ -183,14 +192,46 @@
                 };
 
                 edma: edma@49000000 {
-                        compatible = "ti,edma3";
-                        ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
-                        reg =   <0x49000000 0x10000>,
-                                <0x44e10f90 0x10>;
+                        compatible = "ti,edma3-tpcc";
+                        ti,hwmods = "tpcc";
+                        reg =   <0x49000000 0x10000>;
+                        reg-names = "edma3_cc";
                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-                                        <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-                                        <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-                        #dma-cells = <1>;
+                                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "edma3_ccint", "emda3_mperr",
+                                          "edma3_ccerrint";
+                        dma-requests = <64>;
+                        #dma-cells = <2>;
+
+                        ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+                                   <&edma_tptc2 0>;
+
+                        ti,edma-memcpy-channels = <32 33>;
+                };
+
+                edma_tptc0: tptc@49800000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc0";
+                        reg =   <0x49800000 0x100000>;
+                        interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc1: tptc@49900000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc1";
+                        reg =   <0x49900000 0x100000>;
+                        interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc2: tptc@49a00000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc2";
+                        reg =   <0x49a00000 0x100000>;
+                        interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "edma3_tcerrint";
                 };
 
                 uart0: serial@44e09000 {
@@ -495,8 +536,8 @@
                         ti,hwmods = "mmc1";
                         ti,dual-volt;
                         ti,needs-special-reset;
-                        dmas = <&edma 24
-                                &edma 25>;
+                        dmas = <&edma 24 0>,
+                                <&edma 25 0>;
                         dma-names = "tx", "rx";
                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
                         status = "disabled";
@@ -507,8 +548,8 @@
                         reg = <0x481d8000 0x1000>;
                         ti,hwmods = "mmc2";
                         ti,needs-special-reset;
-                        dmas = <&edma 2
-                                &edma 3>;
+                        dmas = <&edma 2 0>,
+                                <&edma 3 0>;
                         dma-names = "tx", "rx";
                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
                         status = "disabled";
@@ -776,7 +817,7 @@
                         compatible = "ti,omap5-sham";
                         ti,hwmods = "sham";
                         reg = <0x53100000 0x300>;
-                        dmas = <&edma 36>;
+                        dmas = <&edma 36 0>;
                         dma-names = "rx";
                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
                 };
@@ -786,8 +827,8 @@
                         ti,hwmods = "aes";
                         reg = <0x53501000 0xa0>;
                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-                        dmas = <&edma 6
-                                &edma 5>;
+                        dmas = <&edma 6 0>,
+                                <&edma 5 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -796,8 +837,8 @@
                         ti,hwmods = "des";
                         reg = <0x53701000 0xa0>;
                         interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-                        dmas = <&edma 34
-                                &edma 33>;
+                        dmas = <&edma 34 0>,
+                                <&edma 33 0>;
                         dma-names = "tx", "rx";
                 };
 
@@ -810,8 +851,8 @@
                         interrupts = <80>, <81>;
                         interrupt-names = "tx", "rx";
                         status = "disabled";
-                        dmas = <&edma 8>,
-                               <&edma 9>;
+                        dmas = <&edma 8 2>,
+                               <&edma 9 2>;
                         dma-names = "tx", "rx";
                 };
 
@@ -824,8 +865,8 @@
                         interrupts = <82>, <83>;
                         interrupt-names = "tx", "rx";
                         status = "disabled";
-                        dmas = <&edma 10>,
-                               <&edma 11>;
+                        dmas = <&edma 10 2>,
+                               <&edma 11 2>;
                         dma-names = "tx", "rx";
                 };
 
@@ -842,6 +883,8 @@
                 gpmc: gpmc@50000000 {
                         compatible = "ti,am3352-gpmc";
                         ti,hwmods = "gpmc";
+                        dmas = <&edma 52>;
+                        dma-names = "rxtx";
                         clocks = <&l3s_gclk>;
                         clock-names = "fck";
                         reg = <0x50000000 0x2000>;
@@ -963,7 +1006,9 @@
 
                 qspi: qspi@47900000 {
                         compatible = "ti,am4372-qspi";
-                        reg = <0x47900000 0x100>;
+                        reg = <0x47900000 0x100>,
+                              <0x30000000 0x4000000>;
+                        reg-names = "qspi_base", "qspi_mmap";
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "qspi";
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
new file mode 100644
index 000000000000..8677f4cce9e9
--- /dev/null
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -0,0 +1,422 @@
+/*
+ * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/pinctrl/am43xx.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "am4372.dtsi"
+
+/ {
+        model = "CompuLab CM-T43";
+        compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
+
+        leds {
+                compatible = "gpio-leds";
+
+                ledb {
+                        label = "cm-t43:green";
+                        gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        vmmc_3v3: fixedregulator-v3_3 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmc_3v3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+                enable-active-high;
+        };
+};
+
+&am43xx_pinmux {
+        pinctrl-names = "default";
+        pinctrl-0 = <&cm_t43_led_pins>;
+
+        cm_t43_led_pins: cm_t43_led_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0xa78, MUX_MODE7)
+                >;
+        };
+
+        i2c0_pins: i2c0_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
+                        AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
+                >;
+        };
+
+        emmc_pins: emmc_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
+                        AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
+                        AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
+                        AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
+                        AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
+                        AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
+                        AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad14.mmc1_dat6 */
+                        AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad15.mmc1_dat7 */
+                        AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                        AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+                >;
+        };
+
+        spi0_pins: pinmux_spi0_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+                        AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
+                        AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
+                        AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+                >;
+        };
+
+        nand_flash_x8: nand_flash_x8 {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
+                        AM4372_IOPAD(0x870, PIN_INPUT_PULLUP  | MUX_MODE0)
+                        AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                        AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+
+        cpsw_default: cpsw_default {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
+                        AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
+                        AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
+                        AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
+                        AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
+                        AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
+                        AM4372_IOPAD(0xa74, MUX_MODE3)
+                        /* Slave 2 */
+                        AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a0.txen */
+                        AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a1.rxctl */
+                        AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a2.txd3 */
+                        AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a3.txd2 */
+                        AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a4.txd1 */
+                        AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a5.txd0 */
+                        AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a6.tclk */
+                        AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a7.rclk */
+                        AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a8.rxd3 */
+                        AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a9.rxd2 */
+                        AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a10.rxd1 */
+                        AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN  | MUX_MODE2)    /* gpmc_a11.rxd0 */
+                        AM4372_IOPAD(0xa38, MUX_MODE7)
+                >;
+        };
+
+        davinci_mdio_default: davinci_mdio_default {
+                pinctrl-single,pins = <
+                        /* MDIO */
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
+                >;
+        };
+};
+
+&gpmc {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&nand_flash_x8>;
+        ranges = <0 0 0x08000000 0x1000000>;
+        nand@0,0 {
+                reg = <0 0 0>;
+                ti,nand-ecc-opt = "bch8";
+                ti,elm-id = <&elm>;
+
+                nand-bus-width = <8>;
+                gpmc,device-width = <1>;
+                gpmc,sync-clk-ps = <0>;
+                gpmc,cs-on-ns = <0>;
+                gpmc,cs-rd-off-ns = <44>;
+                gpmc,cs-wr-off-ns = <44>;
+                gpmc,adv-on-ns = <6>;
+                gpmc,adv-rd-off-ns = <34>;
+                gpmc,adv-wr-off-ns = <44>;
+                gpmc,we-on-ns = <0>;
+                gpmc,we-off-ns = <40>;
+                gpmc,oe-on-ns = <0>;
+                gpmc,oe-off-ns = <54>;
+                gpmc,access-ns = <64>;
+                gpmc,rd-cycle-ns = <82>;
+                gpmc,wr-cycle-ns = <82>;
+                gpmc,wait-on-read = "true";
+                gpmc,wait-on-write = "true";
+                gpmc,bus-turnaround-ns = <0>;
+                gpmc,cycle2cycle-delay-ns = <0>;
+                gpmc,clk-activation-ns = <0>;
+                gpmc,wait-monitoring-ns = <0>;
+                gpmc,wr-access-ns = <40>;
+                gpmc,wr-data-mux-bus-ns = <0>;
+
+                gpmc,wait-pin = <0>;
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+                /* MTD partition table */
+                partition@0 {
+                        label = "kernel";
+                        reg = <0x0 0x00980000>;
+                };
+                partition@980000 {
+                        label = "dtb";
+                        reg = <0x00980000 0x00080000>;
+                };
+                partition@a00000 {
+                        label = "rootfs";
+                        reg = <0x00a00000 0x0>;
+                };
+        };
+};
+
+&i2c0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins>;
+        clock-frequency = <100000>;
+
+        tps65218: tps65218@24 {
+                compatible = "ti,tps65218";
+                reg = <0x24>;
+                interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
+                interrupt-parent = <&gic>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+
+                dcdc1: regulator-dcdc1 {
+                        compatible = "ti,tps65218-dcdc1";
+                        regulator-name = "vdd_core";
+                        regulator-min-microvolt = <912000>;
+                        regulator-max-microvolt = <1144000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                dcdc2: regulator-dcdc2 {
+                        compatible = "ti,tps65218-dcdc2";
+                        regulator-name = "vdd_mpu";
+                        regulator-min-microvolt = <912000>;
+                        regulator-max-microvolt = <1378000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                dcdc3: regulator-dcdc3 {
+                        compatible = "ti,tps65218-dcdc3";
+                        regulator-name = "vdcdc3";
+                        regulator-suspend-enable;
+                        regulator-min-microvolt = <1500000>;
+                        regulator-max-microvolt = <1500000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                dcdc5: regulator-dcdc5 {
+                        compatible = "ti,tps65218-dcdc5";
+                        regulator-name = "v1_0bat";
+                        regulator-min-microvolt = <1000000>;
+                        regulator-max-microvolt = <1000000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                dcdc6: regulator-dcdc6 {
+                        compatible = "ti,tps65218-dcdc6";
+                        regulator-name = "v1_8bat";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                ldo1: regulator-ldo1 {
+                        compatible = "ti,tps65218-ldo1";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+        };
+
+        eeprom_module: at24@50 {
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+};
+
+&gpio0 {
+        status = "okay";
+};
+
+&gpio1 {
+        status = "okay";
+};
+
+&gpio2 {
+        status = "okay";
+};
+
+&gpio3 {
+        status = "okay";
+};
+
+&gpio4 {
+        status = "okay";
+};
+
+&gpio5 {
+        status = "okay";
+};
+
+&mmc2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&emmc_pins>;
+        vmmc-supply = <&vmmc_3v3>;
+        bus-width = <8>;
+        ti,non-removable;
+};
+
+&spi0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi0_pins>;
+        dmas = <&edma 16
+                &edma 17>;
+        dma-names = "tx0", "rx0";
+
+        flash: w25q64cvzpig@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "jedec,spi-nor";
+                reg = <0>;
+                spi-max-frequency = <20000000>;
+                partition@0 {
+                        label = "uboot";
+                        reg = <0x0 0xc0000>;
+                };
+
+                partition@c0000 {
+                        label = "uboot environment";
+                        reg = <0xc0000 0x40000>;
+                };
+
+                partition@100000 {
+                        label = "reserved";
+                        reg = <0x100000 0x100000>;
+                };
+        };
+};
+
+&mac {
+        pinctrl-names = "default";
+        pinctrl-0 = <&cpsw_default>;
+        dual_emac = <1>;
+        status = "okay";
+};
+
+&davinci_mdio {
+        pinctrl-names = "default";
+        pinctrl-0 = <&davinci_mdio_default>;
+        status = "okay";
+};
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii-txid";
+        dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+        phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii-txid";
+        dual_emac_res_vlan = <2>;
+};
+
+&dwc3_1 {
+        status = "okay";
+};
+
+&usb2_phy1 {
+        status = "okay";
+};
+
+&usb1 {
+        dr_mode = "host";
+        status = "okay";
+};
+
+&dwc3_2 {
+        status = "okay";
+};
+
+&usb2_phy2 {
+        status = "okay";
+};
+
+&usb2 {
+        dr_mode = "host";
+        status = "okay";
+        interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "peripheral", "host", "otg";
+};
+
+&elm {
+        status = "okay";
+};
+
+&uart0 {
+        status = "okay";
+};
+
+&tscadc {
+        status = "okay";
+        tsc {
+                ti,wires = <4>;
+                ti,x-plate-resistance = <200>;
+                ti,coordiante-readouts = <5>;
+                ti,wire-config = <0x00 0x11 0x22 0x33>;
+        };
+
+        adc {
+                ti,adc-channels = <4 5 6 7>;
+        };
+};
+
+&cpu {
+        cpu0-supply = <&dcdc2>;
+        operating-points = <1000000 1330000>,
+                           <800000 1260000>,
+                           <720000 1200000>,
+                           <600000 1100000>,
+                           <300000 950000>;
+};
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index d2450ab0a380..64d43325bcbc 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -154,138 +154,138 @@
 
         i2c0_pins: i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
+                        AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
+                        AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         i2c1_pins: i2c1_pins {
                 pinctrl-single,pins = <
-                        0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
-                        0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
+                        AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
+                        AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         ecap0_pins: backlight_pins {
                 pinctrl-single,pins = <
-                        0x164 MUX_MODE0       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+                        AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
                 >;
         };
 
         pixcir_ts_pins: pixcir_ts_pins {
                 pinctrl-single,pins = <
-                        0x264 (PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
+                        AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rxctl */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
-                        0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rmii1_rclk */
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rxd3 */
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rxd2 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rxd1 */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rxd0 */
+                        AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
+                        AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
+                        AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
+                        AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
+                        AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
+                        AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         nand_flash_x8: nand_flash_x8 {
                 pinctrl-single,pins = <
-                        0x0  (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad0.gpmc_ad0 */
-                        0x4  (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad1.gpmc_ad1 */
-                        0x8  (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad2.gpmc_ad2 */
-                        0xc  (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad3.gpmc_ad3 */
-                        0x10 (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad4.gpmc_ad4 */
-                        0x14 (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad5.gpmc_ad5 */
-                        0x18 (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad6.gpmc_ad6 */
-                        0x1c (PIN_INPUT  | MUX_MODE0)   /* gpmc_ad7.gpmc_ad7 */
-                        0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                        0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_wpn.gpmc_wpn */
-                        0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
-                        0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                        0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                        0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                        0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                        AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
+                        AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
+                        AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
+                        AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
+                        AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                        AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                        AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                        AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+                        AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                        AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
+                        AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
+                        AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                        AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                        AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                        AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
                 >;
         };
 
         dss_pins: dss_pins {
                 pinctrl-single,pins = <
-                        0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
-                        0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                        0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
-                        0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
-                        0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                        0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
-                        0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
-                        0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
-                        0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
-                        0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
+                        AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
+                        AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                        AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
+                        AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
+                        AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
+                        AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
+                        AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
+                        AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
+                        AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
 
                 >;
         };
@@ -293,208 +293,208 @@
         display_mux_pins: display_mux_pins {
                 pinctrl-single,pins = <
                         /* GPIO 5_8 to select LCD / HDMI */
-                        0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
+                        AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
                 >;
         };
 
         dcan0_default: dcan0_default_pins {
                 pinctrl-single,pins = <
-                        0x178 (PIN_OUTPUT | MUX_MODE2)          /* uart1_ctsn.d_can0_tx */
-                        0x17c (PIN_INPUT_PULLUP | MUX_MODE2)    /* uart1_rtsn.d_can0_rx */
+                        AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
+                        AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_rtsn.d_can0_rx */
                 >;
         };
 
         dcan0_sleep: dcan0_sleep_pins {
                 pinctrl-single,pins = <
-                        0x178 (PIN_INPUT_PULLUP | MUX_MODE7)    /* uart1_ctsn.gpio0_12 */
-                        0x17c (PIN_INPUT_PULLUP | MUX_MODE7)    /* uart1_rtsn.gpio0_13 */
+                        AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_ctsn.gpio0_12 */
+                        AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rtsn.gpio0_13 */
                 >;
         };
 
         dcan1_default: dcan1_default_pins {
                 pinctrl-single,pins = <
-                        0x180 (PIN_OUTPUT | MUX_MODE2)          /* uart1_rxd.d_can1_tx */
-                        0x184 (PIN_INPUT_PULLUP | MUX_MODE2)    /* uart1_txd.d_can1_rx */
+                        AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)             /* uart1_rxd.d_can1_tx */
+                        AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.d_can1_rx */
                 >;
         };
 
         dcan1_sleep: dcan1_sleep_pins {
                 pinctrl-single,pins = <
-                        0x180 (PIN_INPUT_PULLUP | MUX_MODE7)    /* uart1_rxd.gpio0_14 */
-                        0x184 (PIN_INPUT_PULLUP | MUX_MODE7)    /* uart1_txd.gpio0_15 */
+                        AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rxd.gpio0_14 */
+                        AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_txd.gpio0_15 */
                 >;
         };
 
         vpfe0_pins_default: vpfe0_pins_default {
                 pinctrl-single,pins = <
-                        0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
-                        0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
-                        0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
-                        0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
-                        0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
-                        0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
-                        0x20C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
-                        0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
-                        0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
-                        0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
-                        0x21C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
-                        0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
-                        0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
+                        AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
+                        AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
+                        AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
+                        AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
+                        AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
+                        AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
+                        AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
+                        AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
+                        AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
+                        AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
+                        AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
+                        AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
+                        AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
                 >;
         };
 
         vpfe0_pins_sleep: vpfe0_pins_sleep {
                 pinctrl-single,pins = <
-                        0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
-                        0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
-                        0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
-                        0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
-                        0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
-                        0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
-                        0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
-                        0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
-                        0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
-                        0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
-                        0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
-                        0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
-                        0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
+                        AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
+                        AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
+                        AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
+                        AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
+                        AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
+                        AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
+                        AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
+                        AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
+                        AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
+                        AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
+                        AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
+                        AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
+                        AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
                 >;
         };
 
         vpfe1_pins_default: vpfe1_pins_default {
                 pinctrl-single,pins = <
-                        0x1CC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
-                        0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
-                        0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
-                        0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
-                        0x1DC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
-                        0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
-                        0x1EC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
-                        0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
-                        0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
-                        0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
-                        0x1FC (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
-                        0x200 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
-                        0x204 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
+                        AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
+                        AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
+                        AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
+                        AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
+                        AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
+                        AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
+                        AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
+                        AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
+                        AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
+                        AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
+                        AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
+                        AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
+                        AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
                 >;
         };
 
         vpfe1_pins_sleep: vpfe1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
-                        0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
-                        0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
-                        0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
-                        0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
-                        0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
-                        0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
-                        0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
-                        0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
-                        0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
-                        0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
-                        0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
-                        0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
+                        AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
+                        AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
+                        AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
+                        AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
+                        AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
+                        AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
+                        AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
+                        AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
+                        AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
+                        AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
+                        AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
+                        AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
+                        AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
                 >;
         };
 
         mmc3_pins_default: pinmux_mmc3_pins_default {
                 pinctrl-single,pins = <
-                        0x8c (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
-                        0x88 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
-                        0x44 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
-                        0x48 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
-                        0x4c (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
-                        0x78 (PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
+                        AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
+                        AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
+                        AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
+                        AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
+                        AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
+                        AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
                 >;
         };
 
         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
                 pinctrl-single,pins = <
-                        0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_clk.mmc2_clk */
-                        0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_csn3.mmc2_cmd */
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a1.mmc2_dat0 */
-                        0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a2.mmc2_dat1 */
-                        0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a3.mmc2_dat2 */
-                        0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_be1n.mmc2_dat3 */
+                        AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_clk.mmc2_clk */
+                        AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_csn3.mmc2_cmd */
+                        AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a1.mmc2_dat0 */
+                        AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a2.mmc2_dat1 */
+                        AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a3.mmc2_dat2 */
+                        AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_be1n.mmc2_dat3 */
                 >;
         };
 
         wlan_pins_default: pinmux_wlan_pins_default {
                 pinctrl-single,pins = <
-                        0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)          /* gpmc_a4.gpio1_20 WL_EN */
-                        0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)    /* gpmc_a7.gpio1_23 WL_IRQ*/
-                        0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)          /* gpmc_a0.gpio1_16 BT_EN*/
+                        AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
+                        AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
+                        AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
                 >;
         };
 
         wlan_pins_sleep: pinmux_wlan_pins_sleep {
                 pinctrl-single,pins = <
-                        0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)          /* gpmc_a4.gpio1_20 WL_EN */
-                        0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)    /* gpmc_a7.gpio1_23 WL_IRQ*/
-                        0x40 (PIN_OUTPUT_PULLUP | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
+                        AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
+                        AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
+                        AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)              /* gpmc_a0.gpio1_16 BT_EN*/
                 >;
         };
 
         uart3_pins: uart3_pins {
                 pinctrl-single,pins = <
-                        0x228 (PIN_INPUT | MUX_MODE0)           /* uart3_rxd.uart3_rxd */
-                        0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
-                        0x230 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart3_ctsn.uart3_ctsn */
-                        0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
+                        AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)              /* uart3_rxd.uart3_rxd */
+                        AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
+                        AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart3_ctsn.uart3_ctsn */
+                        AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
                 >;
         };
 
         mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
-                        0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_crs.mcasp1_aclkx */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_rxerr.mcasp1_fsx */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* rmii1_ref_clk.mcasp1_axr3 */
+                        AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
+                        AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
+                        AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
+                        AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
                 >;
         };
 
         mcasp1_sleep_pins: mcasp1_sleep_pins {
                 pinctrl-single,pins = <
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         gpio0_pins: gpio0_pins {
                 pinctrl-single,pins = <
-                        0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
+                        AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
                 >;
         };
 
         emmc_pins_default: emmc_pins_default {
                 pinctrl-single,pins = <
-                        0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
-                        0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
-                        0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
-                        0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
-                        0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
-                        0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
-                        0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
-                        0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
-                        0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
-                        0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+                        AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+                        AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+                        AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+                        AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+                        AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+                        AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+                        AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+                        AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+                        AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                        AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
                 >;
         };
 
         emmc_pins_sleep: emmc_pins_sleep {
                 pinctrl-single,pins = <
-                        0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
-                        0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
-                        0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
-                        0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
-                        0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
-                        0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
-                        0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
-                        0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
-                        0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
-                        0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
+                        AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
+                        AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
+                        AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
+                        AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
+                        AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
+                        AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
+                        AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
+                        AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
+                        AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
+                        AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
                 >;
         };
 };
@@ -734,8 +734,8 @@
         status = "okay";
         /* these are on the crossbar and are outlined in the
            xbar-event-map element */
-        dmas = <&edma 30
-                &edma 31>;
+        dmas = <&edma_xbar 30 0 1>,
+                <&edma_xbar 31 0 2>;
         dma-names = "tx", "rx";
         vmmc-supply = <&vmmcwl_fixed>;
         bus-width = <4>;
@@ -756,11 +756,6 @@
         };
 };
 
-&edma {
-        ti,edma-xbar-event-map = /bits/ 16 <1 30
-                                            2 31>;
-};
-
 &uart3 {
         status = "okay";
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index 337fb91ee74c..76dcfc6d5f0d 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -122,137 +122,137 @@
 &am43xx_pinmux {
         gpio_keys_pins_default: gpio_keys_pins_default {
                 pinctrl-single,pins = <
-                        0x1b8 (PIN_INPUT | MUX_MODE7)   /* cam0_field.gpio4_2 */
+                        AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)      /* cam0_field.gpio4_2 */
                 >;
         };
 
         i2c0_pins_default: i2c0_pins_default {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+                        AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+                        AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         i2c0_pins_sleep: i2c0_pins_sleep {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         i2c2_pins_default: i2c2_pins_default {
                 pinctrl-single,pins = <
-                        0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
-                        0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
+                        AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
+                        AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
                 >;
         };
 
         i2c2_pins_sleep: i2c2_pins_sleep {
                 pinctrl-single,pins = <
-                        0x1e8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x1ec (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         mmc1_pins_default: pinmux_mmc1_pins_default {
                 pinctrl-single,pins = <
-                        0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
-                        0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
-                        0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
-                        0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
-                        0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+                        AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+                        AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+                        AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+                        AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+                        AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+                        AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         ecap0_pins_default: backlight_pins_default {
                 pinctrl-single,pins = <
-                        0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
+                        AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
-                        0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
-                        0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
-                        0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
-                        0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
-                        0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
-                        0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rmii1_rclk */
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd2 */
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd3 */
+                        AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
+                        AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
+                        AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
+                        AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
+                        AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td2 */
+                        AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td3 */
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd2 */
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd3 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                        AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         qspi_pins_default: qspi_pins_default {
                 pinctrl-single,pins = <
-                        0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_csn0.qspi_csn */
-                        0x88 (PIN_OUTPUT | MUX_MODE2)           /* gpmc_csn3.qspi_clk */
-                        0x90 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_advn_ale.qspi_d0 */
-                        0x94 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_oen_ren.qspi_d1 */
-                        0x98 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_wen.qspi_d2 */
-                        0x9c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_be0n_cle.qspi_d3 */
+                        AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)      /* gpmc_csn0.qspi_csn */
+                        AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)             /* gpmc_csn3.qspi_clk */
+                        AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_advn_ale.qspi_d0 */
+                        AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_oen_ren.qspi_d1 */
+                        AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_wen.qspi_d2 */
+                        AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_be0n_cle.qspi_d3 */
                 >;
         };
 
         qspi_pins_sleep: qspi_pins_sleep{
                 pinctrl-single,pins = <
-                        0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am437x-sbc-t43.dts b/arch/arm/boot/dts/am437x-sbc-t43.dts
new file mode 100644
index 000000000000..5f750c0ed6c9
--- /dev/null
+++ b/arch/arm/boot/dts/am437x-sbc-t43.dts
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am437x-cm-t43.dts"
+#include "compulab-sb-som.dtsi"
+
+/ {
+        model = "CompuLab CM-T43 on SB-SOM-T43";
+        compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
+
+        aliases {
+                display0 = &lcd0;
+        };
+};
+
+&am43xx_pinmux {
+        mmc1_pins: pinmux_mmc1_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+                        AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+                        AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+                        AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+                        AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+                        AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+                        AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
+                >;
+        };
+
+        dss_pinctrl_default: dss_pinctrl_default {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
+                        AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9b8, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9bc, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9c0, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9c4, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9c8, PIN_OUTPUT_PULLUP | MUX_MODE2)
+                        AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam1 data 9 -> DSS DATA 16 */
+
+                        AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
+                        AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                        AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
+                        AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
+                        AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
+                        AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
+                        AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
+                        AM4372_IOPAD(0xa20, PIN_OUTPUT_PULLUP | MUX_MODE7)
+                >;
+        };
+
+        uart0_pins_default: uart0_pins_default {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
+                        AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
+                        AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+                        AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                >;
+        };
+
+        i2c1_pins: i2c1_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0xa6c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi2_cs0.i2c1_sda  */
+                        AM4372_IOPAD(0xa60, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi2_sclk.i2c1_scl */
+                >;
+        };
+
+        i2c2_pins: i2c2_pins {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3)  /* uart1_ctsn.i2c2_sda  */
+                        AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3)  /* uart1_rtsn.i2c2_scl */
+                >;
+        };
+
+        usb2_phy1_default: usb2_phy1_default {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+
+        usb2_phy2_default: usb2_phy2_default {
+                pinctrl-single,pins = <
+                        AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
+                >;
+        };
+};
+
+&i2c1 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
+
+        pca9555: pca9555@20 {
+                compatible = "nxp,pca9555";
+                reg = <0x20>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
+
+        eeprom_base: at24@50 {
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+};
+
+&i2c2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins>;
+};
+
+&mmc1 {
+        status = "okay";
+        bus-width = <4>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins>;
+        vmmc-supply = <&vsb_3v3>;
+        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+        wp-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+};
+
+&dss {
+        status = "ok";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&dss_pinctrl_default>;
+
+        port {
+                dpi_lcd_out: endpoint@0 {
+                        remote-endpoint = <&lcd_in>;
+                        data-lines = <24>;
+                };
+        };
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_default>;
+};
+
+&dwc3_1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb2_phy1_default>;
+};
+
+&dwc3_2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb2_phy2_default>;
+};
+
+&lcd0 {
+        enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
+                        &gpio4 28 GPIO_ACTIVE_HIGH>;
+
+        port {
+                lcd_in: endpoint {
+                        remote-endpoint = <&dpi_lcd_out>;
+                        data-lines = <24>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 63de2a1b4315..d82dd6e3f9b1 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -157,259 +157,259 @@
 &am43xx_pinmux {
         matrix_keypad_pins: matrix_keypad_pins {
                 pinctrl-single,pins = <
-                        0x24c (PIN_OUTPUT | MUX_MODE7)  /* gpio5_13.gpio5_13 */
-                        0x250 (PIN_OUTPUT | MUX_MODE7)  /* spi4_sclk.gpio5_4 */
-                        0x254 (PIN_INPUT | MUX_MODE7)   /* spi4_d0.gpio5_5 */
-                        0x258 (PIN_INPUT | MUX_MODE7)   /* spi4_d1.gpio5_5 */
+                        AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7)     /* gpio5_13.gpio5_13 */
+                        AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7)     /* spi4_sclk.gpio5_4 */
+                        AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7)      /* spi4_d0.gpio5_5 */
+                        AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7)      /* spi4_d1.gpio5_5 */
                 >;
         };
 
         leds_pins: leds_pins {
                 pinctrl-single,pins = <
-                        0x228 (PIN_OUTPUT | MUX_MODE7)  /* uart3_rxd.gpio5_2 */
-                        0x22c (PIN_OUTPUT | MUX_MODE7)  /* uart3_txd.gpio5_3 */
-                        0x230 (PIN_OUTPUT | MUX_MODE7)  /* uart3_ctsn.gpio5_0 */
-                        0x234 (PIN_OUTPUT | MUX_MODE7)  /* uart3_rtsn.gpio5_1 */
+                        AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7)     /* uart3_rxd.gpio5_2 */
+                        AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7)     /* uart3_txd.gpio5_3 */
+                        AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7)     /* uart3_ctsn.gpio5_0 */
+                        AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7)     /* uart3_rtsn.gpio5_1 */
                 >;
         };
 
         i2c0_pins: i2c0_pins {
                 pinctrl-single,pins = <
-                        0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
-                        0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
+                        AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
+                        AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
                 >;
         };
 
         i2c1_pins: i2c1_pins {
                 pinctrl-single,pins = <
-                        0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
-                        0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
+                        AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
+                        AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
-                        0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
-                        0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
-                        0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
-                        0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
-                        0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
-                        0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                        AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
+                        AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
+                        AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
+                        AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
+                        AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
+                        AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
+                        AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                 >;
         };
 
         ecap0_pins: backlight_pins {
                 pinctrl-single,pins = <
-                        0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
+                        AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
                 >;
         };
 
         edt_ft5306_ts_pins: edt_ft5306_ts_pins {
                 pinctrl-single,pins = <
-                        0x74 (PIN_INPUT | MUX_MODE7)    /* gpmc_wpn.gpio0_31 */
-                        0x78 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_be1n.gpio1_28 */
+                        AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7)      /* gpmc_wpn.gpio0_31 */
+                        AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7)     /* gpmc_be1n.gpio1_28 */
                 >;
         };
 
         vpfe0_pins_default: vpfe0_pins_default {
                 pinctrl-single,pins = <
-                        0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
-                        0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
-                        0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
-                        0x1bc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
-                        0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
-                        0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
-                        0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
-                        0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
-                        0x20c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
-                        0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
-                        0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
-                        0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
-                        0x21c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
-                        0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
-                        0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
+                        AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
+                        AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
+                        AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
+                        AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
+                        AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
+                        AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
+                        AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
+                        AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
+                        AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
+                        AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
+                        AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
+                        AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
+                        AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
+                        AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
+                        AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
                 >;
         };
 
         vpfe0_pins_sleep: vpfe0_pins_sleep {
                 pinctrl-single,pins = <
-                        0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                        0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                        AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x12c (PIN_OUTPUT | MUX_MODE2)  /* mii1_txclk.rmii1_tclk */
-                        0x114 (PIN_OUTPUT | MUX_MODE2)  /* mii1_txen.rgmii1_tctl */
-                        0x128 (PIN_OUTPUT | MUX_MODE2)  /* mii1_txd0.rgmii1_td0 */
-                        0x124 (PIN_OUTPUT | MUX_MODE2)  /* mii1_txd1.rgmii1_td1 */
-                        0x120 (PIN_OUTPUT | MUX_MODE2)  /* mii1_txd0.rgmii1_td2 */
-                        0x11c (PIN_OUTPUT | MUX_MODE2)  /* mii1_txd1.rgmii1_td3 */
-                        0x130 (PIN_INPUT | MUX_MODE2)   /* mii1_rxclk.rmii1_rclk */
-                        0x118 (PIN_INPUT | MUX_MODE2)   /* mii1_rxdv.rgmii1_rctl */
-                        0x140 (PIN_INPUT | MUX_MODE2)   /* mii1_rxd0.rgmii1_rd0 */
-                        0x13c (PIN_INPUT | MUX_MODE2)   /* mii1_rxd1.rgmii1_rd1 */
-                        0x138 (PIN_INPUT | MUX_MODE2)   /* mii1_rxd0.rgmii1_rd2 */
-                        0x134 (PIN_INPUT | MUX_MODE2)   /* mii1_rxd1.rgmii1_rd3 */
+                        AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)     /* mii1_txclk.rmii1_tclk */
+                        AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)     /* mii1_txen.rgmii1_tctl */
+                        AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd0.rgmii1_td0 */
+                        AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd1.rgmii1_td1 */
+                        AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd0.rgmii1_td2 */
+                        AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd1.rgmii1_td3 */
+                        AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2)      /* mii1_rxclk.rmii1_rclk */
+                        AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2)      /* mii1_rxdv.rgmii1_rctl */
+                        AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2)      /* mii1_rxd0.rgmii1_rd0 */
+                        AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)      /* mii1_rxd1.rgmii1_rd1 */
+                        AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2)      /* mii1_rxd0.rgmii1_rd2 */
+                        AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2)      /* mii1_rxd1.rgmii1_rd3 */
 
                         /* Slave 2 */
-                        0x58 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a6.rgmii2_tclk */
-                        0x40 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a0.rgmii2_tctl */
-                        0x54 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a5.rgmii2_td0 */
-                        0x50 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a4.rgmii2_td1 */
-                        0x4c (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a3.rgmii2_td2 */
-                        0x48 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_a2.rgmii2_td3 */
-                        0x5c (PIN_INPUT | MUX_MODE2)    /* gpmc_a7.rgmii2_rclk */
-                        0x44 (PIN_INPUT | MUX_MODE2)    /* gpmc_a1.rgmii2_rtcl */
-                        0x6c (PIN_INPUT | MUX_MODE2)    /* gpmc_a11.rgmii2_rd0 */
-                        0x68 (PIN_INPUT | MUX_MODE2)    /* gpmc_a10.rgmii2_rd1 */
-                        0x64 (PIN_INPUT | MUX_MODE2)    /* gpmc_a9.rgmii2_rd2 */
-                        0x60 (PIN_INPUT | MUX_MODE2)    /* gpmc_a8.rgmii2_rd3 */
+                        AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a6.rgmii2_tclk */
+                        AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a0.rgmii2_tctl */
+                        AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a5.rgmii2_td0 */
+                        AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a4.rgmii2_td1 */
+                        AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a3.rgmii2_td2 */
+                        AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a2.rgmii2_td3 */
+                        AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2)      /* gpmc_a7.rgmii2_rclk */
+                        AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2)      /* gpmc_a1.rgmii2_rtcl */
+                        AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2)      /* gpmc_a11.rgmii2_rd0 */
+                        AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2)      /* gpmc_a10.rgmii2_rd1 */
+                        AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2)      /* gpmc_a9.rgmii2_rd2 */
+                        AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2)      /* gpmc_a8.rgmii2_rd3 */
                 >;
         };
 
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 reset value */
-                        0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 
                         /* Slave 2 reset value */
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)   /* mdio_data.mdio_data */
-                        0x14c (PIN_OUTPUT | MUX_MODE0)                  /* mdio_clk.mdio_clk */
+                        AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)      /* mdio_data.mdio_data */
+                        AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0)                     /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
                         /* MDIO reset value */
-                        0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         dss_pins: dss_pins {
                 pinctrl-single,pins = <
-                        0x020 (PIN_OUTPUT | MUX_MODE1)  /* gpmc ad 8 -> DSS DATA 23 */
-                        0x024 (PIN_OUTPUT | MUX_MODE1)
-                        0x028 (PIN_OUTPUT | MUX_MODE1)
-                        0x02c (PIN_OUTPUT | MUX_MODE1)
-                        0x030 (PIN_OUTPUT | MUX_MODE1)
-                        0x034 (PIN_OUTPUT | MUX_MODE1)
-                        0x038 (PIN_OUTPUT | MUX_MODE1)
-                        0x03c (PIN_OUTPUT | MUX_MODE1)  /* gpmc ad 15 -> DSS DATA 16 */
-                        0x0a0 (PIN_OUTPUT | MUX_MODE0)  /* DSS DATA 0 */
-                        0x0a4 (PIN_OUTPUT | MUX_MODE0)
-                        0x0a8 (PIN_OUTPUT | MUX_MODE0)
-                        0x0ac (PIN_OUTPUT | MUX_MODE0)
-                        0x0b0 (PIN_OUTPUT | MUX_MODE0)
-                        0x0b4 (PIN_OUTPUT | MUX_MODE0)
-                        0x0b8 (PIN_OUTPUT | MUX_MODE0)
-                        0x0bc (PIN_OUTPUT | MUX_MODE0)
-                        0x0c0 (PIN_OUTPUT | MUX_MODE0)
-                        0x0c4 (PIN_OUTPUT | MUX_MODE0)
-                        0x0c8 (PIN_OUTPUT | MUX_MODE0)
-                        0x0cc (PIN_OUTPUT | MUX_MODE0)
-                        0x0d0 (PIN_OUTPUT | MUX_MODE0)
-                        0x0d4 (PIN_OUTPUT | MUX_MODE0)
-                        0x0d8 (PIN_OUTPUT | MUX_MODE0)
-                        0x0dc (PIN_OUTPUT | MUX_MODE0)  /* DSS DATA 15 */
-                        0x0e0 (PIN_OUTPUT | MUX_MODE0)  /* DSS VSYNC */
-                        0x0e4 (PIN_OUTPUT | MUX_MODE0)  /* DSS HSYNC */
-                        0x0e8 (PIN_OUTPUT | MUX_MODE0)  /* DSS PCLK */
-                        0x0ec (PIN_OUTPUT | MUX_MODE0)  /* DSS AC BIAS EN */
+                        AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)     /* gpmc ad 8 -> DSS DATA 23 */
+                        AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
+                        AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)     /* gpmc ad 15 -> DSS DATA 16 */
+                        AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)     /* DSS DATA 0 */
+                        AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
+                        AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)     /* DSS DATA 15 */
+                        AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)     /* DSS VSYNC */
+                        AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)     /* DSS HSYNC */
+                        AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)     /* DSS PCLK */
+                        AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)     /* DSS AC BIAS EN */
 
                 >;
         };
 
         qspi_pins: qspi_pins {
                 pinctrl-single,pins = <
-                        0x7c (PIN_OUTPUT | MUX_MODE3)   /* gpmc_csn0.qspi_csn */
-                        0x88 (PIN_OUTPUT | MUX_MODE2)   /* gpmc_csn3.qspi_clk */
-                        0x90 (PIN_INPUT | MUX_MODE3)    /* gpmc_advn_ale.qspi_d0 */
-                        0x94 (PIN_INPUT | MUX_MODE3)    /* gpmc_oen_ren.qspi_d1 */
-                        0x98 (PIN_INPUT | MUX_MODE3)    /* gpmc_wen.qspi_d2 */
-                        0x9c (PIN_INPUT | MUX_MODE3)    /* gpmc_be0n_cle.qspi_d3 */
+                        AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3)     /* gpmc_csn0.qspi_csn */
+                        AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)     /* gpmc_csn3.qspi_clk */
+                        AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3)      /* gpmc_advn_ale.qspi_d0 */
+                        AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3)      /* gpmc_oen_ren.qspi_d1 */
+                        AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3)      /* gpmc_wen.qspi_d2 */
+                        AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3)      /* gpmc_be0n_cle.qspi_d3 */
                 >;
         };
 
         mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_crs.mcasp1_aclkx */
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_rxerr.mcasp1_fsx */
-                        0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* rmii1_ref_clk.mcasp1_axr3 */
+                        AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
+                        AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
+                        AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
+                        AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
                 >;
         };
 
         mcasp1_pins_sleep: mcasp1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                        AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                 >;
         };
 
         lcd_pins: lcd_pins {
                 pinctrl-single,pins = <
-                        0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
+                        AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
                 >;
         };
 
         usb1_pins: usb1_pins {
                 pinctrl-single,pins = <
-                        0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
+                        AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
                 >;
         };
 
         usb2_pins: usb2_pins {
                 pinctrl-single,pins = <
-                        0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
+                        AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 47954ed990f8..746fd2b17958 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -144,228 +144,228 @@
                 cpsw_default: cpsw_default {
                         pinctrl-single,pins = <
                                 /* Slave 1 */
-                                0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs */
-                                0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxerr.rmii1_rxerr */
-                                0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
-                                0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxdv.rmii1_rxdv */
-                                0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
-                                0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
-                                0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.rmii1_rxd1 */
-                                0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.rmii1_rxd0 */
-                                0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_refclk.rmii1_refclk */
+                                AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs */
+                                AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
+                                AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txen.rmii1_txen */
+                                AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxdv.rmii1_rxdv */
+                                AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd1.rmii1_txd1 */
+                                AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd0.rmii1_txd0 */
+                                AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
+                                AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
+                                AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
                         >;
                 };
 
                 cpsw_sleep: cpsw_sleep {
                         pinctrl-single,pins = <
                                 /* Slave 1 reset value */
-                                0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
                         >;
                 };
 
                 davinci_mdio_default: davinci_mdio_default {
                         pinctrl-single,pins = <
                                 /* MDIO */
-                                0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
-                                0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+                                AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
+                                AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
                         >;
                 };
 
                 davinci_mdio_sleep: davinci_mdio_sleep {
                         pinctrl-single,pins = <
                                 /* MDIO reset value */
-                                0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
                         >;
                 };
 
                 i2c0_pins: pinmux_i2c0_pins {
                         pinctrl-single,pins = <
-                                0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
-                                0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                                AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
+                                AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
                         >;
                 };
 
                 nand_flash_x8: nand_flash_x8 {
                         pinctrl-single,pins = <
-                                0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a0.SELQSPIorNAND/GPIO */
-                                0x0  (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad0.gpmc_ad0 */
-                                0x4  (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad1.gpmc_ad1 */
-                                0x8  (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad2.gpmc_ad2 */
-                                0xc  (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad3.gpmc_ad3 */
-                                0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad4.gpmc_ad4 */
-                                0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad5.gpmc_ad5 */
-                                0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad6.gpmc_ad6 */
-                                0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* gpmc_ad7.gpmc_ad7 */
-                                0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
-                                0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_wpn.gpmc_wpn */
-                                0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
-                                0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
-                                0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
-                                0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
-                                0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                                AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.SELQSPIorNAND/GPIO */
+                                AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
+                                AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
+                                AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
+                                AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
+                                AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                                AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                                AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                                AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+                                AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
+                                AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
+                                AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
+                                AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
+                                AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
+                                AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
+                                AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
                         >;
                 };
 
                 ecap0_pins: backlight_pins {
                         pinctrl-single,pins = <
-                                0x164 MUX_MODE0         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+                                AM4372_IOPAD(0x964, MUX_MODE0)         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
                         >;
                 };
 
                 i2c2_pins: pinmux_i2c2_pins {
                         pinctrl-single,pins = <
-                                0x1c0 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
-                                0x1c4 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
+                                AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
+                                AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
                         >;
                 };
 
                 spi0_pins: pinmux_spi0_pins {
                         pinctrl-single,pins = <
-                                0x150 (PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
-                                0x154 (PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
-                                0x158 (PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
-                                0x15c (PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
+                                AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
+                                AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
+                                AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
+                                AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
                         >;
                 };
 
                 spi1_pins: pinmux_spi1_pins {
                         pinctrl-single,pins = <
-                                0x190 (PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
-                                0x194 (PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
-                                0x198 (PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
-                                0x19c (PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
+                                AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
+                                AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
+                                AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
+                                AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
                         >;
                 };
 
                 mmc1_pins: pinmux_mmc1_pins {
                         pinctrl-single,pins = <
-                                0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+                                AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
                         >;
                 };
 
                 qspi1_default: qspi1_default {
                         pinctrl-single,pins = <
-                                0x7c (PIN_INPUT_PULLUP | MUX_MODE3)
-                                0x88 (PIN_INPUT_PULLUP | MUX_MODE2)
-                                0x90 (PIN_INPUT_PULLUP | MUX_MODE3)
-                                0x94 (PIN_INPUT_PULLUP | MUX_MODE3)
-                                0x98 (PIN_INPUT_PULLUP | MUX_MODE3)
-                                0x9c (PIN_INPUT_PULLUP | MUX_MODE3)
+                                AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
+                                AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
+                                AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
+                                AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
+                                AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
+                                AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
                         >;
                 };
 
                 pixcir_ts_pins: pixcir_ts_pins {
                         pinctrl-single,pins = <
-                                0x44 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a1.gpio1_17 */
+                                AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a1.gpio1_17 */
                         >;
                 };
 
                 hdq_pins: pinmux_hdq_pins {
                         pinctrl-single,pins = <
-                                0x234 (PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
+                                AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
                         >;
                 };
 
                 dss_pins: dss_pins {
                         pinctrl-single,pins = <
-                                0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
-                                0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x02C (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
-                                0x03C (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
-                                0x0A0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
-                                0x0A4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0A8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0AC (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0B0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0B4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0B8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0BC (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0C0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0C4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0C8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0CC (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0D0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0D4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0D8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
-                                0x0DC (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
-                                0x0E0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
-                                0x0E4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
-                                0x0E8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
-                                0x0EC (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
+                                AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
+                                AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
+                                AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
+                                AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
+                                AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
+                                AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
+                                AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
+                                AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
+                                AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
+                                AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
                         >;
                 };
 
                 display_mux_pins: display_mux_pins {
                         pinctrl-single,pins = <
                                 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
-                                0x08C (PIN_OUTPUT_PULLUP | MUX_MODE7)
+                                AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
                         >;
                 };
 
                 vpfe1_pins_default: vpfe1_pins_default {
                         pinctrl-single,pins = <
-                                0x1cc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
-                                0x1d0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
-                                0x1d4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
-                                0x1d8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
-                                0x1dc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
-                                0x1e8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
-                                0x1ec (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
-                                0x1f0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
-                                0x1f4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
-                                0x1f8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
-                                0x1fc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
-                                0x200 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
-                                0x204 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
+                                AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
+                                AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
+                                AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
+                                AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
+                                AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
+                                AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
+                                AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
+                                AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
+                                AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
+                                AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
+                                AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
+                                AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
+                                AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
                         >;
                 };
 
                 vpfe1_pins_sleep: vpfe1_pins_sleep {
                         pinctrl-single,pins = <
-                                0x1cc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1d0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1d4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1d8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
-                                0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
+                                AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
                         >;
                 };
 
                 mcasp1_pins: mcasp1_pins {
                         pinctrl-single,pins = <
-                                0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
-                                0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
-                                0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
-                                0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
+                                AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
+                                AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
+                                AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
+                                AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
                         >;
                 };
 
                 mcasp1_sleep_pins: mcasp1_sleep_pins {
                         pinctrl-single,pins = <
-                                0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
-                                0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                                AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
                         >;
                 };
 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 00352e761b8c..36c0fa6c362a 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -181,97 +181,97 @@
 &dra7_pmx_core {
         leds_pins_default: leds_pins_default {
                 pinctrl-single,pins = <
-                        0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
-                        0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
-                        0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
-                        0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
+                        DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14)      /* spi1_d1.gpio7_8 */
+                        DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14)      /* spi1_d0.gpio7_9 */
+                        DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14)      /* spi2_sclk.gpio7_14 */
+                        DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14)      /* spi2_d1.gpio7_15 */
                 >;
         };
 
         i2c1_pins_default: i2c1_pins_default {
                 pinctrl-single,pins = <
-                        0x400 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.sda */
-                        0x404 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.scl */
+                        DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
+                        DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
                 >;
         };
 
         hdmi_pins: pinmux_hdmi_pins {
                 pinctrl-single,pins = <
-                        0x408 (PIN_INPUT | MUX_MODE1)   /* i2c2_sda.hdmi1_ddc_scl */
-                        0x40c (PIN_INPUT | MUX_MODE1)   /* i2c2_scl.hdmi1_ddc_sda */
+                        DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1)        /* i2c2_sda.hdmi1_ddc_scl */
+                        DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1)        /* i2c2_scl.hdmi1_ddc_sda */
                 >;
         };
 
         i2c3_pins_default: i2c3_pins_default {
                 pinctrl-single,pins = <
-                        0x2a4 (PIN_INPUT| MUX_MODE10)   /* mcasp1_aclkx.i2c3_sda */
-                        0x2a8 (PIN_INPUT| MUX_MODE10)   /* mcasp1_fsx.i2c3_scl */
+                        DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10)        /* mcasp1_aclkx.i2c3_sda */
+                        DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10)        /* mcasp1_fsx.i2c3_scl */
                 >;
         };
 
         uart3_pins_default: uart3_pins_default {
                 pinctrl-single,pins = <
-                        0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
-                        0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
+                        DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
+                        DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
                 >;
         };
 
         mmc1_pins_default: mmc1_pins_default {
                 pinctrl-single,pins = <
-                        0x36c (PIN_INPUT | MUX_MODE14)  /* mmc1sdcd.gpio219 */
-                        0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
-                        0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-                        0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-                        0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-                        0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-                        0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+                        DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1sdcd.gpio219 */
+                        DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+                        DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+                        DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+                        DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+                        DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+                        DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
                 >;
         };
 
         mmc2_pins_default: mmc2_pins_default {
                 pinctrl-single,pins = <
-                        0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
-                        0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
-                        0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
-                        0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
-                        0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
-                        0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
-                        0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
-                        0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
-                        0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
-                        0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
+                        DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+                        DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+                        DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+                        DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+                        DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+                        DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+                        DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+                        DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+                        DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+                        DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
                 >;
         };
 
         cpsw_pins_default: cpsw_pins_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x250 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_tclk */
-                        0x254 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_tctl */
-                        0x258 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td3 */
-                        0x25c (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td2 */
-                        0x260 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td1 */
-                        0x264 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td0 */
-                        0x268 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rclk */
-                        0x26c (PIN_INPUT | MUX_MODE0)   /* rgmii1_rctl */
-                        0x270 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd3 */
-                        0x274 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd2 */
-                        0x278 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd1 */
-                        0x27c (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd0 */
+                        DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_tclk */
+                        DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_tctl */
+                        DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_td3 */
+                        DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_td2 */
+                        DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_td1 */
+                        DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0)       /* rgmii1_td0 */
+                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0)        /* rgmii1_rclk */
+                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0)        /* rgmii1_rctl */
+                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0)        /* rgmii1_rd3 */
+                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0)        /* rgmii1_rd2 */
+                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0)        /* rgmii1_rd1 */
+                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0)        /* rgmii1_rd0 */
 
                         /* Slave 2 */
-                        0x198 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_tclk */
-                        0x19c (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_tctl */
-                        0x1a0 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td3 */
-                        0x1a4 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td2 */
-                        0x1a8 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td1 */
-                        0x1ac (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td0 */
-                        0x1b0 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rclk */
-                        0x1b4 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rctl */
-                        0x1b8 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd3 */
-                        0x1bc (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd2 */
-                        0x1c0 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd1 */
-                        0x1c4 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd0 */
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_tclk */
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_tctl */
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_td3 */
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_td2 */
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_td1 */
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* rgmii2_td0 */
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3)        /* rgmii2_rclk */
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3)        /* rgmii2_rctl */
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3)        /* rgmii2_rd3 */
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3)        /* rgmii2_rd2 */
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3)        /* rgmii2_rd1 */
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3)        /* rgmii2_rd0 */
                 >;
 
         };
@@ -279,115 +279,115 @@
         cpsw_pins_sleep: cpsw_pins_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x250 (PIN_INPUT | MUX_MODE15)
-                        0x254 (PIN_INPUT | MUX_MODE15)
-                        0x258 (PIN_INPUT | MUX_MODE15)
-                        0x25c (PIN_INPUT | MUX_MODE15)
-                        0x260 (PIN_INPUT | MUX_MODE15)
-                        0x264 (PIN_INPUT | MUX_MODE15)
-                        0x268 (PIN_INPUT | MUX_MODE15)
-                        0x26c (PIN_INPUT | MUX_MODE15)
-                        0x270 (PIN_INPUT | MUX_MODE15)
-                        0x274 (PIN_INPUT | MUX_MODE15)
-                        0x278 (PIN_INPUT | MUX_MODE15)
-                        0x27c (PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
 
                         /* Slave 2 */
-                        0x198 (PIN_INPUT | MUX_MODE15)
-                        0x19c (PIN_INPUT | MUX_MODE15)
-                        0x1a0 (PIN_INPUT | MUX_MODE15)
-                        0x1a4 (PIN_INPUT | MUX_MODE15)
-                        0x1a8 (PIN_INPUT | MUX_MODE15)
-                        0x1ac (PIN_INPUT | MUX_MODE15)
-                        0x1b0 (PIN_INPUT | MUX_MODE15)
-                        0x1b4 (PIN_INPUT | MUX_MODE15)
-                        0x1b8 (PIN_INPUT | MUX_MODE15)
-                        0x1bc (PIN_INPUT | MUX_MODE15)
-                        0x1c0 (PIN_INPUT | MUX_MODE15)
-                        0x1c4 (PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
                 >;
         };
 
         davinci_mdio_pins_default: davinci_mdio_pins_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* mdio_mclk */
-                        0x240 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mdio_d */
+                        DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* mdio_mclk */
+                        DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
                 >;
         };
 
         davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
                 pinctrl-single,pins = <
-                        0x23c (PIN_INPUT | MUX_MODE15)
-                        0x240 (PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
                 >;
         };
 
         tps659038_pins_default: tps659038_pins_default {
                 pinctrl-single,pins = <
-                        0x418 (PIN_INPUT_PULLUP | MUX_MODE14)   /* wakeup0.gpio1_0 */
+                        DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14)        /* wakeup0.gpio1_0 */
                 >;
         };
 
         tmp102_pins_default: tmp102_pins_default {
                 pinctrl-single,pins = <
-                        0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14)   /* spi2_d0.gpio7_16 */
+                        DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14)        /* spi2_d0.gpio7_16 */
                 >;
         };
 
         mcp79410_pins_default: mcp79410_pins_default {
                 pinctrl-single,pins = <
-                        0x424 (PIN_INPUT_PULLUP | MUX_MODE1)    /* wakeup3.sys_nirq1 */
+                        DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
                 >;
         };
 
         usb1_pins: pinmux_usb1_pins {
                 pinctrl-single,pins = <
-                        0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
+                        DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
                 >;
         };
 
         extcon_usb1_pins: extcon_usb1_pins {
                 pinctrl-single,pins = <
-                        0x3ec (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
+                        DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
                 >;
         };
 
         tpd12s015_pins: pinmux_tpd12s015_pins {
                 pinctrl-single,pins = <
-                        0x3b0 (PIN_OUTPUT | MUX_MODE14)         /* gpio7_10 CT_CP_HPD */
-                        0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
-                        0x370 (PIN_OUTPUT | MUX_MODE14)         /* gpio6_28 LS_OE */
+                        DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14)              /* gpio7_10 CT_CP_HPD */
+                        DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14)      /* gpio7_12 HPD */
+                        DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14)              /* gpio6_28 LS_OE */
                 >;
         };
 
         clkout2_pins_default: clkout2_pins_default {
                 pinctrl-single,pins = <
-                        0x294 (PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
+                        DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9)      /* xref_clk0.clkout2 */
                 >;
         };
 
         clkout2_pins_sleep: clkout2_pins_sleep {
                 pinctrl-single,pins = <
-                        0x294 (PIN_INPUT | MUX_MODE15)  /* xref_clk0.clkout2 */
+                        DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15)       /* xref_clk0.clkout2 */
                 >;
         };
 
         mcasp3_pins_default: mcasp3_pins_default {
                 pinctrl-single,pins = <
-                        0x324 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
-                        0x328 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
-                        0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
-                        0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
                 >;
         };
 
         mcasp3_pins_sleep: mcasp3_pins_sleep {
                 pinctrl-single,pins = <
-                        0x324 (PIN_INPUT | MUX_MODE15)
-                        0x328 (PIN_INPUT | MUX_MODE15)
-                        0x32c (PIN_INPUT | MUX_MODE15)
-                        0x330 (PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
new file mode 100644
index 000000000000..c53882643ae9
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -0,0 +1,617 @@
+/*
+ * Support for CompuLab CL-SOM-AM57x System-on-Module
+ *
+ * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "dra74x.dtsi"
+
+/ {
+        model = "CompuLab CL-SOM-AM57x";
+        compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&leds_pins_default>;
+
+                led@0 {
+                        label = "cl-som-am57x:green";
+                        gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+        };
+
+        vdd_3v3: fixedregulator-vdd_3v3 {
+                compatible = "regulator-fixed";
+                regulator-name = "vdd_3v3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        ads7846reg: fixedregulator-ads7846-reg {
+                compatible = "regulator-fixed";
+                regulator-name = "ads7846-reg";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        sound0: sound@0 {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "CL-SOM-AM57x-Sound-Card";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,bitclock-master = <&dailink0_master>;
+                simple-audio-card,frame-master = <&dailink0_master>;
+                simple-audio-card,widgets =
+                                        "Headphone", "Headphone Jack",
+                                        "Microphone", "Microphone Jack",
+                                        "Line", "Line Jack";
+                simple-audio-card,routing =
+                                        "Headphone Jack", "RHPOUT",
+                                        "Headphone Jack", "LHPOUT",
+                                        "LLINEIN", "Line Jack",
+                                        "MICIN", "Mic Bias",
+                                        "Mic Bias", "Microphone Jack";
+
+                dailink0_master: simple-audio-card,cpu {
+                        sound-dai = <&mcasp3>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&wm8731>;
+                        system-clock-frequency = <12000000>;
+                };
+        };
+};
+
+&dra7_pmx_core {
+        leds_pins_default: leds_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14)      /* gpmc_a15.gpio2_5 */
+                >;
+        };
+
+        i2c1_pins_default: i2c1_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
+                        DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
+                >;
+        };
+
+        i2c3_pins_default: i2c3_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10)        /* mcasp1_aclkx.i2c3_sda */
+                        DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10)        /* mcasp1_fsx.i2c3_scl */
+                >;
+        };
+
+        i2c4_pins_default: i2c4_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10)        /* mcasp1_acl.i2c4_sda */
+                        DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10)        /* mcasp1_fsr.i2c4_scl */
+                >;
+        };
+
+        tps659038_pins_default: tps659038_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
+                >;
+        };
+
+        mmc2_pins_default: mmc2_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+                        DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+                        DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+                        DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+                        DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+                        DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+                        DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+                        DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+                        DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+                        DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
+                >;
+        };
+
+        qspi1_pins: pinmux_qspi1_pins {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1)        /* gpmc_a13.qspi1_rtclk */
+                        DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1)        /* gpmc_a16.qspi1_d0 */
+                        DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1)        /* gpmc_a17.qspi1_d1 */
+                        DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1)        /* qpmc_a18.qspi1_sclk */
+                        DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
+                        DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
+                >;
+        };
+
+        cpsw_pins_default: cpsw_pins_default {
+                pinctrl-single,pins = <
+                        /* Slave at addr 0x0 */
+                        DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_tclk */
+                        DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_tctl */
+                        DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td3 */
+                        DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td2 */
+                        DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td1 */
+                        DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td0 */
+                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
+                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
+                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
+                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
+                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
+                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
+
+                        /* Slave at addr 0x1 */
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d12.rgmii1_tclk */
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d13.rgmii1_tctl */
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d14.rgmii1_td3 */
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d15.rgmii1_td2 */
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d16.rgmii1_td1 */
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d17.rgmii1_td0 */
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
+                >;
+        };
+
+        cpsw_pins_sleep: cpsw_pins_sleep {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
+
+                        /* Slave 2 */
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
+                >;
+        };
+
+        davinci_mdio_pins_default: davinci_mdio_pins_default {
+                pinctrl-single,pins = <
+                        /* MDIO */
+                        DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
+                        DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
+                >;
+        };
+
+        davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
+                >;
+        };
+
+        ads7846_pins: pinmux_ads7846_pins {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
+                >;
+        };
+
+        mcasp3_pins_default: mcasp3_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
+                >;
+        };
+
+        mcasp3_pins_sleep: mcasp3_pins_sleep {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
+                >;
+        };
+};
+
+&i2c1 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins_default>;
+        clock-frequency = <400000>;
+};
+
+&i2c3 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c3_pins_default>;
+        clock-frequency = <400000>;
+};
+
+&i2c4 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c4_pins_default>;
+        clock-frequency = <400000>;
+
+        tps659038: tps659038@58 {
+                compatible = "ti,tps659038";
+                reg = <0x58>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&tps659038_pins_default>;
+
+                #interrupt-cells = <2>;
+                interrupt-controller;
+
+                ti,system-power-controller;
+
+                tps659038_pmic {
+                        compatible = "ti,tps659038-pmic";
+
+                        regulators {
+                                smps12_reg: smps12 {
+                                        /* VDD_MPU */
+                                        regulator-name = "smps12";
+                                        regulator-min-microvolt = < 850000>;
+                                        regulator-max-microvolt = <1250000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps3_reg: smps3 {
+                                        /* VDD_DDR */
+                                        regulator-name = "smps3";
+                                        regulator-min-microvolt = <1500000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps45_reg: smps45 {
+                                        /* VDD_DSPEVE */
+                                        regulator-name = "smps45";
+                                        regulator-min-microvolt = < 850000>;
+                                        regulator-max-microvolt = <1250000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps6_reg: smps6 {
+                                        /* VDD_GPU */
+                                        regulator-name = "smps6";
+                                        regulator-min-microvolt = < 850000>;
+                                        regulator-max-microvolt = <1250000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps7_reg: smps7 {
+                                        /* VDD_CORE */
+                                        regulator-name = "smps7";
+                                        regulator-min-microvolt = < 850000>;
+                                        regulator-max-microvolt = <1160000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps8_reg: smps8 {
+                                        /* VDD_IVA */
+                                        regulator-name = "smps8";
+                                        regulator-min-microvolt = < 850000>;
+                                        regulator-max-microvolt = <1250000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                smps9_reg: smps9 {
+                                        /* PMIC_3V3 */
+                                        regulator-name = "smps9";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+
+                                ldo1_reg: ldo1 {
+                                        /* VDD_SD / VDDSHV8  */
+                                        regulator-name = "ldo1";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-boot-on;
+                                        regulator-always-on;
+                                };
+
+                                ldo2_reg: ldo2 {
+                                        /* VDD_1V8 */
+                                        regulator-name = "ldo2";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                ldo3_reg: ldo3 {
+                                        /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
+                                        regulator-name = "ldo3";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                ldo4_reg: ldo4 {
+                                        /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
+                                        regulator-name = "ldo4";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                ldo9_reg: ldo9 {
+                                        /* VDD_RTC */
+                                        regulator-name = "ldo9";
+                                        regulator-min-microvolt = <1050000>;
+                                        regulator-max-microvolt = <1050000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                ldoln_reg: ldoln {
+                                        /* VDDA_1V8_PLL */
+                                        regulator-name = "ldoln";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                ldousb_reg: ldousb {
+                                        /* VDDA_3V_USB: VDDA_USBHS33 */
+                                        regulator-name = "ldousb";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                /* regen1 not used */
+                        };
+                };
+
+                tps659038_pwr_button: tps659038_pwr_button {
+                        compatible = "ti,palmas-pwrbutton";
+                        interrupt-parent = <&tps659038>;
+                        interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+                        wakeup-source;
+                        ti,palmas-long-press-seconds = <12>;
+                };
+
+                tps659038_gpio: tps659038_gpio {
+                        compatible = "ti,palmas-gpio";
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+        };
+
+        rtc0: rtc@56 {
+                compatible = "emmicro,em3027";
+                reg = <0x56>;
+        };
+
+        eeprom_module: atmel@50 {
+                compatible = "atmel,24c08";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+
+        wm8731: wm8731@1a {
+                #sound-dai-cells = <0>;
+                compatible = "wlf,wm8731";
+                reg = <0x1a>;
+                status = "okay";
+        };
+};
+
+&cpu0 {
+        cpu0-supply = <&smps12_reg>;
+        voltage-tolerance = <1>;
+};
+
+&sata {
+        status = "okay";
+};
+
+&mailbox5 {
+        status = "okay";
+        mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
+                status = "okay";
+        };
+        mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
+                status = "okay";
+        };
+};
+
+&mailbox6 {
+        status = "okay";
+        mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
+                status = "okay";
+        };
+        mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
+                status = "okay";
+        };
+};
+
+&mmc2 {
+        status = "okay";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins_default>;
+
+        vmmc-supply = <&vdd_3v3>;
+        bus-width = <8>;
+        ti,non-removable;
+        cap-mmc-dual-data-rate;
+};
+
+&qspi {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&qspi1_pins>;
+
+        spi-max-frequency = <20000000>;
+
+        spi_flash: spi_flash@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "spansion,m25p80", "jedec,spi-nor";
+                reg = <0>;                              /* CS0 */
+                spi-max-frequency = <20000000>;
+
+                partition@0 {
+                        label = "uboot";
+                        reg = <0x0 0xc0000>;
+                };
+
+                partition@c0000 {
+                        label = "uboot environment";
+                        reg = <0xc0000 0x40000>;
+                };
+
+                partition@100000 {
+                        label = "reserved";
+                        reg = <0x100000 0x0>;
+                };
+        };
+
+        /* touch controller */
+        ads7846@0 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&ads7846_pins>;
+
+                compatible = "ti,ads7846";
+                vcc-supply = <&ads7846reg>;
+
+                reg = <1>;                              /* CS1 */
+                spi-max-frequency = <1500000>;
+
+                interrupt-parent = <&gpio1>;
+                interrupts = <31 0>;
+                pendown-gpio = <&gpio1 31 0>;
+
+
+                ti,x-min = /bits/ 16 <0x0>;
+                ti,x-max = /bits/ 16 <0x0fff>;
+                ti,y-min = /bits/ 16 <0x0>;
+                ti,y-max = /bits/ 16 <0x0fff>;
+
+                ti,x-plate-ohms = /bits/ 16 <180>;
+                ti,pressure-max = /bits/ 16 <255>;
+
+                ti,debounce-max = /bits/ 16 <30>;
+                ti,debounce-tol = /bits/ 16 <10>;
+                ti,debounce-rep = /bits/ 16 <1>;
+
+                linux,wakeup;
+        };
+};
+
+&mac {
+        status = "okay";
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&cpsw_pins_default>;
+        pinctrl-1 = <&cpsw_pins_sleep>;
+        dual_emac;
+};
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii";
+        dual_emac_res_vlan = <0>;
+};
+
+&cpsw_emac1 {
+        phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii";
+        dual_emac_res_vlan = <1>;
+};
+
+&davinci_mdio {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&davinci_mdio_pins_default>;
+        pinctrl-1 = <&davinci_mdio_pins_sleep>;
+};
+
+&usb2_phy1 {
+        phy-supply = <&ldousb_reg>;
+};
+
+&usb2_phy2 {
+        phy-supply = <&ldousb_reg>;
+};
+
+&usb1 {
+        dr_mode = "host";
+};
+
+&usb2 {
+        dr_mode = "peripheral";
+};
+
+&mcasp3 {
+        #sound-dai-cells = <0>;
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&mcasp3_pins_default>;
+        pinctrl-1 = <&mcasp3_pins_sleep>;
+        status = "okay";
+
+        op-mode = <0>;  /* MCASP_IIS_MODE */
+        tdm-slots = <2>;
+        /* 4 serializers */
+        serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
+                1 2 0 0
+        >;
+};
+
+&gpio3 {
+        status = "okay";
+        ti,no-reset-on-init;
+};
+
+&gpio2 {
+        status = "okay";
+        ti,no-reset-on-init;
+};
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
new file mode 100644
index 000000000000..77bb8e17401a
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
@@ -0,0 +1,179 @@
+/*
+ * Support for CompuLab SBC-AM57x single board computer
+ *
+ * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include "am57xx-cl-som-am57x.dts"
+#include "compulab-sb-som.dtsi"
+
+/ {
+        model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x";
+        compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
+
+        aliases {
+                display0 = &lcd0;
+                display1 = &hdmi;
+        };
+};
+
+&dra7_pmx_core {
+        uart3_pins_default: uart3_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2)   /* uart2_ctsn.uart3_rxd */
+                        DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1)   /* uart2_rtsn.uart3_txd */
+                >;
+        };
+
+        mmc1_pins_default: mmc1_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+                        DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+                        DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+                        DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+                        DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+                        DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+                        DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1_sdcd.gpio6_27 */
+                        DRA7XX_CORE_IOPAD(0x377c, PIN_INPUT | MUX_MODE14)       /* mmc1_sdwp.gpio6_28 */
+                >;
+        };
+
+        usb1_pins: pinmux_usb1_pins {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
+                >;
+        };
+
+        i2c5_pins_default: i2c5_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10)        /* mcasp1_axr0.i2c5_sda */
+                        DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10)        /* mcasp1_axr1.i2c5_scl */
+                >;
+        };
+
+        lcd_pins_default: lcd_pins_default {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT | MUX_MODE14)      /* vin2a_vsync0.gpio4_0 */
+                >;
+        };
+
+        hdmi_pins: pinmux_hdmi_pins {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1)        /* i2c2_sda.hdmi1_ddc_scl */
+                        DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1)        /* i2c2_scl.hdmi1_ddc_sda */
+                >;
+        };
+
+        hdmi_conn_pins: pinmux_hdmi_conn_pins {
+                pinctrl-single,pins = <
+                        DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT | MUX_MODE14)       /* spi1_cs2.gpio7_12 */
+                >;
+        };
+};
+
+&uart3 {
+        status = "okay";
+        interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+                              <&dra7_pmx_core 0x3f8>;
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart3_pins_default>;
+};
+
+&mmc1 {
+        status = "okay";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins_default>;
+
+        vmmc-supply = <&ldo1_reg>;
+        bus-width = <4>;
+        cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
+};
+
+&usb1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb1_pins>;
+};
+
+&i2c5 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c5_pins_default>;
+        clock-frequency = <400000>;
+
+        eeprom_base: atmel@50 {
+                compatible = "atmel,24c08";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+
+        pca9555: pca9555@20 {
+                compatible = "nxp,pca9555";
+                reg = <0x20>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
+};
+
+&dss {
+        status = "ok";
+
+        vdda_video-supply = <&ldoln_reg>;
+
+        port {
+                dpi_lcd_out: endpoint@0 {
+                        remote-endpoint = <&lcd_in>;
+                        data-lines = <24>;
+                };
+        };
+};
+
+&lcd0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&lcd_pins_default>;
+
+        enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
+                        &gpio4 0 GPIO_ACTIVE_HIGH>;
+
+        port {
+                lcd_in: endpoint {
+                        remote-endpoint = <&dpi_lcd_out>;
+                        data-lines = <24>;
+                };
+        };
+};
+
+&hdmi {
+        status = "ok";
+        vdda-supply = <&ldo4_reg>;
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&hdmi_pins>;
+
+        port {
+                hdmi_out: endpoint {
+                        remote-endpoint = <&hdmi_connector_in>;
+                        lanes = <1 0 3 2 5 4 7 6>;
+                };
+        };
+};
+
+&hdmi_conn {
+        pinctrl-names = "default";
+        pinctrl-0 = <&hdmi_conn_pins>;
+
+        hpd-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+
+        port {
+                hdmi_connector_in: endpoint {
+                        remote-endpoint = <&hdmi_out>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm-realview-pb11mp.dts
new file mode 100644
index 000000000000..da755c9851a7
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-pb11mp.dts
@@ -0,0 +1,681 @@
+/*
+ * Copyright 2015 Linaro Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+        model = "ARM RealView PB11MPcore";
+        compatible = "arm,realview-pb11mp";
+
+        chosen { };
+
+        aliases {
+                serial0 = &pb11mp_serial0;
+                serial1 = &pb11mp_serial1;
+                serial2 = &pb11mp_serial2;
+                serial3 = &pb11mp_serial3;
+        };
+
+        memory {
+                /*
+                 * The PB11MPCore has 512 MiB memory @ 0x70000000
+                 * and the first 256 are also remapped @ 0x00000000
+                 */
+                reg = <0x70000000 0x20000000>;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                enable-method = "arm,realview-smp";
+
+                MP11_0: cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,arm11mpcore";
+                        reg = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                MP11_1: cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,arm11mpcore";
+                        reg = <1>;
+                        next-level-cache = <&L2>;
+                };
+
+                MP11_2: cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,arm11mpcore";
+                        reg = <2>;
+                        next-level-cache = <&L2>;
+                };
+
+                MP11_3: cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,arm11mpcore";
+                        reg = <3>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        /* Primary TestChip GIC synthesized with the CPU */
+        intc_tc11mp: interrupt-controller@1f000100 {
+                compatible = "arm,tc11mp-gic";
+                #interrupt-cells = <3>;
+                #address-cells = <1>;
+                interrupt-controller;
+                reg = <0x1f001000 0x1000>,
+                      <0x1f000100 0x100>;
+        };
+
+        L2: l2-cache {
+                compatible = "arm,l220-cache";
+                reg = <0x1f002000 0x1000>;
+                interrupt-parent = <&intc_tc11mp>;
+                interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 30 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 31 IRQ_TYPE_LEVEL_HIGH>;
+                cache-unified;
+                cache-level = <2>;
+                /*
+                 * Override default cache size, sets and
+                 * associativity as these may be erroneously set
+                 * up by boot loader(s), probably for safety
+                 * since th outer sync operation can cause the
+                 * cache to hang unless disabled.
+                 */
+                cache-size = <1048576>; // 1MB
+                cache-sets = <4096>;
+                cache-line-size = <32>;
+                arm,shared-override;
+                arm,parity-enable;
+                arm,outer-sync-disable;
+        };
+
+        scu@1f000000 {
+                compatible = "arm,arm11mp-scu";
+                reg = <0x1f000000 0x100>;
+        };
+
+        timer@1f000600 {
+                compatible = "arm,arm11mp-twd-timer";
+                reg = <0x1f000600 0x20>;
+                interrupt-parent = <&intc_tc11mp>;
+                interrupts = <1 13 0xf04>;
+        };
+
+        watchdog@1f000620 {
+                compatible = "arm,arm11mp-twd-wdt";
+                reg = <0x1f000620 0x20>;
+                interrupt-parent = <&intc_tc11mp>;
+                interrupts = <1 14 0xf04>;
+        };
+
+        /* PMU with one IRQ line per core */
+        pmu {
+                compatible = "arm,arm11mpcore-pmu";
+                interrupt-parent = <&intc_tc11mp>;
+                interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 18 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 19 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 20 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-affinity = <&MP11_0>, <&MP11_1>, <&MP11_2>, <&MP11_3>;
+        };
+
+        /* The voltage to the MMC card is hardwired at 3.3V */
+        vmmc: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+        };
+
+        veth: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "veth";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+        };
+
+        xtal24mhz: xtal24mhz@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <24000000>;
+        };
+
+        refclk32khz: refclk32khz {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency = <32768>;
+        };
+
+        timclk: timclk@1M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <24>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        mclk: mclk@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <1>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        kmiclk: kmiclk@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <1>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        sspclk: sspclk@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <1>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        uartclk: uartclk@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <1>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        wdogclk: wdogclk@24M {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clock-div = <1>;
+                clock-mult = <1>;
+                clocks = <&xtal24mhz>;
+        };
+
+        /* FIXME: this actually hangs off the PLL clocks */
+        pclk: pclk@0 {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <0>;
+        };
+
+        flash0@40000000 {
+                /* 2 * 32MiB NOR Flash memory */
+                compatible = "arm,vexpress-flash", "cfi-flash";
+                reg = <0x40000000 0x04000000>;
+                bank-width = <4>;
+        };
+
+        flash1@44000000 {
+                // 2 * 32MiB NOR Flash memory
+                compatible = "arm,vexpress-flash", "cfi-flash";
+                reg = <0x44000000 0x04000000>;
+                bank-width = <4>;
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "arm,realview-pb11mp-soc", "simple-bus";
+                regmap = <&pb11mp_syscon>;
+                ranges;
+
+                pb11mp_syscon: syscon@10000000 {
+                        compatible = "arm,realview-pb11mp-syscon", "syscon", "simple-mfd";
+                        reg = <0x10000000 0x1000>;
+
+                        led@08.0 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x01>;
+                                label = "versatile:0";
+                                linux,default-trigger = "heartbeat";
+                                default-state = "on";
+                        };
+                        led@08.1 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x02>;
+                                label = "versatile:1";
+                                linux,default-trigger = "mmc0";
+                                default-state = "off";
+                        };
+                        led@08.2 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x04>;
+                                label = "versatile:2";
+                                linux,default-trigger = "cpu0";
+                                default-state = "off";
+                        };
+                        led@08.3 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x08>;
+                                label = "versatile:3";
+                                linux,default-trigger = "cpu1";
+                                default-state = "off";
+                        };
+                        led@08.4 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x10>;
+                                label = "versatile:4";
+                                linux,default-trigger = "cpu2";
+                                default-state = "off";
+                        };
+                        led@08.5 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x20>;
+                                label = "versatile:5";
+                                linux,default-trigger = "cpu3";
+                                default-state = "off";
+                        };
+                        led@08.6 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x40>;
+                                label = "versatile:6";
+                                default-state = "off";
+                        };
+                        led@08.7 {
+                                compatible = "register-bit-led";
+                                offset = <0x08>;
+                                mask = <0x80>;
+                                label = "versatile:7";
+                                default-state = "off";
+                        };
+
+                        oscclk0: osc0@0c {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0x0C>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk1: osc1@10 {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0x10>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk2: osc2@14 {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0x14>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk3: osc3@18 {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0x18>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk4: osc4@1c {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0x1c>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk5: osc5@d4 {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0xd4>;
+                                clocks = <&xtal24mhz>;
+                        };
+                        oscclk6: osc6@d8 {
+                                compatible = "arm,syscon-icst307";
+                                #clock-cells = <0>;
+                                lock-offset = <0x20>;
+                                vco-offset = <0xd8>;
+                                clocks = <&xtal24mhz>;
+                        };
+                };
+
+                sp810_syscon: sysctl@10001000 {
+                        compatible = "arm,sp810", "arm,primecell";
+                        reg = <0x10001000 0x1000>;
+                        clocks = <&refclk32khz>, <&timclk>, <&xtal24mhz>;
+                        clock-names = "refclk", "timclk", "apb_pclk";
+                        #clock-cells = <1>;
+                        clock-output-names = "timerclk0",
+                                             "timerclk1",
+                                             "timerclk2",
+                                             "timerclk3";
+                        assigned-clocks = <&sp810_syscon 0>,
+                                          <&sp810_syscon 1>,
+                                          <&sp810_syscon 2>,
+                                          <&sp810_syscon 3>;
+                        assigned-clock-parents = <&timclk>,
+                                               <&timclk>,
+                                               <&timclk>,
+                                               <&timclk>;
+                };
+
+                i2c0: i2c@10002000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "arm,versatile-i2c";
+                        reg = <0x10002000 0x1000>;
+
+                        rtc@68 {
+                                compatible = "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+                };
+
+                aaci: aaci@10004000 {
+                        compatible = "arm,pl041", "arm,primecell";
+                        reg = <0x10004000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&pclk>;
+                        clock-names = "apb_pclk";
+                };
+
+                mci: mmcsd@10005000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x10005000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>,
+                                        <0 15 IRQ_TYPE_LEVEL_HIGH>;
+                        /* Due to frequent FIFO overruns, use just 500 kHz */
+                        max-frequency = <500000>;
+                        bus-width = <4>;
+                        cap-sd-highspeed;
+                        cap-mmc-highspeed;
+                        clocks = <&mclk>, <&pclk>;
+                        clock-names = "mclk", "apb_pclk";
+                        vmmc-supply = <&vmmc>;
+                        cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+                        wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+                };
+
+                kmi0: kmi@10006000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                        reg = <0x10006000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&kmiclk>, <&pclk>;
+                        clock-names = "KMIREFCLK", "apb_pclk";
+                };
+
+                kmi1: kmi@10007000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                        reg = <0x10007000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&kmiclk>, <&pclk>;
+                        clock-names = "KMIREFCLK", "apb_pclk";
+                };
+
+                pb11mp_serial0: serial@10009000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x10009000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&uartclk>, <&pclk>;
+                        clock-names = "uartclk", "apb_pclk";
+                };
+
+                pb11mp_serial1: serial@1000a000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x1000a000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&uartclk>, <&pclk>;
+                        clock-names = "uartclk", "apb_pclk";
+                };
+
+                pb11mp_serial2: serial@1000b000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x1000b000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&uartclk>, <&pclk>;
+                        clock-names = "uartclk", "apb_pclk";
+                };
+
+                pb11mp_serial3: serial@1000c000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x1000c000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&uartclk>, <&pclk>;
+                        clock-names = "uartclk", "apb_pclk";
+                };
+
+                ssp@1000d000 {
+                        compatible = "arm,pl022", "arm,primecell";
+                        reg = <0x1000d000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&sspclk>, <&pclk>;
+                        clock-names = "SSPCLK", "apb_pclk";
+                };
+
+                watchdog@1000f000 {
+                        compatible = "arm,sp805", "arm,primecell";
+                        reg = <0x1000f000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&wdogclk>, <&pclk>;
+                        clock-names = "wdogclk", "apb_pclk";
+                        status = "disabled";
+                };
+
+                watchdog@10010000 {
+                        compatible = "arm,sp805", "arm,primecell";
+                        reg = <0x10010000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&wdogclk>, <&pclk>;
+                        clock-names = "wdogclk", "apb_pclk";
+                };
+
+                timer01: timer@10011000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x10011000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
+                        arm,sp804-has-irq = <1>;
+                        clocks = <&sp810_syscon 0>,
+                                 <&sp810_syscon 1>,
+                                 <&pclk>;
+                        clock-names = "timerclk0",
+                                    "timerclk1",
+                                    "apb_pclk";
+                };
+
+                timer23: timer@10012000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x10012000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
+                        arm,sp804-has-irq = <1>;
+                        clocks = <&sp810_syscon 2>,
+                                 <&sp810_syscon 3>,
+                                 <&pclk>;
+                        clock-names = "timerclk2",
+                                    "timerclk3",
+                                    "apb_pclk";
+                };
+
+                gpio0: gpio@10013000 {
+                        compatible = "arm,pl061", "arm,primecell";
+                        reg = <0x10013000 0x1000>;
+                        gpio-controller;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+                        #gpio-cells = <2>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        clocks = <&pclk>;
+                        clock-names = "apb_pclk";
+                };
+
+                gpio1: gpio@10014000 {
+                        compatible = "arm,pl061", "arm,primecell";
+                        reg = <0x10014000 0x1000>;
+                        gpio-controller;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+                        #gpio-cells = <2>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        clocks = <&pclk>;
+                        clock-names = "apb_pclk";
+                };
+
+                gpio2: gpio@10015000 {
+                        compatible = "arm,pl061", "arm,primecell";
+                        reg = <0x10015000 0x1000>;
+                        gpio-controller;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+                        #gpio-cells = <2>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        clocks = <&pclk>;
+                        clock-names = "apb_pclk";
+                };
+
+                rtc: rtc@10017000 {
+                        compatible = "arm,pl031", "arm,primecell";
+                        reg = <0x10017000 0x1000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&pclk>;
+                        clock-names = "apb_pclk";
+                };
+
+                timer45: timer@10018000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x10018000 0x1000>;
+                        clocks = <&timclk>, <&pclk>;
+                        clock-names = "timer", "apb_pclk";
+                        status = "disabled";
+                };
+
+                timer67: timer@10019000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x10019000 0x1000>;
+                        clocks = <&timclk>, <&pclk>;
+                        clock-names = "timer", "apb_pclk";
+                        status = "disabled";
+                };
+
+
+                clcd@10020000 {
+                        compatible = "arm,pl111", "arm,primecell";
+                        reg = <0x10020000 0x1000>;
+                        interrupt-parent = <&intc_pb11mp>;
+                        interrupt-names = "combined";
+                        interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&oscclk4>, <&pclk>;
+                        clock-names = "clcdclk", "apb_pclk";
+                        max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
+
+                        port {
+                                clcd_pads: endpoint {
+                                        remote-endpoint = <&clcd_panel>;
+                                        arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+                                };
+                        };
+
+                        panel {
+                                compatible = "panel-dpi";
+
+                                port {
+                                        clcd_panel: endpoint {
+                                                remote-endpoint = <&clcd_pads>;
+                                        };
+                                };
+
+                                panel-timing {
+                                        clock-frequency = <63500127>;
+                                        hactive = <1024>;
+                                        hback-porch = <152>;
+                                        hfront-porch = <48>;
+                                        hsync-len = <104>;
+                                        vactive = <768>;
+                                        vback-porch = <23>;
+                                        vfront-porch = <3>;
+                                        vsync-len = <4>;
+                                };
+                        };
+                };
+
+                /*
+                 * This GIC on the Platform Baseboard is cascaded off the
+                 * TestChip GIC
+                 */
+                intc_pb11mp: interrupt-controller@1e000000 {
+                        compatible = "arm,arm11mp-gic";
+                        #interrupt-cells = <3>;
+                        #address-cells = <1>;
+                        interrupt-controller;
+                        reg = <0x1e001000 0x1000>,
+                              <0x1e000000 0x100>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                /* SMSC 9118 ethernet with PHY and EEPROM */
+                ethernet@4e000000 {
+                        compatible = "smsc,lan9118", "smsc,lan9115";
+                        reg = <0x4e000000 0x10000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+                        phy-mode = "mii";
+                        reg-io-width = <4>;
+                        smsc,irq-active-high;
+                        smsc,irq-push-pull;
+                        vdd33a-supply = <&veth>;
+                        vddvario-supply = <&veth>;
+                };
+
+                usb@4f000000 {
+                        compatible = "nxp,usb-isp1761";
+                        reg = <0x4f000000 0x20000>;
+                        interrupt-parent = <&intc_tc11mp>;
+                        interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
+                        port1-otg;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index 5555875f44f9..39181b3fa90d 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -127,7 +127,7 @@
                                 isl12057: isl12057@68 {
                                         compatible = "isil,isl12057";
                                         reg = <0x68>;
-                                        isil,irq2-can-wakeup-machine;
+                                        wakeup-source;
                                 };
 
                                 g762: g762@3e {
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index 78b563c02f3c..faa474874cb8 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -133,7 +133,7 @@
                                 isl12057: isl12057@68 {
                                         compatible = "isil,isl12057";
                                         reg = <0x68>;
-                                        isil,irq2-can-wakeup-machine;
+                                        wakeup-source;
                                 };
 
                                 g762: g762@3e {
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
new file mode 100644
index 000000000000..c6e180eb3b11
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -0,0 +1,456 @@
+/*
+ * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828)
+ *
+ *  Copyright (C) 2015 Russell King
+ *
+ * This board is in development; the contents of this file work with
+ * the A1 rev 2.0 of the board, which does not represent final
+ * production board.  Things will change, don't expect this file to
+ * remain compatible info the future.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include "armada-38x-solidrun-microsom.dtsi"
+
+/ {
+        model = "SolidRun Clearfog A1";
+        compatible = "solidrun,clearfog-a1", "marvell,armada388",
+                "marvell,armada385", "marvell,armada380";
+
+        aliases {
+                /* So that mvebu u-boot can update the MAC addresses */
+                ethernet1 = &eth0;
+                ethernet2 = &eth1;
+                ethernet3 = &eth2;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
+
+        soc {
+                internal-regs {
+                        ethernet@30000 {
+                                phy-mode = "sgmii";
+                                status = "okay";
+
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+
+                        ethernet@34000 {
+                                phy-mode = "sgmii";
+                                status = "okay";
+
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+
+                        i2c@11000 {
+                                /* Is there anything on this? */
+                                clock-frequency = <100000>;
+                                pinctrl-0 = <&i2c0_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+
+                                /*
+                                 * PCA9655 GPIO expander, up to 1MHz clock.
+                                 *  0-CON3 CLKREQ#
+                                 *  1-CON3 PERST#
+                                 *  2-CON2 PERST#
+                                 *  3-CON3 W_DISABLE
+                                 *  4-CON2 CLKREQ#
+                                 *  5-USB3 overcurrent
+                                 *  6-USB3 power
+                                 *  7-CON2 W_DISABLE
+                                 *  8-JP4 P1
+                                 *  9-JP4 P4
+                                 * 10-JP4 P5
+                                 * 11-m.2 DEVSLP
+                                 * 12-SFP_LOS
+                                 * 13-SFP_TX_FAULT
+                                 * 14-SFP_TX_DISABLE
+                                 * 15-SFP_MOD_DEF0
+                                 */
+                                expander0: gpio-expander@20 {
+                                        /*
+                                         * This is how it should be:
+                                         * compatible = "onnn,pca9655",
+                                         *       "nxp,pca9555";
+                                         * but you can't do this because of
+                                         * the way I2C works.
+                                         */
+                                        compatible = "nxp,pca9555";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        reg = <0x20>;
+
+                                        pcie1_0_clkreq {
+                                                gpio-hog;
+                                                gpios = <0 GPIO_ACTIVE_LOW>;
+                                                input;
+                                                line-name = "pcie1.0-clkreq";
+                                        };
+                                        pcie1_0_w_disable {
+                                                gpio-hog;
+                                                gpios = <3 GPIO_ACTIVE_LOW>;
+                                                output-low;
+                                                line-name = "pcie1.0-w-disable";
+                                        };
+                                        pcie2_0_clkreq {
+                                                gpio-hog;
+                                                gpios = <4 GPIO_ACTIVE_LOW>;
+                                                input;
+                                                line-name = "pcie2.0-clkreq";
+                                        };
+                                        pcie2_0_w_disable {
+                                                gpio-hog;
+                                                gpios = <7 GPIO_ACTIVE_LOW>;
+                                                output-low;
+                                                line-name = "pcie2.0-w-disable";
+                                        };
+                                        usb3_ilimit {
+                                                gpio-hog;
+                                                gpios = <5 GPIO_ACTIVE_LOW>;
+                                                input;
+                                                line-name = "usb3-current-limit";
+                                        };
+                                        usb3_power {
+                                                gpio-hog;
+                                                gpios = <6 GPIO_ACTIVE_HIGH>;
+                                                output-high;
+                                                line-name = "usb3-power";
+                                        };
+                                        m2_devslp {
+                                                gpio-hog;
+                                                gpios = <11 GPIO_ACTIVE_HIGH>;
+                                                output-low;
+                                                line-name = "m.2 devslp";
+                                        };
+                                        sfp_los {
+                                                /* SFP loss of signal */
+                                                gpio-hog;
+                                                gpios = <12 GPIO_ACTIVE_HIGH>;
+                                                input;
+                                                line-name = "sfp-los";
+                                        };
+                                        sfp_tx_fault {
+                                                /* SFP laser fault */
+                                                gpio-hog;
+                                                gpios = <13 GPIO_ACTIVE_HIGH>;
+                                                input;
+                                                line-name = "sfp-tx-fault";
+                                        };
+                                        sfp_tx_disable {
+                                                /* SFP transmit disable */
+                                                gpio-hog;
+                                                gpios = <14 GPIO_ACTIVE_HIGH>;
+                                                output-low;
+                                                line-name = "sfp-tx-disable";
+                                        };
+                                        sfp_mod_def0 {
+                                                /* SFP module present */
+                                                gpio-hog;
+                                                gpios = <15 GPIO_ACTIVE_LOW>;
+                                                input;
+                                                line-name = "sfp-mod-def0";
+                                        };
+                                };
+
+                                /* The MCP3021 is 100kHz clock only */
+                                mikrobus_adc: mcp3021@4c {
+                                        compatible = "microchip,mcp3021";
+                                        reg = <0x4c>;
+                                };
+
+                                /* Also something at 0x64 */
+                        };
+
+                        i2c@11100 {
+                                /*
+                                 * Routed to SFP, mikrobus, and PCIe.
+                                 * SFP limits this to 100kHz, and requires
+                                 *  an AT24C01A/02/04 with address pins tied
+                                 *  low, which takes addresses 0x50 and 0x51.
+                                 * Mikrobus doesn't specify beyond an I2C
+                                 *  bus being present.
+                                 * PCIe uses ARP to assign addresses, or
+                                 *  0x63-0x64.
+                                 */
+                                clock-frequency = <100000>;
+                                pinctrl-0 = <&clearfog_i2c1_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+                        };
+
+                        mdio@72004 {
+                                pinctrl-0 = <&mdio_pins>;
+                                pinctrl-names = "default";
+
+                                phy_dedicated: ethernet-phy@0 {
+                                        /*
+                                         * Annoyingly, the marvell phy driver
+                                         * configures the LED register, rather
+                                         * than preserving reset-loaded setting.
+                                         * We undo that rubbish here.
+                                         */
+                                        marvell,reg-init = <3 16 0 0x101e>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        pinctrl@18000 {
+                                clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
+                                        marvell,pins = "mpp46";
+                                        marvell,function = "ref";
+                                };
+                                clearfog_dsa0_pins: clearfog-dsa0-pins {
+                                        marvell,pins = "mpp23", "mpp41";
+                                        marvell,function = "gpio";
+                                };
+                                clearfog_i2c1_pins: i2c1-pins {
+                                        /* SFP, PCIe, mSATA, mikrobus */
+                                        marvell,pins = "mpp26", "mpp27";
+                                        marvell,function = "i2c1";
+                                };
+                                clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
+                                        marvell,pins = "mpp20";
+                                        marvell,function = "gpio";
+                                };
+                                clearfog_sdhci_pins: clearfog-sdhci-pins {
+                                        marvell,pins = "mpp21", "mpp28",
+                                                       "mpp37", "mpp38",
+                                                       "mpp39", "mpp40";
+                                        marvell,function = "sd0";
+                                };
+                                clearfog_spi1_cs_pins: spi1-cs-pins {
+                                        marvell,pins = "mpp55";
+                                        marvell,function = "spi1";
+                                };
+                                mikro_pins: mikro-pins {
+                                        /* int: mpp22 rst: mpp29 */
+                                        marvell,pins = "mpp22", "mpp29";
+                                        marvell,function = "gpio";
+                                };
+                                mikro_spi_pins: mikro-spi-pins {
+                                        marvell,pins = "mpp43";
+                                        marvell,function = "spi1";
+                                };
+                                mikro_uart_pins: mikro-uart-pins {
+                                        marvell,pins = "mpp24", "mpp25";
+                                        marvell,function = "ua1";
+                                };
+                                rear_button_pins: rear-button-pins {
+                                        marvell,pins = "mpp34";
+                                        marvell,function = "gpio";
+                                };
+                        };
+
+                        sata@a8000 {
+                                /* pinctrl? */
+                                status = "okay";
+                        };
+
+                        sata@e0000 {
+                                /* pinctrl? */
+                                status = "okay";
+                        };
+
+                        sdhci@d8000 {
+                                bus-width = <4>;
+                                cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+                                no-1-8-v;
+                                pinctrl-0 = <&clearfog_sdhci_pins
+                                             &clearfog_sdhci_cd_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+                                vmmc = <&reg_3p3v>;
+                                wp-inverted;
+                        };
+
+                        serial@12100 {
+                                /* mikrobus uart */
+                                pinctrl-0 = <&mikro_uart_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+                        };
+
+                        spi@10680 {
+                                /*
+                                 * We don't seem to have the W25Q32 on the
+                                 * A1 Rev 2.0 boards, so disable SPI.
+                                 * CS0: W25Q32 (doesn't appear to be present)
+                                 * CS1:
+                                 * CS2: mikrobus
+                                 */
+                                pinctrl-0 = <&spi1_pins
+                                             &clearfog_spi1_cs_pins
+                                             &mikro_spi_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+
+                                spi-flash@0 {
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+                                        compatible = "w25q32", "jedec,spi-nor";
+                                        reg = <0>; /* Chip select 0 */
+                                        spi-max-frequency = <3000000>;
+                                        status = "disabled";
+                                };
+                        };
+
+                        usb@58000 {
+                                /* CON3, nearest  power. */
+                                status = "okay";
+                        };
+
+                        usb3@f0000 {
+                                /* CON2, nearest CPU, USB2 only. */
+                                status = "okay";
+                        };
+
+                        usb3@f8000 {
+                                /* CON7 */
+                                status = "okay";
+                        };
+                };
+
+                pcie-controller {
+                        status = "okay";
+                        /*
+                         * The two PCIe units are accessible through
+                         * the mini-PCIe connectors on the board.
+                         */
+                        pcie@2,0 {
+                                /* Port 1, Lane 0. CON3, nearest power. */
+                                reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
+                                status = "okay";
+                        };
+                        pcie@3,0 {
+                                /* Port 2, Lane 0. CON2, nearest CPU. */
+                                reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        dsa@0 {
+                compatible = "marvell,dsa";
+                dsa,ethernet = <&eth1>;
+                dsa,mii-bus = <&mdio>;
+                pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
+                pinctrl-names = "default";
+                #address-cells = <2>;
+                #size-cells = <0>;
+
+                switch@0 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <4 0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan1";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "lan2";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "lan3";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "lan4";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "lan5";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                        };
+
+                        port@6 {
+                                /* 88E1512 external phy */
+                                reg = <6>;
+                                label = "lan6";
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-0 = <&rear_button_pins>;
+                pinctrl-names = "default";
+
+                button_0 {
+                        /* The rear SW3 button */
+                        label = "Rear Button";
+                        gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+                        linux,can-disable;
+                        linux,code = <BTN_0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts
index a633be3defda..cd316021d6ce 100644
--- a/arch/arm/boot/dts/armada-388-gp.dts
+++ b/arch/arm/boot/dts/armada-388-gp.dts
@@ -303,16 +303,6 @@
                 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
         };
 
-        reg_usb2_1_vbus: v5-vbus1 {
-                compatible = "regulator-fixed";
-                regulator-name = "v5.0-vbus1";
-                regulator-min-microvolt = <5000000>;
-                regulator-max-microvolt = <5000000>;
-                enable-active-high;
-                regulator-always-on;
-                gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
-        };
-
         reg_sata0: pwr-sata0 {
                 compatible = "regulator-fixed";
                 regulator-name = "pwr_en_sata0";
diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
new file mode 100644
index 000000000000..3f792a563c05
--- /dev/null
+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
@@ -0,0 +1,115 @@
+/*
+ * Device Tree file for SolidRun Armada 38x Microsom
+ *
+ *  Copyright (C) 2015 Russell King
+ *
+ * This board is in development; the contents of this file work with
+ * the A1 rev 2.0 of the board, which does not represent final
+ * production board.  Things will change, don't expect this file to
+ * remain compatible info the future.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>; /* 256 MB */
+        };
+
+        soc {
+                ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+                          MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+                          MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+                          MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
+
+                internal-regs {
+                        ethernet@70000 {
+                                pinctrl-0 = <&ge0_rgmii_pins>;
+                                pinctrl-names = "default";
+                                phy = <&phy_dedicated>;
+                                phy-mode = "rgmii-id";
+                                status = "okay";
+                        };
+
+                        mdio@72004 {
+                                /*
+                                 * Add the phy clock here, so the phy can be
+                                 * accessed to read its IDs prior to binding
+                                 * with the driver.
+                                 */
+                                pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins>;
+                                pinctrl-names = "default";
+
+                                phy_dedicated: ethernet-phy@0 {
+                                        /*
+                                         * Annoyingly, the marvell phy driver
+                                         * configures the LED register, rather
+                                         * than preserving reset-loaded setting.
+                                         * We undo that rubbish here.
+                                         */
+                                        marvell,reg-init = <3 16 0 0x101e>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        pinctrl@18000 {
+                                microsom_phy_clk_pins: microsom-phy-clk-pins {
+                                        marvell,pins = "mpp45";
+                                        marvell,function = "ref";
+                                };
+                        };
+
+                        rtc@a3800 {
+                                /*
+                                 * If the rtc doesn't work, run "date reset"
+                                 * twice in u-boot.
+                                 */
+                                status = "okay";
+                        };
+
+                        serial@12000 {
+                                pinctrl-0 = <&uart0_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 58b500873bfd..13cf69a8d0fb 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -151,42 +151,42 @@
                                 marvell,nand-enable-arbiter;
                                 nand-on-flash-bbt;
 
-                                partition@0 {
-                                        label = "u-boot";
-                                        reg = <0x0000000 0xe0000>;
-                                        read-only;
-                                };
-
-                                partition@e0000 {
-                                        label = "u-boot-env";
-                                        reg = <0xe0000 0x20000>;
-                                        read-only;
-                                };
-
-                                partition@100000 {
-                                        label = "u-boot-env2";
-                                        reg = <0x100000 0x20000>;
-                                        read-only;
-                                };
-
-                                partition@120000 {
-                                        label = "zImage";
-                                        reg = <0x120000 0x400000>;
-                                };
-
-                                partition@520000 {
-                                        label = "initrd";
-                                        reg = <0x520000 0x400000>;
-                                };
-
-                                partition@xE00000 {
-                                        label = "boot";
-                                        reg = <0xE00000 0x3F200000>;
-                                };
-
-                                partition@flash {
-                                        label = "flash";
-                                        reg = <0x0 0x40000000>;
+                                partitions {
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+
+                                        partition@0 {
+                                                label = "u-boot";
+                                                reg = <0x00000000 0x000e0000>;
+                                                read-only;
+                                        };
+
+                                        partition@e0000 {
+                                                label = "u-boot-env";
+                                                reg = <0x000e0000 0x00020000>;
+                                                read-only;
+                                        };
+
+                                        partition@100000 {
+                                                label = "u-boot-env2";
+                                                reg = <0x00100000 0x00020000>;
+                                                read-only;
+                                        };
+
+                                        partition@120000 {
+                                                label = "zImage";
+                                                reg = <0x00120000 0x00400000>;
+                                        };
+
+                                        partition@520000 {
+                                                label = "initrd";
+                                                reg = <0x00520000 0x00400000>;
+                                        };
+
+                                        partition@e00000 {
+                                                label = "boot";
+                                                reg = <0x00e00000 0x3f200000>;
+                                        };
                                 };
                         };
                 };
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index 6fe8972de0a2..62175a8848bc 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -141,7 +141,7 @@
                                 isl12057: isl12057@68 {
                                         compatible = "isil,isl12057";
                                         reg = <0x68>;
-                                        isil,irq2-can-wakeup-machine;
+                                        wakeup-source;
                                 };
                         };
 
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index e74df327cdd3..77ddff036409 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -119,6 +119,16 @@
                                 status = "okay";
                         };
 
+                        pdmic@f8018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_pdmic_default>;
+                                atmel,model = "PDMIC @ sama5d2_xplained";
+                                atmel,mic-min-freq = <1000000>;
+                                atmel,mic-max-freq = <3246000>;
+                                atmel,mic-offset = <0x0>;
+                                status = "okay";
+                        };
+
                         uart1: serial@f8020000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart1_default>;
@@ -129,6 +139,7 @@
                                 dmas = <0>, <0>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_i2c0_default>;
+                                i2c-sda-hold-time-ns = <350>;
                                 status = "okay";
 
                                 pmic: act8865@5b {
@@ -207,6 +218,10 @@
                                 };
                         };
 
+                        watchdog@f8048040 {
+                                status = "okay";
+                        };
+
                         uart3: serial@fc008000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart3_default>;
@@ -285,6 +300,12 @@
                                         bias-disable;
                                 };
 
+                                pinctrl_pdmic_default: pdmic_default {
+                                        pinmux = <PIN_PB26__PDMIC_DAT>,
+                                                <PIN_PB27__PDMIC_CLK>;
+                                        bias-disable;
+                                };
+
                                 pinctrl_sdmmc0_default: sdmmc0_default {
                                         cmd_data {
                                                 pinmux = <PIN_PA1__SDMMC0_CMD>,
diff --git a/arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi b/arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi
new file mode 100644
index 000000000000..e7b2109fc85a
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "sama5d4.dtsi"
+
+/ {
+        model = "DENX MA5D4";
+        compatible = "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
+
+        memory {
+                reg = <0x20000000 0x10000000>;
+        };
+
+        clocks {
+                main_clock: main_clock {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+
+                clk20m: clk20m {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <20000000>;
+                        clock-output-names = "clk20m";
+                };
+        };
+
+        ahb {
+                apb {
+                        mmc0: mmc@f8000000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
+                                vmmc-supply = <&vcc_mmc0_reg>;
+                                vqmmc-supply = <&vcc_3v3_reg>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <8>;
+                                        broken-cd;
+                                };
+                        };
+
+                        spi0: spi@f8010000 {
+                                cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
+                                status = "okay";
+
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        i2c0: i2c@f8014000 {
+                                status = "okay";
+                        };
+
+                        spi1: spi@fc018000 {
+                                cs-gpios = <&pioB 22 0>, <&pioB 23 0>, <0>, <0>;
+                                status = "okay";
+
+                                can0: can@0 {
+                                        compatible = "microchip,mcp2515";
+                                        reg = <0>;
+                                        clocks = <&clk20m>;
+                                        interrupt-parent = <&pioE>;
+                                        interrupts = <6 GPIO_ACTIVE_LOW>;
+                                        spi-max-frequency = <10000000>;
+                                };
+
+                                can1: can@1 {
+                                        compatible = "microchip,mcp2515";
+                                        reg = <1>;
+                                        clocks = <&clk20m>;
+                                        interrupt-parent = <&pioE>;
+                                        interrupts = <7 GPIO_ACTIVE_LOW>;
+                                        spi-max-frequency = <10000000>;
+                                };
+                        };
+
+                        adc0: adc@fc034000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <
+                                        /* external trigger conflicts with USBA_VBUS */
+                                        &pinctrl_adc0_ad0
+                                        &pinctrl_adc0_ad1
+                                        &pinctrl_adc0_ad2
+                                        &pinctrl_adc0_ad3
+                                        &pinctrl_adc0_ad4
+                                        >;
+                                atmel,adc-vref = <3300>;
+                                status = "okay";
+                        };
+
+                        watchdog@fc068640 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        vcc_3v3_reg: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "VCC 3V3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+                regulator-always-on;
+        };
+
+        vcc_mmc0_reg: fixedregulator@1 {
+                compatible = "regulator-fixed";
+                gpio = <&pioE 15 GPIO_ACTIVE_HIGH>;
+                regulator-name = "RST_n MCI0";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                vin-supply = <&vcc_3v3_reg>;
+                regulator-boot-on;
+        };
+};
diff --git a/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts b/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts
new file mode 100644
index 000000000000..abaaba58fbec
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts
@@ -0,0 +1,170 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "at91-sama5d4_ma5d4.dtsi"
+
+/ {
+        model = "DENX MA5D4EVK";
+        compatible = "denx,ma5d4evk", "atmel,sama5d4", "atmel,sama5";
+
+        chosen {
+                stdout-path = "serial3:115200n8";
+        };
+
+        ahb {
+                usb0: gadget@00400000 {
+                        atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_usba_vbus>;
+                        status = "okay";
+                };
+
+                usb1: ohci@00500000 {
+                        num-ports = <3>;
+                        atmel,vbus-gpio = <0
+                                           &pioE 11 GPIO_ACTIVE_LOW
+                                           &pioE 14 GPIO_ACTIVE_LOW
+                                          >;
+                        status = "okay";
+                };
+
+                usb2: ehci@00600000 {
+                        status = "okay";
+                };
+
+                apb {
+                        hlcdc: hlcdc@f0000000 {
+                                status = "okay";
+
+                                hlcdc-display-controller {
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+
+                                        port@0 {
+                                                hlcdc_panel_output: endpoint@0 {
+                                                        reg = <0>;
+                                                        remote-endpoint = <&panel_input>;
+                                                };
+                                        };
+                                };
+
+                        };
+
+                        macb0: ethernet@f8020000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+
+                                phy0: ethernet-phy@0 {
+                                        reg = <0>;
+                                };
+                        };
+
+                        usart0: serial@f802c000 {
+                                status = "okay";
+                        };
+
+                        usart1: serial@f8030000 {
+                                status = "okay";
+                        };
+
+                        mmc1: mmc@fc000000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
+                                vmmc-supply = <&vcc_mmc1_reg>;
+                                vqmmc-supply = <&vcc_3v3_reg>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioE 5 0>;
+                                };
+                        };
+
+                        adc0: adc@fc034000 {
+                                atmel,adc-ts-wires = <4>;
+                                atmel,adc-ts-pressure-threshold = <10000>;
+                        };
+
+
+                        pinctrl@fc06a000 {
+                                board {
+                                        pinctrl_mmc1_cd: mmc1_cd {
+                                                atmel,pins = <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+                                        };
+                                        pinctrl_usba_vbus: usba_vbus {
+                                                atmel,pins =
+                                                        <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+                                        };
+                                };
+                        };
+                };
+        };
+
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pwms = <&hlcdc_pwm 0 50000 0>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <6>;
+                status = "okay";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                status = "okay";
+
+                user1 {
+                        label = "user1";
+                        gpios = <&pioD 28 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                user2 {
+                        label = "user2";
+                        gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+
+                user3 {
+                        label = "user3";
+                        gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        panel: panel {
+                /* Actually Ampire 800480R2 */
+                compatible = "foxlink,fl500wvr00-a0t", "simple-panel";
+                backlight = <&backlight>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "okay";
+
+                port@0 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        panel_input: endpoint@0 {
+                                reg = <0>;
+                                remote-endpoint = <&hlcdc_panel_output>;
+                        };
+                };
+        };
+
+        vcc_mmc1_reg: fixedregulator@2 {
+                compatible = "regulator-fixed";
+                gpio = <&pioE 17 GPIO_ACTIVE_LOW>;
+                regulator-name = "VDD MCI1";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                vin-supply = <&vcc_3v3_reg>;
+        };
+};
diff --git a/arch/arm/boot/dts/at91-vinco.dts b/arch/arm/boot/dts/at91-vinco.dts
new file mode 100644
index 000000000000..79aec55e1ebc
--- /dev/null
+++ b/arch/arm/boot/dts/at91-vinco.dts
@@ -0,0 +1,256 @@
+/*
+ * Device Tree file for VInCo platform
+ *
+ *  Copyright (C) 2014 Atmel,
+ *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *   2015 Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "sama5d4.dtsi"
+
+/ {
+        model = "L+G VInCo platform";
+        compatible = "l+g,vinco", "atmel,sama5d4", "atmel,sama5";
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x20000000 0x4000000>;
+        };
+
+        clocks {
+                slow_xtal {
+                        clock-frequency = <32768>;
+                };
+
+                main_xtal {
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        ahb {
+                apb {
+
+                        adc0: adc@fc034000 {
+                                status = "okay"; /* Enable ADC IIO support */
+                        };
+
+                        mmc0: mmc@f8000000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0
+                                             &pinctrl_mmc0_dat1_3
+                                             &pinctrl_mmc0_dat4_7>;
+                                vqmmc-supply = <&vcc_3v3_reg>;
+                                vmmc-supply = <&vcc_3v3_reg>;
+                                no-1-8-v;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <8>;
+                                        non-removable;
+                                        broken-cd;
+                                        status = "okay";
+                                };
+                        };
+
+                        spi0: spi@f8010000 {
+                                cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
+                                status = "okay";
+                                m25p80@0 {
+                                        compatible = "n25q32b", "jedec,spi-nor";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        i2c0: i2c@f8014000 {
+                                status = "okay";
+                        };
+
+                        i2c1: i2c@f8018000 {
+                                status = "okay";
+                                /* kerkey security module */
+                        };
+
+                        macb0: ethernet@f8020000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+
+                                ethernet-phy@1 {
+                                        reg = <0x1>;
+                                        reset-gpios = <&pioE 8 GPIO_ACTIVE_HIGH>;
+                                        interrupt-parent = <&pioB>;
+                                        interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
+                                };
+
+                        };
+
+                        i2c2: i2c@f8024000 {
+                                status = "okay";
+
+                                rtc1: rtc@64 {
+                                        compatible = "epson,rx8900";
+                                        reg = <0x32>;
+                                };
+                        };
+
+                        usart2: serial@fc008000 {
+                                /* MBUS */
+                                status = "okay";
+                        };
+
+                        usart3: serial@fc00c000 {
+                                /* debug */
+                                status = "okay";
+                        };
+
+                        usart4: serial@fc010000 {
+                                /* LMN */
+                                pinctrl-0 = <&pinctrl_usart4 &pinctrl_usart4_rts>;
+                                linux,rs485-enabled-at-boot-time;
+                                status = "okay";
+                        };
+
+                        macb1: ethernet@fc028000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                status = "okay";
+
+                                ethernet-phy@1 {
+                                        reg = <0x1>;
+                                        interrupt-parent = <&pioB>;
+                                        interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
+                                        reset-gpios = <&pioE 6 GPIO_ACTIVE_HIGH>;
+                                };
+                        };
+
+                        watchdog@fc068640 {
+                                status = "okay";
+                        };
+
+                        pinctrl@fc06a000 {
+                                board {
+                                        pinctrl_usba_vbus: usba_vbus {
+                                                atmel,pins =
+                                                <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+                                        };
+                                };
+                        };
+                };
+
+                usb0: gadget@00400000 {
+                        atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_usba_vbus>;
+                        status = "disable";
+                };
+
+                usb1: ohci@00500000 {
+                        num-ports = <3>;
+                        atmel,vbus-gpio = <0
+                                           &pioE 11 GPIO_ACTIVE_LOW
+                                           &pioE 12 GPIO_ACTIVE_LOW
+                                          >;
+                        status = "disable";
+                };
+
+                usb2: ehci@00600000 {
+                        /* 4G Modem */
+                        status = "okay";
+                };
+
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                status = "okay";
+
+                led_err {
+                        label = "err";
+                        gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                led_rssi {
+                        label = "rssi";
+                        gpios = <&pioA 9 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                led_tls {
+                        label = "tls";
+                        gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                led_lmc {
+                        label = "lmc";
+                        gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                led_wmt {
+                        label = "wmt";
+                        gpios = <&pioA 29 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                led_pwr {
+                        label = "pwr";
+                        gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+                        default-state = "on";
+                };
+
+        };
+
+        vcc_3v3_reg: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "VCC 3V3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+                regulator-always-on;
+        };
+};
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 2778533502d9..3878793364f0 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -91,6 +91,23 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
 
+                pcie_phy: phy@0301d0a0 {
+                        compatible = "brcm,cygnus-pcie-phy";
+                        reg = <0x0301d0a0 0x14>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        pcie0_phy: phy@0 {
+                                reg = <0>;
+                                #phy-cells = <0>;
+                        };
+
+                        pcie1_phy: phy@1 {
+                                reg = <1>;
+                                #phy-cells = <0>;
+                        };
+                };
+
                 pinctrl: pinctrl@0x0301d0c8 {
                         compatible = "brcm,cygnus-pinmux";
                         reg = <0x0301d0c8 0x30>,
@@ -101,6 +118,7 @@
                         compatible = "brcm,cygnus-crmu-gpio";
                         reg = <0x03024800 0x50>,
                               <0x03024008 0x18>;
+                        ngpios = <6>;
                         #gpio-cells = <2>;
                         gpio-controller;
                 };
@@ -127,6 +145,7 @@
                         compatible = "brcm,cygnus-ccm-gpio";
                         reg = <0x1800a000 0x50>,
                               <0x0301d164 0x20>;
+                        ngpios = <24>;
                         #gpio-cells = <2>;
                         gpio-controller;
                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -161,7 +180,21 @@
                         ranges = <0x81000000 0 0          0x28000000 0 0x00010000
                                   0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
 
+                        phys = <&pcie0_phy>;
+                        phy-names = "pcie-phy";
+
                         status = "disabled";
+
+                        msi-parent = <&msi0>;
+                        msi0: msi@18012000 {
+                                compatible = "brcm,iproc-msi";
+                                msi-controller;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 97 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 98 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 99 IRQ_TYPE_NONE>;
+                        };
                 };
 
                 pcie1: pcie@18013000 {
@@ -182,7 +215,21 @@
                         ranges = <0x81000000 0 0          0x48000000 0 0x00010000
                                   0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
 
+                        phys = <&pcie1_phy>;
+                        phy-names = "pcie-phy";
+
                         status = "disabled";
+
+                        msi-parent = <&msi1>;
+                        msi1: msi@18013000 {
+                                compatible = "brcm,iproc-msi";
+                                msi-controller;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 102 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 103 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 104 IRQ_TYPE_NONE>,
+                                             <GIC_SPI 105 IRQ_TYPE_NONE>;
+                        };
                 };
 
                 uart0: serial@18020000 {
@@ -245,13 +292,63 @@
                 gpio_asiu: gpio@180a5000 {
                         compatible = "brcm,cygnus-asiu-gpio";
                         reg = <0x180a5000 0x668>;
+                        ngpios = <146>;
                         #gpio-cells = <2>;
                         gpio-controller;
 
-                        pinmux = <&pinctrl>;
-
                         interrupt-controller;
                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                        gpio-ranges = <&pinctrl 0 42 1>,
+                                        <&pinctrl 1 44 3>,
+                                        <&pinctrl 4 48 1>,
+                                        <&pinctrl 5 50 3>,
+                                        <&pinctrl 8 126 1>,
+                                        <&pinctrl 9 155 1>,
+                                        <&pinctrl 10 152 1>,
+                                        <&pinctrl 11 154 1>,
+                                        <&pinctrl 12 153 1>,
+                                        <&pinctrl 13 127 3>,
+                                        <&pinctrl 16 140 1>,
+                                        <&pinctrl 17 145 7>,
+                                        <&pinctrl 24 130 10>,
+                                        <&pinctrl 34 141 4>,
+                                        <&pinctrl 38 54 1>,
+                                        <&pinctrl 39 56 3>,
+                                        <&pinctrl 42 60 3>,
+                                        <&pinctrl 45 64 3>,
+                                        <&pinctrl 48 68 2>,
+                                        <&pinctrl 50 84 6>,
+                                        <&pinctrl 56 94 6>,
+                                        <&pinctrl 62 72 1>,
+                                        <&pinctrl 63 70 1>,
+                                        <&pinctrl 64 80 1>,
+                                        <&pinctrl 65 74 3>,
+                                        <&pinctrl 68 78 1>,
+                                        <&pinctrl 69 82 1>,
+                                        <&pinctrl 70 156 17>,
+                                        <&pinctrl 87 104 12>,
+                                        <&pinctrl 99 102 2>,
+                                        <&pinctrl 101 90 4>,
+                                        <&pinctrl 105 116 6>,
+                                        <&pinctrl 111 100 2>,
+                                        <&pinctrl 113 122 4>,
+                                        <&pinctrl 123 11 1>,
+                                        <&pinctrl 124 38 4>,
+                                        <&pinctrl 128 43 1>,
+                                        <&pinctrl 129 47 1>,
+                                        <&pinctrl 130 49 1>,
+                                        <&pinctrl 131 53 1>,
+                                        <&pinctrl 132 55 1>,
+                                        <&pinctrl 133 59 1>,
+                                        <&pinctrl 134 63 1>,
+                                        <&pinctrl 135 67 1>,
+                                        <&pinctrl 136 71 1>,
+                                        <&pinctrl 137 73 1>,
+                                        <&pinctrl 138 77 1>,
+                                        <&pinctrl 139 79 1>,
+                                        <&pinctrl 140 81 1>,
+                                        <&pinctrl 141 83 1>,
+                                        <&pinctrl 142 10 1>;
                 };
 
                 touchscreen: tsc@180a6000 {
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 58aca277e4a7..10bdef557ba0 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -32,6 +32,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/bcm-nsp.h>
 
 #include "skeleton.dtsi"
 
@@ -40,9 +41,30 @@
         model = "Broadcom Northstar Plus SoC";
         interrupt-parent = <&gic>;
 
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&L2>;
+                        reg = <0x0>;
+                };
+
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&L2>;
+                        enable-method = "brcm,bcm-nsp-smp";
+                        secondary-boot-reg = <0xffff042c>;
+                        reg = <0x1>;
+                };
+        };
+
         mpcore {
                 compatible = "simple-bus";
-                ranges = <0x00000000 0x19020000 0x00003000>;
+                ranges = <0x00000000 0x19000000 0x00023000>;
                 #address-cells = <1>;
                 #size-cells = <1>;
 
@@ -58,27 +80,50 @@
                         };
                 };
 
-                L2: l2-cache {
-                        compatible = "arm,pl310-cache";
-                        reg = <0x2000 0x1000>;
-                        cache-unified;
-                        cache-level = <2>;
+                a9pll: arm_clk@00000 {
+                        #clock-cells = <0>;
+                        compatible = "brcm,nsp-armpll";
+                        clocks = <&osc>;
+                        reg = <0x00000 0x1000>;
+                };
+
+                timer@20200 {
+                        compatible = "arm,cortex-a9-global-timer";
+                        reg = <0x20200 0x100>;
+                        interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&periph_clk>;
+                };
+
+                twd-timer@20600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0x20600 0x20>;
+                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+                                                  IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&periph_clk>;
+                };
+
+                twd-watchdog@20620 {
+                        compatible = "arm,cortex-a9-twd-wdt";
+                        reg = <0x20620 0x20>;
+                        interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
+                                                  IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&periph_clk>;
                 };
 
-                gic: interrupt-controller@19021000 {
+                gic: interrupt-controller@21000 {
                         compatible = "arm,cortex-a9-gic";
                         #interrupt-cells = <3>;
                         #address-cells = <0>;
                         interrupt-controller;
-                        reg = <0x1000 0x1000>,
-                              <0x0100 0x100>;
+                        reg = <0x21000 0x1000>,
+                              <0x20100 0x100>;
                 };
 
-                timer@19020200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x0200 0x100>;
-                        interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&periph_clk>;
+                L2: l2-cache {
+                        compatible = "arm,pl310-cache";
+                        reg = <0x22000 0x1000>;
+                        cache-unified;
+                        cache-level = <2>;
                 };
         };
 
@@ -87,33 +132,178 @@
                 #size-cells = <1>;
                 ranges;
 
-                periph_clk: periph_clk {
+                osc: oscillator {
+                        #clock-cells = <0>;
                         compatible = "fixed-clock";
+                        clock-frequency = <25000000>;
+                };
+
+                iprocmed: iprocmed {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+                        clock-div = <2>;
+                        clock-mult = <1>;
+                };
+
+                iprocslow: iprocslow {
                         #clock-cells = <0>;
-                        clock-frequency = <500000000>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+                        clock-div = <4>;
+                        clock-mult = <1>;
+                };
+
+                periph_clk: periph_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&a9pll>;
+                        clock-div = <2>;
+                        clock-mult = <1>;
                 };
         };
 
         axi {
                 compatible = "simple-bus";
-                ranges = <0x00000000 0x18000000 0x00001000>;
+                ranges = <0x00000000 0x18000000 0x0011ba08>;
                 #address-cells = <1>;
                 #size-cells = <1>;
 
-                uart0: serial@18000300 {
+                uart0: serial@0300 {
                         compatible = "ns16550a";
                         reg = <0x0300 0x100>;
                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-                        clock-frequency = <62499840>;
+                        clocks = <&osc>;
                         status = "disabled";
                 };
 
-                uart1: serial@18000400 {
+                uart1: serial@0400 {
                         compatible = "ns16550a";
                         reg = <0x0400 0x100>;
                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-                        clock-frequency = <62499840>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+
+                pcie0: pcie@12000 {
+                        compatible = "brcm,iproc-pcie";
+                        reg = <0x12000 0x1000>;
+
+                        #interrupt-cells = <1>;
+                        interrupt-map-mask = <0 0 0 0>;
+                        interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;
+
+                        linux,pci-domain = <0>;
+
+                        bus-range = <0x00 0xff>;
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+
+                        /* Note: The HW does not support I/O resources.  So,
+                         * only the memory resource range is being specified.
+                         */
+                        ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
+
+                        status = "disabled";
+                };
+
+                pcie1: pcie@13000 {
+                        compatible = "brcm,iproc-pcie";
+                        reg = <0x13000 0x1000>;
+
+                        #interrupt-cells = <1>;
+                        interrupt-map-mask = <0 0 0 0>;
+                        interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;
+
+                        linux,pci-domain = <1>;
+
+                        bus-range = <0x00 0xff>;
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+
+                        /* Note: The HW does not support I/O resources.  So,
+                         * only the memory resource range is being specified.
+                         */
+                        ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
+
+                        status = "disabled";
+                };
+
+                pcie2: pcie@14000 {
+                        compatible = "brcm,iproc-pcie";
+                        reg = <0x14000 0x1000>;
+
+                        #interrupt-cells = <1>;
+                        interrupt-map-mask = <0 0 0 0>;
+                        interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;
+
+                        linux,pci-domain = <2>;
+
+                        bus-range = <0x00 0xff>;
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+
+                        /* Note: The HW does not support I/O resources.  So,
+                         * only the memory resource range is being specified.
+                         */
+                        ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
+
                         status = "disabled";
                 };
+
+                nand: nand@26000 {
+                        compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
+                        reg = <0x026000 0x600>,
+                              <0x11b408 0x600>,
+                              <0x026f00 0x20>;
+                        reg-names = "nand", "iproc-idm", "iproc-ext";
+                        interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        brcm,nand-has-wp;
+                };
+
+                i2c0: i2c@38000 {
+                        compatible = "brcm,iproc-i2c";
+                        reg = <0x38000 0x50>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
+                        clock-frequency = <100000>;
+                };
+
+                lcpll0: lcpll0@3f100 {
+                        #clock-cells = <1>;
+                        compatible = "brcm,nsp-lcpll0";
+                        reg = <0x3f100 0x14>;
+                        clocks = <&osc>;
+                        clock-output-names = "lcpll0", "pcie_phy", "sdio",
+                                             "ddr_phy";
+                };
+
+                genpll: genpll@3f140 {
+                        #clock-cells = <1>;
+                        compatible = "brcm,nsp-genpll";
+                        reg = <0x3f140 0x24>;
+                        clocks = <&osc>;
+                        clock-output-names = "genpll", "phy", "ethernetclk",
+                                             "usbclk", "iprocfast", "sata1",
+                                             "sata2";
+                };
+
+                pinctrl: pinctrl@3f1c0 {
+                        compatible = "brcm,nsp-pinmux";
+                        reg = <0x3f1c0 0x04>,
+                              <0x30028 0x04>,
+                              <0x3f408 0x04>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index b2bff43b135c..228614ffff44 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -1,4 +1,5 @@
 /dts-v1/;
+#include "bcm2835.dtsi"
 #include "bcm2835-rpi.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index 668442b1bda5..ef5405025223 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -1,4 +1,5 @@
 /dts-v1/;
+#include "bcm2835.dtsi"
 #include "bcm2835-rpi.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index eab8b5916e8a..86f1f2f598a7 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -1,4 +1,5 @@
 /dts-v1/;
+#include "bcm2835.dtsi"
 #include "bcm2835-rpi.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index ff6b2d1c6c90..4859e9d81b23 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -1,4 +1,5 @@
 /dts-v1/;
+#include "bcm2835.dtsi"
 #include "bcm2835-rpi.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 3572f0367baf..3afb9fefe2d1 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -1,5 +1,3 @@
-#include "bcm2835.dtsi"
-
 / {
         memory {
                 reg = <0 0x10000000>;
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index aef64de77495..b83b32639358 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -1,206 +1,14 @@
-#include <dt-bindings/pinctrl/bcm2835.h>
-#include <dt-bindings/clock/bcm2835.h>
-#include "skeleton.dtsi"
+#include "bcm283x.dtsi"
 
 / {
         compatible = "brcm,bcm2835";
-        model = "BCM2835";
-        interrupt-parent = <&intc>;
-
-        chosen {
-                bootargs = "earlyprintk console=ttyAMA0";
-        };
 
         soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
                 ranges = <0x7e000000 0x20000000 0x02000000>;
                 dma-ranges = <0x40000000 0x00000000 0x20000000>;
 
-                timer@7e003000 {
-                        compatible = "brcm,bcm2835-system-timer";
-                        reg = <0x7e003000 0x1000>;
-                        interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
-                        /* This could be a reference to BCM2835_CLOCK_TIMER,
-                         * but we don't have the driver using the common clock
-                         * support yet.
-                         */
-                        clock-frequency = <1000000>;
-                };
-
-                dma: dma@7e007000 {
-                        compatible = "brcm,bcm2835-dma";
-                        reg = <0x7e007000 0xf00>;
-                        interrupts = <1 16>,
-                                     <1 17>,
-                                     <1 18>,
-                                     <1 19>,
-                                     <1 20>,
-                                     <1 21>,
-                                     <1 22>,
-                                     <1 23>,
-                                     <1 24>,
-                                     <1 25>,
-                                     <1 26>,
-                                     <1 27>,
-                                     <1 28>;
-
-                        #dma-cells = <1>;
-                        brcm,dma-channel-mask = <0x7f35>;
-                };
-
-                intc: interrupt-controller@7e00b200 {
-                        compatible = "brcm,bcm2835-armctrl-ic";
-                        reg = <0x7e00b200 0x200>;
-                        interrupt-controller;
-                        #interrupt-cells = <2>;
-                };
-
-                watchdog@7e100000 {
-                        compatible = "brcm,bcm2835-pm-wdt";
-                        reg = <0x7e100000 0x28>;
-                };
-
-                clocks: cprman@7e101000 {
-                        compatible = "brcm,bcm2835-cprman";
-                        #clock-cells = <1>;
-                        reg = <0x7e101000 0x2000>;
-
-                        /* CPRMAN derives everything from the platform's
-                         * oscillator.
-                         */
-                        clocks = <&clk_osc>;
-                };
-
-                rng@7e104000 {
-                        compatible = "brcm,bcm2835-rng";
-                        reg = <0x7e104000 0x10>;
-                };
-
-                mailbox: mailbox@7e00b800 {
-                        compatible = "brcm,bcm2835-mbox";
-                        reg = <0x7e00b880 0x40>;
-                        interrupts = <0 1>;
-                        #mbox-cells = <0>;
-                };
-
-                gpio: gpio@7e200000 {
-                        compatible = "brcm,bcm2835-gpio";
-                        reg = <0x7e200000 0xb4>;
-                        /*
-                         * The GPIO IP block is designed for 3 banks of GPIOs.
-                         * Each bank has a GPIO interrupt for itself.
-                         * There is an overall "any bank" interrupt.
-                         * In order, these are GIC interrupts 17, 18, 19, 20.
-                         * Since the BCM2835 only has 2 banks, the 2nd bank
-                         * interrupt output appears to be mirrored onto the
-                         * 3rd bank's interrupt signal.
-                         * So, a bank0 interrupt shows up on 17, 20, and
-                         * a bank1 interrupt shows up on 18, 19, 20!
-                         */
-                        interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
-
-                        gpio-controller;
-                        #gpio-cells = <2>;
-
-                        interrupt-controller;
-                        #interrupt-cells = <2>;
-                };
-
-                uart0: uart@7e201000 {
-                        compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
-                        reg = <0x7e201000 0x1000>;
-                        interrupts = <2 25>;
-                        clocks = <&clocks BCM2835_CLOCK_UART>,
-                                 <&clocks BCM2835_CLOCK_VPU>;
-                        clock-names = "uartclk", "apb_pclk";
-                        arm,primecell-periphid = <0x00241011>;
-                };
-
-                i2s: i2s@7e203000 {
-                        compatible = "brcm,bcm2835-i2s";
-                        reg = <0x7e203000 0x20>,
-                              <0x7e101098 0x02>;
-
-                        dmas = <&dma 2>,
-                               <&dma 3>;
-                        dma-names = "tx", "rx";
-                        status = "disabled";
-                };
-
-                spi: spi@7e204000 {
-                        compatible = "brcm,bcm2835-spi";
-                        reg = <0x7e204000 0x1000>;
-                        interrupts = <2 22>;
-                        clocks = <&clocks BCM2835_CLOCK_VPU>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        status = "disabled";
-                };
-
-                i2c0: i2c@7e205000 {
-                        compatible = "brcm,bcm2835-i2c";
-                        reg = <0x7e205000 0x1000>;
-                        interrupts = <2 21>;
-                        clocks = <&clocks BCM2835_CLOCK_VPU>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        status = "disabled";
-                };
-
-                sdhci: sdhci@7e300000 {
-                        compatible = "brcm,bcm2835-sdhci";
-                        reg = <0x7e300000 0x100>;
-                        interrupts = <2 30>;
-                        clocks = <&clocks BCM2835_CLOCK_EMMC>;
-                        status = "disabled";
-                };
-
-                i2c1: i2c@7e804000 {
-                        compatible = "brcm,bcm2835-i2c";
-                        reg = <0x7e804000 0x1000>;
-                        interrupts = <2 21>;
-                        clocks = <&clocks BCM2835_CLOCK_VPU>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        status = "disabled";
-                };
-
-                i2c2: i2c@7e805000 {
-                        compatible = "brcm,bcm2835-i2c";
-                        reg = <0x7e805000 0x1000>;
-                        interrupts = <2 21>;
-                        clocks = <&clocks BCM2835_CLOCK_VPU>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        status = "disabled";
-                };
-
-                usb@7e980000 {
-                        compatible = "brcm,bcm2835-usb";
-                        reg = <0x7e980000 0x10000>;
-                        interrupts = <1 9>;
-                };
-
                 arm-pmu {
                         compatible = "arm,arm1176-pmu";
                 };
         };
-
-        clocks {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                /* The oscillator is the root of the clock tree. */
-                clk_osc: clock@3 {
-                        compatible = "fixed-clock";
-                        reg = <3>;
-                        #clock-cells = <0>;
-                        clock-output-names = "osc";
-                        clock-frequency = <19200000>;
-                };
-
-        };
 };
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
new file mode 100644
index 000000000000..ff946661bd13
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -0,0 +1,35 @@
+/dts-v1/;
+#include "bcm2836.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+        compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
+        model = "Raspberry Pi 2 Model B";
+
+        memory {
+                reg = <0 0x40000000>;
+        };
+
+        leds {
+                act {
+                        gpios = <&gpio 47 0>;
+                };
+
+                pwr {
+                        label = "PWR";
+                        gpios = <&gpio 35 0>;
+                        default-state = "keep";
+                        linux,default-trigger = "default-on";
+                };
+        };
+};
+
+&gpio {
+        pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+
+        /* I2S interface */
+        i2s_alt0: i2s_alt0 {
+                brcm,pins = <18 19 20 21>;
+                brcm,function = <BCM2835_FSEL_ALT0>;
+        };
+};
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
new file mode 100644
index 000000000000..9d0651d8f373
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -0,0 +1,78 @@
+#include "bcm283x.dtsi"
+
+/ {
+        compatible = "brcm,bcm2836";
+
+        soc {
+                ranges = <0x7e000000 0x3f000000 0x1000000>,
+                         <0x40000000 0x40000000 0x00001000>;
+                dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
+
+                local_intc: local_intc {
+                        compatible = "brcm,bcm2836-l1-intc";
+                        reg = <0x40000000 0x100>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&local_intc>;
+                };
+
+                arm-pmu {
+                        compatible = "arm,cortex-a7-pmu";
+                        interrupt-parent = <&local_intc>;
+                        interrupts = <9>;
+                };
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupt-parent = <&local_intc>;
+                interrupts = <0>, // PHYS_SECURE_PPI
+                             <1>, // PHYS_NONSECURE_PPI
+                             <3>, // VIRT_PPI
+                             <2>; // HYP_PPI
+                always-on;
+        };
+
+        cpus: cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                v7_cpu0: cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf00>;
+                        clock-frequency = <800000000>;
+                };
+
+                v7_cpu1: cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf01>;
+                        clock-frequency = <800000000>;
+                };
+
+                v7_cpu2: cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf02>;
+                        clock-frequency = <800000000>;
+                };
+
+                v7_cpu3: cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf03>;
+                        clock-frequency = <800000000>;
+                };
+        };
+};
+
+/* Make the BCM2835-style global interrupt controller be a child of the
+ * CPU-local interrupt controller.
+ */
+&intc {
+        compatible = "brcm,bcm2836-armctrl-ic";
+        reg = <0x7e00b200 0x200>;
+        interrupt-parent = <&local_intc>;
+        interrupts = <8>;
+};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
new file mode 100644
index 000000000000..971e741e5467
--- /dev/null
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -0,0 +1,212 @@
+#include <dt-bindings/pinctrl/bcm2835.h>
+#include <dt-bindings/clock/bcm2835.h>
+#include "skeleton.dtsi"
+
+/* This include file covers the common peripherals and configuration between
+ * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
+ * bcm2835.dtsi and bcm2836.dtsi.
+ */
+
+/ {
+        compatible = "brcm,bcm2835";
+        model = "BCM2835";
+        interrupt-parent = <&intc>;
+
+        chosen {
+                bootargs = "earlyprintk console=ttyAMA0";
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                timer@7e003000 {
+                        compatible = "brcm,bcm2835-system-timer";
+                        reg = <0x7e003000 0x1000>;
+                        interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+                        /* This could be a reference to BCM2835_CLOCK_TIMER,
+                         * but we don't have the driver using the common clock
+                         * support yet.
+                         */
+                        clock-frequency = <1000000>;
+                };
+
+                dma: dma@7e007000 {
+                        compatible = "brcm,bcm2835-dma";
+                        reg = <0x7e007000 0xf00>;
+                        interrupts = <1 16>,
+                                     <1 17>,
+                                     <1 18>,
+                                     <1 19>,
+                                     <1 20>,
+                                     <1 21>,
+                                     <1 22>,
+                                     <1 23>,
+                                     <1 24>,
+                                     <1 25>,
+                                     <1 26>,
+                                     <1 27>,
+                                     <1 28>;
+
+                        #dma-cells = <1>;
+                        brcm,dma-channel-mask = <0x7f35>;
+                };
+
+                intc: interrupt-controller@7e00b200 {
+                        compatible = "brcm,bcm2835-armctrl-ic";
+                        reg = <0x7e00b200 0x200>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                watchdog@7e100000 {
+                        compatible = "brcm,bcm2835-pm-wdt";
+                        reg = <0x7e100000 0x28>;
+                };
+
+                clocks: cprman@7e101000 {
+                        compatible = "brcm,bcm2835-cprman";
+                        #clock-cells = <1>;
+                        reg = <0x7e101000 0x2000>;
+
+                        /* CPRMAN derives everything from the platform's
+                         * oscillator.
+                         */
+                        clocks = <&clk_osc>;
+                };
+
+                rng@7e104000 {
+                        compatible = "brcm,bcm2835-rng";
+                        reg = <0x7e104000 0x10>;
+                };
+
+                mailbox: mailbox@7e00b800 {
+                        compatible = "brcm,bcm2835-mbox";
+                        reg = <0x7e00b880 0x40>;
+                        interrupts = <0 1>;
+                        #mbox-cells = <0>;
+                };
+
+                gpio: gpio@7e200000 {
+                        compatible = "brcm,bcm2835-gpio";
+                        reg = <0x7e200000 0xb4>;
+                        /*
+                         * The GPIO IP block is designed for 3 banks of GPIOs.
+                         * Each bank has a GPIO interrupt for itself.
+                         * There is an overall "any bank" interrupt.
+                         * In order, these are GIC interrupts 17, 18, 19, 20.
+                         * Since the BCM2835 only has 2 banks, the 2nd bank
+                         * interrupt output appears to be mirrored onto the
+                         * 3rd bank's interrupt signal.
+                         * So, a bank0 interrupt shows up on 17, 20, and
+                         * a bank1 interrupt shows up on 18, 19, 20!
+                         */
+                        interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                uart0: uart@7e201000 {
+                        compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+                        reg = <0x7e201000 0x1000>;
+                        interrupts = <2 25>;
+                        clocks = <&clocks BCM2835_CLOCK_UART>,
+                                 <&clocks BCM2835_CLOCK_VPU>;
+                        clock-names = "uartclk", "apb_pclk";
+                        arm,primecell-periphid = <0x00241011>;
+                };
+
+                i2s: i2s@7e203000 {
+                        compatible = "brcm,bcm2835-i2s";
+                        reg = <0x7e203000 0x20>,
+                              <0x7e101098 0x02>;
+
+                        dmas = <&dma 2>,
+                               <&dma 3>;
+                        dma-names = "tx", "rx";
+                        status = "disabled";
+                };
+
+                spi: spi@7e204000 {
+                        compatible = "brcm,bcm2835-spi";
+                        reg = <0x7e204000 0x1000>;
+                        interrupts = <2 22>;
+                        clocks = <&clocks BCM2835_CLOCK_VPU>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                i2c0: i2c@7e205000 {
+                        compatible = "brcm,bcm2835-i2c";
+                        reg = <0x7e205000 0x1000>;
+                        interrupts = <2 21>;
+                        clocks = <&clocks BCM2835_CLOCK_VPU>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                aux: aux@0x7e215000 {
+                        compatible = "brcm,bcm2835-aux";
+                        #clock-cells = <1>;
+                        reg = <0x7e215000 0x8>;
+                        clocks = <&clocks BCM2835_CLOCK_VPU>;
+                };
+
+                sdhci: sdhci@7e300000 {
+                        compatible = "brcm,bcm2835-sdhci";
+                        reg = <0x7e300000 0x100>;
+                        interrupts = <2 30>;
+                        clocks = <&clocks BCM2835_CLOCK_EMMC>;
+                        status = "disabled";
+                };
+
+                i2c1: i2c@7e804000 {
+                        compatible = "brcm,bcm2835-i2c";
+                        reg = <0x7e804000 0x1000>;
+                        interrupts = <2 21>;
+                        clocks = <&clocks BCM2835_CLOCK_VPU>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                i2c2: i2c@7e805000 {
+                        compatible = "brcm,bcm2835-i2c";
+                        reg = <0x7e805000 0x1000>;
+                        interrupts = <2 21>;
+                        clocks = <&clocks BCM2835_CLOCK_VPU>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                usb@7e980000 {
+                        compatible = "brcm,bcm2835-usb";
+                        reg = <0x7e980000 0x10000>;
+                        interrupts = <1 9>;
+                };
+        };
+
+        clocks {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                /* The oscillator is the root of the clock tree. */
+                clk_osc: clock@3 {
+                        compatible = "fixed-clock";
+                        reg = <3>;
+                        #clock-cells = <0>;
+                        clock-output-names = "osc";
+                        clock-frequency = <19200000>;
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
index 446c586cd473..b52927c94e35 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -50,6 +50,36 @@
                         gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "default-off";
                 };
+
+                wireless {
+                        label = "bcm53xx:white:wireless";
+                        gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-off";
+                };
+
+                wps {
+                        label = "bcm53xx:white:wps";
+                        gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-off";
+                };
+
+                5ghz-2 {
+                        label = "bcm53xx:white:5ghz-2";
+                        gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "default-off";
+                };
+
+                usb3 {
+                        label = "bcm53xx:white:usb3";
+                        gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "default-off";
+                };
+
+                usb2 {
+                        label = "bcm53xx:white:usb2";
+                        gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "default-off";
+                };
         };
 
         gpio-keys {
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 6f50f672efbd..65a1309bd6e2 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -8,6 +8,7 @@
  * Licensed under the GNU/GPL. See COPYING for details.
  */
 
+#include <dt-bindings/clock/bcm-nsp.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -27,7 +28,7 @@
                         compatible = "ns16550";
                         reg = <0x0300 0x100>;
                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-                        clock-frequency = <100000000>;
+                        clocks = <&iprocslow>;
                         status = "disabled";
                 };
 
@@ -35,48 +36,55 @@
                         compatible = "ns16550";
                         reg = <0x0400 0x100>;
                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-                        clock-frequency = <100000000>;
+                        clocks = <&iprocslow>;
                         status = "disabled";
                 };
         };
 
         mpcore {
                 compatible = "simple-bus";
-                ranges = <0x00000000 0x19020000 0x00003000>;
+                ranges = <0x00000000 0x19000000 0x00023000>;
                 #address-cells = <1>;
                 #size-cells = <1>;
 
-                scu@0000 {
+                a9pll: arm_clk@00000 {
+                        #clock-cells = <0>;
+                        compatible = "brcm,nsp-armpll";
+                        clocks = <&osc>;
+                        reg = <0x00000 0x1000>;
+                };
+
+                scu@20000 {
                         compatible = "arm,cortex-a9-scu";
-                        reg = <0x0000 0x100>;
+                        reg = <0x20000 0x100>;
                 };
 
-                timer@0200 {
+                timer@20200 {
                         compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x0200 0x100>;
+                        reg = <0x20200 0x100>;
                         interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&clk_periph>;
+                        clocks = <&periph_clk>;
                 };
 
-                local-timer@0600 {
+                local-timer@20600 {
                         compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x0600 0x100>;
+                        reg = <0x20600 0x100>;
                         interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&clk_periph>;
+                        clocks = <&periph_clk>;
                 };
 
-                gic: interrupt-controller@1000 {
+                gic: interrupt-controller@21000 {
                         compatible = "arm,cortex-a9-gic";
                         #interrupt-cells = <3>;
                         #address-cells = <0>;
                         interrupt-controller;
-                        reg = <0x1000 0x1000>,
-                              <0x0100 0x100>;
+                        reg = <0x21000 0x1000>,
+                              <0x20100 0x100>;
                 };
 
-                L2: cache-controller@2000 {
+                L2: cache-controller@22000 {
                         compatible = "arm,pl310-cache";
-                        reg = <0x2000 0x1000>;
+                        reg = <0x22000 0x1000>;
                         cache-unified;
                         arm,shared-override;
                         prefetch-data = <1>;
@@ -94,14 +102,37 @@
 
         clocks {
                 #address-cells = <1>;
-                #size-cells = <0>;
+                #size-cells = <1>;
+                ranges;
 
-                /* As long as we do not have a real clock driver us this
-                 * fixed clock */
-                clk_periph: periph {
+                osc: oscillator {
+                        #clock-cells = <0>;
                         compatible = "fixed-clock";
+                        clock-frequency = <25000000>;
+                };
+
+                iprocmed: iprocmed {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+                        clock-div = <2>;
+                        clock-mult = <1>;
+                };
+
+                iprocslow: iprocslow {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+                        clock-div = <4>;
+                        clock-mult = <1>;
+                };
+
+                periph_clk: periph_clk {
                         #clock-cells = <0>;
-                        clock-frequency = <400000000>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&a9pll>;
+                        clock-div = <2>;
+                        clock-mult = <1>;
                 };
         };
 
@@ -178,6 +209,25 @@
                 };
         };
 
+        lcpll0: lcpll0@1800c100 {
+                #clock-cells = <1>;
+                compatible = "brcm,nsp-lcpll0";
+                reg = <0x1800c100 0x14>;
+                clocks = <&osc>;
+                clock-output-names = "lcpll0", "pcie_phy", "sdio",
+                                     "ddr_phy";
+        };
+
+        genpll: genpll@1800c140 {
+                #clock-cells = <1>;
+                compatible = "brcm,nsp-genpll";
+                reg = <0x1800c140 0x24>;
+                clocks = <&osc>;
+                clock-output-names = "genpll", "phy", "ethernetclk",
+                                     "usbclk", "iprocfast", "sata1",
+                                     "sata2";
+        };
+
         nand: nand@18028000 {
                 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
                 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 34cd64051250..d0560e8cd6de 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -43,18 +43,31 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
 
-                arm_timer_clk: arm_timer_clk {
-                        #clock-cells = <0>;
-                        compatible = "fixed-clock";
-                        clock-frequency = <500000000>;
-                };
-
+                /* UBUS peripheral clock */
                 periph_clk: periph_clk {
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
                         clock-frequency = <50000000>;
                         clock-output-names = "periph";
                 };
+
+                /* peripheral clock for system timer */
+                axi_clk: axi_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&armpll>;
+                        clock-div = <2>;
+                        clock-mult = <1>;
+                };
+
+                /* APB bus clock */
+                apb_clk: apb_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clocks = <&armpll>;
+                        clock-div = <4>;
+                        clock-mult = <1>;
+                };
         };
 
         /* ARM bus */
@@ -93,14 +106,14 @@
                         compatible = "arm,cortex-a9-global-timer";
                         reg = <0x1e200 0x20>;
                         interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&arm_timer_clk>;
+                        clocks = <&axi_clk>;
                 };
 
                 local_timer: local-timer@1e600 {
                         compatible = "arm,cortex-a9-twd-timer";
                         reg = <0x1e600 0x20>;
                         interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&arm_timer_clk>;
+                        clocks = <&axi_clk>;
                 };
 
                 twd_watchdog: watchdog@1e620 {
@@ -109,6 +122,13 @@
                         interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
                 };
 
+                armpll: armpll {
+                        #clock-cells = <0>;
+                        compatible = "brcm,bcm63138-armpll";
+                        clocks = <&periph_clk>;
+                        reg = <0x20000 0xf00>;
+                };
+
                 pmb0: reset-controller@4800c0 {
                         compatible = "brcm,bcm63138-pmb";
                         reg = <0x4800c0 0x10>;
diff --git a/arch/arm/boot/dts/bcm94708.dts b/arch/arm/boot/dts/bcm94708.dts
new file mode 100644
index 000000000000..251a486f2da6
--- /dev/null
+++ b/arch/arm/boot/dts/bcm94708.dts
@@ -0,0 +1,56 @@
+/*
+ *  BSD LICENSE
+ *
+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in
+ *      the documentation and/or other materials provided with the
+ *      distribution.
+ *    * Neither the name of Broadcom Corporation nor the names of its
+ *      contributors may be used to endorse or promote products derived
+ *      from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+#include "bcm4708.dtsi"
+
+/ {
+        model = "NorthStar SVK (BCM94708)";
+        compatible = "brcm,bcm94708", "brcm,bcm4708";
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x00000000 0x08000000>;
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm94709.dts b/arch/arm/boot/dts/bcm94709.dts
new file mode 100644
index 000000000000..b16cac92904f
--- /dev/null
+++ b/arch/arm/boot/dts/bcm94709.dts
@@ -0,0 +1,56 @@
+/*
+ *  BSD LICENSE
+ *
+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in
+ *      the documentation and/or other materials provided with the
+ *      distribution.
+ *    * Neither the name of Broadcom Corporation nor the names of its
+ *      contributors may be used to endorse or promote products derived
+ *      from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+#include "bcm4708.dtsi"
+
+/ {
+        model = "NorthStar SVK (BCM94709)";
+        compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x00000000 0x08000000>;
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm953012k.dts b/arch/arm/boot/dts/bcm953012k.dts
new file mode 100644
index 000000000000..05a985a20378
--- /dev/null
+++ b/arch/arm/boot/dts/bcm953012k.dts
@@ -0,0 +1,63 @@
+/*
+ *  BSD LICENSE
+ *
+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in
+ *      the documentation and/or other materials provided with the
+ *      distribution.
+ *    * Neither the name of Broadcom Corporation nor the names of its
+ *      contributors may be used to endorse or promote products derived
+ *      from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+#include "bcm4708.dtsi"
+
+/ {
+        model = "NorthStar SVK (BCM953012K)";
+        compatible = "brcm,bcm953012k", "brcm,brcm53012", "brcm,bcm4708";
+
+        aliases {
+                serial0 = &uart0;
+                serial1 = &uart1;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x00000000 0x10000000>;
+        };
+};
+
+&uart0 {
+        clock-frequency = <62499840>;
+        status = "okay";
+};
+
+&uart1 {
+        clock-frequency = <62499840>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 16303dbd35df..e298450b49b2 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -55,3 +55,62 @@
 &uart1 {
         status = "okay";
 };
+
+&pcie0 {
+        status = "okay";
+};
+
+&pcie1 {
+        status = "okay";
+};
+
+&pcie2 {
+        status = "okay";
+};
+
+&nand {
+        nandcs@0 {
+                compatible = "brcm,nandcs";
+                reg = <0>;
+                nand-on-flash-bbt;
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                nand-ecc-strength = <24>;
+                nand-ecc-step-size = <1024>;
+
+                brcm,nand-oob-sector-size = <27>;
+
+                partition@0 {
+                        label = "nboot";
+                        reg = <0x00000000 0x00200000>;
+                        read-only;
+                };
+                partition@1 {
+                        label = "nenv";
+                        reg = <0x00200000 0x00400000>;
+                };
+                partition@2 {
+                        label = "nsystem";
+                        reg = <0x00600000 0x00a00000>;
+                };
+                partition@3 {
+                        label = "nrootfs";
+                        reg = <0x01000000 0x03000000>;
+                };
+                partition@4 {
+                        label = "ncustfs";
+                        reg = <0x04000000 0x3c000000>;
+                };
+        };
+};
+
+&pinctrl {
+        pinctrl-names = "default";
+        pinctrl-0 = <&nand_sel>;
+        nand_sel: nand_sel {
+                function = "nand";
+                groups = "nand_grp";
+        };
+};
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index eaadac3bdd44..ae81009741ff 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -435,6 +435,29 @@
                         ranges = <0 0xfc0000 0x10000>;
                         interrupt-parent = <&sic>;
 
+                        wdt0: watchdog@1000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x1000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <0>;
+                        };
+
+                        wdt1: watchdog@2000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x2000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <1>;
+                                status = "disabled";
+                        };
+
+                        wdt2: watchdog@3000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x3000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+
                         sm_gpio1: gpio@5000 {
                                 compatible = "snps,dw-apb-gpio";
                                 reg = <0x5000 0x400>;
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index b16df157214d..6d06b6118d83 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -396,6 +396,29 @@
                         ranges = <0 0xfc0000 0x10000>;
                         interrupt-parent = <&sic>;
 
+                        wdt0: watchdog@1000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x1000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <0>;
+                        };
+
+                        wdt1: watchdog@2000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x2000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <1>;
+                                status = "disabled";
+                        };
+
+                        wdt2: watchdog@3000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x3000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+
                         sm_gpio1: gpio@5000 {
                                 compatible = "snps,dw-apb-gpio";
                                 reg = <0x5000 0x400>;
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index da28c9704a9d..33b28757b8f6 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -84,17 +84,49 @@
                         gpio = <&portb 12 GPIO_ACTIVE_HIGH>;
                         enable-active-high;
                 };
+
+                reg_sdio1_vmmc: regulator@3 {
+                        compatible = "regulator-fixed";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-name = "sdio1_vmmc";
+                        enable-active-high;
+                        regulator-boot-on;
+                        gpio = <&portb 21 GPIO_ACTIVE_HIGH>;
+                };
+
+                reg_sdio1_vqmmc: regulator@4 {
+                        compatible = "regulator-gpio";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-name = "sdio1_vqmmc";
+                        regulator-type = "voltage";
+                        enable-active-high;
+                        gpios = <&portb 16 GPIO_ACTIVE_HIGH>;
+                        states = <3300000 0x1
+                                  1800000 0x0>;
+                };
+        };
+};
+
+&soc_pinctrl {
+        sd1gpio_pmux: sd1pwr-pmux {
+                groups = "G23", "G32";
+                function = "gpio";
         };
 };
 
 &sdhci1 {
-        broken-cd;
-        sdhci,wp-inverted;
+        vmmc-supply = <&reg_sdio1_vmmc>;
+        vqmmc-supply = <&reg_sdio1_vqmmc>;
+        cd-gpios = <&portc 30 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&portd 0 GPIO_ACTIVE_HIGH>;
+        pinctrl-0 = <&sd1gpio_pmux>, <&sd1_pmux>;
+        pinctrl-names = "default";
         status = "okay";
 };
 
 &sdhci2 {
-        broken-cd;
         bus-width = <8>;
         non-removable;
         status = "okay";
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index fb1da99996ea..2c34bfb13632 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -311,7 +311,6 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 reg = <0x1400 0x100>;
-                                interrupt-parent = <&aic>;
                                 interrupts = <4>;
                                 clocks = <&chip_clk CLKID_CFG>;
                                 pinctrl-0 = <&twsi0_pmux>;
@@ -324,7 +323,6 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 reg = <0x1800 0x100>;
-                                interrupt-parent = <&aic>;
                                 interrupts = <5>;
                                 clocks = <&chip_clk CLKID_CFG>;
                                 pinctrl-0 = <&twsi1_pmux>;
@@ -419,6 +417,11 @@
                         soc_pinctrl: pin-controller {
                                 compatible = "marvell,berlin2q-soc-pinctrl";
 
+                                sd1_pmux: sd1-pmux {
+                                        groups = "G31";
+                                        function = "sd1";
+                                };
+
                                 twsi0_pmux: twsi0-pmux {
                                         groups = "G6";
                                         function = "twsi0";
@@ -510,6 +513,29 @@
                         ranges = <0 0xfc0000 0x10000>;
                         interrupt-parent = <&sic>;
 
+                        wdt0: watchdog@1000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x1000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <0>;
+                        };
+
+                        wdt1: watchdog@2000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x2000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <1>;
+                                status = "disabled";
+                        };
+
+                        wdt2: watchdog@3000 {
+                                compatible = "snps,dw-wdt";
+                                reg = <0x3000 0x100>;
+                                clocks = <&refclk>;
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+
                         sm_gpio1: gpio@5000 {
                                 compatible = "snps,dw-apb-gpio";
                                 reg = <0x5000 0x400>;
@@ -530,7 +556,6 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 reg = <0x7000 0x100>;
-                                interrupt-parent = <&sic>;
                                 interrupts = <6>;
                                 clocks = <&refclk>;
                                 pinctrl-0 = <&twsi2_pmux>;
@@ -543,7 +568,6 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 reg = <0x8000 0x100>;
-                                interrupt-parent = <&sic>;
                                 interrupts = <7>;
                                 clocks = <&refclk>;
                                 pinctrl-0 = <&twsi3_pmux>;
@@ -554,7 +578,6 @@
                         uart0: uart@9000 {
                                 compatible = "snps,dw-apb-uart";
                                 reg = <0x9000 0x100>;
-                                interrupt-parent = <&sic>;
                                 interrupts = <8>;
                                 clocks = <&refclk>;
                                 reg-shift = <2>;
@@ -566,7 +589,6 @@
                         uart1: uart@a000 {
                                 compatible = "snps,dw-apb-uart";
                                 reg = <0xa000 0x100>;
-                                interrupt-parent = <&sic>;
                                 interrupts = <9>;
                                 clocks = <&refclk>;
                                 reg-shift = <2>;
diff --git a/arch/arm/boot/dts/compulab-sb-som.dtsi b/arch/arm/boot/dts/compulab-sb-som.dtsi
new file mode 100644
index 000000000000..93d7e235bc80
--- /dev/null
+++ b/arch/arm/boot/dts/compulab-sb-som.dtsi
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+        model = "CompuLab SB-SOM";
+        compatible = "compulab,sb-som";
+
+        vsb_3v3: fixedregulator-v3_3 {
+                compatible = "regulator-fixed";
+                regulator-name = "vsb_3v3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+                enable-active-high;
+        };
+
+        lcd0: display {
+                compatible = "startek,startek-kd050c", "panel-dpi";
+                label = "lcd";
+
+                panel-timing {
+                        clock-frequency = <33000000>;
+                        hactive = <800>;
+                        vactive = <480>;
+                        hfront-porch = <40>;
+                        hback-porch = <40>;
+                        hsync-len = <43>;
+                        vback-porch = <29>;
+                        vfront-porch = <13>;
+                        vsync-len = <3>;
+                        hsync-active = <0>;
+                        vsync-active = <0>;
+                        de-active = <1>;
+                        pixelclk-active = <1>;
+                };
+        };
+
+        hdmi_conn: connector@0 {
+                compatible = "hdmi-connector";
+                label = "hdmi";
+
+                type = "a";
+        };
+};
diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts b/arch/arm/boot/dts/da850-enbw-cmc.dts
index e750ab9086d5..645549e14237 100644
--- a/arch/arm/boot/dts/da850-enbw-cmc.dts
+++ b/arch/arm/boot/dts/da850-enbw-cmc.dts
@@ -28,3 +28,11 @@
                 };
         };
 };
+
+&edma0 {
+        ti,edma-reserved-slot-ranges = <32 50>;
+};
+
+&edma1 {
+        ti,edma-reserved-slot-ranges = <32 90>;
+};
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 4f935ad9f27b..ef061e9a2315 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -242,3 +242,11 @@
         tx-num-evt = <32>;
         rx-num-evt = <32>;
 };
+
+&edma0 {
+        ti,edma-reserved-slot-ranges = <32 50>;
+};
+
+&edma1 {
+        ti,edma-reserved-slot-ranges = <32 90>;
+};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 0bd98cd00816..226cda76e77c 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -151,10 +151,44 @@
 
                 };
                 edma0: edma@01c00000 {
-                        compatible = "ti,edma3";
-                        reg =   <0x0 0x10000>;
-                        interrupts = <11 13 12>;
-                        #dma-cells = <1>;
+                        compatible = "ti,edma3-tpcc";
+                        /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
+                        reg =   <0x0 0x8000>;
+                        reg-names = "edma3_cc";
+                        interrupts = <11 12>;
+                        interrupt-names = "edma3_ccint", "edma3_ccerrint";
+                        #dma-cells = <2>;
+
+                        ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
+                };
+                edma0_tptc0: tptc@01c08000 {
+                        compatible = "ti,edma3-tptc";
+                        reg =   <0x8000 0x400>;
+                        interrupts = <13>;
+                        interrupt-names = "edm3_tcerrint";
+                };
+                edma0_tptc1: tptc@01c08400 {
+                        compatible = "ti,edma3-tptc";
+                        reg =   <0x8400 0x400>;
+                        interrupts = <32>;
+                        interrupt-names = "edm3_tcerrint";
+                };
+                edma1: edma@01e30000 {
+                        compatible = "ti,edma3-tpcc";
+                        /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
+                        reg =   <0x230000 0x8000>;
+                        reg-names = "edma3_cc";
+                        interrupts = <93 94>;
+                        interrupt-names = "edma3_ccint", "edma3_ccerrint";
+                        #dma-cells = <2>;
+
+                        ti,tptcs = <&edma1_tptc0 7>;
+                };
+                edma1_tptc0: tptc@01e38000 {
+                        compatible = "ti,edma3-tptc";
+                        reg =   <0x238000 0x400>;
+                        interrupts = <95>;
+                        interrupt-names = "edm3_tcerrint";
                 };
                 serial0: serial@1c42000 {
                         compatible = "ns16550a";
@@ -201,6 +235,16 @@
                         compatible = "ti,da830-mmc";
                         reg = <0x40000 0x1000>;
                         interrupts = <16>;
+                        dmas = <&edma0 16 0>, <&edma0 17 0>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+                mmc1: mmc@1e1b000 {
+                        compatible = "ti,da830-mmc";
+                        reg = <0x21b000 0x1000>;
+                        interrupts = <72>;
+                        dmas = <&edma1 28 0>, <&edma1 29 0>;
+                        dma-names = "rx", "tx";
                         status = "disabled";
                 };
                 ehrpwm0: ehrpwm@01f00000 {
@@ -241,6 +285,8 @@
                         num-cs = <4>;
                         ti,davinci-spi-intr-line = <1>;
                         interrupts = <56>;
+                        dmas = <&edma0 18 0>, <&edma0 19 0>;
+                        dma-names = "rx", "tx";
                         status = "disabled";
                 };
                 mdio: mdio@1e24000 {
@@ -285,8 +331,8 @@
                         interrupts = <54>;
                         interrupt-names = "common";
                         status = "disabled";
-                        dmas = <&edma0 1>,
-                                <&edma0 0>;
+                        dmas = <&edma0 1 1>,
+                                <&edma0 0 1>;
                         dma-names = "tx", "rx";
                 };
         };
diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts
index 109fd4711647..e070862b1038 100644
--- a/arch/arm/boot/dts/dm8148-evm.dts
+++ b/arch/arm/boot/dts/dm8148-evm.dts
@@ -15,6 +15,14 @@
                 device_type = "memory";
                 reg = <0x80000000 0x40000000>;  /* 1 GB */
         };
+
+        /* MIC94060YC6 controlled by SD1_POW pin */
+        vmmcsd_fixed: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmcsd_fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
 };
 
 &cpsw_emac0 {
@@ -26,3 +34,50 @@
         phy_id = <&davinci_mdio>, <1>;
         phy-mode = "rgmii";
 };
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&sd1_pins>;
+        vmmc-supply = <&vmmcsd_fixed>;
+        bus-width = <4>;
+        cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+};
+
+&pincntl {
+        sd1_pins: pinmux_sd1_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0800, PIN_INPUT | 0x1)   /* SD1_CLK */
+                        DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP |  0x1)   /* SD1_CMD */
+                        DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[0] */
+                        DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[1] */
+                        DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[2] */
+                        DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[3] */
+                        DM814X_IOPAD(0x0924, PIN_OUTPUT |  0x40)        /* SD1_POW */
+                        DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP |  0x80)  /* GP1[6] */
+                        >;
+        };
+
+        usb0_pins: pinmux_usb0_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1)  /* USB0_DRVVBUS */
+                        >;
+        };
+
+        usb1_pins: pinmux_usb1_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80) /* USB1_DRVVBUS */
+                        >;
+        };
+};
+
+&usb0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb0_pins>;
+        dr_mode = "host";
+};
+
+&usb1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb1_pins>;
+        dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/dm8148-t410.dts b/arch/arm/boot/dts/dm8148-t410.dts
index 79838dd8dee7..5d4313fd5a46 100644
--- a/arch/arm/boot/dts/dm8148-t410.dts
+++ b/arch/arm/boot/dts/dm8148-t410.dts
@@ -15,6 +15,24 @@
                 device_type = "memory";
                 reg = <0x80000000 0x40000000>;  /* 1 GB */
         };
+
+        /* gpio9 seems to control USB VBUS regulator and/or hub power */
+        usb_power: regulator@9 {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_power";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+                regulator-always-on;
+        };
+
+        vmmcsd_fixed: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmcsd_fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
 };
 
 &cpsw_emac0 {
@@ -26,3 +44,55 @@
         phy_id = <&davinci_mdio>, <1>;
         phy-mode = "rgmii";
 };
+
+&mmc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&sd2_pins>;
+        vmmc-supply = <&vmmcsd_fixed>;
+        bus-width = <8>;
+        dmas = <&edma_xbar 8 0 1        /* use SDTXEVT1 instead of MCASP0TX */
+                &edma_xbar 9 0 2>;      /* use SDRXEVT1 instead of MCASP0RX */
+        dma-names = "tx", "rx";
+};
+
+&pincntl {
+        sd2_pins: pinmux_sd2_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x09c0, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[7] */
+                        DM814X_IOPAD(0x09c4, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[6] */
+                        DM814X_IOPAD(0x09c8, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[5] */
+                        DM814X_IOPAD(0x09cc, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[4] */
+                        DM814X_IOPAD(0x09d0, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[3] */
+                        DM814X_IOPAD(0x09d4, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[2] */
+                        DM814X_IOPAD(0x09d8, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[1] */
+                        DM814X_IOPAD(0x09dc, PIN_INPUT_PULLUP | 0x1)    /* SD2_DAT[0] */
+                        DM814X_IOPAD(0x09e0, PIN_INPUT | 0x1)           /* SD2_CLK */
+                        DM814X_IOPAD(0x09f4, PIN_INPUT_PULLUP | 0x2)    /* SD2_CMD */
+                        DM814X_IOPAD(0x0920, PIN_INPUT | 40)    /* SD2_SDCD */
+                        >;
+        };
+
+        usb0_pins: pinmux_usb0_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1)  /* USB0_DRVVBUS */
+                        >;
+        };
+
+        usb1_pins: pinmux_usb1_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80) /* USB1_DRVVBUS */
+                        >;
+        };
+};
+
+&usb0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb0_pins>;
+        dr_mode = "host";
+};
+
+&usb1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb1_pins>;
+        dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
index 09a8d88bde23..a25cd51e39ab 100644
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -5,7 +5,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/omap.h>
+#include <dt-bindings/pinctrl/dm814x.h>
 
 #include "skeleton.dtsi"
 
@@ -21,6 +21,10 @@
                 serial2 = &uart3;
                 ethernet0 = &cpsw_emac0;
                 ethernet1 = &cpsw_emac1;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                phy0 = &usb0_phy;
+                phy1 = &usb1_phy;
         };
 
         cpus {
@@ -57,6 +61,113 @@
                 ranges;
                 ti,hwmods = "l3_main";
 
+                usb: usb@47400000 {
+                        compatible = "ti,am33xx-usb";
+                        reg = <0x47400000 0x1000>;
+                        ranges;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ti,hwmods = "usb_otg_hs";
+
+                        usb0_phy: usb-phy@47401300 {
+                                compatible = "ti,am335x-usb-phy";
+                                reg = <0x47401300 0x100>;
+                                reg-names = "phy";
+                                ti,ctrl_mod = <&usb_ctrl_mod>;
+                        };
+
+                        usb0: usb@47401000 {
+                                compatible = "ti,musb-am33xx";
+                                reg = <0x47401400 0x400
+                                       0x47401000 0x200>;
+                                reg-names = "mc", "control";
+
+                                interrupts = <18>;
+                                interrupt-names = "mc";
+                                dr_mode = "otg";
+                                mentor,multipoint = <1>;
+                                mentor,num-eps = <16>;
+                                mentor,ram-bits = <12>;
+                                mentor,power = <500>;
+                                phys = <&usb0_phy>;
+
+                                dmas = <&cppi41dma  0 0 &cppi41dma  1 0
+                                        &cppi41dma  2 0 &cppi41dma  3 0
+                                        &cppi41dma  4 0 &cppi41dma  5 0
+                                        &cppi41dma  6 0 &cppi41dma  7 0
+                                        &cppi41dma  8 0 &cppi41dma  9 0
+                                        &cppi41dma 10 0 &cppi41dma 11 0
+                                        &cppi41dma 12 0 &cppi41dma 13 0
+                                        &cppi41dma 14 0 &cppi41dma  0 1
+                                        &cppi41dma  1 1 &cppi41dma  2 1
+                                        &cppi41dma  3 1 &cppi41dma  4 1
+                                        &cppi41dma  5 1 &cppi41dma  6 1
+                                        &cppi41dma  7 1 &cppi41dma  8 1
+                                        &cppi41dma  9 1 &cppi41dma 10 1
+                                        &cppi41dma 11 1 &cppi41dma 12 1
+                                        &cppi41dma 13 1 &cppi41dma 14 1>;
+                                dma-names =
+                                        "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+                                        "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+                                        "rx14", "rx15",
+                                        "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+                                        "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+                                        "tx14", "tx15";
+                        };
+
+                        usb1: usb@47401800 {
+                                compatible = "ti,musb-am33xx";
+                                reg = <0x47401c00 0x400
+                                        0x47401800 0x200>;
+                                reg-names = "mc", "control";
+                                interrupts = <19>;
+                                interrupt-names = "mc";
+                                dr_mode = "otg";
+                                mentor,multipoint = <1>;
+                                mentor,num-eps = <16>;
+                                mentor,ram-bits = <12>;
+                                mentor,power = <500>;
+                                phys = <&usb1_phy>;
+
+                                dmas = <&cppi41dma 15 0 &cppi41dma 16 0
+                                        &cppi41dma 17 0 &cppi41dma 18 0
+                                        &cppi41dma 19 0 &cppi41dma 20 0
+                                        &cppi41dma 21 0 &cppi41dma 22 0
+                                        &cppi41dma 23 0 &cppi41dma 24 0
+                                        &cppi41dma 25 0 &cppi41dma 26 0
+                                        &cppi41dma 27 0 &cppi41dma 28 0
+                                        &cppi41dma 29 0 &cppi41dma 15 1
+                                        &cppi41dma 16 1 &cppi41dma 17 1
+                                        &cppi41dma 18 1 &cppi41dma 19 1
+                                        &cppi41dma 20 1 &cppi41dma 21 1
+                                        &cppi41dma 22 1 &cppi41dma 23 1
+                                        &cppi41dma 24 1 &cppi41dma 25 1
+                                        &cppi41dma 26 1 &cppi41dma 27 1
+                                        &cppi41dma 28 1 &cppi41dma 29 1>;
+                                dma-names =
+                                        "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+                                        "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+                                        "rx14", "rx15",
+                                        "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+                                        "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+                                        "tx14", "tx15";
+                        };
+
+                        cppi41dma: dma-controller@47402000 {
+                                compatible = "ti,am3359-cppi41";
+                                reg =  <0x47400000 0x1000
+                                        0x47402000 0x1000
+                                        0x47403000 0x1000
+                                        0x47404000 0x4000>;
+                                reg-names = "glue", "controller", "scheduler", "queuemgr";
+                                interrupts = <17>;
+                                interrupt-names = "glue";
+                                #dma-cells = <2>;
+                                #dma-channels = <30>;
+                                #dma-requests = <256>;
+                        };
+                };
+
                 /*
                  * See TRM "Table 1-317. L4LS Instance Summary" for hints.
                  * It shows the module target agent registers though, so the
@@ -126,8 +237,8 @@
                                 interrupts = <65>;
                                 ti,spi-num-cs = <4>;
                                 ti,hwmods = "mcspi1";
-                                dmas = <&edma 16 &edma 17
-                                        &edma 18 &edma 19>;
+                                dmas = <&edma 16 0 &edma 17 0
+                                        &edma 18 0 &edma 19 0>;
                                 dma-names = "tx0", "rx0", "tx1", "rx1";
                         };
 
@@ -145,7 +256,7 @@
                                 reg = <0x20000 0x2000>;
                                 clock-frequency = <48000000>;
                                 interrupts = <72>;
-                                dmas = <&edma 26 &edma 27>;
+                                dmas = <&edma 26 0 &edma 27 0>;
                                 dma-names = "tx", "rx";
                         };
 
@@ -155,7 +266,7 @@
                                 reg = <0x22000 0x2000>;
                                 clock-frequency = <48000000>;
                                 interrupts = <73>;
-                                dmas = <&edma 28 &edma 29>;
+                                dmas = <&edma 28 0 &edma 29 0>;
                                 dma-names = "tx", "rx";
                         };
 
@@ -165,7 +276,7 @@
                                 reg = <0x24000 0x2000>;
                                 clock-frequency = <48000000>;
                                 interrupts = <74>;
-                                dmas = <&edma 30 &edma 31>;
+                                dmas = <&edma 30 0 &edma 31 0>;
                                 dma-names = "tx", "rx";
                         };
 
@@ -183,6 +294,28 @@
                                 ti,hwmods = "timer3";
                         };
 
+                        mmc1: mmc@60000 {
+                                compatible = "ti,omap4-hsmmc";
+                                ti,hwmods = "mmc1";
+                                dmas = <&edma 24 0
+                                        &edma 25 0>;
+                                dma-names = "tx", "rx";
+                                interrupts = <64>;
+                                interrupt-parent = <&intc>;
+                                reg = <0x60000 0x1000>;
+                        };
+
+                        mmc2: mmc@1d8000 {
+                                compatible = "ti,omap4-hsmmc";
+                                ti,hwmods = "mmc2";
+                                dmas = <&edma 2 0
+                                        &edma 3 0>;
+                                dma-names = "tx", "rx";
+                                interrupts = <28>;
+                                interrupt-parent = <&intc>;
+                                reg = <0x1d8000 0x1000>;
+                        };
+
                         control: control@140000 {
                                 compatible = "ti,dm814-scm", "simple-bus";
                                 reg = <0x140000 0x20000>;
@@ -205,6 +338,21 @@
                                         };
                                 };
 
+                                usb_ctrl_mod: control@620 {
+                                        compatible = "ti,am335x-usb-ctrl-module";
+                                        reg = <0x620 0x10
+                                                0x648 0x4>;
+                                        reg-names = "phy_ctrl", "wakeup";
+                                };
+
+                                edma_xbar: dma-router@f90 {
+                                        compatible = "ti,am335x-edma-crossbar";
+                                        reg = <0xf90 0x40>;
+                                        #dma-cells = <3>;
+                                        dma-requests = <32>;
+                                        dma-masters = <&edma>;
+                                };
+
                                 /*
                                  * Note that silicon revision 2.1 and older
                                  * require input enabled (bit 18 set) for all
@@ -221,6 +369,13 @@
                                         pinctrl-single,register-width = <32>;
                                         pinctrl-single,function-mask = <0x307ff>;
                                 };
+
+                                usb1_phy: usb-phy@1b00 {
+                                        compatible = "ti,am335x-usb-phy";
+                                        reg = <0x1b00 0x100>;
+                                        reg-names = "phy";
+                                        ti,ctrl_mod = <&usb_ctrl_mod>;
+                                };
                         };
 
                         prcm: prcm@180000 {
@@ -271,13 +426,62 @@
                         reg = <0x48200000 0x1000>;
                 };
 
+                /* Board must configure evtmux with edma_xbar for EDMA */
+                mmc3: mmc@47810000 {
+                        compatible = "ti,omap4-hsmmc";
+                        ti,hwmods = "mmc3";
+                        interrupts = <29>;
+                        interrupt-parent = <&intc>;
+                        reg = <0x47810000 0x1000>;
+                };
+
                 edma: edma@49000000 {
-                        compatible = "ti,edma3";
-                        ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
-                        reg =   <0x49000000 0x10000>,
-                                <0x44e10f90 0x40>;
+                        compatible = "ti,edma3-tpcc";
+                        ti,hwmods = "tpcc";
+                        reg =   <0x49000000 0x10000>;
+                        reg-names = "edma3_cc";
                         interrupts = <12 13 14>;
-                        #dma-cells = <1>;
+                        interrupt-names = "edma3_ccint", "emda3_mperr",
+                                          "edma3_ccerrint";
+                        dma-requests = <64>;
+                        #dma-cells = <2>;
+
+                        ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+                                   <&edma_tptc2 3>, <&edma_tptc3 0>;
+
+                        ti,edma-memcpy-channels = <20 21>;
+                };
+
+                edma_tptc0: tptc@49800000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc0";
+                        reg =   <0x49800000 0x100000>;
+                        interrupts = <112>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc1: tptc@49900000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc1";
+                        reg =   <0x49900000 0x100000>;
+                        interrupts = <113>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc2: tptc@49a00000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc2";
+                        reg =   <0x49a00000 0x100000>;
+                        interrupts = <114>;
+                        interrupt-names = "edma3_tcerrint";
+                };
+
+                edma_tptc3: tptc@49b00000 {
+                        compatible = "ti,edma3-tptc";
+                        ti,hwmods = "tptc3";
+                        reg =   <0x49b00000 0x100000>;
+                        interrupts = <115>;
+                        interrupt-names = "edma3_tcerrint";
                 };
 
                 /* See TRM "Table 1-318. L4HS Instance Summary" */
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index eee636de4cd8..c3b8811a3e58 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -64,7 +64,6 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 ranges;
-                ti,hwmods = "l3_main";
 
                 prcm: prcm@48180000 {
                         compatible = "ti,dm816-prcm";
@@ -180,6 +179,8 @@
                         #address-cells = <2>;
                         #size-cells = <1>;
                         interrupts = <100>;
+                        dmas = <&edma 52>;
+                        dma-names = "rxtx";
                         gpmc,num-cs = <6>;
                         gpmc,num-waitpins = <2>;
                 };
@@ -227,6 +228,13 @@
                         };
                 };
 
+                spinbox: spinbox@480ca000 {
+                        compatible = "ti,omap4-hwspinlock";
+                        reg = <0x480ca000 0x2000>;
+                        ti,hwmods = "spinbox";
+                        #hwlock-cells = <1>;
+                };
+
                 mdio: mdio@4a100800 {
                         compatible = "ti,davinci_mdio";
                         #address-cells = <1>;
@@ -323,6 +331,7 @@
                         reg = <0x48044000 0x2000>;
                         interrupts = <92>;
                         ti,hwmods = "timer4";
+                        ti,timer-pwm;
                 };
 
                 timer5: timer@48046000 {
@@ -330,6 +339,7 @@
                         reg = <0x48046000 0x2000>;
                         interrupts = <93>;
                         ti,hwmods = "timer5";
+                        ti,timer-pwm;
                 };
 
                 timer6: timer@48048000 {
@@ -337,6 +347,7 @@
                         reg = <0x48048000 0x2000>;
                         interrupts = <94>;
                         ti,hwmods = "timer6";
+                        ti,timer-pwm;
                 };
 
                 timer7: timer@4804a000 {
@@ -344,6 +355,7 @@
                         reg = <0x4804a000 0x2000>;
                         interrupts = <95>;
                         ti,hwmods = "timer7";
+                        ti,timer-pwm;
                 };
 
                 uart1: uart@48020000 {
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
index e6fa251e17b9..af3cb633135f 100644
--- a/arch/arm/boot/dts/dove-cubox.dts
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -62,6 +62,10 @@
                 pinctrl-0 = <&pmx_gpio_19>;
                 pinctrl-names = "default";
         };
+
+        gpu-subsystem {
+                status = "okay";
+        };
 };
 
 &uart0 { status = "okay"; };
@@ -74,6 +78,10 @@
         reg = <1>;
 };
 
+&gpu {
+        status = "okay";
+};
+
 &i2c0 {
         status = "okay";
         clock-frequency = <100000>;
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index cd58c2e62757..698d58cea20d 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -33,6 +33,12 @@
                 marvell,tauros2-cache-features = <0>;
         };
 
+        gpu-subsystem {
+                compatible = "marvell,dove-gpu-subsystem";
+                cores = <&gpu>;
+                status = "disabled";
+        };
+
         i2c-mux {
                 compatible = "i2c-mux-pinctrl";
                 #address-cells = <1>;
@@ -460,6 +466,12 @@
                                         #clock-cells = <1>;
                                 };
 
+                                divider_clk: core-clock@0064 {
+                                        compatible = "marvell,dove-divider-clock";
+                                        reg = <0x0064 0x8>;
+                                        #clock-cells = <1>;
+                                };
+
                                 pinctrl: pin-ctrl@0200 {
                                         compatible = "marvell,dove-pinctrl";
                                         reg = <0x0200 0x14>,
@@ -776,6 +788,16 @@
                                 #address-cells = <1>;
                                 #size-cells = <1>;
                         };
+
+                        gpu: gpu@840000 {
+                                clocks = <&divider_clk 1>;
+                                clock-names = "core";
+                                compatible = "vivante,gc";
+                                interrupts = <48>;
+                                power-domains = <&gpu_domain>;
+                                reg = <0x840000 0x4000>;
+                                status = "disabled";
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/dra62x-clocks.dtsi b/arch/arm/boot/dts/dra62x-clocks.dtsi
new file mode 100644
index 000000000000..6f98dc8df9dd
--- /dev/null
+++ b/arch/arm/boot/dts/dra62x-clocks.dtsi
@@ -0,0 +1,23 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "dm814x-clocks.dtsi"
+
+/*
+ * Compared to dm814x, dra62x has different shifts and more mux options.
+ * Please add the extra options for ysclk_14 and 16 if really needed.
+ */
+&timer1_fck {
+        clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
+                  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
+        ti,bit-shift = <4>;
+};
+
+&timer2_fck {
+        clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
+                  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
+        ti,bit-shift = <8>;
+};
diff --git a/arch/arm/boot/dts/dra62x-j5eco-evm.dts b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
new file mode 100644
index 000000000000..79008069020d
--- /dev/null
+++ b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
@@ -0,0 +1,80 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "dra62x.dtsi"
+
+/ {
+        model = "DRA62x J5 Eco EVM";
+        compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148";
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x40000000>;  /* 1 GB */
+        };
+
+        /* MIC94060YC6 controlled by SD1_POW pin */
+        vmmcsd_fixed: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vmmcsd_fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+};
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii";
+};
+
+&cpsw_emac1 {
+        phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii";
+};
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&sd1_pins>;
+        vmmc-supply = <&vmmcsd_fixed>;
+        bus-width = <4>;
+        cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+};
+
+&pincntl {
+        sd1_pins: pinmux_sd1_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0800, PIN_INPUT | 0x1)   /* SD1_CLK */
+                        DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP |  0x1)   /* SD1_CMD */
+                        DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[0] */
+                        DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[1] */
+                        DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[2] */
+                        DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP |  0x1)   /* SD1_DAT[3] */
+                        DM814X_IOPAD(0x0924, PIN_OUTPUT |  0x40)        /* SD1_POW */
+                        DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP |  0x80)  /* GP1[6] */
+                        >;
+        };
+
+        usb0_pins: pinmux_usb0_pins {
+                pinctrl-single,pins = <
+                        DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1)  /* USB0_DRVVBUS */
+                        >;
+        };
+};
+
+/* USB0_ID pin state: SW10[1] = 0 cable detection, SW10[1] = 1 ID grounded */
+&usb0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb0_pins>;
+        dr_mode = "otg";
+};
+
+&usb1_phy {
+        status = "disabled";
+};
+
+&usb1 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/dra62x.dtsi b/arch/arm/boot/dts/dra62x.dtsi
new file mode 100644
index 000000000000..d3cbb4ea35a8
--- /dev/null
+++ b/arch/arm/boot/dts/dra62x.dtsi
@@ -0,0 +1,23 @@
+/*
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "dm814x.dtsi"
+
+/ {
+        compatible = "ti,dra62x";
+};
+
+/* Compared to dm814x, dra62x has different offsets for Ethernet */
+&mac {
+        reg = <0x4a100000 0x800
+                0x4a101200 0x100>;
+};
+
+&davinci_mdio {
+        reg = <0x4a101000 0x100>;
+};
+
+#include "dra62x-clocks.dtsi"
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 864f60020124..cfc24e52244e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -154,100 +154,100 @@
 
         vtt_pin: pinmux_vtt_pin {
                 pinctrl-single,pins = <
-                        0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+                        DRA7XX_CORE_IOPAD(0x37b4, PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
-                        0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
+                        DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
+                        DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
                 >;
         };
 
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
-                        0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
-                        0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
+                        DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
+                        DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
                 >;
         };
 
         i2c3_pins: pinmux_i2c3_pins {
                 pinctrl-single,pins = <
-                        0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
-                        0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
+                        DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
+                        DRA7XX_CORE_IOPAD(0x368c, PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
                 >;
         };
 
         mcspi1_pins: pinmux_mcspi1_pins {
                 pinctrl-single,pins = <
-                        0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
-                        0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
-                        0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
-                        0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
-                        0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
-                        0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
+                        DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* spi1_sclk */
+                        DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /* spi1_d1 */
+                        DRA7XX_CORE_IOPAD(0x37ac, PIN_INPUT | MUX_MODE0) /* spi1_d0 */
+                        DRA7XX_CORE_IOPAD(0x37b0, PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
+                        DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
+                        DRA7XX_CORE_IOPAD(0x37bc, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
                 >;
         };
 
         mcspi2_pins: pinmux_mcspi2_pins {
                 pinctrl-single,pins = <
-                        0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
-                        0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
-                        0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
-                        0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
+                        DRA7XX_CORE_IOPAD(0x37c0, PIN_INPUT | MUX_MODE0) /* spi2_sclk */
+                        DRA7XX_CORE_IOPAD(0x37c4, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
+                        DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
+                        DRA7XX_CORE_IOPAD(0x37cc, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
                 >;
         };
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
-                        0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
-                        0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
-                        0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
+                        DRA7XX_CORE_IOPAD(0x37e0, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
+                        DRA7XX_CORE_IOPAD(0x37e4, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
+                        DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
+                        DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
                 >;
         };
 
         uart2_pins: pinmux_uart2_pins {
                 pinctrl-single,pins = <
-                        0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
-                        0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
-                        0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
-                        0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
+                        DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT | MUX_MODE0) /* uart2_rxd */
+                        DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT | MUX_MODE0) /* uart2_txd */
+                        DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
+                        DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
-                        0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
+                        DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
+                        DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
                 >;
         };
 
         qspi1_pins: pinmux_qspi1_pins {
                 pinctrl-single,pins = <
-                        0x4c (PIN_INPUT | MUX_MODE1)  /* gpmc_a3.qspi1_cs2 */
-                        0x50 (PIN_INPUT | MUX_MODE1)  /* gpmc_a4.qspi1_cs3 */
-                        0x74 (PIN_INPUT | MUX_MODE1)  /* gpmc_a13.qspi1_rtclk */
-                        0x78 (PIN_INPUT | MUX_MODE1)  /* gpmc_a14.qspi1_d3 */
-                        0x7c (PIN_INPUT | MUX_MODE1)  /* gpmc_a15.qspi1_d2 */
-                        0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
-                        0x84 (PIN_INPUT | MUX_MODE1)  /* gpmc_a17.qspi1_d0 */
-                        0x88 (PIN_INPUT | MUX_MODE1)  /* qpmc_a18.qspi1_sclk */
-                        0xb8 (PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs2.qspi1_cs0 */
-                        0xbc (PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs3.qspi1_cs1 */
+                        DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1)  /* gpmc_a3.qspi1_cs2 */
+                        DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1)  /* gpmc_a4.qspi1_cs3 */
+                        DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1)  /* gpmc_a13.qspi1_rtclk */
+                        DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1)  /* gpmc_a14.qspi1_d3 */
+                        DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1)  /* gpmc_a15.qspi1_d2 */
+                        DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
+                        DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1)  /* gpmc_a17.qspi1_d0 */
+                        DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1)  /* qpmc_a18.qspi1_sclk */
+                        DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs2.qspi1_cs0 */
+                        DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs3.qspi1_cs1 */
                 >;
         };
 
         usb1_pins: pinmux_usb1_pins {
                 pinctrl-single,pins = <
-                        0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
+                        DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
                 >;
         };
 
         usb2_pins: pinmux_usb2_pins {
                 pinctrl-single,pins = <
-                        0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
+                        DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
                 >;
         };
 
@@ -257,60 +257,60 @@
                  * SW5.9 (GPMC_WPN) = LOW
                  * SW5.1 (NAND_BOOTn) = HIGH */
                 pinctrl-single,pins = <
-                        0x0     (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad0     */
-                        0x4     (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad1     */
-                        0x8     (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad2     */
-                        0xc     (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad3     */
-                        0x10    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad4     */
-                        0x14    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad5     */
-                        0x18    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad6     */
-                        0x1c    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad7     */
-                        0x20    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad8     */
-                        0x24    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad9     */
-                        0x28    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad10    */
-                        0x2c    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad11    */
-                        0x30    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad12    */
-                        0x34    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad13    */
-                        0x38    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad14    */
-                        0x3c    (PIN_INPUT  | MUX_MODE0)        /* gpmc_ad15    */
-                        0xd8    (PIN_INPUT_PULLUP  | MUX_MODE0) /* gpmc_wait0   */
-                        0xcc    (PIN_OUTPUT | MUX_MODE0)        /* gpmc_wen     */
-                        0xb4    (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0    */
-                        0xc4    (PIN_OUTPUT | MUX_MODE0)        /* gpmc_advn_ale */
-                        0xc8    (PIN_OUTPUT | MUX_MODE0)        /* gpmc_oen_ren  */
-                        0xd0    (PIN_OUTPUT | MUX_MODE0)        /* gpmc_be0n_cle */
+                        DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad0     */
+                        DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad1     */
+                        DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad2     */
+                        DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad3     */
+                        DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad4     */
+                        DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad5     */
+                        DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad6     */
+                        DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad7     */
+                        DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad8     */
+                        DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad9     */
+                        DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad10    */
+                        DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad11    */
+                        DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad12    */
+                        DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad13    */
+                        DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad14    */
+                        DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad15    */
+                        DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT_PULLUP  | MUX_MODE0)        /* gpmc_wait0   */
+                        DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0)       /* gpmc_wen     */
+                        DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* gpmc_csn0    */
+                        DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0)       /* gpmc_advn_ale */
+                        DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0)       /* gpmc_oen_ren  */
+                        DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_be0n_cle */
                 >;
         };
 
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x250 (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_txc.rgmii0_txc */
-                        0x254 (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_txctl.rgmii0_txctl */
-                        0x258 (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_td3.rgmii0_txd3 */
-                        0x25c (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_txd2.rgmii0_txd2 */
-                        0x260 (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_txd1.rgmii0_txd1 */
-                        0x264 (PIN_OUTPUT | MUX_MODE0)  /* rgmii0_txd0.rgmii0_txd0 */
-                        0x268 (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxc.rgmii0_rxc */
-                        0x26c (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxctl.rgmii0_rxctl */
-                        0x270 (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxd3.rgmii0_rxd3 */
-                        0x274 (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxd2.rgmii0_rxd2 */
-                        0x278 (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxd1.rgmii0_rxd1 */
-                        0x27c (PIN_INPUT | MUX_MODE0)   /* rgmii0_rxd0.rgmii0_rxd0 */
+                        DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txc.rgmii0_txc */
+                        DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txctl.rgmii0_txctl */
+                        DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td3.rgmii0_txd3 */
+                        DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd2.rgmii0_txd2 */
+                        DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd1.rgmii0_txd1 */
+                        DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd0.rgmii0_txd0 */
+                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxc.rgmii0_rxc */
+                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxctl.rgmii0_rxctl */
+                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd3.rgmii0_rxd3 */
+                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd2.rgmii0_rxd2 */
+                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd1.rgmii0_rxd1 */
+                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd0.rgmii0_rxd0 */
 
                         /* Slave 2 */
-                        0x198 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d12.rgmii1_txc */
-                        0x19c (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d13.rgmii1_tctl */
-                        0x1a0 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d14.rgmii1_td3 */
-                        0x1a4 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d15.rgmii1_td2 */
-                        0x1a8 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d16.rgmii1_td1 */
-                        0x1ac (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d17.rgmii1_td0 */
-                        0x1b0 (PIN_INPUT | MUX_MODE3)   /* vin2a_d18.rgmii1_rclk */
-                        0x1b4 (PIN_INPUT | MUX_MODE3)   /* vin2a_d19.rgmii1_rctl */
-                        0x1b8 (PIN_INPUT | MUX_MODE3)   /* vin2a_d20.rgmii1_rd3 */
-                        0x1bc (PIN_INPUT | MUX_MODE3)   /* vin2a_d21.rgmii1_rd2 */
-                        0x1c0 (PIN_INPUT | MUX_MODE3)   /* vin2a_d22.rgmii1_rd1 */
-                        0x1c4 (PIN_INPUT | MUX_MODE3)   /* vin2a_d23.rgmii1_rd0 */
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d12.rgmii1_txc */
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d13.rgmii1_tctl */
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d14.rgmii1_td3 */
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d15.rgmii1_td2 */
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d16.rgmii1_td1 */
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d17.rgmii1_td0 */
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3)        /* vin2a_d18.rgmii1_rclk */
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3)        /* vin2a_d19.rgmii1_rctl */
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3)        /* vin2a_d20.rgmii1_rd3 */
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3)        /* vin2a_d21.rgmii1_rd2 */
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3)        /* vin2a_d22.rgmii1_rd1 */
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3)        /* vin2a_d23.rgmii1_rd0 */
                 >;
 
         };
@@ -318,85 +318,85 @@
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 1 */
-                        0x250 (MUX_MODE15)
-                        0x254 (MUX_MODE15)
-                        0x258 (MUX_MODE15)
-                        0x25c (MUX_MODE15)
-                        0x260 (MUX_MODE15)
-                        0x264 (MUX_MODE15)
-                        0x268 (MUX_MODE15)
-                        0x26c (MUX_MODE15)
-                        0x270 (MUX_MODE15)
-                        0x274 (MUX_MODE15)
-                        0x278 (MUX_MODE15)
-                        0x27c (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3650, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3654, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3658, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x365c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3660, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3664, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3668, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x366c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3670, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3674, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3678, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x367c, MUX_MODE15)
 
                         /* Slave 2 */
-                        0x198 (MUX_MODE15)
-                        0x19c (MUX_MODE15)
-                        0x1a0 (MUX_MODE15)
-                        0x1a4 (MUX_MODE15)
-                        0x1a8 (MUX_MODE15)
-                        0x1ac (MUX_MODE15)
-                        0x1b0 (MUX_MODE15)
-                        0x1b4 (MUX_MODE15)
-                        0x1b8 (MUX_MODE15)
-                        0x1bc (MUX_MODE15)
-                        0x1c0 (MUX_MODE15)
-                        0x1c4 (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
-                        0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* mdio_d.mdio_d */
-                        0x240 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mdio_clk.mdio_clk */
+                        DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* mdio_d.mdio_d */
+                        DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
-                        0x23c (MUX_MODE15)
-                        0x240 (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
                 >;
         };
 
         dcan1_pins_default: dcan1_pins_default {
                 pinctrl-single,pins = <
-                        0x3d0   (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
-                        0x418   (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
+                        DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
+                        DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
                 >;
         };
 
         dcan1_pins_sleep: dcan1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x3d0   (MUX_MODE15 | PULL_UP)  /* dcan1_tx.off */
-                        0x418   (MUX_MODE15 | PULL_UP)  /* wakeup0.off */
+                        DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
+                        DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
                 >;
         };
 
         atl_pins: pinmux_atl_pins {
                 pinctrl-single,pins = <
-                        0x298 (PIN_OUTPUT | MUX_MODE5)  /* xref_clk1.atl_clk1 */
-                        0x29c (PIN_OUTPUT | MUX_MODE5)  /* xref_clk2.atl_clk2 */
+                        DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5)       /* xref_clk1.atl_clk1 */
+                        DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5)       /* xref_clk2.atl_clk2 */
                 >;
         };
 
         mcasp3_pins: pinmux_mcasp3_pins {
                 pinctrl-single,pins = <
-                        0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
-                        0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
-                        0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
-                        0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp3_axr1 */
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_aclkx */
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_fsx */
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_axr0 */
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* mcasp3_axr1 */
                 >;
         };
 
         mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
                 pinctrl-single,pins = <
-                        0x324 (MUX_MODE15)
-                        0x328 (MUX_MODE15)
-                        0x32c (MUX_MODE15)
-                        0x330 (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3724, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3728, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x372c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3730, MUX_MODE15)
                 >;
         };
 };
@@ -504,6 +504,7 @@
                                         regulator-max-microvolt = <1050000>;
                                         regulator-always-on;
                                         regulator-boot-on;
+                                        regulator-allow-bypass;
                                 };
 
                                 ldoln_reg: ldoln {
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index fe99231cbde5..c4d9175b90dc 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -41,6 +41,7 @@
                 ethernet1 = &cpsw_emac1;
                 d_can0 = &dcan1;
                 d_can1 = &dcan2;
+                spi0 = &qspi;
         };
 
         timer {
@@ -1153,8 +1154,10 @@
 
                 qspi: qspi@4b300000 {
                         compatible = "ti,dra7xxx-qspi";
-                        reg = <0x4b300000 0x100>;
-                        reg-names = "qspi_base";
+                        reg = <0x4b300000 0x100>,
+                              <0x5c000000 0x4000000>;
+                        reg-names = "qspi_base", "qspi_mmap";
+                        syscon-chipselects = <&scm_conf 0x558>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "qspi";
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index d6104d5f0c01..00b12002c07c 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -142,158 +142,158 @@
 &dra7_pmx_core {
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
-                        0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
+                        DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
+                        DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
                 >;
         };
 
         i2c5_pins: pinmux_i2c5_pins {
                 pinctrl-single,pins = <
-                        0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
-                        0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
+                        DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
+                        DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
                 >;
         };
 
         i2c5_pins: pinmux_i2c5_pins {
                 pinctrl-single,pins = <
-                        0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
-                        0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
+                        DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
+                        DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
                 >;
         };
 
         nand_default: nand_default {
                 pinctrl-single,pins = <
-                        0x0     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad0 */
-                        0x4     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad1 */
-                        0x8     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad2 */
-                        0xc     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad3 */
-                        0x10    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad4 */
-                        0x14    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad5 */
-                        0x18    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad6 */
-                        0x1c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad7 */
-                        0x20    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad8 */
-                        0x24    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad9 */
-                        0x28    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad10 */
-                        0x2c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad11 */
-                        0x30    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad12 */
-                        0x34    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad13 */
-                        0x38    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad14 */
-                        0x3c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad15 */
-                        0xb4    (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
-                        0xc4    (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
-                        0xcc    (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
-                        0xc8    (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
-                        0xd0    (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
-                        0xd8    (PIN_INPUT  | MUX_MODE0) /* gpmc_wait0 */
+                        DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT  | MUX_MODE0) /* gpmc_ad0 */
+                        DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT  | MUX_MODE0) /* gpmc_ad1 */
+                        DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT  | MUX_MODE0) /* gpmc_ad2 */
+                        DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT  | MUX_MODE0) /* gpmc_ad3 */
+                        DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT  | MUX_MODE0) /* gpmc_ad4 */
+                        DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT  | MUX_MODE0) /* gpmc_ad5 */
+                        DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT  | MUX_MODE0) /* gpmc_ad6 */
+                        DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT  | MUX_MODE0) /* gpmc_ad7 */
+                        DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT  | MUX_MODE0) /* gpmc_ad8 */
+                        DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT  | MUX_MODE0) /* gpmc_ad9 */
+                        DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT  | MUX_MODE0) /* gpmc_ad10 */
+                        DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT  | MUX_MODE0) /* gpmc_ad11 */
+                        DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT  | MUX_MODE0) /* gpmc_ad12 */
+                        DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT  | MUX_MODE0) /* gpmc_ad13 */
+                        DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT  | MUX_MODE0) /* gpmc_ad14 */
+                        DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT  | MUX_MODE0) /* gpmc_ad15 */
+                        DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
+                        DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
+                        DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
+                        DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
+                        DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
+                        DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT  | MUX_MODE0) /* gpmc_wait0 */
                 >;
         };
 
         usb1_pins: pinmux_usb1_pins {
                 pinctrl-single,pins = <
-                        0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
+                        DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
                 >;
         };
 
         usb2_pins: pinmux_usb2_pins {
                 pinctrl-single,pins = <
-                        0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
+                        DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
                 >;
         };
 
         tps65917_pins_default: tps65917_pins_default {
                 pinctrl-single,pins = <
-                        0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
+                        DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
                 >;
         };
 
         mmc1_pins_default: mmc1_pins_default {
                 pinctrl-single,pins = <
-                        0x36c (PIN_INPUT | MUX_MODE14)  /* mmc1sdcd.gpio219 */
-                        0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
-                        0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-                        0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-                        0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-                        0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-                        0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+                        DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1sdcd.gpio219 */
+                        DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+                        DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+                        DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+                        DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+                        DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+                        DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
                 >;
         };
 
         mmc2_pins_default: mmc2_pins_default {
                 pinctrl-single,pins = <
-                        0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
-                        0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
-                        0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
-                        0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
-                        0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
-                        0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
-                        0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
-                        0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
-                        0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
-                        0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
+                        DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+                        DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+                        DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+                        DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+                        DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+                        DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+                        DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+                        DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+                        DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+                        DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
                 >;
         };
 
         dcan1_pins_default: dcan1_pins_default {
                 pinctrl-single,pins = <
-                        0x3d0   (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
-                        0x418   (PULL_UP | MUX_MODE1)   /* wakeup0.dcan1_rx */
+                        DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
+                        DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1)  /* wakeup0.dcan1_rx */
                 >;
         };
 
         dcan1_pins_sleep: dcan1_pins_sleep {
                 pinctrl-single,pins = <
-                        0x3d0   (MUX_MODE15 | PULL_UP)  /* dcan1_tx.off */
-                        0x418   (MUX_MODE15 | PULL_UP)  /* wakeup0.off */
+                        DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
+                        DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
                 >;
         };
 
         qspi1_pins: pinmux_qspi1_pins {
                 pinctrl-single,pins = <
-                        0x74 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_a13.qspi1_rtclk */
-                        0x78 (PIN_INPUT | MUX_MODE1)    /* gpmc_a14.qspi1_d3 */
-                        0x7c (PIN_INPUT | MUX_MODE1)    /* gpmc_a15.qspi1_d2 */
-                        0x80 (PIN_INPUT | MUX_MODE1)    /* gpmc_a16.qspi1_d1 */
-                        0x84 (PIN_INPUT | MUX_MODE1)    /* gpmc_a17.qspi1_d0 */
-                        0x88 (PIN_OUTPUT | MUX_MODE1)   /* qpmc_a18.qspi1_sclk */
-                        0xb8 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_cs2.qspi1_cs0 */
+                        DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1)       /* gpmc_a13.qspi1_rtclk */
+                        DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1)        /* gpmc_a14.qspi1_d3 */
+                        DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1)        /* gpmc_a15.qspi1_d2 */
+                        DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1)        /* gpmc_a16.qspi1_d1 */
+                        DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1)        /* gpmc_a17.qspi1_d0 */
+                        DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1)       /* qpmc_a18.qspi1_sclk */
+                        DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1)       /* gpmc_cs2.qspi1_cs0 */
                 >;
         };
 
         hdmi_pins: pinmux_hdmi_pins {
                 pinctrl-single,pins = <
-                        0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
-                        0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
+                        DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
+                        DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
                 >;
         };
 
         tpd12s015_pins: pinmux_tpd12s015_pins {
                 pinctrl-single,pins = <
-                        0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
+                        DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
                 >;
         };
 
         atl_pins: pinmux_atl_pins {
                 pinctrl-single,pins = <
-                        0x298 (PIN_OUTPUT | MUX_MODE5)  /* xref_clk1.atl_clk1 */
-                        0x29c (PIN_OUTPUT | MUX_MODE5)  /* xref_clk2.atl_clk2 */
+                        DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5)       /* xref_clk1.atl_clk1 */
+                        DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5)       /* xref_clk2.atl_clk2 */
                 >;
         };
 
         mcasp3_pins: pinmux_mcasp3_pins {
                 pinctrl-single,pins = <
-                        0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
-                        0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
-                        0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
-                        0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp3_axr1 */
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_aclkx */
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_fsx */
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_axr0 */
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* mcasp3_axr1 */
                 >;
         };
 
         mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
                 pinctrl-single,pins = <
-                        0x324 (PIN_INPUT_PULLDOWN | MUX_MODE15)
-                        0x328 (PIN_INPUT_PULLDOWN | MUX_MODE15)
-                        0x32c (PIN_INPUT_PULLDOWN | MUX_MODE15)
-                        0x330 (PIN_INPUT_PULLDOWN | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15)
                 >;
         };
 };
@@ -373,6 +373,7 @@
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                         regulator-boot-on;
+                                        regulator-allow-bypass;
                                 };
 
                                 ldo2_reg: ldo2 {
@@ -380,6 +381,7 @@
                                         regulator-name = "ldo2";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <3300000>;
+                                        regulator-allow-bypass;
                                 };
 
                                 ldo3_reg: ldo3 {
@@ -478,6 +480,8 @@
 
 &uart1 {
         status = "okay";
+        interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+                              <&dra7_pmx_core 0x3e0>;
 };
 
 &elm {
@@ -627,18 +631,18 @@
         cpsw_default: cpsw_default {
                 pinctrl-single,pins = <
                         /* Slave 2 */
-                        0x198 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d12.rgmii1_txc */
-                        0x19c (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d13.rgmii1_tctl */
-                        0x1a0 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d14.rgmii1_td3 */
-                        0x1a4 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d15.rgmii1_td2 */
-                        0x1a8 (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d16.rgmii1_td1 */
-                        0x1ac (PIN_OUTPUT | MUX_MODE3)  /* vin2a_d17.rgmii1_td0 */
-                        0x1b0 (PIN_INPUT | MUX_MODE3)   /* vin2a_d18.rgmii1_rclk */
-                        0x1b4 (PIN_INPUT | MUX_MODE3)   /* vin2a_d19.rgmii1_rctl */
-                        0x1b8 (PIN_INPUT | MUX_MODE3)   /* vin2a_d20.rgmii1_rd3 */
-                        0x1bc (PIN_INPUT | MUX_MODE3)   /* vin2a_d21.rgmii1_rd2 */
-                        0x1c0 (PIN_INPUT | MUX_MODE3)   /* vin2a_d22.rgmii1_rd1 */
-                        0x1c4 (PIN_INPUT | MUX_MODE3)   /* vin2a_d23.rgmii1_rd0 */
+                        DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d12.rgmii1_txc */
+                        DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d13.rgmii1_tctl */
+                        DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d14.rgmii1_td3 */
+                        DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d15.rgmii1_td2 */
+                        DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d16.rgmii1_td1 */
+                        DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d17.rgmii1_td0 */
+                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3)        /* vin2a_d18.rgmii1_rclk */
+                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3)        /* vin2a_d19.rgmii1_rctl */
+                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3)        /* vin2a_d20.rgmii1_rd3 */
+                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3)        /* vin2a_d21.rgmii1_rd2 */
+                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3)        /* vin2a_d22.rgmii1_rd1 */
+                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3)        /* vin2a_d23.rgmii1_rd0 */
                 >;
 
         };
@@ -646,33 +650,33 @@
         cpsw_sleep: cpsw_sleep {
                 pinctrl-single,pins = <
                         /* Slave 2 */
-                        0x198 (MUX_MODE15)
-                        0x19c (MUX_MODE15)
-                        0x1a0 (MUX_MODE15)
-                        0x1a4 (MUX_MODE15)
-                        0x1a8 (MUX_MODE15)
-                        0x1ac (MUX_MODE15)
-                        0x1b0 (MUX_MODE15)
-                        0x1b4 (MUX_MODE15)
-                        0x1b8 (MUX_MODE15)
-                        0x1bc (MUX_MODE15)
-                        0x1c0 (MUX_MODE15)
-                        0x1c4 (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
                 >;
         };
 
         davinci_mdio_default: davinci_mdio_default {
                 pinctrl-single,pins = <
                         /* MDIO */
-                        0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* mdio_d.mdio_d */
-                        0x240 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mdio_clk.mdio_clk */
+                        DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* mdio_d.mdio_d */
+                        DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
                 >;
         };
 
         davinci_mdio_sleep: davinci_mdio_sleep {
                 pinctrl-single,pins = <
-                        0x23c (MUX_MODE15)
-                        0x240 (MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/ea3250.dts b/arch/arm/boot/dts/ea3250.dts
index a4ba31b23c88..a4a281fe82af 100644
--- a/arch/arm/boot/dts/ea3250.dts
+++ b/arch/arm/boot/dts/ea3250.dts
@@ -12,7 +12,7 @@
  */
 
 /dts-v1/;
-/include/ "lpc32xx.dtsi"
+#include "lpc32xx.dtsi"
 
 / {
         model = "Embedded Artists LPC3250 board based on NXP LPC3250";
@@ -22,7 +22,7 @@
 
         memory {
                 device_type = "memory";
-                reg = <0 0x4000000>;
+                reg = <0x80000000 0x4000000>;
         };
 
         ahb {
@@ -31,19 +31,6 @@
                         use-iram;
                 };
 
-                /* Here, choose exactly one from: ohci, usbd */
-                ohci@31020000 {
-                        transceiver = <&isp1301>;
-                        status = "okay";
-                };
-
-/*
-                usbd@31020000 {
-                        transceiver = <&isp1301>;
-                        status = "okay";
-                };
-*/
-
                 /* 128MB Flash via SLC NAND controller */
                 slc: flash@20020000 {
                         status = "okay";
@@ -130,15 +117,6 @@
                                 clock-frequency = <100000>;
                         };
 
-                        i2cusb: i2c@31020300 {
-                                clock-frequency = <100000>;
-
-                                isp1301: usb-transceiver@2d {
-                                        compatible = "nxp,isp1301";
-                                        reg = <0x2d>;
-                                };
-                        };
-
                         sd@20098000 {
                                 wp-gpios = <&pca9532 5 0>;
                                 cd-gpios = <&pca9532 4 0>;
@@ -279,3 +257,18 @@
                 };
         };
 };
+
+/* Here, choose exactly one from: ohci, usbd */
+&ohci /* &usbd */ {
+        transceiver = <&isp1301>;
+        status = "okay";
+};
+
+&i2cusb {
+        clock-frequency = <100000>;
+
+        isp1301: usb-transceiver@2d {
+                compatible = "nxp,isp1301";
+                reg = <0x2d>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 07e10ee60bd8..045785c44c04 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -727,6 +727,15 @@
                 iommus = <&sysmmu_jpeg>;
         };
 
+        rotator: rotator@12810000 {
+                compatible = "samsung,exynos4210-rotator";
+                reg = <0x12810000 0x64>;
+                interrupts = <0 83 0>;
+                clocks = <&clock CLK_ROTATOR>;
+                clock-names = "rotator";
+                iommus = <&sysmmu_rotator>;
+        };
+
         hdmi: hdmi@12D00000 {
                 compatible = "samsung,exynos4210-hdmi";
                 reg = <0x12D00000 0x70000>;
@@ -954,7 +963,6 @@
                 interrupts = <5 0>;
                 clock-names = "sysmmu", "master";
                 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
-                power-domains = <&pd_lcd0>;
                 #iommu-cells = <0>;
         };
 
@@ -968,4 +976,12 @@
                 power-domains = <&pd_lcd0>;
                 #iommu-cells = <0>;
         };
+
+        prng: rng@10830400 {
+                compatible = "samsung,exynos4-rng";
+                reg = <0x10830400 0x200>;
+                clocks = <&clock CLK_SSS>;
+                clock-names = "secss";
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index b8f866991bdd..5821ad87e32c 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -138,10 +138,6 @@
         status = "okay";
 };
 
-&g2d {
-        status = "okay";
-};
-
 &i2c_0 {
         status = "okay";
         samsung,i2c-sda-delay = <100>;
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index bc1448ba95d3..104cbb33d2bb 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -44,10 +44,6 @@
         };
 };
 
-&g2d {
-        status = "okay";
-};
-
 &i2c_0 {
         #address-cells = <1>;
         #size-cells = <0>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 81b7ec7b3e31..4f5d37920c8d 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -560,16 +560,24 @@
 
 &serial_0 {
         status = "okay";
+        /delete-property/dmas;
+        /delete-property/dma-names;
 };
 
 &serial_1 {
         status = "okay";
+        /delete-property/dmas;
+        /delete-property/dma-names;
 };
 
 &serial_2 {
         status = "okay";
+        /delete-property/dmas;
+        /delete-property/dma-names;
 };
 
 &serial_3 {
         status = "okay";
+        /delete-property/dmas;
+        /delete-property/dma-names;
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 3e5ba665d200..c1cb8df6da07 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -185,8 +185,8 @@
                 interrupts = <0 89 0>;
                 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
                 clock-names = "sclk_fimg2d", "fimg2d";
+                power-domains = <&pd_lcd0>;
                 iommus = <&sysmmu_g2d>;
-                status = "disabled";
         };
 
         camera {
@@ -271,6 +271,10 @@
                      <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
 };
 
+&mdma1 {
+        power-domains = <&pd_lcd0>;
+};
+
 &pmu_system_controller {
         clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
                         "clkout4", "clkout8", "clkout9";
@@ -279,3 +283,11 @@
                 <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
         #clock-cells = <1>;
 };
+
+&rotator {
+        power-domains = <&pd_lcd0>;
+};
+
+&sysmmu_rotator {
+        power-domains = <&pd_lcd0>;
+};
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index edf0fc8db6ff..395c3ca9601e 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -177,10 +177,6 @@
         assigned-clock-rates = <0>, <176000000>;
 };
 
-&g2d {
-        status = "okay";
-};
-
 &hdmi {
         hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 646ff0bd001a..dd89f7b37c9f 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -13,7 +13,6 @@
 
 /dts-v1/;
 #include "exynos4412-odroid-common.dtsi"
-#include <dt-bindings/gpio/gpio.h>
 
 / {
         model = "Hardkernel ODROID-U3 board based on Exynos4412";
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index c8d86af2fb98..9e2e24c6177a 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -89,10 +89,6 @@
         status = "okay";
 };
 
-&g2d {
-        status = "okay";
-};
-
 &i2c_0 {
         #address-cells = <1>;
         #size-cells = <0>;
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index c2421df1fa43..a130ab39fa77 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -41,10 +41,6 @@
         };
 };
 
-&g2d {
-        status = "okay";
-};
-
 &keypad {
         samsung,keypad-num-rows = <3>;
         samsung,keypad-num-columns = <8>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 40a474c4374b..a6f78c3da935 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -1234,6 +1234,10 @@
         status = "okay";
 };
 
+&prng {
+        status = "okay";
+};
+
 &rtc {
         status = "okay";
         clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index b77dac61ffb5..84a23f962946 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -116,7 +116,6 @@
                 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
                 clock-names = "sclk_fimg2d", "fimg2d";
                 iommus = <&sysmmu_g2d>;
-                status = "disabled";
         };
 
         camera {
@@ -339,6 +338,10 @@
         compatible = "samsung,exynos4212-jpeg";
 };
 
+&rotator {
+        compatible = "samsung,exynos4212-rotator";
+};
+
 &mixer {
         compatible = "samsung,exynos4212-mixer";
         clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
index 0a7f408824d8..5cb33ba5e296 100644
--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
@@ -520,8 +520,7 @@
 &mmc_0 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
-        card-detect-delay = <200>;
+        non-removable;
         samsung,dw-mshc-ciu-div = <3>;
         samsung,dw-mshc-sdr-timing = <2 3>;
         samsung,dw-mshc-ddr-timing = <1 2>;
@@ -552,10 +551,9 @@
 &mmc_3 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
+        non-removable;
         cap-sdio-irq;
         keep-power-in-suspend;
-        card-detect-delay = <200>;
         samsung,dw-mshc-ciu-div = <3>;
         samsung,dw-mshc-sdr-timing = <2 3>;
         samsung,dw-mshc-ddr-timing = <1 2>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 88b9cf5f226f..33e2d5f7315b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -269,6 +269,15 @@
                 iommu-names = "left", "right";
         };
 
+        rotator: rotator@11C00000 {
+                compatible = "samsung,exynos5250-rotator";
+                reg = <0x11C00000 0x64>;
+                interrupts = <0 84 0>;
+                clocks = <&clock CLK_ROTATOR>;
+                clock-names = "rotator";
+                iommus = <&sysmmu_rotator>;
+        };
+
         tmu: tmu@10060000 {
                 compatible = "samsung,exynos5250-tmu";
                 reg = <0x10060000 0x100>;
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 72ba6f032ed7..35cfb07dc4bb 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -690,11 +690,9 @@
 &mmc_0 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
         mmc-hs200-1_8v;
         cap-mmc-highspeed;
         non-removable;
-        card-detect-delay = <200>;
         clock-frequency = <400000000>;
         samsung,dw-mshc-ciu-div = <3>;
         samsung,dw-mshc-sdr-timing = <0 4>;
@@ -709,10 +707,9 @@
 &mmc_1 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
+        non-removable;
         cap-sdio-irq;
         keep-power-in-suspend;
-        card-detect-delay = <200>;
         clock-frequency = <400000000>;
         samsung,dw-mshc-ciu-div = <1>;
         samsung,dw-mshc-sdr-timing = <0 1>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 1b3d6c769a3c..48a0a55314f5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -717,6 +717,15 @@
                 iommus = <&sysmmu_tv>;
         };
 
+        rotator: rotator@11C00000 {
+                compatible = "samsung,exynos5250-rotator";
+                reg = <0x11C00000 0x64>;
+                interrupts = <0 84 0>;
+                clocks = <&clock CLK_ROTATOR>;
+                clock-names = "rotator";
+                iommus = <&sysmmu_rotator>;
+        };
+
         gsc_0: video-scaler@13e00000 {
                 compatible = "samsung,exynos5-gsc";
                 reg = <0x13e00000 0x1000>;
@@ -1059,6 +1068,16 @@
                 #iommu-cells = <0>;
         };
 
+        sysmmu_rotator: sysmmu@0x11D40000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x11D40000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <4 0>;
+                clock-names = "sysmmu", "master";
+                clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
+                #iommu-cells = <0>;
+        };
+
         sysmmu_jpeg0: sysmmu@0x11F10000 {
                 compatible = "samsung,exynos-sysmmu";
                 reg = <0x11F10000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 1af5bdc2bdb1..9134217446b8 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -67,11 +67,6 @@
                         <19200000>;
 };
 
-&fimd {
-        status = "okay";
-};
-
-
 &hdmi {
         status = "okay";
         hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
index b1b36081f343..2ae1cf41dcb6 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
@@ -67,5 +67,5 @@
 };
 
 &usbdrd_dwc3_1 {
-        dr_mode = "otg";
+        dr_mode = "peripheral";
 };
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 0c0bbdbfd85f..432406db85de 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -98,5 +98,5 @@
 };
 
 &usbdrd_dwc3_1 {
-        dr_mode = "otg";
+        dr_mode = "peripheral";
 };
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 1cc2e95ffc66..064176f201e7 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -665,12 +665,10 @@
 &mmc_0 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
         mmc-hs200-1_8v;
         mmc-hs400-1_8v;
         cap-mmc-highspeed;
         non-removable;
-        card-detect-delay = <200>;
         clock-frequency = <800000000>;
         samsung,dw-mshc-ciu-div = <3>;
         samsung,dw-mshc-sdr-timing = <0 4>;
@@ -685,10 +683,9 @@
 &mmc_1 {
         status = "okay";
         num-slots = <1>;
-        broken-cd;
+        non-removable;
         cap-sdio-irq;
         keep-power-in-suspend;
-        card-detect-delay = <200>;
         clock-frequency = <400000000>;
         samsung,dw-mshc-ciu-div = <1>;
         samsung,dw-mshc-sdr-timing = <0 1>;
diff --git a/arch/arm/boot/dts/imx25-pinfunc.h b/arch/arm/boot/dts/imx25-pinfunc.h
index 7c4b9f2f9aad..848ffa785b63 100644
--- a/arch/arm/boot/dts/imx25-pinfunc.h
+++ b/arch/arm/boot/dts/imx25-pinfunc.h
@@ -284,6 +284,7 @@
 #define MX25_PAD_CONTRAST__CC4                  0x118 0x310 0x000 0x11 0x000
 #define MX25_PAD_CONTRAST__PWM4_PWMO            0x118 0x310 0x000 0x14 0x000
 #define MX25_PAD_CONTRAST__FEC_CRS              0x118 0x310 0x508 0x15 0x001
+#define MX25_PAD_CONTRAST__USBH2_PWR            0x118 0x310 0x000 0x16 0x000
 
 #define MX25_PAD_PWM__PWM                       0x11c 0x314 0x000 0x10 0x000
 #define MX25_PAD_PWM__GPIO_1_26                 0x11c 0x314 0x000 0x15 0x000
@@ -439,6 +440,7 @@
 #define MX25_PAD_SD1_DATA3__GPIO_2_28           0x1a4 0x39c 0x000 0x15 0x000
 
 #define MX25_PAD_KPP_ROW0__KPP_ROW0             0x1a8 0x3a0 0x000 0x10 0x000
+#define MX25_PAD_KPP_ROW0__UART1_DTR            0x1a8 0x3a0 0x000 0x14 0x000
 #define MX25_PAD_KPP_ROW0__GPIO_2_29            0x1a8 0x3a0 0x000 0x15 0x000
 
 #define MX25_PAD_KPP_ROW1__KPP_ROW1             0x1ac 0x3a4 0x000 0x10 0x000
@@ -446,6 +448,7 @@
 
 #define MX25_PAD_KPP_ROW2__KPP_ROW2             0x1b0 0x3a8 0x000 0x10 0x000
 #define MX25_PAD_KPP_ROW2__CSI_D0               0x1b0 0x3a8 0x488 0x13 0x002
+#define MX25_PAD_KPP_ROW2__UART1_DCD            0x1b0 0x3a8 0x000 0x14 0x000
 #define MX25_PAD_KPP_ROW2__GPIO_2_31            0x1b0 0x3a8 0x000 0x15 0x000
 
 #define MX25_PAD_KPP_ROW3__KPP_ROW3             0x1b4 0x3ac 0x000 0x10 0x000
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 677f81d9dcd5..cde329e9b9e3 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -24,6 +24,10 @@
                 i2c2 = &i2c3;
                 mmc0 = &esdhc1;
                 mmc1 = &esdhc2;
+                pwm0 = &pwm1;
+                pwm1 = &pwm2;
+                pwm2 = &pwm3;
+                pwm3 = &pwm4;
                 serial0 = &uart1;
                 serial1 = &uart2;
                 serial2 = &uart3;
diff --git a/arch/arm/boot/dts/imx28-cfa10057.dts b/arch/arm/boot/dts/imx28-cfa10057.dts
index 5df0b24eaf59..7a80bd686c40 100644
--- a/arch/arm/boot/dts/imx28-cfa10057.dts
+++ b/arch/arm/boot/dts/imx28-cfa10057.dts
@@ -115,7 +115,7 @@
 
                         pwm: pwm@80064000 {
                                 pinctrl-names = "default";
-                                pinctrl-0 = <&pwm3_pins_b>;
+                                pinctrl-0 = <&pwm4_pins_a>;
                                 status = "okay";
                         };
 
@@ -170,7 +170,7 @@
 
         backlight {
                 compatible = "pwm-backlight";
-                pwms = <&pwm 3 5000000>;
+                pwms = <&pwm 4 5000000>;
                 brightness-levels = <0 4 8 16 32 64 128 255>;
                 default-brightness-level = <7>;
         };
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index c5b57d4adade..fae7b9069fc4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -405,6 +405,17 @@
                                         fsl,pull-up = <MXS_PULL_DISABLE>;
                                 };
 
+                                auart4_2pins_b: auart4@1 {
+                                        reg = <1>;
+                                        fsl,pinmux-ids = <
+                                                MX28_PAD_AUART0_CTS__AUART4_RX
+                                                MX28_PAD_AUART0_RTS__AUART4_TX
+                                        >;
+                                        fsl,drive-strength = <MXS_DRIVE_4mA>;
+                                        fsl,voltage = <MXS_VOLTAGE_HIGH>;
+                                        fsl,pull-up = <MXS_PULL_DISABLE>;
+                                };
+
                                 mac0_pins_a: mac0@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
new file mode 100644
index 000000000000..0ff76a1bc0f1
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -0,0 +1,302 @@
+/*
+ * Copyright 2015 Savoir-faire Linux
+ *
+ * This device tree is based on imx51-babbage.dts
+ *
+ * Licensed under the X11 license or the GPL v2 (or later)
+ */
+
+/dts-v1/;
+#include "imx51.dtsi"
+
+/ {
+        model = "Technologic Systems TS-4800";
+        compatible = "technologic,imx51-ts4800", "fsl,imx51";
+
+        chosen {
+                stdout-path = &uart1;
+        };
+
+        memory {
+                reg = <0x90000000 0x10000000>;
+        };
+
+        clocks {
+                ckih1 {
+                        clock-frequency = <22579200>;
+                };
+
+                ckih2 {
+                        clock-frequency = <24576000>;
+                };
+        };
+
+        backlight_reg: regulator-backlight {
+                compatible = "regulator-fixed";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_enable_lcd>;
+                regulator-name = "enable_lcd_reg";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm1 0 78770>;
+                brightness-levels = <0 150 200 255>;
+                default-brightness-level = <1>;
+                power-supply = <&backlight_reg>;
+        };
+
+        display0: display@di0 {
+                compatible = "fsl,imx-parallel-display";
+                interface-pix-fmt = "rgb24";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_lcd>;
+
+                display-timings {
+                        800x480p60 {
+                                native-mode;
+                                clock-frequency = <30066000>;
+                                hactive = <800>;
+                                vactive = <480>;
+                                hfront-porch = <50>;
+                                hback-porch = <70>;
+                                hsync-len = <50>;
+                                vback-porch = <0>;
+                                vfront-porch = <0>;
+                                vsync-len = <50>;
+                        };
+                };
+
+                port@0 {
+                        display0_in: endpoint {
+                                remote-endpoint = <&ipu_di0_disp0>;
+                        };
+                };
+        };
+};
+
+&esdhc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_esdhc1>;
+        cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
+&fec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_fec>;
+        phy-mode = "mii";
+        phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
+        phy-reset-duration = <1>;
+        status = "okay";
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        status = "okay";
+
+        rtc: m41t00@68 {
+                compatible = "stm,m41t00";
+                reg = <0x68>;
+        };
+};
+
+&ipu_di0_disp0 {
+        remote-endpoint = <&display0_in>;
+};
+
+&pwm1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm_backlight>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart2>;
+        status = "okay";
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart3>;
+        status = "okay";
+};
+
+&weim {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_weim>;
+        status = "okay";
+
+        fpga@0 {
+                compatible = "simple-bus";
+                fsl,weim-cs-timing = <0x0061008F 0x00000002 0x1c022000
+                                      0x00000000 0x1c092480 0x00000000>;
+                reg = <0 0x0000000 0x1d000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0 0 0 0x1d000>;
+
+                syscon: syscon@b0010000 {
+                        compatible = "syscon", "simple-mfd";
+                        reg = <0x10000 0x3d>;
+                        reg-io-width = <2>;
+
+                        wdt@e {
+                                compatible = "technologic,ts4800-wdt";
+                                syscon = <&syscon 0xe>;
+                        };
+                };
+
+                touchscreen {
+                        compatible = "technologic,ts4800-ts";
+                        reg = <0x12000 0x1000>;
+                        syscon = <&syscon 0x10 6>;
+                };
+        };
+};
+
+&iomuxc {
+        pinctrl_ecspi1: ecspi1grp {
+                fsl,pins = <
+                        MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
+                        MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
+                        MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                        MX51_PAD_CSPI1_SS0__GPIO4_24            0x85 /* CS0 */
+                >;
+        };
+
+        pinctrl_enable_lcd: enablelcdgrp {
+                fsl,pins = <
+                        MX51_PAD_CSI2_D12__GPIO4_9              0x1c5
+                >;
+        };
+
+        pinctrl_esdhc1: esdhc1grp {
+                fsl,pins = <
+                        MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
+                        MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
+                        MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
+                        MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
+                        MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
+                        MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                        MX51_PAD_GPIO1_0__GPIO1_0               0x100
+                        MX51_PAD_GPIO1_1__GPIO1_1               0x100
+                >;
+        };
+
+        pinctrl_fec: fecgrp {
+                fsl,pins = <
+                        MX51_PAD_EIM_EB2__FEC_MDIO              0x000001f5
+                        MX51_PAD_EIM_EB3__FEC_RDATA1            0x00000085
+                        MX51_PAD_EIM_CS2__FEC_RDATA2            0x00000085
+                        MX51_PAD_EIM_CS3__FEC_RDATA3            0x00000085
+                        MX51_PAD_EIM_CS4__FEC_RX_ER             0x00000180
+                        MX51_PAD_EIM_CS5__FEC_CRS               0x00000180
+                        MX51_PAD_DISP2_DAT10__FEC_COL           0x00000180
+                        MX51_PAD_DISP2_DAT11__FEC_RX_CLK        0x00000180
+                        MX51_PAD_DISP2_DAT14__FEC_RDATA0        0x00002180
+                        MX51_PAD_DISP2_DAT15__FEC_TDATA0        0x00002004
+                        MX51_PAD_NANDF_CS2__FEC_TX_ER           0x00002004
+                        MX51_PAD_DI2_PIN2__FEC_MDC              0x00002004
+                        MX51_PAD_DISP2_DAT6__FEC_TDATA1         0x00002004
+                        MX51_PAD_DISP2_DAT7__FEC_TDATA2         0x00002004
+                        MX51_PAD_DISP2_DAT8__FEC_TDATA3         0x00002004
+                        MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x00002004
+                        MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x00002180
+                        MX51_PAD_DISP2_DAT12__FEC_RX_DV         0x000020a4
+                        MX51_PAD_EIM_A20__GPIO2_14              0x00000085 /* Phy Reset */
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
+                        MX51_PAD_KEY_COL5__I2C2_SDA             0x400001ed
+                >;
+        };
+
+        pinctrl_lcd: lcdgrp {
+                fsl,pins = <
+                        MX51_PAD_DISP1_DAT0__DISP1_DAT0         0x5
+                        MX51_PAD_DISP1_DAT1__DISP1_DAT1         0x5
+                        MX51_PAD_DISP1_DAT2__DISP1_DAT2         0x5
+                        MX51_PAD_DISP1_DAT3__DISP1_DAT3         0x5
+                        MX51_PAD_DISP1_DAT4__DISP1_DAT4         0x5
+                        MX51_PAD_DISP1_DAT5__DISP1_DAT5         0x5
+                        MX51_PAD_DISP1_DAT6__DISP1_DAT6         0x5
+                        MX51_PAD_DISP1_DAT7__DISP1_DAT7         0x5
+                        MX51_PAD_DISP1_DAT8__DISP1_DAT8         0x5
+                        MX51_PAD_DISP1_DAT9__DISP1_DAT9         0x5
+                        MX51_PAD_DISP1_DAT10__DISP1_DAT10       0x5
+                        MX51_PAD_DISP1_DAT11__DISP1_DAT11       0x5
+                        MX51_PAD_DISP1_DAT12__DISP1_DAT12       0x5
+                        MX51_PAD_DISP1_DAT13__DISP1_DAT13       0x5
+                        MX51_PAD_DISP1_DAT14__DISP1_DAT14       0x5
+                        MX51_PAD_DISP1_DAT15__DISP1_DAT15       0x5
+                        MX51_PAD_DISP1_DAT16__DISP1_DAT16       0x5
+                        MX51_PAD_DISP1_DAT17__DISP1_DAT17       0x5
+                        MX51_PAD_DISP1_DAT18__DISP1_DAT18       0x5
+                        MX51_PAD_DISP1_DAT19__DISP1_DAT19       0x5
+                        MX51_PAD_DISP1_DAT20__DISP1_DAT20       0x5
+                        MX51_PAD_DISP1_DAT21__DISP1_DAT21       0x5
+                        MX51_PAD_DISP1_DAT22__DISP1_DAT22       0x5
+                        MX51_PAD_DISP1_DAT23__DISP1_DAT23       0x5
+                        MX51_PAD_DI1_PIN2__DI1_PIN2             0x5
+                        MX51_PAD_DI1_PIN3__DI1_PIN3             0x5
+                        MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     0x5
+                        MX51_PAD_DI_GP4__DI2_PIN15              0x5
+                >;
+        };
+
+        pinctrl_pwm_backlight: backlightgrp {
+                fsl,pins = <
+                        MX51_PAD_GPIO1_2__PWM1_PWMO             0x80000000
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
+                        MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
+                >;
+        };
+
+        pinctrl_uart2: uart2grp {
+                fsl,pins = <
+                        MX51_PAD_UART2_RXD__UART2_RXD           0x1c5
+                        MX51_PAD_UART2_TXD__UART2_TXD           0x1c5
+                >;
+        };
+
+        pinctrl_uart3: uart3grp {
+                fsl,pins = <
+                        MX51_PAD_EIM_D25__UART3_RXD             0x1c5
+                        MX51_PAD_EIM_D26__UART3_TXD             0x1c5
+                >;
+        };
+
+        pinctrl_weim: weimgrp {
+                fsl,pins = <
+                        MX51_PAD_EIM_DTACK__EIM_DTACK           0x85
+                        MX51_PAD_EIM_CS0__EIM_CS0               0x0
+                        MX51_PAD_EIM_CS1__EIM_CS1               0x0
+                        MX51_PAD_EIM_EB0__EIM_EB0               0x85
+                        MX51_PAD_EIM_EB1__EIM_EB1               0x85
+                        MX51_PAD_EIM_OE__EIM_OE                 0x85
+                        MX51_PAD_EIM_LBA__EIM_LBA               0x85
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 4b0ec0703825..c13a73aa55ca 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -104,10 +104,15 @@
                 compatible = "fsl,imx-display-subsystem";
                 ports = <&ipu1_di0>, <&ipu1_di1>;
         };
+
+        gpu-subsystem {
+                compatible = "fsl,imx-gpu-subsystem";
+                cores = <&gpu_2d>, <&gpu_3d>;
+        };
 };
 
 &gpt {
-        compatible = "fsl,imx6dl-gpt", "fsl,imx6q-gpt";
+        compatible = "fsl,imx6dl-gpt";
 };
 
 &hdmi {
diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
new file mode 100644
index 000000000000..5acd0c63b33b
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -0,0 +1,785 @@
+/*
+ * Copyright 2015 Sutajio Ko-Usagi PTE LTD
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of
+ *     the License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this file; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/dts-v1/;
+#include "imx6q.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+        model = "Kosagi Novena Dual/Quad";
+        compatible = "kosagi,imx6q-novena", "fsl,imx6q";
+
+        chosen {
+                stdout-path = &uart2;
+        };
+
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm1 0 10000000>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_backlight_novena>;
+                power-supply = <&reg_lvds_lcd>;
+                brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>;
+                default-brightness-level = <12>;
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_gpio_keys_novena>;
+
+                user-button {
+                        label = "User Button";
+                        gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
+                        linux,code = <KEY_POWER>;
+                };
+
+                lid {
+                        label = "Lid";
+                        gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <5>; /* EV_SW */
+                        linux,code = <0>;       /* SW_LID */
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_leds_novena>;
+
+                heartbeat {
+                        label = "novena:white:panel";
+                        gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-on";
+                };
+        };
+
+        panel: panel {
+                compatible = "innolux,n133hse-ea1", "simple-panel";
+                backlight = <&backlight>;
+        };
+
+        reg_2p5v: regulator-2p5v {
+                compatible = "regulator-fixed";
+                regulator-name = "2P5V";
+                regulator-min-microvolt = <2500000>;
+                regulator-max-microvolt = <2500000>;
+                regulator-always-on;
+        };
+
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
+
+        reg_audio_codec: regulator-audio-codec {
+                compatible = "regulator-fixed";
+                regulator-name = "es8328-power";
+                regulator-boot-on;
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                startup-delay-us = <400000>;
+                gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_display: regulator-display {
+                compatible = "regulator-fixed";
+                regulator-name = "lcd-display-power";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                startup-delay-us = <200000>;
+                gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_lvds_lcd: regulator-lvds-lcd {
+                compatible = "regulator-fixed";
+                regulator-name = "lcd-lvds-power";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_pcie: regulator-pcie {
+                compatible = "regulator-fixed";
+                regulator-name = "pcie-bus-power";
+                regulator-min-microvolt = <1500000>;
+                regulator-max-microvolt = <1500000>;
+                gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+                regulator-always-on;
+        };
+
+        reg_sata: regulator-sata {
+                compatible = "regulator-fixed";
+                regulator-name = "sata-power";
+                regulator-boot-on;
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                startup-delay-us = <10000>;
+                gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_usb_otg_vbus: regulator-usb-otg-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                enable-active-high;
+        };
+
+        sound {
+                compatible = "fsl,imx-audio-es8328";
+                model = "imx-audio-es8328";
+                ssi-controller = <&ssi1>;
+                audio-codec = <&codec>;
+                audio-amp-supply = <&reg_audio_codec>;
+                jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>;
+                audio-routing =
+                        "Speaker", "LOUT2",
+                        "Speaker", "ROUT2",
+                        "Speaker", "audio-amp",
+                        "Headphone", "ROUT1",
+                        "Headphone", "LOUT1",
+                        "LINPUT1", "Mic Jack",
+                        "RINPUT1", "Mic Jack",
+                        "Mic Jack", "Mic Bias";
+                mux-int-port = <0x1>;
+                mux-ext-port = <0x3>;
+        };
+};
+
+&audmux {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audmux_novena>;
+        status = "okay";
+};
+
+&ecspi3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ecspi3_novena>;
+        fsl,spi-num-chipselects = <3>;
+        status = "okay";
+};
+
+&fec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet_novena>;
+        phy-mode = "rgmii";
+        phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+        rxc-skew-ps = <3000>;
+        rxdv-skew-ps = <0>;
+        txc-skew-ps = <3000>;
+        txen-skew-ps = <0>;
+        rxd0-skew-ps = <0>;
+        rxd1-skew-ps = <0>;
+        rxd2-skew-ps = <0>;
+        rxd3-skew-ps = <0>;
+        txd0-skew-ps = <3000>;
+        txd1-skew-ps = <3000>;
+        txd2-skew-ps = <3000>;
+        txd3-skew-ps = <3000>;
+        status = "okay";
+};
+
+&hdmi {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_hdmi_novena>;
+        ddc-i2c-bus = <&i2c2>;
+        status = "okay";
+};
+
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c1_novena>;
+        status = "okay";
+
+        accel: mma8452@1c {
+                compatible = "fsl,mma8452";
+                reg = <0x1c>;
+        };
+
+        rtc: pcf8523@68 {
+                compatible = "nxp,pcf8523";
+                reg = <0x68>;
+        };
+
+        sbs_battery: bq20z75@0b {
+                compatible = "sbs,sbs-battery";
+                reg = <0x0b>;
+                sbs,i2c-retry-count = <50>;
+        };
+
+        touch: stmpe811@44 {
+                compatible = "st,stmpe811";
+                reg = <0x44>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
+                id = <0>;
+                blocks = <0x5>;
+                irq-trigger = <0x1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_stmpe_novena>;
+                vio-supply = <&reg_3p3v>;
+                vcc-supply = <&reg_3p3v>;
+
+                stmpe_touchscreen {
+                        compatible = "st,stmpe-ts";
+                        st,sample-time = <4>;
+                        st,mod-12b = <1>;
+                        st,ref-sel = <0>;
+                        st,adc-freq = <1>;
+                        st,ave-ctrl = <1>;
+                        st,touch-det-delay = <2>;
+                        st,settling = <2>;
+                        st,fraction-z = <7>;
+                        st,i-drive = <1>;
+                };
+        };
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2_novena>;
+        status = "okay";
+
+        pmic: pfuze100@08 {
+                compatible = "fsl,pfuze100";
+                reg = <0x08>;
+
+                regulators {
+                        reg_sw1a: sw1a {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        reg_sw1c: sw1c {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_sw2: sw2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_sw3a: sw3a {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_sw3b: sw3b {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_sw4: sw4 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        reg_swbst: swbst {
+                                regulator-min-microvolt = <5000000>;
+                                regulator-max-microvolt = <5150000>;
+                                regulator-boot-on;
+                        };
+
+                        reg_snvs: vsnvs {
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <3000000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_vref: vrefddr {
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        reg_vgen1: vgen1 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        reg_vgen2: vgen2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        reg_vgen3: vgen3 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        reg_vgen4: vgen4 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        reg_vgen5: vgen5 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        reg_vgen6: vgen6 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+                };
+        };
+};
+
+&i2c3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c3_novena>;
+        status = "okay";
+
+        codec: es8328@11 {
+                compatible = "everest,es8328";
+                reg = <0x11>;
+                DVDD-supply = <&reg_audio_codec>;
+                AVDD-supply = <&reg_audio_codec>;
+                PVDD-supply = <&reg_audio_codec>;
+                HPVDD-supply = <&reg_audio_codec>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_sound_novena>;
+                clocks = <&clks IMX6QDL_CLK_CKO1>;
+                assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
+                                  <&clks IMX6QDL_CLK_CKO1_SEL>,
+                                  <&clks IMX6QDL_CLK_PLL4_AUDIO>,
+                                  <&clks IMX6QDL_CLK_CKO1>;
+                assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
+                                         <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
+                                         <&clks IMX6QDL_CLK_OSC>,
+                                         <&clks IMX6QDL_CLK_CKO1_PODF>;
+                assigned-clock-rates = <0 0 722534400 22579200>;
+        };
+};
+
+&kpp {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_kpp_novena>;
+        linux,keymap = <
+                MATRIX_KEY(1, 1, KEY_CONFIG)
+        >;
+        status = "okay";
+};
+
+&ldb {
+        fsl,dual-channel;
+        status = "okay";
+
+        lvds-channel@0 {
+                fsl,data-mapping = "jeida";
+                fsl,data-width = <24>;
+                fsl,panel = <&panel>;
+                status = "okay";
+        };
+};
+
+&pcie {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pcie_novena>;
+        reset-gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
+&sata {
+        target-supply = <&reg_sata>;
+        fsl,transmit-level-mV = <1025>;
+        fsl,transmit-boost-mdB = <0>;
+        fsl,transmit-atten-16ths = <8>;
+        status = "okay";
+};
+
+&ssi1 {
+        status = "okay";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart2_novena>;
+        status = "okay";
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart3_novena>;
+        status = "okay";
+};
+
+&uart4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart4_novena>;
+        status = "okay";
+};
+
+&usbotg {
+        vbus-supply = <&reg_usb_otg_vbus>;
+        dr_mode = "otg";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usbotg_novena>;
+        disable-over-current;
+        status = "okay";
+};
+
+&usbh1 {
+        vbus-supply = <&reg_swbst>;
+        status = "okay";
+};
+
+&usdhc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc2_novena>;
+        cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+        bus-width = <4>;
+        status = "okay";
+};
+
+&usdhc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3_novena>;
+        bus-width = <4>;
+        non-removable;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_audmux_novena: audmuxgrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
+                        MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
+                        MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
+                        MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
+                >;
+        };
+
+        pinctrl_backlight_novena: backlightgrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_DISP0_DAT8__PWM1_OUT         0x1b0b0
+                        MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28       0x1b0b1
+                        MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b1
+                >;
+        };
+
+        pinctrl_ecspi3_novena: ecspi3grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
+                        MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
+                        MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                >;
+        };
+
+        pinctrl_enet_novena: enetgrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                        MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b020
+                        MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b028
+                        MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b028
+                        MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b028
+                        MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b028
+                        MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b028
+                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
+                        MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                        MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
+                        /* Ethernet reset */
+                        MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x1b0b1
+                >;
+        };
+
+        pinctrl_fpga_gpio: fpgagpiogrp-novena {
+                fsl,pins = <
+                        /* FPGA power */
+                        MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b1
+                        /* Reset */
+                        MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07      0x1b0b1
+                        /* FPGA GPIOs */
+                        MX6QDL_PAD_EIM_DA0__GPIO3_IO00          0x1b0b1
+                        MX6QDL_PAD_EIM_DA1__GPIO3_IO01          0x1b0b1
+                        MX6QDL_PAD_EIM_DA2__GPIO3_IO02          0x1b0b1
+                        MX6QDL_PAD_EIM_DA3__GPIO3_IO03          0x1b0b1
+                        MX6QDL_PAD_EIM_DA4__GPIO3_IO04          0x1b0b1
+                        MX6QDL_PAD_EIM_DA5__GPIO3_IO05          0x1b0b1
+                        MX6QDL_PAD_EIM_DA6__GPIO3_IO06          0x1b0b1
+                        MX6QDL_PAD_EIM_DA7__GPIO3_IO07          0x1b0b1
+                        MX6QDL_PAD_EIM_DA8__GPIO3_IO08          0x1b0b1
+                        MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0x1b0b1
+                        MX6QDL_PAD_EIM_DA10__GPIO3_IO10         0x1b0b1
+                        MX6QDL_PAD_EIM_DA11__GPIO3_IO11         0x1b0b1
+                        MX6QDL_PAD_EIM_DA12__GPIO3_IO12         0x1b0b1
+                        MX6QDL_PAD_EIM_DA13__GPIO3_IO13         0x1b0b1
+                        MX6QDL_PAD_EIM_DA14__GPIO3_IO14         0x1b0b1
+                        MX6QDL_PAD_EIM_DA15__GPIO3_IO15         0x1b0b1
+                        MX6QDL_PAD_EIM_A16__GPIO2_IO22          0x1b0b1
+                        MX6QDL_PAD_EIM_A17__GPIO2_IO21          0x1b0b1
+                        MX6QDL_PAD_EIM_A18__GPIO2_IO20          0x1b0b1
+                        MX6QDL_PAD_EIM_CS0__GPIO2_IO23          0x1b0b1
+                        MX6QDL_PAD_EIM_CS1__GPIO2_IO24          0x1b0b1
+                        MX6QDL_PAD_EIM_LBA__GPIO2_IO27          0x1b0b1
+                        MX6QDL_PAD_EIM_OE__GPIO2_IO25           0x1b0b1
+                        MX6QDL_PAD_EIM_RW__GPIO2_IO26           0x1b0b1
+                        MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x1b0b1
+                        MX6QDL_PAD_EIM_BCLK__GPIO6_IO31         0x1b0b1
+                >;
+        };
+
+        pinctrl_fpga_eim: fpgaeimgrp-novena {
+                fsl,pins = <
+                        /* FPGA power */
+                        MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b1
+                        /* Reset */
+                        MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07      0x1b0b1
+                        /* FPGA GPIOs */
+                        MX6QDL_PAD_EIM_DA0__EIM_AD00            0xb0f1
+                        MX6QDL_PAD_EIM_DA1__EIM_AD01            0xb0f1
+                        MX6QDL_PAD_EIM_DA2__EIM_AD02            0xb0f1
+                        MX6QDL_PAD_EIM_DA3__EIM_AD03            0xb0f1
+                        MX6QDL_PAD_EIM_DA4__EIM_AD04            0xb0f1
+                        MX6QDL_PAD_EIM_DA5__EIM_AD05            0xb0f1
+                        MX6QDL_PAD_EIM_DA6__EIM_AD06            0xb0f1
+                        MX6QDL_PAD_EIM_DA7__EIM_AD07            0xb0f1
+                        MX6QDL_PAD_EIM_DA8__EIM_AD08            0xb0f1
+                        MX6QDL_PAD_EIM_DA9__EIM_AD09            0xb0f1
+                        MX6QDL_PAD_EIM_DA10__EIM_AD10           0xb0f1
+                        MX6QDL_PAD_EIM_DA11__EIM_AD11           0xb0f1
+                        MX6QDL_PAD_EIM_DA12__EIM_AD12           0xb0f1
+                        MX6QDL_PAD_EIM_DA13__EIM_AD13           0xb0f1
+                        MX6QDL_PAD_EIM_DA14__EIM_AD14           0xb0f1
+                        MX6QDL_PAD_EIM_DA15__EIM_AD15           0xb0f1
+                        MX6QDL_PAD_EIM_A16__EIM_ADDR16          0xb0f1
+                        MX6QDL_PAD_EIM_A17__EIM_ADDR17          0xb0f1
+                        MX6QDL_PAD_EIM_A18__EIM_ADDR18          0xb0f1
+                        MX6QDL_PAD_EIM_CS0__EIM_CS0_B           0xb0f1
+                        MX6QDL_PAD_EIM_CS1__EIM_CS1_B           0xb0f1
+                        MX6QDL_PAD_EIM_LBA__EIM_LBA_B           0xb0f1
+                        MX6QDL_PAD_EIM_OE__EIM_OE_B             0xb0f1
+                        MX6QDL_PAD_EIM_RW__EIM_RW               0xb0f1
+                        MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B         0xb0f1
+                        MX6QDL_PAD_EIM_BCLK__EIM_BCLK           0xb0f1
+                >;
+        };
+
+        pinctrl_gpio_keys_novena: gpiokeysgrp-novena {
+                fsl,pins = <
+                        /* User button */
+                        MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0
+                        /* PCIe Wakeup */
+                        MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1f0e0
+                        /* Lid switch */
+                        MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x1b0b0
+                >;
+        };
+
+        pinctrl_hdmi_novena: hdmigrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE   0x1f8b0
+                        MX6QDL_PAD_EIM_A24__GPIO5_IO04          0x1b0b1
+                >;
+        };
+
+        pinctrl_i2c1_novena: i2c1grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
+                        MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
+                >;
+        };
+
+        pinctrl_i2c2_novena: i2c2grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
+                        MX6QDL_PAD_EIM_D16__I2C2_SDA            0x4001b8b1
+                >;
+        };
+
+        pinctrl_i2c3_novena: i2c3grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
+                        MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
+                >;
+        };
+
+        pinctrl_kpp_novena: kppgrp-novena {
+                fsl,pins = <
+                        /* Front panel button */
+                        MX6QDL_PAD_KEY_ROW1__KEY_ROW1           0x1b0b1
+                        /* Fake column driver, not connected */
+                        MX6QDL_PAD_KEY_COL1__KEY_COL1           0x1b0b1
+                >;
+        };
+
+        pinctrl_leds_novena: ledsgrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_SD1_DAT3__GPIO1_IO21         0x1b0b1
+                >;
+        };
+
+        pinctrl_pcie_novena: pciegrp-novena {
+                fsl,pins = <
+                        /* Reset */
+                        MX6QDL_PAD_EIM_D29__GPIO3_IO29          0x1b0b1
+                        /* Power On */
+                        MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b0b1
+                        /* Wifi kill */
+                        MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x1b0b1
+                >;
+        };
+
+        pinctrl_sata_novena: satagrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_D30__GPIO3_IO30          0x1b0b1
+                >;
+        };
+
+        pinctrl_senoko_novena: senokogrp-novena {
+                fsl,pins = <
+                        /* Senoko IRQ line */
+                        MX6QDL_PAD_SD1_CLK__GPIO1_IO20          0x13048
+                        /* Senoko reset line */
+                        MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21       0x1b0b1
+                >;
+        };
+
+        pinctrl_sound_novena: soundgrp-novena {
+                fsl,pins = <
+                        /* Audio power regulator */
+                        MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17      0x1b0b1
+                        /* Headphone plug */
+                        MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15      0x1b0b1
+                        MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x000b0
+                >;
+        };
+
+        pinctrl_stmpe_novena: stmpegrp-novena {
+                fsl,pins = <
+                        /* Touchscreen interrupt */
+                        MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x1b0b1
+                >;
+        };
+
+        pinctrl_uart2_novena: uart2grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
+                        MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
+                >;
+        };
+
+        pinctrl_uart3_novena: uart3grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
+                        MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
+                >;
+        };
+
+        pinctrl_uart4_novena: uart4grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
+                        MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
+                >;
+        };
+
+        pinctrl_usbotg_novena: usbotggrp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
+                >;
+        };
+
+        pinctrl_usdhc2_novena: usdhc2grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
+                        MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
+                        MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
+                        MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
+                        MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
+                        MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
+                        /* Write protect */
+                        MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b1
+                        /* Card detect */
+                        MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b1
+                >;
+        };
+
+        pinctrl_usdhc3_novena: usdhc3grp-novena {
+                fsl,pins = <
+                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
+                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
+                        MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
+                        MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
+                        MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
+                        MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 399103b8e2c9..0d93c0e8f9ba 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,6 +14,7 @@
 
 / {
         aliases {
+                ipu1 = &ipu2;
                 spi4 = &ecspi5;
         };
 
@@ -103,42 +104,6 @@
 
                         iomuxc: iomuxc@020e0000 {
                                 compatible = "fsl,imx6q-iomuxc";
-
-                                ipu2 {
-                                        pinctrl_ipu2_1: ipu2grp-1 {
-                                                fsl,pins = <
-                                                        MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10
-                                                        MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15       0x10
-                                                        MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02        0x10
-                                                        MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03        0x10
-                                                        MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04        0x80000000
-                                                        MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00   0x10
-                                                        MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01   0x10
-                                                        MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02   0x10
-                                                        MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03   0x10
-                                                        MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04   0x10
-                                                        MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05   0x10
-                                                        MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06   0x10
-                                                        MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07   0x10
-                                                        MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08   0x10
-                                                        MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09   0x10
-                                                        MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10  0x10
-                                                        MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11  0x10
-                                                        MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12  0x10
-                                                        MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13  0x10
-                                                        MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14  0x10
-                                                        MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15  0x10
-                                                        MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16  0x10
-                                                        MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17  0x10
-                                                        MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18  0x10
-                                                        MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19  0x10
-                                                        MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20  0x10
-                                                        MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21  0x10
-                                                        MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22  0x10
-                                                        MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23  0x10
-                                                >;
-                                        };
-                                };
                         };
                 };
 
@@ -153,6 +118,16 @@
                         status = "disabled";
                 };
 
+                gpu_vg: gpu@02204000 {
+                        compatible = "vivante,gc";
+                        reg = <0x02204000 0x4000>;
+                        interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>,
+                                 <&clks IMX6QDL_CLK_GPU2D_CORE>;
+                        clock-names = "bus", "core";
+                        power-domains = <&gpc 1>;
+                };
+
                 ipu2: ipu@02800000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -225,6 +200,11 @@
                 compatible = "fsl,imx-display-subsystem";
                 ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>;
         };
+
+        gpu-subsystem {
+                compatible = "fsl,imx-gpu-subsystem";
+                cores = <&gpu_2d>, <&gpu_3d>, <&gpu_vg>;
+        };
 };
 
 &hdmi {
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index dc0cebfe22d7..5cd16f2178b8 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -174,6 +174,24 @@
         status = "okay";
 };
 
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
+&pwm4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
+        status = "disabled";
+};
+
 &uart1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_uart1>;
@@ -294,6 +312,24 @@
                         >;
                 };
 
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm4: pwm4grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT2__PWM4_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_uart1: uart1grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 18cd4114a23e..9fa8a10c7cc8 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -151,6 +151,21 @@
         status = "okay";
 };
 
+&clks {
+        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+                          <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
+&ecspi3 {
+        fsl,spi-num-chipselects = <1>;
+        cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ecspi3>;
+        status = "okay";
+};
+
 &fec {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_enet>;
@@ -275,6 +290,18 @@
         status = "okay";
 };
 
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
 &pwm4 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_pwm4>;
@@ -338,6 +365,15 @@
                         >;
                 };
 
+                pinctrl_ecspi3: escpi3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                                MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
+                                MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
+                                MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x100b1
+                        >;
+                };
+
                 pinctrl_enet: enetgrp {
                         fsl,pins = <
                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
@@ -429,6 +465,18 @@
                         >;
                 };
 
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_pwm4: pwm4grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index eea90f37bbb8..e8375e173873 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -152,6 +152,13 @@
         status = "okay";
 };
 
+&clks {
+        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+                          <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
 &fec {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_enet>;
@@ -247,7 +254,7 @@
 &ldb {
         status = "okay";
 
-        lvds-channel@1 {
+        lvds-channel@0 {
                 fsl,data-mapping = "spwg";
                 fsl,data-width = <18>;
                 status = "okay";
@@ -280,6 +287,18 @@
         };
 };
 
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
 &pwm4 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_pwm4>;
@@ -435,6 +454,18 @@
                         >;
                 };
 
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_pwm4: pwm4grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 6c11a2ae35ef..66983dc5cbda 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -142,6 +142,13 @@
         status = "okay";
 };
 
+&clks {
+        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+                          <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
 &fec {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_enet>;
@@ -260,6 +267,8 @@
                         swbst_reg: swbst {
                                 regulator-min-microvolt = <5000000>;
                                 regulator-max-microvolt = <5150000>;
+                                regulator-boot-on;
+                                regulator-always-on;
                         };
 
                         snvs_reg: vsnvs {
@@ -336,7 +345,7 @@
 &ldb {
         status = "okay";
 
-        lvds-channel@1 {
+        lvds-channel@0 {
                 fsl,data-mapping = "spwg";
                 fsl,data-width = <18>;
                 status = "okay";
@@ -369,6 +378,24 @@
         };
 };
 
+&pwm1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
+        status = "disabled";
+};
+
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
 &pwm4 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_pwm4>;
@@ -528,6 +555,24 @@
                         >;
                 };
 
+                pinctrl_pwm1: pwm1grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_9__PWM1_OUT             0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_pwm4: pwm4grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
index 741f3d529e3e..118bea524dab 100644
--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
@@ -198,6 +198,18 @@
         status = "okay";
 };
 
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
 &ssi1 {
         status = "okay";
 };
@@ -290,6 +302,18 @@
                         >;
                 };
 
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_uart2: uart2grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
index d1e5048b00b5..cca39f194017 100644
--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -164,6 +164,18 @@
         status = "okay";
 };
 
+&pwm2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
+        status = "disabled";
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
+        status = "disabled";
+};
+
 &uart2 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_uart2>;
@@ -242,6 +254,18 @@
                         >;
                 };
 
+                pinctrl_pwm2: pwm2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
+                        >;
+                };
+
+                pinctrl_pwm3: pwm3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                        >;
+                };
+
                 pinctrl_uart2: uart2grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 2b6cc8bf3c5c..4f6ae921656f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -30,6 +30,7 @@
                 i2c0 = &i2c1;
                 i2c1 = &i2c2;
                 i2c2 = &i2c3;
+                ipu0 = &ipu1;
                 mmc0 = &usdhc1;
                 mmc1 = &usdhc2;
                 mmc2 = &usdhc3;
@@ -47,15 +48,6 @@
                 usbphy1 = &usbphy2;
         };
 
-        intc: interrupt-controller@00a01000 {
-                compatible = "arm,cortex-a9-gic";
-                #interrupt-cells = <3>;
-                interrupt-controller;
-                reg = <0x00a01000 0x1000>,
-                      <0x00a00100 0x100>;
-                interrupt-parent = <&intc>;
-        };
-
         clocks {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -147,6 +139,27 @@
                         };
                 };
 
+                gpu_3d: gpu@00130000 {
+                        compatible = "vivante,gc";
+                        reg = <0x00130000 0x4000>;
+                        interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
+                                 <&clks IMX6QDL_CLK_GPU3D_CORE>,
+                                 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
+                        clock-names = "bus", "core", "shader";
+                        power-domains = <&gpc 1>;
+                };
+
+                gpu_2d: gpu@00134000 {
+                        compatible = "vivante,gc";
+                        reg = <0x00134000 0x4000>;
+                        interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>,
+                                 <&clks IMX6QDL_CLK_GPU2D_CORE>;
+                        clock-names = "bus", "core";
+                        power-domains = <&gpc 1>;
+                };
+
                 timer@00a00600 {
                         compatible = "arm,cortex-a9-twd-timer";
                         reg = <0x00a00600 0x20>;
@@ -155,6 +168,15 @@
                         clocks = <&clks IMX6QDL_CLK_TWD>;
                 };
 
+                intc: interrupt-controller@00a01000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        interrupt-controller;
+                        reg = <0x00a01000 0x1000>,
+                              <0x00a00100 0x100>;
+                        interrupt-parent = <&intc>;
+                };
+
                 L2: l2-cache@00a02000 {
                         compatible = "arm,pl310-cache";
                         reg = <0x00a02000 0x1000>;
@@ -173,8 +195,7 @@
                         #address-cells = <3>;
                         #size-cells = <2>;
                         device_type = "pci";
-                        ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
-                                  0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
+                        ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
                                   0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
                         num-lanes = <1>;
                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
@@ -227,7 +248,7 @@
                                                       "rxtx1", "rxtx2",
                                                       "rxtx3", "rxtx4",
                                                       "rxtx5", "rxtx6",
-                                                      "rxtx7", "dma";
+                                                      "rxtx7", "spba";
                                         status = "disabled";
                                 };
 
@@ -309,7 +330,7 @@
                                                  <&clks IMX6QDL_CLK_ESAI_EXTAL>,
                                                  <&clks IMX6QDL_CLK_ESAI_IPG>,
                                                  <&clks IMX6QDL_CLK_SPBA>;
-                                        clock-names = "core", "mem", "extal", "fsys", "dma";
+                                        clock-names = "core", "mem", "extal", "fsys", "spba";
                                         dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
                                         dma-names = "rx", "tx";
                                         status = "disabled";
@@ -378,7 +399,7 @@
                                                 "asrck_1", "asrck_2", "asrck_3", "asrck_4",
                                                 "asrck_5", "asrck_6", "asrck_7", "asrck_8",
                                                 "asrck_9", "asrck_a", "asrck_b", "asrck_c",
-                                                "asrck_d", "asrck_e", "asrck_f", "dma";
+                                                "asrck_d", "asrck_e", "asrck_f", "spba";
                                         dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
                                                 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
                                         dma-names = "rxa", "rxb", "rxc",
@@ -906,6 +927,9 @@
                                 clocks = <&clks IMX6QDL_CLK_USBOH3>;
                                 fsl,usbphy = <&usbphy1>;
                                 fsl,usbmisc = <&usbmisc 0>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -917,6 +941,9 @@
                                 fsl,usbphy = <&usbphy2>;
                                 fsl,usbmisc = <&usbmisc 1>;
                                 dr_mode = "host";
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -927,6 +954,9 @@
                                 clocks = <&clks IMX6QDL_CLK_USBOH3>;
                                 fsl,usbmisc = <&usbmisc 2>;
                                 dr_mode = "host";
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -937,6 +967,9 @@
                                 clocks = <&clks IMX6QDL_CLK_USBOH3>;
                                 fsl,usbmisc = <&usbmisc 3>;
                                 dr_mode = "host";
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index d8ba99f1d87b..d12b250342a6 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -151,7 +151,7 @@
                                                 "rxtx1", "rxtx2",
                                                 "rxtx3", "rxtx4",
                                                 "rxtx5", "rxtx6",
-                                                "rxtx7", "dma";
+                                                "rxtx7", "spba";
                                         status = "disabled";
                                 };
 
@@ -708,6 +708,9 @@
                                 clocks = <&clks IMX6SL_CLK_USBOH3>;
                                 fsl,usbphy = <&usbphy1>;
                                 fsl,usbmisc = <&usbmisc 0>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -718,6 +721,9 @@
                                 clocks = <&clks IMX6SL_CLK_USBOH3>;
                                 fsl,usbphy = <&usbphy2>;
                                 fsl,usbmisc = <&usbmisc 1>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -728,6 +734,9 @@
                                 clocks = <&clks IMX6SL_CLK_USBOH3>;
                                 fsl,usbmisc = <&usbmisc 2>;
                                 dr_mode = "host";
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 167f77b3bd43..a5f76025a0ce 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -222,7 +222,7 @@
                                                       "rxtx1", "rxtx2",
                                                       "rxtx3", "rxtx4",
                                                       "rxtx5", "rxtx6",
-                                                      "rxtx7", "dma";
+                                                      "rxtx7", "spba";
                                         status = "disabled";
                                 };
 
@@ -295,7 +295,7 @@
                                                  <&clks IMX6SX_CLK_ESAI_IPG>,
                                                  <&clks IMX6SX_CLK_SPBA>;
                                         clock-names = "core", "mem", "extal",
-                                                      "fsys", "dma";
+                                                      "fsys", "spba";
                                         status = "disabled";
                                 };
 
@@ -348,7 +348,7 @@
                                                  <&clks IMX6SX_CLK_ASRC_IPG>,
                                                  <&clks IMX6SX_CLK_SPDIF>,
                                                  <&clks IMX6SX_CLK_SPBA>;
-                                        clock-names = "mem", "ipg", "asrck", "dma";
+                                        clock-names = "mem", "ipg", "asrck", "spba";
                                         dmas = <&sdma 17 20 1>, <&sdma 18 20 1>,
                                                <&sdma 19 20 1>, <&sdma 20 20 1>,
                                                <&sdma 21 20 1>, <&sdma 22 20 1>;
@@ -783,6 +783,9 @@
                                 fsl,usbphy = <&usbphy1>;
                                 fsl,usbmisc = <&usbmisc 0>;
                                 fsl,anatop = <&anatop>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -793,6 +796,9 @@
                                 clocks = <&clks IMX6SX_CLK_USBOH3>;
                                 fsl,usbphy = <&usbphy2>;
                                 fsl,usbmisc = <&usbmisc 1>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -805,6 +811,9 @@
                                 phy_type = "hsic";
                                 fsl,anatop = <&anatop>;
                                 dr_mode = "host";
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -1152,6 +1161,8 @@
                                 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks IMX6SX_CLK_IPG>;
                                 clock-names = "adc";
+                                fsl,adck-max-frequency = <30000000>, <40000000>,
+                                                         <20000000>;
                                 status = "disabled";
                         };
 
@@ -1161,6 +1172,8 @@
                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks IMX6SX_CLK_IPG>;
                                 clock-names = "adc";
+                                fsl,adck-max-frequency = <30000000>, <40000000>,
+                                                         <20000000>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index d00e994bdbd2..99b646506fc9 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -548,6 +548,9 @@
                                 fsl,usbphy = <&usbphy1>;
                                 fsl,usbmisc = <&usbmisc 0>;
                                 fsl,anatop = <&anatop>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -558,6 +561,9 @@
                                 clocks = <&clks IMX6UL_CLK_USBOH3>;
                                 fsl,usbphy = <&usbphy2>;
                                 fsl,usbmisc = <&usbmisc 1>;
+                                ahb-burst-config = <0x0>;
+                                tx-burst-size-dword = <0x10>;
+                                rx-burst-size-dword = <0x10>;
                                 status = "disabled";
                         };
 
@@ -619,6 +625,18 @@
                                 status = "disabled";
                         };
 
+                        adc1: adc@02198000 {
+                                compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
+                                reg = <0x02198000 0x4000>;
+                                interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks IMX6UL_CLK_ADC1>;
+                                num-channels = <2>;
+                                clock-names = "adc";
+                                fsl,adck-max-frequency = <30000000>, <40000000>,
+                                                         <20000000>;
+                                status = "disabled";
+                        };
+
                         i2c1: i2c@021a0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
new file mode 100644
index 000000000000..48634519d13a
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -0,0 +1,286 @@
+/*
+ * Support for CompuLab CL-SOM-iMX7 System-on-Module
+ *
+ * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ * Author: Ilya Ledvich <ilya@compulab.co.il>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "imx7d.dtsi"
+
+/ {
+        model = "CompuLab CL-SOM-iMX7";
+        compatible = "compulab,cl-som-imx7", "fsl,imx7d";
+
+        memory {
+                reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
+        };
+
+        reg_usb_otg1_vbus: regulator-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg1_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+};
+
+&cpu0 {
+        arm-supply = <&sw1a_reg>;
+};
+
+&fec1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet1>;
+        assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+                          <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+        assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+        assigned-clock-rates = <0>, <100000000>;
+        phy-mode = "rgmii";
+        phy-handle = <&ethphy0>;
+        fsl,magic-packet;
+        status = "okay";
+
+        mdio {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ethphy0: ethernet-phy@0 {
+                        reg = <0>;
+                };
+
+                ethphy1: ethernet-phy@1 {
+                        reg = <1>;
+                };
+        };
+};
+
+&fec2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet2>;
+        assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
+                          <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
+        assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+        assigned-clock-rates = <0>, <100000000>;
+        phy-mode = "rgmii";
+        phy-handle = <&ethphy1>;
+        fsl,magic-packet;
+        status = "okay";
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        status = "okay";
+
+        pmic: pmic@8 {
+                compatible = "fsl,pfuze3000";
+                reg = <0x08>;
+
+                regulators {
+                        sw1a_reg: sw1a {
+                                regulator-min-microvolt = <700000>;
+                                regulator-max-microvolt = <1475000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        /* use sw1c_reg to align with pfuze100/pfuze200 */
+                        sw1c_reg: sw1b {
+                                regulator-min-microvolt = <700000>;
+                                regulator-max-microvolt = <1475000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        sw2_reg: sw2 {
+                                regulator-min-microvolt = <1500000>;
+                                regulator-max-microvolt = <1850000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw3a_reg: sw3 {
+                                regulator-min-microvolt = <900000>;
+                                regulator-max-microvolt = <1650000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        swbst_reg: swbst {
+                                regulator-min-microvolt = <5000000>;
+                                regulator-max-microvolt = <5150000>;
+                        };
+
+                        snvs_reg: vsnvs {
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <3000000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vref_reg: vrefddr {
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vgen1_reg: vldo1 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen2_reg: vldo2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        vgen3_reg: vccsd {
+                                regulator-min-microvolt = <2850000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen4_reg: v33 {
+                                regulator-min-microvolt = <2850000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen5_reg: vldo3 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen6_reg: vldo4 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+                };
+        };
+
+        pca9555: pca9555@20 {
+                compatible = "nxp,pca9555";
+                gpio-controller;
+                #gpio-cells = <2>;
+                reg = <0x20>;
+        };
+
+        eeprom@50 {
+                compatible = "atmel,24c08";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
+        assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+        status = "okay";
+};
+
+&usbotg1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usbotg1>;
+        vbus-supply = <&reg_usb_otg1_vbus>;
+        status = "okay";
+};
+
+&usdhc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3>;
+        assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+        assigned-clock-rates = <400000000>;
+        bus-width = <8>;
+        fsl,tuning-step = <2>;
+        non-removable;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_enet1: enet1grp {
+                fsl,pins = <
+                        MX7D_PAD_SD2_CD_B__ENET1_MDIO                   0x3
+                        MX7D_PAD_SD2_WP__ENET1_MDC                      0x3
+                        MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC       0x1
+                        MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0       0x1
+                        MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1       0x1
+                        MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2       0x1
+                        MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3       0x1
+                        MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
+                        MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC       0x1
+                        MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0       0x1
+                        MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1       0x1
+                        MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2       0x1
+                        MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3       0x1
+                        MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
+                >;
+        };
+
+        pinctrl_enet2: enet2grp {
+                fsl,pins = <
+                        MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC             0x1
+                        MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0            0x1
+                        MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1            0x1
+                        MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2            0x1
+                        MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3             0x1
+                        MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL          0x1
+                        MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC            0x1
+                        MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0            0x1
+                        MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1             0x1
+                        MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2             0x1
+                        MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3            0x1
+                        MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL         0x1
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        MX7D_PAD_I2C2_SDA__I2C2_SDA             0x4000007f
+                        MX7D_PAD_I2C2_SCL__I2C2_SCL             0x4000007f
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX    0x79
+                        MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX    0x79
+                >;
+        };
+
+        pinctrl_usbotg1: usbotg1grp {
+                fsl,pins = <
+                        MX7D_PAD_GPIO1_IO05__GPIO1_IO5          0x14 /* OTG PWREN */
+                >;
+        };
+
+        pinctrl_usdhc3: usdhc3grp {
+                fsl,pins = <
+                        MX7D_PAD_SD3_CMD__SD3_CMD               0x59
+                        MX7D_PAD_SD3_CLK__SD3_CLK               0x19
+                        MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
+                        MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
+                        MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
+                        MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
+                        MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
+                        MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
+                        MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
+                        MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
+                        MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
new file mode 100644
index 000000000000..d63c597c0783
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
@@ -0,0 +1,42 @@
+/*
+ * Support for CompuLab SBC-iMX7 Single Board Computer
+ *
+ * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ * Author: Ilya Ledvich <ilya@compulab.co.il>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ */
+
+#include "imx7d-cl-som-imx7.dts"
+
+/ {
+        model = "CompuLab SBC-iMX7";
+        compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
+};
+
+&usdhc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc1>;
+        cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+        enable-sdio-wakeup;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_usdhc1: usdhc1grp {
+                fsl,pins = <
+                        MX7D_PAD_SD1_CMD__SD1_CMD               0x59
+                        MX7D_PAD_SD1_CLK__SD1_CLK               0x19
+                        MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59
+                        MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59
+                        MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59
+                        MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59
+                        MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x59 /* CD */
+                        MX7D_PAD_SD1_WP__GPIO5_IO1              0x59 /* WP */
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 432aaf5d5ef7..b2c453662905 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -97,6 +97,16 @@
         };
 };
 
+&adc1 {
+        vref-supply = <&reg_vref_1v8>;
+        status = "okay";
+};
+
+&adc2 {
+        vref-supply = <&reg_vref_1v8>;
+        status = "okay";
+};
+
 &cpu0 {
         arm-supply = <&sw1a_reg>;
 };
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index ebc053a06405..25ad30978740 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -85,9 +85,7 @@
                                 792000  975000
                         >;
                         clock-latency = <61036>; /* two CLK32 periods */
-                        clocks = <&clks IMX7D_ARM_A7_ROOT_CLK>, <&clks IMX7D_ARM_A7_ROOT_SRC>,
-                                 <&clks IMX7D_PLL_ARM_MAIN_CLK>, <&clks IMX7D_PLL_SYS_MAIN_CLK>;
-                        clock-names = "arm", "arm_root_src", "pll_arm", "pll_sys_main";
+                        clocks = <&clks IMX7D_CLK_ARM>;
                 };
 
                 cpu1: cpu@1 {
@@ -583,6 +581,24 @@
                         reg = <0x30400000 0x400000>;
                         ranges;
 
+                        adc1: adc@30610000 {
+                                compatible = "fsl,imx7d-adc";
+                                reg = <0x30610000 0x10000>;
+                                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks IMX7D_ADC_ROOT_CLK>;
+                                clock-names = "adc";
+                                status = "disabled";
+                        };
+
+                        adc2: adc@30620000 {
+                                compatible = "fsl,imx7d-adc";
+                                reg = <0x30620000 0x10000>;
+                                interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks IMX7D_ADC_ROOT_CLK>;
+                                clock-names = "adc";
+                                status = "disabled";
+                        };
+
                         pwm1: pwm@30660000 {
                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
                                 reg = <0x30660000 0x10000>;
diff --git a/arch/arm/boot/dts/kirkwood-nsa325.dts b/arch/arm/boot/dts/kirkwood-nsa325.dts
new file mode 100644
index 000000000000..bc4ec9332387
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-nsa325.dts
@@ -0,0 +1,238 @@
+/* Device tree file for the Zyxel NSA 325 NAS box.
+ *
+ * Copyright (c) 2015, Hans Ulli Kroll <ulli.kroll@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Based upon the board setup file created by Peter Schildmann
+ */
+
+/dts-v1/;
+
+#include "kirkwood-nsa3x0-common.dtsi"
+
+/ {
+        model = "ZyXEL NSA325";
+        compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+                stdout-path = &uart0;
+        };
+
+        mbus {
+                pcie-controller {
+                        status = "okay";
+
+                        pcie@1,0 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        ocp@f1000000 {
+                pinctrl: pin-controller@10000 {
+                        pinctrl-names = "default";
+
+                        pmx_led_hdd2_green: pmx-led-hdd2-green {
+                                marvell,pins = "mpp12";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_hdd2_red: pmx-led-hdd2-red {
+                                marvell,pins = "mpp13";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_mcu_data: pmx-mcu-data {
+                                marvell,pins = "mpp14";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_usb_green: pmx-led-usb-green {
+                                marvell,pins = "mpp15";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_mcu_clk: pmx-mcu-clk {
+                                marvell,pins = "mpp16";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_mcu_act: pmx-mcu-act {
+                                marvell,pins = "mpp17";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_sys_green: pmx-led-sys-green {
+                                marvell,pins = "mpp28";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_sys_orange: pmx-led-sys-orange {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_hdd1_green: pmx-led-hdd1-green {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_hdd1_red: pmx-led-hdd1-red {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_htp: pmx-htp {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+
+                        /*
+                         * Buzzer needs to be switched at around 1kHz so is
+                         * not compatible with the gpio-beeper driver.
+                         */
+                        pmx_buzzer: pmx-buzzer {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_vid_b1: pmx-vid-b1 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_power_resume_data: pmx-power-resume-data {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_power_resume_clk: pmx-power-resume-clk {
+                                marvell,pins = "mpp49";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_pwr_sata1: pmx-pwr-sata1 {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
+
+                /* This board uses the pcf8563 RTC instead of the SoC RTC */
+                rtc@10300 {
+                        status = "disabled";
+                };
+
+                i2c@11000 {
+                        status = "okay";
+
+                        pcf8563: pcf8563@51 {
+                                compatible = "nxp,pcf8563";
+                                reg = <0x51>;
+                        };
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&pmx_pwr_sata1>;
+                pinctrl-names = "default";
+
+                usb0_power: regulator@1 {
+                        enable-active-high;
+                };
+
+                sata1_power: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+                        regulator-name = "SATA1 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        enable-active-high;
+                        gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
+                             &pmx_led_usb_green
+                             &pmx_led_sys_green &pmx_led_sys_orange
+                             &pmx_led_copy_green &pmx_led_copy_red
+                             &pmx_led_hdd1_green &pmx_led_hdd1_red>;
+                pinctrl-names = "default";
+
+                green-sys {
+                        label = "nsa325:green:sys";
+                        gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+                };
+                orange-sys {
+                        label = "nsa325:orange:sys";
+                        gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
+                };
+                green-hdd1 {
+                        label = "nsa325:green:hdd1";
+                        gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+                };
+                red-hdd1 {
+                        label = "nsa325:red:hdd1";
+                        gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+                };
+                green-hdd2 {
+                        label = "nsa325:green:hdd2";
+                        gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                };
+                red-hdd2 {
+                        label = "nsa325:red:hdd2";
+                        gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+                };
+                green-usb {
+                        label = "nsa325:green:usb";
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+                };
+                green-copy {
+                        label = "nsa325:green:copy";
+                        gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+                };
+                red-copy {
+                        label = "nsa325:red:copy";
+                        gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+                };
+
+        /* The following pins are currently not assigned to a driver,
+           some of them should be configured as inputs.
+        pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act
+                     &pmx_htp &pmx_vid_b1
+                     &pmx_power_resume_data &pmx_power_resume_clk>; */
+        };
+
+
+};
+
+&mdio {
+        status = "okay";
+        ethphy0: ethernet-phy@1 {
+                reg = <1>;
+        };
+};
+
+&eth0 {
+        status = "okay";
+        ethernet0-port@0 {
+                phy-handle = <&ethphy0>;
+        };
+};
+
diff --git a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
new file mode 100644
index 000000000000..1db6f2c506cc
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
@@ -0,0 +1,178 @@
+/*
+ * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
+ * inspired by the board files made by Kevin Mihelich for ArchLinux,
+ * and their DTS file.
+ *
+ * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6192.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+        model = "Cloud Engines PogoPlug Series 4";
+        compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
+                     "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;
+        };
+
+        chosen {
+                stdout-path = "uart0:115200n8";
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&pmx_button_eject>;
+                pinctrl-names = "default";
+
+                button@1 {
+                        debounce_interval = <50>;
+                        wakeup-source;
+                        linux,code = <KEY_EJECTCD>;
+                        label = "Eject Button";
+                        gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&pmx_led_green &pmx_led_red>;
+                pinctrl-names = "default";
+
+                health {
+                        label = "pogoplugv4:green:health";
+                        gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+                        default-state = "on";
+                };
+                fault {
+                        label = "pogoplugv4:red:fault";
+                        gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+                };
+        };
+};
+
+&pinctrl {
+        pmx_sata0: pmx-sata0 {
+                marvell,pins = "mpp21";
+                marvell,function = "sata0";
+        };
+
+        pmx_sata1: pmx-sata1 {
+                marvell,pins = "mpp20";
+                marvell,function = "sata1";
+        };
+
+        pmx_sdio_cd: pmx-sdio-cd {
+                marvell,pins = "mpp27";
+                marvell,function = "gpio";
+        };
+
+        pmx_sdio_wp: pmx-sdio-wp {
+                marvell,pins = "mpp28";
+                marvell,function = "gpio";
+        };
+
+        pmx_button_eject: pmx-button-eject {
+                marvell,pins = "mpp29";
+                marvell,function = "gpio";
+        };
+
+        pmx_led_green: pmx-led-green {
+                marvell,pins = "mpp22";
+                marvell,function = "gpio";
+        };
+
+        pmx_led_red: pmx-led-red {
+                marvell,pins = "mpp24";
+                marvell,function = "gpio";
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
+
+/*
+ * This PCIE controller has a USB 3.0 XHCI controller at 1,0
+ */
+&pciec {
+        status = "okay";
+};
+
+&pcie0 {
+        status = "okay";
+};
+
+&sata {
+        status = "okay";
+        pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
+        pinctrl-names = "default";
+        nr-ports = <1>;
+};
+
+&sdio {
+        status = "okay";
+        pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
+        pinctrl-names = "default";
+        cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+        wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+};
+
+&nand {
+        /* 128 MiB of NAND flash */
+        chip-delay = <40>;
+        status = "okay";
+        partitions {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                partition@0 {
+                        label = "u-boot";
+                        reg = <0x00000000 0x200000>;
+                        read-only;
+                };
+
+                partition@200000 {
+                        label = "uImage";
+                        reg = <0x00200000 0x300000>;
+                };
+
+                partition@500000 {
+                        label = "uImage2";
+                        reg = <0x00500000 0x300000>;
+                };
+
+                partition@800000 {
+                        label = "failsafe";
+                        reg = <0x00800000 0x800000>;
+                };
+
+                partition@1000000 {
+                        label = "root";
+                        reg = <0x01000000 0x7000000>;
+                };
+        };
+};
+
+&mdio {
+        status = "okay";
+
+        ethphy0: ethernet-phy@0 {
+                reg = <0>;
+        };
+};
+
+&eth0 {
+        status = "okay";
+        ethernet0-port@0 {
+                phy-handle = <&ethphy0>;
+        };
+};
diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
index 5b0430041ec6..fb13f18c08cc 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
+++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
@@ -23,31 +23,37 @@
                         label = "sysboot2";
                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;     /* gpio2 */
                         linux,code = <BTN_0>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 sysboot5 {
                         label = "sysboot5";
                         gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;     /* gpio7 */
                         linux,code = <BTN_1>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 gpio1 {
                         label = "gpio1";
                         gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;    /* gpio181 */
                         linux,code = <BTN_2>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 gpio2 {
                         label = "gpio2";
                         gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;    /* gpio178 */
                         linux,code = <BTN_3>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
+        sound {
+                compatible = "ti,omap-twl4030";
+                ti,model = "omap3logic";
+                ti,mcbsp = <&mcbsp2>;
+        };
+
         leds {
                 compatible = "gpio-leds";
                 pinctrl-names = "default";
@@ -67,6 +73,20 @@
         };
 };
 
+&vaux1 {
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+};
+
+&vaux4 {
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+};
+
+&mcbsp2 {
+        status = "okay";
+};
+
 &charger {
         ti,bb-uvolt = <3200000>;
         ti,bb-uamp = <150>;
@@ -84,6 +104,70 @@
         };
 };
 
+&vpll2 {
+        regulator-always-on;
+};
+
+&dss {
+        status = "ok";
+        vdds_dsi-supply = <&vpll2>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&dss_dpi_pins1>;
+        port {
+                dpi_out: endpoint {
+                        remote-endpoint = <&lcd_in>;
+                        data-lines = <16>;
+                };
+        };
+};
+
+/ {
+        aliases {
+                display0 = &lcd0;
+        };
+
+        lcd0: display@0 {
+                compatible = "panel-dpi";
+                label = "15";
+                status = "okay";
+                /* default-on; */
+                pinctrl-names = "default";
+                enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;    /* gpio155, lcd INI */
+
+                port {
+                        lcd_in: endpoint {
+                                remote-endpoint = <&dpi_out>;
+                        };
+                };
+
+                panel-timing {
+                        clock-frequency = <9000000>;
+                        hactive = <480>;
+                        vactive = <272>;
+                        hfront-porch = <3>;
+                        hback-porch = <2>;
+                        hsync-len = <42>;
+                        vback-porch = <3>;
+                        vfront-porch = <4>;
+                        vsync-len = <11>;
+                        hsync-active = <0>;
+                        vsync-active = <0>;
+                        de-active = <1>;
+                        pixelclk-active = <1>;
+                };
+        };
+
+        bl: backlight {
+                compatible = "gpio-backlight";
+                pinctrl-names = "default";
+                pinctrl-0 = <&backlight_pins>;
+
+                gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>, /* gpio_56 */
+                        <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
+                default-on;
+        };
+};
+
 &mmc1 {
         interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
         pinctrl-names = "default";
@@ -119,6 +203,48 @@
                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat3.sdmmc1_dat3 */
                 >;
         };
+
+        tsc2004_pins: pinmux_tsc2004_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)        /* mcbsp4_dr.gpio_153 */
+                >;
+        };
+
+        backlight_pins: pinmux_backlight_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | MUX_MODE4)       /* gpmc_ncs5.gpio_56 */
+                        OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4)       /* mcbsp4_dx.gpio_154 */
+                >;
+        };
+
+        dss_dpi_pins1: pinmux_dss_dpi_pins1 {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+                        OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+                        OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+                        OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+
+                        OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+                        OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+                        OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+                        OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+                        OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+                        OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+                        OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+                        OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+                        OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+                        OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+                        OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+                        OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+
+                        OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3)   /* dss_data18.dss_data0 */
+                        OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3)   /* dss_data19.dss_data1 */
+                        OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3)   /* dss_data20.dss_data2 */
+                        OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3)   /* dss_data21.dss_data3 */
+                        OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3)   /* dss_data22.dss_data4 */
+                        OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3)   /* dss_data23.dss_data5 */
+                >;
+        };
 };
 
 &omap3_pmx_wkup {
@@ -142,6 +268,27 @@
         };
 };
 
+&i2c3 {
+        touchscreen: tsc2004@48 {
+                compatible = "ti,tsc2004";
+                reg = <0x48>;
+                vio-supply = <&vaux1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&tsc2004_pins>;
+                interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
+
+                touchscreen-fuzz-x = <4>;
+                touchscreen-fuzz-y = <7>;
+                touchscreen-fuzz-pressure = <2>;
+                touchscreen-size-x = <4096>;
+                touchscreen-size-y = <4096>;
+                touchscreen-max-pressure = <2048>;
+
+                ti,x-plate-ohms = <280>;
+                ti,esd-recovery-timeout-ms = <8000>;
+        };
+};
+
 &uart1 {
         interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
 };
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 36387b11451d..7fed0bd4f3de 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -96,9 +96,30 @@
                 reg = <0x48>;
                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                 interrupt-parent = <&intc>;
+                twl_audio: audio {
+                        compatible = "ti,twl4030-audio";
+                        codec {
+                        };
+                };
         };
 };
 
+&i2c2 {
+        clock-frequency = <400000>;
+};
+
+&i2c3 {
+        clock-frequency = <400000>;
+};
+
+&i2c2 {
+        clock-frequency = <400000>;
+};
+
+&i2c3 {
+        clock-frequency = <400000>;
+};
+
 /*
  * Only found on the wireless SOM. For the SOM without wireless, the pins for
  * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
@@ -136,6 +157,29 @@
                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr.gpio_157 */
                 >;
         };
+        mcbsp2_pins: pinmux_mcbsp2_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
+                        OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
+                        OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
+                        OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
+                >;
+        };
+        uart2_pins: pinmux_uart2_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
+                        OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
+                        OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
+                        OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
+                        OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
+                >;
+        };
+};
+
+&uart2 {
+        interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
 };
 
 &omap3_pmx_core2 {
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 52591d83e8cd..053a1f54f4bb 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -166,6 +166,17 @@
                         status = "disabled";
                 };
 
+                eeprom: eeprom@4000e000 {
+                        compatible = "nxp,lpc1857-eeprom";
+                        reg = <0x4000e000 0x1000>, <0x20040000 0x4000>;
+                        reg-names = "reg", "mem";
+                        clocks = <&ccu1 CLK_CPU_EEPROM>;
+                        clock-names = "eeprom";
+                        resets = <&rgu 27>;
+                        interrupts = <4>;
+                        status = "disabled";
+                };
+
                 mac: ethernet@40010000 {
                         compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac";
                         reg = <0x40010000 0x2000>;
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 3abebb75fc57..c85cf979725e 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -11,19 +11,20 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
 
 / {
         compatible = "nxp,lpc3220";
         interrupt-parent = <&mic>;
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm926ej-s";
                         device_type = "cpu";
+                        reg = <0x0>;
                 };
         };
 
@@ -31,7 +32,8 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "simple-bus";
-                ranges = <0x20000000 0x20000000 0x30000000>;
+                ranges = <0x20000000 0x20000000 0x30000000>,
+                         <0xe0000000 0xe0000000 0x04000000>;
 
                 /*
                  * Enable either SLC or MLC
@@ -49,30 +51,46 @@
                         status = "disabled";
                 };
 
-                dma@31000000 {
+                dma: dma@31000000 {
                         compatible = "arm,pl080", "arm,primecell";
                         reg = <0x31000000 0x1000>;
                         interrupts = <0x1c 0>;
                 };
 
-                /*
-                 * Enable either ohci or usbd (gadget)!
-                 */
-                ohci@31020000 {
-                        compatible = "nxp,ohci-nxp", "usb-ohci";
-                        reg = <0x31020000 0x300>;
-                        interrupts = <0x3b 0>;
-                        status = "disabled";
-                };
+                usb {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        ranges = <0x0 0x31020000 0x00001000>;
 
-                usbd@31020000 {
-                        compatible = "nxp,lpc3220-udc";
-                        reg = <0x31020000 0x300>;
-                        interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
-                        status = "disabled";
+                        /*
+                         * Enable either ohci or usbd (gadget)!
+                         */
+                        ohci: ohci@0 {
+                                compatible = "nxp,ohci-nxp", "usb-ohci";
+                                reg = <0x0 0x300>;
+                                interrupts = <0x3b 0>;
+                                status = "disabled";
+                        };
+
+                        usbd: usbd@0 {
+                                compatible = "nxp,lpc3220-udc";
+                                reg = <0x0 0x300>;
+                                interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
+                                status = "disabled";
+                        };
+
+                        i2cusb: i2c@300 {
+                                compatible = "nxp,pnx-i2c";
+                                reg = <0x300 0x100>;
+                                interrupts = <0x3f 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                pnx,timeout = <0x64>;
+                        };
                 };
 
-                clcd@31040000 {
+                clcd: clcd@31040000 {
                         compatible = "arm,pl110", "arm,primecell";
                         reg = <0x31040000 0x1000>;
                         interrupts = <0x0e 0>;
@@ -85,6 +103,19 @@
                         interrupts = <0x1d 0>;
                 };
 
+                emc: memory-controller@31080000 {
+                        compatible = "arm,pl175", "arm,primecell";
+                        reg = <0x31080000 0x1000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xe0000000 0x01000000>,
+                                 <1 0xe1000000 0x01000000>,
+                                 <2 0xe2000000 0x01000000>,
+                                 <3 0xe3000000 0x01000000>;
+                        status = "disabled";
+                };
+
                 apb {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -118,7 +149,7 @@
                                 reg = <0x20094000 0x1000>;
                         };
 
-                        sd@20098000 {
+                        sd: sd@20098000 {
                                 compatible = "arm,pl18x", "arm,primecell";
                                 reg = <0x20098000 0x1000>;
                                 interrupts = <0x0f 0>, <0x0d 0>;
@@ -192,15 +223,6 @@
                                 status = "disabled";
                                 #pwm-cells = <2>;
                         };
-
-                        i2cusb: i2c@31020300 {
-                                compatible = "nxp,pnx-i2c";
-                                reg = <0x31020300 0x100>;
-                                interrupts = <0x3f 0>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                pnx,timeout = <0x64>;
-                        };
                 };
 
                 fab {
@@ -243,7 +265,7 @@
                                 status = "disabled";
                         };
 
-                        rtc@40024000 {
+                        rtc: rtc@40024000 {
                                 compatible = "nxp,lpc3220-rtc";
                                 reg = <0x40024000 0x1000>;
                                 interrupts = <0x34 0>;
@@ -256,11 +278,31 @@
                                 #gpio-cells = <3>; /* bank, pin, flags */
                         };
 
-                        watchdog@4003C000 {
+                        timer4: timer@4002C000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x4002C000 0x1000>;
+                                interrupts = <0x3 0>;
+                                status = "disabled";
+                        };
+
+                        timer5: timer@40030000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x40030000 0x1000>;
+                                interrupts = <0x4 0>;
+                                status = "disabled";
+                        };
+
+                        watchdog: watchdog@4003C000 {
                                 compatible = "nxp,pnx4008-wdt";
                                 reg = <0x4003C000 0x1000>;
                         };
 
+                        timer0: timer@40044000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x40044000 0x1000>;
+                                interrupts = <0x10 0>;
+                        };
+
                         /*
                          * TSC vs. ADC: Since those two share the same
                          * hardware, you need to choose from one of the
@@ -268,30 +310,56 @@
                          * them
                          */
 
-                        adc@40048000 {
+                        adc: adc@40048000 {
                                 compatible = "nxp,lpc3220-adc";
                                 reg = <0x40048000 0x1000>;
                                 interrupts = <0x27 0>;
                                 status = "disabled";
                         };
 
-                        tsc@40048000 {
+                        tsc: tsc@40048000 {
                                 compatible = "nxp,lpc3220-tsc";
                                 reg = <0x40048000 0x1000>;
                                 interrupts = <0x27 0>;
                                 status = "disabled";
                         };
 
-                        key@40050000 {
+                        timer1: timer@4004C000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x4004C000 0x1000>;
+                                interrupts = <0x11 0>;
+                        };
+
+                        key: key@40050000 {
                                 compatible = "nxp,lpc3220-key";
                                 reg = <0x40050000 0x1000>;
                                 interrupts = <54 0>;
                                 status = "disabled";
                         };
 
-                        pwm: pwm@4005C000 {
+                        timer2: timer@40058000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x40058000 0x1000>;
+                                interrupts = <0x12 0>;
+                                status = "disabled";
+                        };
+
+                        pwm1: pwm@4005C000 {
                                 compatible = "nxp,lpc3220-pwm";
-                                reg = <0x4005C000 0x8>;
+                                reg = <0x4005C000 0x4>;
+                                status = "disabled";
+                        };
+
+                        pwm2: pwm@4005C004 {
+                                compatible = "nxp,lpc3220-pwm";
+                                reg = <0x4005C004 0x4>;
+                                status = "disabled";
+                        };
+
+                        timer3: timer@40060000 {
+                                compatible = "nxp,lpc3220-timer";
+                                reg = <0x40060000 0x1000>;
+                                interrupts = <0x13 0>;
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
index 5f500c1ad89c..5cfadb06c8df 100644
--- a/arch/arm/boot/dts/lpc4337-ciaa.dts
+++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
@@ -99,6 +99,14 @@
                 };
         };
 
+        i2c0_pins: i2c0-pins {
+                i2c0_pins_cfg {
+                        pins = "i2c0_scl", "i2c0_sda";
+                        function = "i2c0";
+                        input-enable;
+                };
+        };
+
         ssp_pins: ssp-pins {
                 ssp1_cs {
                         pins = "p6_7";
@@ -159,6 +167,28 @@
         clock-frequency = <50000000>;
 };
 
+&i2c0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins>;
+        clock-frequency = <400000>;
+
+        eeprom@50 {
+                compatible = "microchip,24c512";
+                reg = <0x50>;
+        };
+
+        eeprom@51 {
+                compatible = "microchip,24c02";
+                reg = <0x51>;
+        };
+
+        eeprom@54 {
+                compatible = "microchip,24c512";
+                reg = <0x54>;
+        };
+};
+
 &mac {
         status = "okay";
         phy-mode = "rmii";
@@ -166,6 +196,10 @@
         pinctrl-0 = <&enet_rmii_pins>;
 };
 
+&sct_pwm {
+        status = "okay";
+};
+
 &ssp1 {
         status = "okay";
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
index 391121d24daa..079d3cf8c00b 100644
--- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
+++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
@@ -467,6 +467,11 @@
         pinctrl-0 = <&i2c0_pins>;
         clock-frequency = <400000>;
 
+        mma7455@1d {
+                compatible = "fsl,mma7455";
+                reg = <0x1d>;
+        };
+
         lm75@48 {
                 compatible = "nxp,lm75";
                 reg = <0x48>;
diff --git a/arch/arm/boot/dts/lpc4357.dtsi b/arch/arm/boot/dts/lpc4357.dtsi
index fb9ecc754e8d..72f12db8d53a 100644
--- a/arch/arm/boot/dts/lpc4357.dtsi
+++ b/arch/arm/boot/dts/lpc4357.dtsi
@@ -37,3 +37,7 @@
                 };
         };
 };
+
+&eeprom {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index 0521e6864cb7..940875316d0f 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -320,6 +320,10 @@
         status = "okay";
 };
 
+&sata {
+        status = "okay";
+};
+
 &uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index fbb89d13401e..75ecaed32ae5 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -105,6 +105,15 @@
                         bitclock-master;
                 };
         };
+
+        panel: panel {
+                compatible = "nec,nl4827hc19-05b";
+        };
+};
+
+&dcu {
+        fsl,panel = <&panel>;
+        status = "okay";
 };
 
 &dspi1 {
@@ -212,6 +221,10 @@
         status = "okay";
 };
 
+&sata {
+        status = "okay";
+};
+
 &uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9430a9928199..2c84ca236473 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -143,6 +143,17 @@
                         status = "disabled";
                 };
 
+                sata: sata@3200000 {
+                        compatible = "fsl,ls1021a-ahci";
+                        reg = <0x0 0x3200000 0x0 0x10000>,
+                              <0x0 0x20220520 0x0 0x4>;
+                        reg-names = "ahci", "sata-ecc";
+                        interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&platform_clk 1>;
+                        dma-coherent;
+                        status = "disabled";
+                };
+
                 scfg: scfg@1570000 {
                         compatible = "fsl,ls1021a-scfg", "syscon";
                         reg = <0x0 0x1570000 0x0 0x10000>;
@@ -428,6 +439,16 @@
                                  <&platform_clk 1>;
                 };
 
+                dcu: dcu@2ce0000 {
+                        compatible = "fsl,ls1021a-dcu";
+                        reg = <0x0 0x2ce0000 0x0 0x10000>;
+                        interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&platform_clk 0>;
+                        clock-names = "dcu";
+                        big-endian;
+                        status = "disabled";
+                };
+
                 mdio0: mdio@2d24000 {
                         compatible = "gianfar";
                         device_type = "mdio";
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index a8e2911b2cbe..e50f1a1fdbc7 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -46,6 +46,7 @@
 
 /dts-v1/;
 #include "meson8b.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
         model = "Hardkernel ODROID-C1";
@@ -58,6 +59,16 @@
         memory {
                 reg = <0x40000000 0x40000000>;
         };
+
+        leds {
+                compatible = "gpio-leds";
+                blue {
+                        label = "c1:blue:alive";
+                        gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+        };
 };
 
 &uart_AO {
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index ee352bf687ff..8bad5571af46 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -105,6 +105,12 @@
                         #interrupt-cells = <3>;
                 };
 
+                wdt: watchdog@c1109900 {
+                        compatible = "amlogic,meson8b-wdt";
+                        reg = <0xc1109900 0x8>;
+                        interrupts = <0 0 1>;
+                };
+
                 timer@c1109940 {
                         compatible = "amlogic,meson6-timer";
                         reg = <0xc1109940 0x18>;
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
new file mode 100644
index 000000000000..082ca8807c62
--- /dev/null
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Erin Lo <erin.lo@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+#include "mt2701.dtsi"
+
+/ {
+        model = "MediaTek MT2701 evaluation board";
+        compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
+
+        memory {
+                reg = <0 0x80000000 0 0x40000000>;
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
new file mode 100644
index 000000000000..3766904b60f3
--- /dev/null
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Erin.Lo <erin.lo@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton64.dtsi"
+
+/ {
+        compatible = "mediatek,mt2701";
+        interrupt-parent = <&sysirq>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x0>;
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x1>;
+                };
+                cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x2>;
+                };
+                cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x3>;
+                };
+        };
+
+        system_clk: dummy13m {
+                compatible = "fixed-clock";
+                clock-frequency = <13000000>;
+                #clock-cells = <0>;
+        };
+
+        rtc_clk: dummy32k {
+                compatible = "fixed-clock";
+                clock-frequency = <32000>;
+                #clock-cells = <0>;
+        };
+
+        uart_clk: dummy26m {
+                compatible = "fixed-clock";
+                clock-frequency = <26000000>;
+                #clock-cells = <0>;
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupt-parent = <&gic>;
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        watchdog: watchdog@10007000 {
+                compatible = "mediatek,mt2701-wdt",
+                             "mediatek,mt6589-wdt";
+                reg = <0 0x10007000 0 0x100>;
+        };
+
+        timer: timer@10008000 {
+                compatible = "mediatek,mt2701-timer",
+                             "mediatek,mt6577-timer";
+                reg = <0 0x10008000 0 0x80>;
+                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&system_clk>, <&rtc_clk>;
+                clock-names = "system-clk", "rtc-clk";
+        };
+
+        sysirq: interrupt-controller@10200100 {
+                compatible = "mediatek,mt2701-sysirq",
+                             "mediatek,mt6577-sysirq";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                interrupt-parent = <&gic>;
+                reg = <0 0x10200100 0 0x1c>;
+        };
+
+        gic: interrupt-controller@10211000 {
+                compatible = "arm,cortex-a7-gic";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                interrupt-parent = <&gic>;
+                reg = <0 0x10211000 0 0x1000>,
+                      <0 0x10212000 0 0x1000>,
+                      <0 0x10214000 0 0x2000>,
+                      <0 0x10216000 0 0x2000>;
+        };
+
+        uart0: serial@11002000 {
+                compatible = "mediatek,mt2701-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11002000 0 0x400>;
+                interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart1: serial@11003000 {
+                compatible = "mediatek,mt2701-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11003000 0 0x400>;
+                interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart2: serial@11004000 {
+                compatible = "mediatek,mt2701-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11004000 0 0x400>;
+                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart3: serial@11005000 {
+                compatible = "mediatek,mt2701-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11005000 0 0x400>;
+                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+};
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index cb99b02d2ccc..1d7f92bdcb9c 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -15,7 +15,7 @@
 #include <dt-bindings/clock/mt8135-clk.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/reset-controller/mt8135-resets.h>
+#include <dt-bindings/reset/mt8135-resets.h>
 #include "skeleton64.dtsi"
 #include "mt8135-pinfunc.h"
 
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 73f1e3a8f62c..01e1e2d5c735 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -69,7 +69,7 @@
                         label = "user";
                         gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
                         linux,code = <0x114>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
         };
@@ -176,18 +176,18 @@
 &omap3_pmx_wkup {
         gpio1_pins: pinmux_gpio1_pins {
                 pinctrl-single,pins = <
-                        0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
+                        OMAP3_WKUP_IOPAD(0x2a0e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
                 >;
         };
 
         dss_dpi_pins2: pinmux_dss_dpi_pins1 {
                 pinctrl-single,pins = <
-                        0x0a (PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
-                        0x0c (PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
-                        0x10 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
-                        0x12 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
-                        0x14 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
-                        0x16 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
+                        OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
+                        OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
+                        OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
+                        OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
+                        OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
+                        OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
                 >;
         };
 };
@@ -200,8 +200,8 @@
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x16e (PIN_INPUT | MUX_MODE0)   /* uart3_rx_irrx.uart3_rx_irrx */
-                        0x170 (PIN_OUTPUT | MUX_MODE0)  /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
+                        OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)        /* uart3_rx_irrx.uart3_rx_irrx */
+                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
                 >;
         };
 
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 274c2c482aaa..8ba465d57635 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -80,7 +80,7 @@
                         label = "user";
                         gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                         linux,code = <0x114>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
         };
@@ -171,7 +171,7 @@
 &omap3_pmx_wkup {
         gpio1_pins: pinmux_gpio1_pins {
                 pinctrl-single,pins = <
-                        0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
+                        OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
                 >;
         };
 };
@@ -195,47 +195,47 @@
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
-                        0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
+                        OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
+                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
                 >;
         };
 
         tfp410_pins: pinmux_tfp410_pins {
                 pinctrl-single,pins = <
-                        0x196 (PIN_OUTPUT | MUX_MODE4)  /* hdq_sio.gpio_170 */
+                        OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)       /* hdq_sio.gpio_170 */
                 >;
         };
 
         dss_dpi_pins: pinmux_dss_dpi_pins {
                 pinctrl-single,pins = <
-                        0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
-                        0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
-                        0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
-                        0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
-                        0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
-                        0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
-                        0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
-                        0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
-                        0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
-                        0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
-                        0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
-                        0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
-                        0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
-                        0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
-                        0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
-                        0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
-                        0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
-                        0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
-                        0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
-                        0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
-                        0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
-                        0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
-                        0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
-                        0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
-                        0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
-                        0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
-                        0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
-                        0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
+                        OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+                        OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+                        OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+                        OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+                        OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
+                        OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
+                        OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
+                        OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
+                        OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
+                        OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
+                        OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+                        OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+                        OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+                        OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+                        OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+                        OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+                        OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+                        OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+                        OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+                        OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+                        OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+                        OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+                        OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
+                        OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
+                        OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
+                        OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
+                        OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
+                        OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index 8c813e77b17f..e5f7f5c92c1a 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -238,7 +238,7 @@
                 ti,debounce-tol = /bits/ 16 <10>;
                 ti,debounce-rep = /bits/ 16 <1>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
 
diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
index 9ca2865a83d6..86850bb311eb 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
@@ -64,7 +64,7 @@
                         label = "user";
                         gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
                         linux,code = <BTN_EXTRA>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
diff --git a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
index 4813e96157b3..738910db5c0c 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
@@ -68,6 +68,6 @@
                 ti,keep-vref-on = <1>;
                 ti,settle-delay-usec = /bits/ 16 <150>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
index bb339d1648e0..ac188657a95d 100644
--- a/arch/arm/boot/dts/omap3-evm-37xx.dts
+++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -66,48 +66,48 @@
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
-                        0x116 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_cmd.sdmmc1_cmd */
-                        0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat0.sdmmc1_dat0 */
-                        0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
-                        0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
-                        0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
-                        0x120 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat4.sdmmc1_dat4 */
-                        0x122 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat5.sdmmc1_dat5 */
-                        0x124 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat6.sdmmc1_dat6 */
-                        0x126 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat7.sdmmc1_dat7 */
+                        OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* sdmmc1_clk.sdmmc1_clk */
+                        OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
+                        OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0.sdmmc1_dat0 */
+                        OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat1.sdmmc1_dat1 */
+                        OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat2.sdmmc1_dat2 */
+                        OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat3.sdmmc1_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat4.sdmmc1_dat4 */
+                        OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat5.sdmmc1_dat5 */
+                        OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat6.sdmmc1_dat6 */
+                        OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat7.sdmmc1_dat7 */
                 >;
         };
 
         /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
-                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
-                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
-                        0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
-                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
-                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc2_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
+                        OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
+                        OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
+                        OMAP3_CORE1_IOPAD(0x215e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
+                        OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
+                        OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
-                        0x170 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx_irtx.uart3_tx_irtx */
+                        OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
+                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx_irtx.uart3_tx_irtx */
                 >;
         };
 
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0x150 (PIN_OUTPUT | MUX_MODE4)          /* uart1_cts.gpio_150 */
-                        0x14e (PIN_INPUT | MUX_MODE4)           /* uart1_rts.gpio_149 */
+                        OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4)               /* uart1_cts.gpio_150 */
+                        OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4)                /* uart1_rts.gpio_149 */
                 >;
         };
 
         smsc911x_pins: pinmux_smsc911x_pins {
                 pinctrl-single,pins = <
-                        0x1a2 (PIN_INPUT | MUX_MODE4)           /* mcspi1_cs2.gpio_176 */
+                        OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4)                /* mcspi1_cs2.gpio_176 */
                 >;
         };
 };
@@ -115,12 +115,12 @@
 &omap3_pmx_wkup {
         dss_dpi_pins2: pinmux_dss_dpi_pins1 {
                 pinctrl-single,pins = <
-                        0x0a (PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
-                        0x0c (PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
-                        0x10 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
-                        0x12 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
-                        0x14 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
-                        0x16 (PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
+                        OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
+                        OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
+                        OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
+                        OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
+                        OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
+                        OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index e14d15e5abc8..5e2d6433d939 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -37,7 +37,7 @@
                         label = "aux";
                         linux,code = <169>;
                         gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 3835e1569c29..33d6b4ead092 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -15,25 +15,17 @@
         model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
         compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
 
-        /* Regulator to trigger the WIFI_PDN signal of the Wifi module */
-        lbee1usjyc_pdn: lbee1usjyc_pdn {
+        vmmcsdio_fixed: fixedregulator-mmcsdio {
                 compatible = "regulator-fixed";
-                regulator-name = "regulator-lbee1usjyc-pdn";
+                regulator-name = "vmmcsdio_fixed";
                 regulator-min-microvolt = <3300000>;
                 regulator-max-microvolt = <3300000>;
-                gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;    /* gpio_138 - WIFI_PDN */
-                startup-delay-us = <10000>;
-                enable-active-high;
         };
 
-        /* Regulator to trigger the RESET_N_W signal of the Wifi module */
-        lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w {
-                compatible = "regulator-fixed";
-                regulator-name = "regulator-lbee1usjyc-reset-n-w";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;    /* gpio_139 - RESET_N_W */
-                enable-active-high;
+        mmc2_pwrseq: mmc2_pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,      /* gpio_139 - RESET_N_W */
+                              <&gpio5 10 GPIO_ACTIVE_LOW>;      /* gpio_138 - WIFI_PDN */
         };
 };
 
@@ -51,8 +43,8 @@
 &mmc2 {
         pinctrl-names = "default";
         pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
-        vmmc-supply = <&lbee1usjyc_pdn>;
-        vmmc_aux-supply = <&lbee1usjyc_reset_n_w>;
+        vmmc-supply = <&vmmcsdio_fixed>;
+        mmc-pwrseq = <&mmc2_pwrseq>;
         bus-width = <4>;
         non-removable;
 };
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 468608dab30a..55b0cc4f5ee5 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -15,25 +15,17 @@
         model = "IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)";
         compatible = "isee,omap3-igep0030", "ti,omap36xx", "ti,omap3";
 
-        /* Regulator to trigger the WIFI_PDN signal of the Wifi module */
-        lbee1usjyc_pdn: lbee1usjyc_pdn {
+        vmmcsdio_fixed: fixedregulator-mmcsdio {
                 compatible = "regulator-fixed";
-                regulator-name = "regulator-lbee1usjyc-pdn";
+                regulator-name = "vmmcsdio_fixed";
                 regulator-min-microvolt = <3300000>;
                 regulator-max-microvolt = <3300000>;
-                gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;    /* gpio_138 - WIFI_PDN */
-                startup-delay-us = <10000>;
-                enable-active-high;
         };
 
-        /* Regulator to trigger the RESET_N_W signal of the Wifi module */
-        lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w {
-                compatible = "regulator-fixed";
-                regulator-name = "regulator-lbee1usjyc-reset-n-w";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;    /* gpio_139 - RESET_N_W */
-                enable-active-high;
+        mmc2_pwrseq: mmc2_pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,      /* gpio_139 - RESET_N_W */
+                              <&gpio5 10 GPIO_ACTIVE_LOW>;      /* gpio_138 - WIFI_PDN */
         };
 };
 
@@ -62,8 +54,8 @@
 &mmc2 {
         pinctrl-names = "default";
         pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
-        vmmc-supply = <&lbee1usjyc_pdn>;
-        vmmc_aux-supply = <&lbee1usjyc_reset_n_w>;
+        vmmc-supply = <&vmmcsdio_fixed>;
+        mmc-pwrseq = <&mmc2_pwrseq>;
         bus-width = <4>;
         non-removable;
 };
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index d2fab8c0d4f8..540163025dd3 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -35,63 +35,63 @@
                         label = "enter";
                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* gpio101 */
                         linux,code = <KEY_ENTER>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_f1 {
                         label = "f1";
                         gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* gpio102 */
                         linux,code = <KEY_F1>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_f2 {
                         label = "f2";
                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; /* gpio103 */
                         linux,code = <KEY_F2>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_f3 {
                         label = "f3";
                         gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; /* gpio104 */
                         linux,code = <KEY_F3>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_f4 {
                         label = "f4";
                         gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; /* gpio105 */
                         linux,code = <KEY_F4>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_left {
                         label = "left";
                         gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
                         linux,code = <KEY_LEFT>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_right {
                         label = "right";
                         gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* gpio107 */
                         linux,code = <KEY_RIGHT>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_up {
                         label = "up";
                         gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* gpio108 */
                         linux,code = <KEY_UP>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 key_down {
                         label = "down";
                         gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; /* gpio109 */
                         linux,code = <KEY_DOWN>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
@@ -224,32 +224,32 @@
 &omap3_pmx_core {
         gpio_key_pins: pinmux_gpio_key_pins {
                 pinctrl-single,pins = <
-                        0xea (PIN_INPUT | MUX_MODE4)    /* cam_d2.gpio_101 */
-                        0xec (PIN_INPUT | MUX_MODE4)    /* cam_d3.gpio_102 */
-                        0xee (PIN_INPUT | MUX_MODE4)    /* cam_d4.gpio_103 */
-                        0xf0 (PIN_INPUT | MUX_MODE4)    /* cam_d5.gpio_104 */
-                        0xf2 (PIN_INPUT | MUX_MODE4)    /* cam_d6.gpio_105 */
-                        0xf4 (PIN_INPUT | MUX_MODE4)    /* cam_d7.gpio_106 */
-                        0xf6 (PIN_INPUT | MUX_MODE4)    /* cam_d8.gpio_107 */
-                        0xf8 (PIN_INPUT | MUX_MODE4)    /* cam_d9.gpio_108 */
-                        0xfa (PIN_INPUT | MUX_MODE4)    /* cam_d10.gpio_109 */
+                        OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4)        /* cam_d2.gpio_101 */
+                        OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4)        /* cam_d3.gpio_102 */
+                        OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4)        /* cam_d4.gpio_103 */
+                        OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4)        /* cam_d5.gpio_104 */
+                        OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4)        /* cam_d6.gpio_105 */
+                        OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4)        /* cam_d7.gpio_106 */
+                        OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4)        /* cam_d8.gpio_107 */
+                        OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4)        /* cam_d9.gpio_108 */
+                        OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4)        /* cam_d10.gpio_109 */
                 >;
         };
 
         musb_pins: pinmux_musb_pins {
                 pinctrl-single,pins = <
-                        0x172 (PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
-                        0x17a (PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
-                        0x17c (PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
-                        0x17e (PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
-                        0x180 (PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
-                        0x182 (PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
-                        0x184 (PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
-                        0x186 (PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
-                        0x188 (PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
-                        0x176 (PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
-                        0x178 (PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
-                        0x174 (PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
+                        OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk.hsusb0_clk */
+                        OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0.hsusb0_data0 */
+                        OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1.hsusb0_data1 */
+                        OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2.hsusb0_data2 */
+                        OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3.hsusb0_data3 */
+                        OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4.hsusb0_data4 */
+                        OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5.hsusb0_data5 */
+                        OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6.hsusb0_data6 */
+                        OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
+                        OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir.hsusb0_dir */
+                        OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt.hsusb0_nxt */
+                        OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp.hsusb0_stp */
                 >;
         };
 
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index 57d7c93cc72b..93f8dfe20f13 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -327,7 +327,7 @@
                 ti,pressure-max = /bits/ 16 <255>;
                 ti,swap-xy;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
 
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 5f5e0f3d5b64..74d8f7eb5563 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -67,28 +67,28 @@
                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
                         linux,input-type = <5>; /* EV_SW */
                         linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 camera_focus {
                         label = "Camera Focus";
                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
                         linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 camera_capture {
                         label = "Camera Capture";
                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
                         linux,code = <0xd4>; /* KEY_CAMERA */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 lock_button {
                         label = "Lock Button";
                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
                         linux,code = <0x98>; /* KEY_SCREENLOCK */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 keypad_slide {
@@ -96,7 +96,7 @@
                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
                         linux,input-type = <5>; /* EV_SW */
                         linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 proximity_sensor {
@@ -149,15 +149,15 @@
 
         uart2_pins: pinmux_uart2_pins {
                 pinctrl-single,pins = <
-                        0x14a (PIN_INPUT | MUX_MODE0)           /* uart2_rx */
-                        0x148 (PIN_OUTPUT | MUX_MODE0)          /* uart2_tx */
+                        OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
+                        OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x16e (PIN_INPUT | MUX_MODE0)           /* uart3_rx */
-                        0x170 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx */
+                        OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
+                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
                 >;
         };
 
@@ -198,22 +198,22 @@
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x18a (PIN_INPUT | MUX_MODE0)           /* i2c1_scl */
-                        0x18c (PIN_INPUT | MUX_MODE0)           /* i2c1_sda */
+                        OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
+                        OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
                 >;
         };
 
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
-                        0x18e (PIN_INPUT | MUX_MODE0)           /* i2c2_scl */
-                        0x190 (PIN_INPUT | MUX_MODE0)           /* i2c2_sda */
+                        OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
+                        OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
                 >;
         };
 
         i2c3_pins: pinmux_i2c3_pins {
                 pinctrl-single,pins = <
-                        0x192 (PIN_INPUT | MUX_MODE0)           /* i2c3_scl */
-                        0x194 (PIN_INPUT | MUX_MODE0)           /* i2c3_sda */
+                        OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
+                        OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
                 >;
         };
 
@@ -225,85 +225,85 @@
 
         mcspi4_pins: pinmux_mcspi4_pins {
                 pinctrl-single,pins = <
-                        0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
-                        0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
-                        0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
-                        0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
+                        OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
+                        OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
+                        OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
+                        OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
                 >;
         };
 
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x114 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_clk */
-                        0x116 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_cmd */
-                        0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat0 */
-                        0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1 */
-                        0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2 */
-                        0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
+                        OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
+                        OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
+                        OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
+                        OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
+                        OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
                 >;
         };
 
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk */
-                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd */
-                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0 */
-                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1 */
-                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2 */
-                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3 */
-                        0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat4 */
-                        0x136 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat5 */
-                        0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat6 */
-                        0x13a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat7 */
+                        OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
+                        OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
+                        OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
+                        OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
+                        OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
+                        OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
+                        OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
+                        OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
+                        OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
                 >;
         };
 
         acx565akm_pins: pinmux_acx565akm_pins {
                 pinctrl-single,pins = <
-                        0x0d4 (PIN_OUTPUT | MUX_MODE4)          /* RX51_LCD_RESET_GPIO */
+                        OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
                 >;
         };
 
         dss_sdi_pins: pinmux_dss_sdi_pins {
                 pinctrl-single,pins = <
-                        0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
-                        0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
-                        0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
-                        0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
+                        OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
+                        OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
+                        OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
+                        OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 
-                        0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
-                        0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
+                        OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
+                        OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
                 >;
         };
 
         wl1251_pins: pinmux_wl1251 {
                 pinctrl-single,pins = <
-                        0x0ce (PIN_OUTPUT | MUX_MODE4)          /* gpio 87 => wl1251 enable */
-                        0x05a (PIN_INPUT | MUX_MODE4)           /* gpio 42 => wl1251 irq */
+                        OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
+                        OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
                 >;
         };
 
         ssi_pins: pinmux_ssi {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT_PULLUP | MUX_MODE1)    /* ssi1_rdy_tx */
-                        0x14e (PIN_OUTPUT | MUX_MODE1)          /* ssi1_flag_tx */
-                        0x152 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
-                        0x14c (PIN_OUTPUT | MUX_MODE1)          /* ssi1_dat_tx */
-                        0x154 (PIN_INPUT | MUX_MODE1)           /* ssi1_dat_rx */
-                        0x156 (PIN_INPUT | MUX_MODE1)           /* ssi1_flag_rx */
-                        0x158 (PIN_OUTPUT | MUX_MODE1)          /* ssi1_rdy_rx */
-                        0x15a (PIN_OUTPUT | MUX_MODE1)          /* ssi1_wake */
+                        OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
+                        OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
+                        OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
+                        OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
+                        OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
+                        OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
+                        OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
+                        OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
                 >;
         };
 
         modem_pins: pinmux_modem {
                 pinctrl-single,pins = <
-                        0x0ac (PIN_OUTPUT | MUX_MODE4)          /* gpio 70 => cmt_apeslpx */
-                        0x0b0 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
-                        0x0b2 (PIN_OUTPUT | MUX_MODE4)          /* gpio 73 => cmt_rst_rq */
-                        0x0b4 (PIN_OUTPUT | MUX_MODE4)          /* gpio 74 => cmt_en */
-                        0x0b6 (PIN_OUTPUT | MUX_MODE4)          /* gpio 75 => cmt_rst */
-                        0x15e (PIN_OUTPUT | MUX_MODE4)          /* gpio 157 => cmt_bsi */
+                        OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
+                        OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
+                        OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
+                        OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
+                        OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
+                        OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index e9ee1df0e467..a2c2b8d8dd2c 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -36,12 +36,12 @@
 &omap3_pmx_core {
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
-                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
-                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
-                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
-                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
-                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
+                        OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
+                        OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
+                        OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
+                        OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
+                        OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi b/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
index 7aae8fb82c1f..3b3a75997f81 100644
--- a/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
@@ -48,7 +48,7 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;            /* gpio_10 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi b/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
index 17b82f82638a..7df27926ead2 100644
--- a/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
@@ -41,13 +41,13 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;            /* gpio_23 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
                 button1@14 {
                         label = "button1";
                         linux,code = <BTN_1>;
                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;            /* gpio_14 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
index b09cedf66117..6314da2580f5 100644
--- a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
@@ -161,6 +161,6 @@
                 ti,x-plate-ohms = /bits/ 16 <180>;
                 ti,pressure-max = /bits/ 16 <255>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
index 5f979590571b..7e3fe85a8ad9 100644
--- a/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
@@ -172,7 +172,7 @@
                 ti,x-plate-ohms = /bits/ 16 <180>;
                 ti,pressure-max = /bits/ 16 <255>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
 
diff --git a/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi b/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
index 49d2254a99b0..250cc7fe5d5e 100644
--- a/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
@@ -41,13 +41,13 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;            /* gpio_23 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
                 button1@14 {
                         label = "button1";
                         linux,code = <BTN_1>;
                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;            /* gpio_14 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi b/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
index 680d7262399c..8df7ec35d17d 100644
--- a/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
@@ -41,13 +41,13 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;            /* gpio_23 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
                 button1@14 {
                         label = "button1";
                         linux,code = <BTN_1>;
                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;            /* gpio_14 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi b/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
index 087aedf5b902..0ea2c451c809 100644
--- a/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
@@ -41,13 +41,13 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;            /* gpio_23 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
                 button1@14 {
                         label = "button1";
                         linux,code = <BTN_1>;
                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;            /* gpio_14 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
index cfe140c657e7..13e9d1f987af 100644
--- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
+++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
@@ -84,112 +84,112 @@
                         label = "up";
                         linux,code = <KEY_UP>;
                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;    /* GPIO_110 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 down-button {
                         label = "down";
                         linux,code = <KEY_DOWN>;
                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;     /* GPIO_103 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 left-button {
                         label = "left";
                         linux,code = <KEY_LEFT>;
                         gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;     /* GPIO_96 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 right-button {
                         label = "right";
                         linux,code = <KEY_RIGHT>;
                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;     /* GPIO_98 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 pageup-button {
                         label = "game 1";
                         linux,code = <KEY_PAGEUP>;
                         gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;    /* GPIO_109 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 pagedown-button {
                         label = "game 3";
                         linux,code = <KEY_PAGEDOWN>;
                         gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;    /* GPIO_106 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 home-button {
                         label = "game 4";
                         linux,code = <KEY_HOME>;
                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;     /* GPIO_101 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 end-button {
                         label = "game 2";
                         linux,code = <KEY_END>;
                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;    /* GPIO_111 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 right-shift {
                         label = "l";
                         linux,code = <KEY_RIGHTSHIFT>;
                         gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;     /* GPIO_102 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 kp-plus {
                         label = "l2";
                         linux,code = <KEY_KPPLUS>;
                         gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;     /* GPIO_97 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 right-ctrl {
                         label = "r";
                         linux,code = <KEY_RIGHTCTRL>;
                         gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;     /* GPIO_105 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 kp-minus {
                         label = "r2";
                         linux,code = <KEY_KPMINUS>;
                         gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;    /* GPIO_107 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 left-ctrl {
                         label = "ctrl";
                         linux,code = <KEY_LEFTCTRL>;
                         gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;     /* GPIO_104 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 menu {
                         label = "menu";
                         linux,code = <KEY_MENU>;
                         gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;     /* GPIO_99 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 hold {
                         label = "hold";
                         linux,code = <KEY_COFFEE>;
                         gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;    /* GPIO_176 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 left-alt {
                         label = "alt";
                         linux,code = <KEY_LEFTALT>;
                         gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;    /* GPIO_100 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 lid {
@@ -617,7 +617,7 @@
                 ti,x-plate-ohms = /bits/ 16 <40>;
                 ti,pressure-max = /bits/ 16 <255>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 
         lcd: lcd@1 {
diff --git a/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi b/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi
index f4b1a61853e3..157345bb8e79 100644
--- a/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi
+++ b/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi
@@ -66,6 +66,6 @@
                 ti,x-plate-ohms = /bits/ 16 <40>;
                 ti,pressure-max = /bits/ 16 <255>;
                 ti,swap-xy;
-                linux,wakeup;
+                wakeup-source;
         };
 };
diff --git a/arch/arm/boot/dts/omap3-zoom3.dts b/arch/arm/boot/dts/omap3-zoom3.dts
index 7bc5fdd6981e..f19170bdcc1f 100644
--- a/arch/arm/boot/dts/omap3-zoom3.dts
+++ b/arch/arm/boot/dts/omap3-zoom3.dts
@@ -54,27 +54,27 @@
         /* REVISIT: twl gpio0 is mmc0_cd */
         mmc1_pins: pinmux_mmc1_pins {
                 pinctrl-single,pins = <
-                        0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
-                        0x116 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
-                        0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat0.sdmmc1_dat0 */
-                        0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
-                        0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
-                        0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* sdmmc1_clk.sdmmc1_clk */
+                        OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* sdmmc1_cmd.sdmmc1_cmd */
+                        OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
+                        OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
+                        OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
+                        OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
                 >;
         };
 
         mmc2_pins: pinmux_mmc2_pins {
                 pinctrl-single,pins = <
-                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
-                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
-                        0x12c (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat0.sdmmc2_dat0 */
-                        0x12e (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat1.sdmmc2_dat1 */
-                        0x130 (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat2.sdmmc2_dat2 */
-                        0x132 (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat3.sdmmc2_dat3 */
-                        0x134 (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat4.sdmmc2_dat4 */
-                        0x136 (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat5.sdmmc2_dat5 */
-                        0x138 (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat6.sdmmc2_dat6 */
-                        0x13a (PIN_INPUT | MUX_MODE0)           /* sdmmc2_dat7.sdmmc2_dat7 */
+                        OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
+                        OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
+                        OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat0.sdmmc2_dat0 */
+                        OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat1.sdmmc2_dat1 */
+                        OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat2.sdmmc2_dat2 */
+                        OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat3.sdmmc2_dat3 */
+                        OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat4.sdmmc2_dat4 */
+                        OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat5.sdmmc2_dat5 */
+                        OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat6.sdmmc2_dat6 */
+                        OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)                /* sdmmc2_dat7.sdmmc2_dat7 */
                 >;
         };
 
@@ -87,35 +87,35 @@
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x150 (PIN_INPUT | MUX_MODE0)           /* uart1_cts.uart1_cts */
-                        0x14e (PIN_OUTPUT | MUX_MODE0)          /* uart1_rts.uart1_rts */
-                        0x152 (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
-                        0x14c (PIN_OUTPUT | MUX_MODE0)          /* uart1_tx.uart1_tx */
+                        OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)                /* uart1_cts.uart1_cts */
+                        OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)               /* uart1_rts.uart1_rts */
+                        OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
+                        OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)               /* uart1_tx.uart1_tx */
                 >;
         };
 
         uart2_pins: pinmux_uart2_pins {
                 pinctrl-single,pins = <
-                        0x144 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart2_cts.uart2_cts */
-                        0x146 (PIN_OUTPUT | MUX_MODE0)          /* uart2_rts.uart2_rts */
-                        0x14a (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
-                        0x148 (PIN_OUTPUT | MUX_MODE0)          /* uart2_tx.uart2_tx */
+                        OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
+                        OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts.uart2_rts */
+                        OMAP3_CORE1_IOPAD(0x217a, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
+                        OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx.uart2_tx */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x16a (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* uart3_cts_rctx.uart3_cts_rctx */
-                        0x16c (PIN_OUTPUT | MUX_MODE0)          /* uart3_rts_sd.uart3_rts_sd */
-                        0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
-                        0x170 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx_irtx.uart3_tx_irtx */
+                        OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* uart3_cts_rctx.uart3_cts_rctx */
+                        OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0)               /* uart3_rts_sd.uart3_rts_sd */
+                        OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
+                        OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx_irtx.uart3_tx_irtx */
                 >;
         };
 
         /* wl12xx GPIO output for WLAN_EN */
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0xea (PIN_OUTPUT| MUX_MODE4)            /* cam_d2.gpio_101 */
+                        OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT| MUX_MODE4)                /* cam_d2.gpio_101 */
                 >;
         };
 };
@@ -135,7 +135,7 @@
 &omap3_pmx_wkup {
         wlan_host_wkup: pinmux_wlan_host_wkup_pins {
                 pinctrl-single,pins = <
-                        0x1a (PIN_INPUT_PULLUP | MUX_MODE4)     /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
+                        OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT_PULLUP | MUX_MODE4)  /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 8a2b25332b8c..d1ffabb7c74f 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -717,6 +717,8 @@
                         ti,hwmods = "gpmc";
                         reg = <0x6e000000 0x02d0>;
                         interrupts = <20>;
+                        dmas = <&sdma 4>;
+                        dma-names = "rxtx";
                         gpmc,num-cs = <8>;
                         gpmc,num-waitpins = <4>;
                         #address-cells = <2>;
diff --git a/arch/arm/boot/dts/omap4-duovero-parlor.dts b/arch/arm/boot/dts/omap4-duovero-parlor.dts
index b75f7b2b7c4a..06c54822ddc2 100644
--- a/arch/arm/boot/dts/omap4-duovero-parlor.dts
+++ b/arch/arm/boot/dts/omap4-duovero-parlor.dts
@@ -36,7 +36,7 @@
                         label = "button0";
                         linux,code = <BTN_0>;
                         gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;    /* gpio_121 */
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
index 133f1b74e8ae..78d363177762 100644
--- a/arch/arm/boot/dts/omap4-panda-a4.dts
+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
@@ -13,8 +13,8 @@
 /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
 &dss_hdmi_pins {
         pinctrl-single,pins = <
-                0x5a (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_cec.hdmi_cec */
-                0x5c (PIN_INPUT | MUX_MODE0)            /* hdmi_scl.hdmi_scl */
-                0x5e (PIN_INPUT | MUX_MODE0)            /* hdmi_sda.hdmi_sda */
+                OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)               /* hdmi_scl.hdmi_scl */
+                OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)               /* hdmi_sda.hdmi_sda */
                 >;
 };
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 18d096696fc0..df2e356ec089 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -199,129 +199,129 @@
 
         twl6040_pins: pinmux_twl6040_pins {
                 pinctrl-single,pins = <
-                        0xe0 (PIN_OUTPUT | MUX_MODE3)   /* hdq_sio.gpio_127 */
-                        0x160 (PIN_INPUT | MUX_MODE0)   /* sys_nirq2.sys_nirq2 */
+                        OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3)      /* hdq_sio.gpio_127 */
+                        OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)       /* sys_nirq2.sys_nirq2 */
                 >;
         };
 
         mcpdm_pins: pinmux_mcpdm_pins {
                 pinctrl-single,pins = <
-                        0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_ul_data.abe_pdm_ul_data */
-                        0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_dl_data.abe_pdm_dl_data */
-                        0xca (PIN_INPUT_PULLUP   | MUX_MODE0)   /* abe_pdm_frame.abe_pdm_frame */
-                        0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_lb_clk.abe_pdm_lb_clk */
-                        0xce (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_clks.abe_clks */
+                        OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_ul_data.abe_pdm_ul_data */
+                        OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_dl_data.abe_pdm_dl_data */
+                        OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP   | MUX_MODE0)      /* abe_pdm_frame.abe_pdm_frame */
+                        OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_lb_clk.abe_pdm_lb_clk */
+                        OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_clks.abe_clks */
                 >;
         };
 
         mcbsp1_pins: pinmux_mcbsp1_pins {
                 pinctrl-single,pins = <
-                        0xbe (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
-                        0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_mcbsp1_dr.abe_mcbsp1_dr */
-                        0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* abe_mcbsp1_dx.abe_mcbsp1_dx */
-                        0xc4 (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
+                        OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
+                        OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_mcbsp1_dr.abe_mcbsp1_dr */
+                        OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0)     /* abe_mcbsp1_dx.abe_mcbsp1_dx */
+                        OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
                 >;
         };
 
         dss_dpi_pins: pinmux_dss_dpi_pins {
                 pinctrl-single,pins = <
-                        0x122 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data23 */
-                        0x124 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data22 */
-                        0x126 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data21 */
-                        0x128 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data20 */
-                        0x12a (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data19 */
-                        0x12c (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data18 */
-                        0x12e (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data15 */
-                        0x130 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data14 */
-                        0x132 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data13 */
-                        0x134 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data12 */
-                        0x136 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data11 */
-
-                        0x174 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data10 */
-                        0x176 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data9 */
-                        0x178 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data16 */
-                        0x17a (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data17 */
-                        0x17c (PIN_OUTPUT | MUX_MODE5)  /* dispc2_hsync */
-                        0x17e (PIN_OUTPUT | MUX_MODE5)  /* dispc2_pclk */
-                        0x180 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_vsync */
-                        0x182 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_de */
-                        0x184 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data8 */
-                        0x186 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data7 */
-                        0x188 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data6 */
-                        0x18a (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data5 */
-                        0x18c (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data4 */
-                        0x18e (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data3 */
-
-                        0x190 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data2 */
-                        0x192 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data1 */
-                        0x194 (PIN_OUTPUT | MUX_MODE5)  /* dispc2_data0 */
+                        OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data23 */
+                        OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data22 */
+                        OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data21 */
+                        OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data20 */
+                        OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data19 */
+                        OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data18 */
+                        OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data15 */
+                        OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data14 */
+                        OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data13 */
+                        OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data12 */
+                        OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data11 */
+
+                        OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data10 */
+                        OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data9 */
+                        OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data16 */
+                        OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data17 */
+                        OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5)      /* dispc2_hsync */
+                        OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5)      /* dispc2_pclk */
+                        OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5)      /* dispc2_vsync */
+                        OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5)      /* dispc2_de */
+                        OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data8 */
+                        OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data7 */
+                        OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data6 */
+                        OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data5 */
+                        OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data4 */
+                        OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data3 */
+
+                        OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data2 */
+                        OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data1 */
+                        OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5)      /* dispc2_data0 */
                 >;
         };
 
         tfp410_pins: pinmux_tfp410_pins {
                 pinctrl-single,pins = <
-                        0x144 (PIN_OUTPUT | MUX_MODE3)  /* gpio_0 */
+                        OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3)      /* gpio_0 */
                 >;
         };
 
         dss_hdmi_pins: pinmux_dss_hdmi_pins {
                 pinctrl-single,pins = <
-                        0x5a (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_cec.hdmi_cec */
-                        0x5c (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_scl.hdmi_scl */
-                        0x5e (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_sda.hdmi_sda */
+                        OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                        OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_scl.hdmi_scl */
+                        OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_sda.hdmi_sda */
                 >;
         };
 
         tpd12s015_pins: pinmux_tpd12s015_pins {
                 pinctrl-single,pins = <
-                        0x22 (PIN_OUTPUT | MUX_MODE3)           /* gpmc_a17.gpio_41 */
-                        0x48 (PIN_OUTPUT | MUX_MODE3)           /* gpmc_nbe1.gpio_60 */
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* hdmi_hpd.gpio_63 */
+                        OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3)              /* gpmc_a17.gpio_41 */
+                        OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)              /* gpmc_nbe1.gpio_60 */
+                        OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)      /* hdmi_hpd.gpio_63 */
                 >;
         };
 
         hsusbb1_pins: pinmux_hsusbb1_pins {
                 pinctrl-single,pins = <
-                        0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
-                        0x84 (PIN_OUTPUT | MUX_MODE4)           /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
-                        0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
-                        0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
-                        0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
-                        0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
-                        0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
-                        0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
-                        0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
-                        0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
-                        0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
-                        0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4)   /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
+                        OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
+                        OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4)              /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
+                        OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
+                        OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
+                        OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
+                        OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
+                        OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
+                        OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
+                        OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
+                        OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
+                        OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
+                        OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4)      /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0xe2 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c1_scl */
-                        0xe4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c1_sda */
+                        OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_scl */
+                        OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_sda */
                 >;
         };
 
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
-                        0xe6 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c2_scl */
-                        0xe8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c2_sda */
+                        OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c2_scl */
+                        OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c2_sda */
                 >;
         };
 
         i2c3_pins: pinmux_i2c3_pins {
                 pinctrl-single,pins = <
-                        0xea (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c3_scl */
-                        0xec (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c3_sda */
+                        OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c3_scl */
+                        OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c3_sda */
                 >;
         };
 
         i2c4_pins: pinmux_i2c4_pins {
                 pinctrl-single,pins = <
-                        0xee (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_scl */
-                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_sda */
+                        OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c4_scl */
+                        OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c4_sda */
                 >;
         };
 
@@ -331,24 +331,24 @@
          */
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0x26 (PIN_OUTPUT | MUX_MODE3)           /* gpmc_a19.gpio_43 */
-                        0x2c (PIN_OUTPUT | MUX_MODE3)           /* gpmc_a22.gpio_46 */
-                        0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_a24.gpio_48 */
-                        0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_a25.gpio_49 */
+                        OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)              /* gpmc_a19.gpio_43 */
+                        OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)              /* gpmc_a22.gpio_46 */
+                        OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3)       /* gpmc_a24.gpio_48 */
+                        OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3)       /* gpmc_a25.gpio_49 */
                 >;
         };
 
         /* wl12xx GPIO inputs and SDIO pins */
         wl12xx_pins: pinmux_wl12xx_pins {
                 pinctrl-single,pins = <
-                        0x38 (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs2.gpio_52 */
-                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
-                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
-                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
-                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat2.sdmmc5_dat2 */
-                        0x112 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat3.sdmmc5_dat3 */
+                        OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)               /* gpmc_ncs2.gpio_52 */
+                        OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)               /* gpmc_ncs3.gpio_53 */
+                        OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_clk.sdmmc5_clk */
+                        OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_cmd.sdmmc5_cmd */
+                        OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat0.sdmmc5_dat0 */
+                        OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat1.sdmmc5_dat1 */
+                        OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat2.sdmmc5_dat2 */
+                        OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat3.sdmmc5_dat3 */
                 >;
         };
 };
@@ -356,8 +356,8 @@
 &omap4_pmx_wkup {
         led_wkgpio_pins: pinmux_leds_wkpins {
                 pinctrl-single,pins = <
-                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
-                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
+                        OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3)      /* gpio_wk7 */
+                        OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3)      /* gpio_wk8 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts
index 2f1dabcc6adf..119f8e657edc 100644
--- a/arch/arm/boot/dts/omap4-panda-es.dts
+++ b/arch/arm/boot/dts/omap4-panda-es.dts
@@ -34,23 +34,23 @@
 /* PandaboardES has external pullups on SCL & SDA */
 &dss_hdmi_pins {
         pinctrl-single,pins = <
-                0x5a (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_cec.hdmi_cec */
-                0x5c (PIN_INPUT | MUX_MODE0)            /* hdmi_scl.hdmi_scl */
-                0x5e (PIN_INPUT | MUX_MODE0)            /* hdmi_sda.hdmi_sda */
+                OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)               /* hdmi_scl.hdmi_scl */
+                OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)               /* hdmi_sda.hdmi_sda */
                 >;
 };
 
 &omap4_pmx_core {
         led_gpio_pins: gpio_led_pmx {
                 pinctrl-single,pins = <
-                        0xb6 (PIN_OUTPUT | MUX_MODE3)   /* gpio_110 */
+                        OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3)      /* gpio_110 */
                 >;
         };
 };
 
 &led_wkgpio_pins {
         pinctrl-single,pins = <
-                0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
+                OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3)      /* gpio_wk8 */
         >;
 };
 
diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
index aad5dda0f469..b4d19a7ae393 100644
--- a/arch/arm/boot/dts/omap4-sdp-es23plus.dts
+++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
@@ -10,8 +10,8 @@
 /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
 &dss_hdmi_pins {
         pinctrl-single,pins = <
-                0x5a (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_cec.hdmi_cec */
-                0x5c (PIN_INPUT | MUX_MODE0)            /* hdmi_scl.hdmi_scl */
-                0x5e (PIN_INPUT | MUX_MODE0)            /* hdmi_sda.hdmi_sda */
+                OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)               /* hdmi_scl.hdmi_scl */
+                OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)               /* hdmi_sda.hdmi_sda */
                 >;
 };
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index f0bdc41f8eff..aae513265dc2 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -212,143 +212,143 @@
 
         uart2_pins: pinmux_uart2_pins {
                 pinctrl-single,pins = <
-                        0xd8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* uart2_cts.uart2_cts */
-                        0xda (PIN_OUTPUT | MUX_MODE0)           /* uart2_rts.uart2_rts */
-                        0xdc (PIN_INPUT_PULLUP | MUX_MODE0)     /* uart2_rx.uart2_rx */
-                        0xde (PIN_OUTPUT | MUX_MODE0)           /* uart2_tx.uart2_tx */
+                        OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)        /* uart2_cts.uart2_cts */
+                        OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)              /* uart2_rts.uart2_rts */
+                        OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)        /* uart2_rx.uart2_rx */
+                        OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)              /* uart2_tx.uart2_tx */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart3_cts_rctx.uart3_cts_rctx */
-                        0x102 (PIN_OUTPUT | MUX_MODE0)          /* uart3_rts_sd.uart3_rts_sd */
-                        0x104 (PIN_INPUT | MUX_MODE0)           /* uart3_rx_irrx.uart3_rx_irrx */
-                        0x106 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx_irtx.uart3_tx_irtx */
+                        OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0)        /* uart3_cts_rctx.uart3_cts_rctx */
+                        OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0)              /* uart3_rts_sd.uart3_rts_sd */
+                        OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0)               /* uart3_rx_irrx.uart3_rx_irrx */
+                        OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0)              /* uart3_tx_irtx.uart3_tx_irtx */
                 >;
         };
 
         uart4_pins: pinmux_uart4_pins {
                 pinctrl-single,pins = <
-                        0x11c (PIN_INPUT | MUX_MODE0)           /* uart4_rx.uart4_rx */
-                        0x11e (PIN_OUTPUT | MUX_MODE0)          /* uart4_tx.uart4_tx */
+                        OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0)               /* uart4_rx.uart4_rx */
+                        OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0)              /* uart4_tx.uart4_tx */
                 >;
         };
 
         twl6040_pins: pinmux_twl6040_pins {
                 pinctrl-single,pins = <
-                        0xe0 (PIN_OUTPUT | MUX_MODE3)           /* hdq_sio.gpio_127 */
-                        0x160 (PIN_INPUT | MUX_MODE0)           /* sys_nirq2.sys_nirq2 */
+                        OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3)              /* hdq_sio.gpio_127 */
+                        OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)               /* sys_nirq2.sys_nirq2 */
                 >;
         };
 
         mcpdm_pins: pinmux_mcpdm_pins {
                 pinctrl-single,pins = <
-                        0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_ul_data.abe_pdm_ul_data */
-                        0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_dl_data.abe_pdm_dl_data */
-                        0xca (PIN_INPUT_PULLUP | MUX_MODE0)     /* abe_pdm_frame.abe_pdm_frame */
-                        0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_pdm_lb_clk.abe_pdm_lb_clk */
-                        0xce (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_clks.abe_clks */
+                        OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_ul_data.abe_pdm_ul_data */
+                        OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_dl_data.abe_pdm_dl_data */
+                        OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0)        /* abe_pdm_frame.abe_pdm_frame */
+                        OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_pdm_lb_clk.abe_pdm_lb_clk */
+                        OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_clks.abe_clks */
                 >;
         };
 
         dmic_pins: pinmux_dmic_pins {
                 pinctrl-single,pins = <
-                        0xd0 (PIN_OUTPUT | MUX_MODE0)           /* abe_dmic_clk1.abe_dmic_clk1 */
-                        0xd2 (PIN_INPUT | MUX_MODE0)            /* abe_dmic_din1.abe_dmic_din1 */
-                        0xd4 (PIN_INPUT | MUX_MODE0)            /* abe_dmic_din2.abe_dmic_din2 */
-                        0xd6 (PIN_INPUT | MUX_MODE0)            /* abe_dmic_din3.abe_dmic_din3 */
+                        OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0)              /* abe_dmic_clk1.abe_dmic_clk1 */
+                        OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0)               /* abe_dmic_din1.abe_dmic_din1 */
+                        OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0)               /* abe_dmic_din2.abe_dmic_din2 */
+                        OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0)               /* abe_dmic_din3.abe_dmic_din3 */
                 >;
         };
 
         mcbsp1_pins: pinmux_mcbsp1_pins {
                 pinctrl-single,pins = <
-                        0xbe (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
-                        0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_mcbsp1_dr.abe_mcbsp1_dr */
-                        0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* abe_mcbsp1_dx.abe_mcbsp1_dx */
-                        0xc4 (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
+                        OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
+                        OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_mcbsp1_dr.abe_mcbsp1_dr */
+                        OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0)     /* abe_mcbsp1_dx.abe_mcbsp1_dx */
+                        OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
                 >;
         };
 
         mcbsp2_pins: pinmux_mcbsp2_pins {
                 pinctrl-single,pins = <
-                        0xb6 (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
-                        0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0)   /* abe_mcbsp2_dr.abe_mcbsp2_dr */
-                        0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* abe_mcbsp2_dx.abe_mcbsp2_dx */
-                        0xbc (PIN_INPUT | MUX_MODE0)            /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
+                        OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
+                        OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_mcbsp2_dr.abe_mcbsp2_dr */
+                        OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0)     /* abe_mcbsp2_dx.abe_mcbsp2_dx */
+                        OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)               /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
                 >;
         };
 
         mcspi1_pins: pinmux_mcspi1_pins {
                 pinctrl-single,pins = <
-                        0xf2 (PIN_INPUT | MUX_MODE0)            /*  mcspi1_clk.mcspi1_clk */
-                        0xf4 (PIN_INPUT | MUX_MODE0)            /*  mcspi1_somi.mcspi1_somi */
-                        0xf6 (PIN_INPUT | MUX_MODE0)            /*  mcspi1_simo.mcspi1_simo */
-                        0xf8 (PIN_INPUT | MUX_MODE0)            /*  mcspi1_cs0.mcspi1_cs0 */
+                        OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0)               /*  mcspi1_clk.mcspi1_clk */
+                        OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0)               /*  mcspi1_somi.mcspi1_somi */
+                        OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0)               /*  mcspi1_simo.mcspi1_simo */
+                        OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0)               /*  mcspi1_cs0.mcspi1_cs0 */
                 >;
         };
 
         dss_hdmi_pins: pinmux_dss_hdmi_pins {
                 pinctrl-single,pins = <
-                        0x5a (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_cec.hdmi_cec */
-                        0x5c (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_scl.hdmi_scl */
-                        0x5e (PIN_INPUT_PULLUP | MUX_MODE0)     /* hdmi_sda.hdmi_sda */
+                        OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                        OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_scl.hdmi_scl */
+                        OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_sda.hdmi_sda */
                 >;
         };
 
         tpd12s015_pins: pinmux_tpd12s015_pins {
                 pinctrl-single,pins = <
-                        0x22 (PIN_OUTPUT | MUX_MODE3)           /* gpmc_a17.gpio_41 */
-                        0x48 (PIN_OUTPUT | MUX_MODE3)           /* gpmc_nbe1.gpio_60 */
-                        0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3)   /* hdmi_hpd.gpio_63 */
+                        OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3)              /* gpmc_a17.gpio_41 */
+                        OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)              /* gpmc_nbe1.gpio_60 */
+                        OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)      /* hdmi_hpd.gpio_63 */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0xe2 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c1_scl */
-                        0xe4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c1_sda */
+                        OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_scl */
+                        OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_sda */
                 >;
         };
 
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
-                        0xe6 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c2_scl */
-                        0xe8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c2_sda */
+                        OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c2_scl */
+                        OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c2_sda */
                 >;
         };
 
         i2c3_pins: pinmux_i2c3_pins {
                 pinctrl-single,pins = <
-                        0xea (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c3_scl */
-                        0xec (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c3_sda */
+                        OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c3_scl */
+                        OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c3_sda */
                 >;
         };
 
         i2c4_pins: pinmux_i2c4_pins {
                 pinctrl-single,pins = <
-                        0xee (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_scl */
-                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_sda */
+                        OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c4_scl */
+                        OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c4_sda */
                 >;
         };
 
         /* wl12xx GPIO output for WLAN_EN */
         wl12xx_gpio: pinmux_wl12xx_gpio {
                 pinctrl-single,pins = <
-                        0x3c (PIN_OUTPUT | MUX_MODE3)           /* gpmc_nwp.gpio_54 */
+                        OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)              /* gpmc_nwp.gpio_54 */
                 >;
         };
 
         /* wl12xx GPIO inputs and SDIO pins */
         wl12xx_pins: pinmux_wl12xx_pins {
                 pinctrl-single,pins = <
-                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
-                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
-                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
-                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat2.sdmmc5_dat2 */
-                        0x112 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat3.sdmmc5_dat3 */
+                        OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)               /* gpmc_ncs3.gpio_53 */
+                        OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_clk.sdmmc5_clk */
+                        OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_cmd.sdmmc5_cmd */
+                        OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat0.sdmmc5_dat0 */
+                        OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat1.sdmmc5_dat1 */
+                        OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat2.sdmmc5_dat2 */
+                        OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)        /* sdmmc5_dat3.sdmmc5_dat3 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap4-var-om44customboard.dtsi b/arch/arm/boot/dts/omap4-var-om44customboard.dtsi
index f2d2fdb75628..6e278d7716a5 100644
--- a/arch/arm/boot/dts/omap4-var-om44customboard.dtsi
+++ b/arch/arm/boot/dts/omap4-var-om44customboard.dtsi
@@ -41,7 +41,7 @@
                         label = "user";
                         gpios = <&gpio6 24 GPIO_ACTIVE_HIGH>; /* gpio 184 */
                         linux,code = <BTN_EXTRA>;
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 5a206c100ce2..2bd9c83300b2 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -348,12 +348,22 @@
                         #interrupt-cells = <2>;
                 };
 
+                elm: elm@48078000 {
+                        compatible = "ti,am3352-elm";
+                        reg = <0x48078000 0x2000>;
+                        interrupts = <4>;
+                        ti,hwmods = "elm";
+                        status = "disabled";
+                };
+
                 gpmc: gpmc@50000000 {
                         compatible = "ti,omap4430-gpmc";
                         reg = <0x50000000 0x1000>;
                         #address-cells = <2>;
                         #size-cells = <1>;
                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                        dmas = <&sdma 4>;
+                        dma-names = "rxtx";
                         gpmc,num-cs = <8>;
                         gpmc,num-waitpins = <4>;
                         ti,hwmods = "gpmc";
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 5cf76a1c5c75..888412c63f97 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -139,60 +139,60 @@
 
         twl6040_pins: pinmux_twl6040_pins {
                 pinctrl-single,pins = <
-                        0x17e (PIN_OUTPUT | MUX_MODE6)  /* mcspi1_somi.gpio5_141 */
+                        OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)      /* mcspi1_somi.gpio5_141 */
                 >;
         };
 
         mcpdm_pins: pinmux_mcpdm_pins {
                 pinctrl-single,pins = <
-                        0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* abe_clks.abe_clks */
-                        0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* abemcpdm_ul_data.abemcpdm_ul_data */
-                        0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* abemcpdm_dl_data.abemcpdm_dl_data */
-                        0x160 (PIN_INPUT_PULLUP | MUX_MODE0)    /* abemcpdm_frame.abemcpdm_frame */
-                        0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* abemcpdm_lb_clk.abemcpdm_lb_clk */
+                        OMAP5_IOPAD(0x182, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abe_clks.abe_clks */
+                        OMAP5_IOPAD(0x19c, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abemcpdm_ul_data.abemcpdm_ul_data */
+                        OMAP5_IOPAD(0x19e, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abemcpdm_dl_data.abemcpdm_dl_data */
+                        OMAP5_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE0)        /* abemcpdm_frame.abemcpdm_frame */
+                        OMAP5_IOPAD(0x1a2, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abemcpdm_lb_clk.abemcpdm_lb_clk */
                 >;
         };
 
         mcbsp1_pins: pinmux_mcbsp1_pins {
                 pinctrl-single,pins = <
-                        0x14c (PIN_INPUT | MUX_MODE1)           /* abedmic_clk2.abemcbsp1_fsx */
-                        0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
-                        0x150 (PIN_INPUT | MUX_MODE1)           /* abeslimbus1_clock.abemcbsp1_clkx */
-                        0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* abeslimbus1_data.abemcbsp1_dr */
+                        OMAP5_IOPAD(0x18c, PIN_INPUT | MUX_MODE1)               /* abedmic_clk2.abemcbsp1_fsx */
+                        OMAP5_IOPAD(0x18e, PIN_OUTPUT_PULLDOWN | MUX_MODE1)     /* abedmic_clk3.abemcbsp1_dx */
+                        OMAP5_IOPAD(0x190, PIN_INPUT | MUX_MODE1)               /* abeslimbus1_clock.abemcbsp1_clkx */
+                        OMAP5_IOPAD(0x192, PIN_INPUT_PULLDOWN | MUX_MODE1)      /* abeslimbus1_data.abemcbsp1_dr */
                 >;
         };
 
         mcbsp2_pins: pinmux_mcbsp2_pins {
                 pinctrl-single,pins = <
-                        0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* abemcbsp2_dr.abemcbsp2_dr */
-                        0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
-                        0x158 (PIN_INPUT | MUX_MODE0)           /* abemcbsp2_fsx.abemcbsp2_fsx */
-                        0x15a (PIN_INPUT | MUX_MODE0)           /* abemcbsp2_clkx.abemcbsp2_clkx */
+                        OMAP5_IOPAD(0x194, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* abemcbsp2_dr.abemcbsp2_dr */
+                        OMAP5_IOPAD(0x196, PIN_OUTPUT_PULLDOWN | MUX_MODE0)     /* abemcbsp2_dx.abemcbsp2_dx */
+                        OMAP5_IOPAD(0x198, PIN_INPUT | MUX_MODE0)               /* abemcbsp2_fsx.abemcbsp2_fsx */
+                        OMAP5_IOPAD(0x19a, PIN_INPUT | MUX_MODE0)               /* abemcbsp2_clkx.abemcbsp2_clkx */
                 >;
         };
 
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
-                        0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl */
-                        0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda */
+                        OMAP5_IOPAD(0x1f2, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_scl */
+                        OMAP5_IOPAD(0x1f4, PIN_INPUT_PULLUP | MUX_MODE0)        /* i2c1_sda */
                 >;
         };
 
         mcspi2_pins: pinmux_mcspi2_pins {
                 pinctrl-single,pins = <
-                        0xbc (PIN_INPUT | MUX_MODE0)            /*  mcspi2_clk */
-                        0xbe (PIN_INPUT | MUX_MODE0)            /*  mcspi2_simo */
-                        0xc0 (PIN_INPUT_PULLUP | MUX_MODE0)     /*  mcspi2_somi */
-                        0xc2 (PIN_OUTPUT | MUX_MODE0)           /*  mcspi2_cs0 */
+                        OMAP5_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)               /*  mcspi2_clk */
+                        OMAP5_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)               /*  mcspi2_simo */
+                        OMAP5_IOPAD(0x100, PIN_INPUT_PULLUP | MUX_MODE0)        /*  mcspi2_somi */
+                        OMAP5_IOPAD(0x102, PIN_OUTPUT | MUX_MODE0)              /*  mcspi2_cs0 */
                 >;
         };
 
         mcspi3_pins: pinmux_mcspi3_pins {
                 pinctrl-single,pins = <
-                        0x78 (PIN_INPUT | MUX_MODE1)            /*  mcspi3_somi */
-                        0x7a (PIN_INPUT | MUX_MODE1)            /*  mcspi3_cs0 */
-                        0x7c (PIN_INPUT | MUX_MODE1)            /*  mcspi3_simo */
-                        0x7e (PIN_INPUT | MUX_MODE1)            /*  mcspi3_clk */
+                        OMAP5_IOPAD(0x0b8, PIN_INPUT | MUX_MODE1)               /*  mcspi3_somi */
+                        OMAP5_IOPAD(0x0ba, PIN_INPUT | MUX_MODE1)               /*  mcspi3_cs0 */
+                        OMAP5_IOPAD(0x0bc, PIN_INPUT | MUX_MODE1)               /*  mcspi3_simo */
+                        OMAP5_IOPAD(0x0be, PIN_INPUT | MUX_MODE1)               /*  mcspi3_clk */
                 >;
         };
 
@@ -215,59 +215,59 @@
 
         usbhost_pins: pinmux_usbhost_pins {
                 pinctrl-single,pins = <
-                        0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
-                        0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
+                        OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
+                        OMAP5_IOPAD(0x0c6, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
 
-                        0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
-                        0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
+                        OMAP5_IOPAD(0x1de, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
+                        OMAP5_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
 
-                        0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
-                        0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
+                        OMAP5_IOPAD(0x0b0, PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
+                        OMAP5_IOPAD(0x0ae, PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
                 >;
         };
 
         led_gpio_pins: pinmux_led_gpio_pins {
                 pinctrl-single,pins = <
-                        0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
+                        OMAP5_IOPAD(0x1d6, PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
                 >;
         };
 
         uart1_pins: pinmux_uart1_pins {
                 pinctrl-single,pins = <
-                        0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
-                        0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
-                        0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
-                        0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
+                        OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
+                        OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
+                        OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
+                        OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
                 >;
         };
 
         uart3_pins: pinmux_uart3_pins {
                 pinctrl-single,pins = <
-                        0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
-                        0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
+                        OMAP5_IOPAD(0x1da, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
+                        OMAP5_IOPAD(0x1dc, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
                 >;
         };
 
         uart5_pins: pinmux_uart5_pins {
                 pinctrl-single,pins = <
-                        0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
-                        0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
-                        0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
-                        0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
+                        OMAP5_IOPAD(0x1b0, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
+                        OMAP5_IOPAD(0x1b2, PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
+                        OMAP5_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
+                        OMAP5_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
                 >;
         };
 
         dss_hdmi_pins: pinmux_dss_hdmi_pins {
                 pinctrl-single,pins = <
-                        0x0fc (PIN_INPUT_PULLUP | MUX_MODE0)    /* hdmi_cec.hdmi_cec */
-                        0x100 (PIN_INPUT | MUX_MODE0)   /* hdmi_ddc_scl.hdmi_ddc_scl */
-                        0x102 (PIN_INPUT | MUX_MODE0)   /* hdmi_ddc_sda.hdmi_ddc_sda */
+                        OMAP5_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE0)        /* hdmi_cec.hdmi_cec */
+                        OMAP5_IOPAD(0x140, PIN_INPUT | MUX_MODE0)       /* hdmi_ddc_scl.hdmi_ddc_scl */
+                        OMAP5_IOPAD(0x142, PIN_INPUT | MUX_MODE0)       /* hdmi_ddc_sda.hdmi_ddc_sda */
                 >;
         };
 
         tpd12s015_pins: pinmux_tpd12s015_pins {
                 pinctrl-single,pins = <
-                        0x0fe (PIN_INPUT_PULLDOWN | MUX_MODE6)  /* hdmi_hpd.gpio7_193 */
+                        OMAP5_IOPAD(0x13e, PIN_INPUT_PULLDOWN | MUX_MODE6)      /* hdmi_hpd.gpio7_193 */
                 >;
         };
 };
@@ -280,13 +280,13 @@
 
         usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
                 pinctrl-single,pins = <
-                        0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
+                        OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
                 >;
         };
 
         wlcore_irq_pin: pinmux_wlcore_irq_pin {
                 pinctrl-single,pins = <
-                        OMAP5_IOPAD(0x040, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6)    /* llia_wakereqin.gpio1_wk14 */
+                        OMAP5_IOPAD(0x40, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6)     /* llia_wakereqin.gpio1_wk14 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index 3774b37be6c8..ecc591dc0778 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -175,7 +175,7 @@
 
         ads7846_pins: pinmux_ads7846_pins {
                 pinctrl-single,pins = <
-                        0x02 (PIN_INPUT_PULLDOWN | MUX_MODE6)  /* llib_wakereqin.gpio1_wk15 */
+                        OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6)  /* llib_wakereqin.gpio1_wk15 */
                 >;
         };
 };
@@ -359,7 +359,7 @@
                 ti,debounce-tol = /bits/ 16 <10>;
                 ti,debounce-rep = /bits/ 16 <1>;
 
-                linux,wakeup;
+                wakeup-source;
         };
 };
 
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 05b1c1ebded8..60b3fbb3bf07 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -40,8 +40,8 @@
 &omap5_pmx_core {
         i2c5_pins: pinmux_i2c5_pins {
                 pinctrl-single,pins = <
-                        0x186 (PIN_INPUT | MUX_MODE0)           /* i2c5_scl */
-                        0x188 (PIN_INPUT | MUX_MODE0)           /* i2c5_sda */
+                        OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0)               /* i2c5_scl */
+                        OMAP5_IOPAD(0x1c8, PIN_INPUT | MUX_MODE0)               /* i2c5_sda */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c04389dab32..ca3c17fde5a0 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -391,6 +391,8 @@
                         #address-cells = <2>;
                         #size-cells = <1>;
                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                        dmas = <&sdma 4>;
+                        dma-names = "rxtx";
                         gpmc,num-cs = <8>;
                         gpmc,num-waitpins = <4>;
                         ti,hwmods = "gpmc";
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts
index 90fdbd77f274..7d253bb6265a 100644
--- a/arch/arm/boot/dts/phy3250.dts
+++ b/arch/arm/boot/dts/phy3250.dts
@@ -12,7 +12,7 @@
  */
 
 /dts-v1/;
-/include/ "lpc32xx.dtsi"
+#include "lpc32xx.dtsi"
 
 / {
         model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
@@ -22,7 +22,7 @@
 
         memory {
                 device_type = "memory";
-                reg = <0 0x4000000>;
+                reg = <0x80000000 0x4000000>;
         };
 
         ahb {
@@ -31,19 +31,6 @@
                         use-iram;
                 };
 
-                /* Here, choose exactly one from: ohci, usbd */
-                ohci@31020000 {
-                        transceiver = <&isp1301>;
-                        status = "okay";
-                };
-
-/*
-                usbd@31020000 {
-                        transceiver = <&isp1301>;
-                        status = "okay";
-                };
-*/
-
                 clcd@31040000 {
                         status = "okay";
                 };
@@ -123,15 +110,6 @@
                                 clock-frequency = <100000>;
                         };
 
-                        i2cusb: i2c@31020300 {
-                                clock-frequency = <100000>;
-
-                                isp1301: usb-transceiver@2c {
-                                        compatible = "nxp,isp1301";
-                                        reg = <0x2c>;
-                                };
-                        };
-
                         ssp0: ssp@20084000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
@@ -200,3 +178,18 @@
                 };
         };
 };
+
+/* Here, choose exactly one from: ohci, usbd */
+&ohci /* &usbd */ {
+        transceiver = <&isp1301>;
+        status = "okay";
+};
+
+&i2cusb {
+        clock-frequency = <100000>;
+
+        isp1301: usb-transceiver@2c {
+                compatible = "nxp,isp1301";
+                reg = <0x2c>;
+        };
+};
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 03784f1366e5..21095dad7741 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -54,7 +54,7 @@
 
 
                                 /* Buck SMPS */
-                                pm8921_s1: s1 {
+                                s1 {
                                         regulator-always-on;
                                         regulator-min-microvolt = <1225000>;
                                         regulator-max-microvolt = <1225000>;
@@ -62,43 +62,43 @@
                                         bias-pull-down;
                                 };
 
-                                pm8921_s3: s3 {
+                                s3 {
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1400000>;
                                         qcom,switch-mode-frequency = <4800000>;
                                 };
 
-                                pm8921_s4: s4 {
+                                s4 {
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         qcom,switch-mode-frequency = <3200000>;
                                 };
 
-                                pm8921_s7: s7 {
+                                s7 {
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                         qcom,switch-mode-frequency = <3200000>;
                                 };
 
-                                pm8921_l3: l3 {
+                                l3 {
                                         regulator-min-microvolt = <3050000>;
                                         regulator-max-microvolt = <3300000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l4: l4 {
+                                l4 {
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1800000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l5: l5 {
+                                l5 {
                                         regulator-min-microvolt = <2750000>;
                                         regulator-max-microvolt = <3000000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l23: l23 {
+                                l23 {
                                         regulator-min-microvolt = <1700000>;
                                         regulator-max-microvolt = <1900000>;
                                         bias-pull-down;
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 11ac608b6d50..aa9303b84d67 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -64,7 +64,7 @@
 
 
                                 /* Buck SMPS */
-                                pm8921_s1: s1 {
+                                s1 {
                                         regulator-always-on;
                                         regulator-min-microvolt = <1225000>;
                                         regulator-max-microvolt = <1225000>;
@@ -72,55 +72,55 @@
                                         bias-pull-down;
                                 };
 
-                                pm8921_s3: s3 {
+                                s3 {
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1400000>;
                                         qcom,switch-mode-frequency = <4800000>;
                                 };
 
-                                pm8921_s4: s4 {
+                                s4 {
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         qcom,switch-mode-frequency = <3200000>;
                                 };
 
-                                pm8921_s7: s7 {
+                                s7 {
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                         qcom,switch-mode-frequency = <3200000>;
                                 };
 
-                                pm8921_l3: l3 {
+                                l3 {
                                         regulator-min-microvolt = <3050000>;
                                         regulator-max-microvolt = <3300000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l4: l4 {
+                                l4 {
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1800000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l5: l5 {
+                                l5 {
                                         regulator-min-microvolt = <2750000>;
                                         regulator-max-microvolt = <3000000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l6: l6 {
+                                l6 {
                                         regulator-min-microvolt = <2950000>;
                                         regulator-max-microvolt = <2950000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_l23: l23 {
+                                l23 {
                                         regulator-min-microvolt = <1700000>;
                                         regulator-max-microvolt = <1900000>;
                                         bias-pull-down;
                                 };
 
-                                pm8921_lvs1: lvs1 {
+                                lvs1 {
                                         bias-pull-down;
                                 };
                         };
@@ -164,7 +164,7 @@
 
                 gsbi@16500000 {
                         status = "ok";
-                        qcom,mode = <GSBI_PROT_I2C_UART>;
+                        qcom,mode = <GSBI_PROT_UART_W_FC>;
 
                         serial@16540000 {
                                 status = "ok";
diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
new file mode 100644
index 000000000000..06b3c76c3e41
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
@@ -0,0 +1,436 @@
+#include "qcom-apq8064-v2.0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+/ {
+        model = "Sony Xperia Z";
+        compatible = "sony,xperia-yuga", "qcom,apq8064";
+
+        aliases {
+                serial0 = &gsbi5_serial;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                input-name = "gpio-keys";
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&gpio_keys_pin_a>;
+
+                camera-focus {
+                        label = "camera_focus";
+                        gpios = <&pm8921_gpio 3 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_CAMERA_FOCUS>;
+                };
+
+                camera-snapshot {
+                        label = "camera_snapshot";
+                        gpios = <&pm8921_gpio 4 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_CAMERA>;
+                };
+
+                volume-down {
+                        label = "volume_down";
+                        gpios = <&pm8921_gpio 29 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_VOLUMEDOWN>;
+                };
+
+                volume-up {
+                        label = "volume_up";
+                        gpios = <&pm8921_gpio 35 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_VOLUMEUP>;
+                };
+        };
+
+        soc {
+                pinctrl@800000 {
+                        gsbi5_uart_pin_a: gsbi5-uart-pin-active {
+                                rx {
+                                        pins = "gpio52";
+                                        function = "gsbi5";
+                                        drive-strength = <2>;
+                                        bias-pull-up;
+                                };
+
+                                tx {
+                                        pins = "gpio51";
+                                        function = "gsbi5";
+                                        drive-strength = <4>;
+                                        bias-disable;
+                                };
+                        };
+
+                        sdcc1_pin_a: sdcc1-pin-active {
+                                clk {
+                                        pins = "sdc1_clk";
+                                        drive-strengh = <16>;
+                                        bias-disable;
+                                };
+
+                                cmd {
+                                        pins = "sdc1_cmd";
+                                        drive-strengh = <10>;
+                                        bias-pull-up;
+                                };
+
+                                data {
+                                        pins = "sdc1_data";
+                                        drive-strengh = <10>;
+                                        bias-pull-up;
+                                };
+                        };
+
+                        sdcc3_pin_a: sdcc3-pin-active {
+                                clk {
+                                        pins = "sdc3_clk";
+                                        drive-strengh = <8>;
+                                        bias-disable;
+                                };
+
+                                cmd {
+                                        pins = "sdc3_cmd";
+                                        drive-strengh = <8>;
+                                        bias-pull-up;
+                                };
+
+                                data {
+                                        pins = "sdc3_data";
+                                        drive-strengh = <8>;
+                                        bias-pull-up;
+                                };
+                        };
+
+                        sdcc3_cd_pin_a: sdcc3-cd-pin-active {
+                                pins = "gpio26";
+                                function = "gpio";
+
+                                drive-strength = <2>;
+                                bias-disable;
+                        };
+                };
+
+
+                rpm@108000 {
+                        regulators {
+                                vin_l1_l2_l12_l18-supply = <&pm8921_s4>;
+                                vin_lvs_1_3_6-supply = <&pm8921_s4>;
+                                vin_lvs_4_5_7-supply = <&pm8921_s4>;
+                                vin_ncp-supply = <&pm8921_l6>;
+                                vin_lvs2-supply = <&pm8921_s4>;
+                                vin_l24-supply = <&pm8921_s1>;
+                                vin_l25-supply = <&pm8921_s1>;
+                                vin_l27-supply = <&pm8921_s7>;
+                                vin_l28-supply = <&pm8921_s7>;
+
+                                /* Buck SMPS */
+                                s1 {
+                                        regulator-always-on;
+                                        regulator-min-microvolt = <1225000>;
+                                        regulator-max-microvolt = <1225000>;
+                                        qcom,switch-mode-frequency = <3200000>;
+                                        bias-pull-down;
+                                };
+
+                                s2 {
+                                        regulator-min-microvolt = <1300000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        qcom,switch-mode-frequency = <1600000>;
+                                        bias-pull-down;
+                                };
+
+                                s3 {
+                                        regulator-min-microvolt = <500000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        qcom,switch-mode-frequency = <4800000>;
+                                        bias-pull-down;
+                                };
+
+                                s4 {
+                                        regulator-always-on;
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        qcom,switch-mode-frequency = <1600000>;
+                                        bias-pull-down;
+                                        qcom,force-mode = <QCOM_RPM_FORCE_MODE_AUTO>;
+                                };
+
+                                s7 {
+                                        regulator-min-microvolt = <1300000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        qcom,switch-mode-frequency = <3200000>;
+                                };
+
+                                s8 {
+                                        regulator-min-microvolt = <2200000>;
+                                        regulator-max-microvolt = <2200000>;
+                                        qcom,switch-mode-frequency = <1600000>;
+                                };
+
+                                /* PMOS LDO */
+                                l1 {
+                                        regulator-always-on;
+                                        regulator-min-microvolt = <1100000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        bias-pull-down;
+                                };
+
+                                l2 {
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        bias-pull-down;
+                                };
+
+                                l3 {
+                                        regulator-min-microvolt = <3075000>;
+                                        regulator-max-microvolt = <3075000>;
+                                        bias-pull-down;
+                                };
+
+                                l4 {
+                                        regulator-always-on;
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        bias-pull-down;
+                                };
+
+                                l5 {
+                                        regulator-min-microvolt = <2950000>;
+                                        regulator-max-microvolt = <2950000>;
+                                        bias-pull-down;
+                                };
+
+                                l6 {
+                                        regulator-min-microvolt = <2950000>;
+                                        regulator-max-microvolt = <2950000>;
+                                        bias-pull-down;
+                                };
+
+                                l7 {
+                                        regulator-min-microvolt = <1850000>;
+                                        regulator-max-microvolt = <2950000>;
+                                        bias-pull-down;
+                                };
+
+                                l8 {
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        bias-pull-down;
+                                };
+
+                                l9 {
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        bias-pull-down;
+                                };
+
+                                l10 {
+                                        regulator-min-microvolt = <2900000>;
+                                        regulator-max-microvolt = <2900000>;
+                                        bias-pull-down;
+                                };
+
+                                l11 {
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        bias-pull-down;
+                                };
+
+                                l12 {
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        bias-pull-down;
+                                };
+
+                                l14 {
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        bias-pull-down;
+                                };
+
+                                l15 {
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <2950000>;
+                                        bias-pull-down;
+                                };
+
+                                l16 {
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        bias-pull-down;
+                                };
+
+                                l17 {
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        bias-pull-down;
+                                };
+
+                                l18 {
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        bias-pull-down;
+                                };
+
+                                l21 {
+                                        regulator-min-microvolt = <1050000>;
+                                        regulator-max-microvolt = <1050000>;
+                                        bias-pull-down;
+                                };
+
+                                l22 {
+                                        regulator-min-microvolt = <2600000>;
+                                        regulator-max-microvolt = <2600000>;
+                                        bias-pull-down;
+                                };
+
+                                l23 {
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        bias-pull-down;
+                                };
+
+                                l24 {
+                                        regulator-min-microvolt = <750000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        bias-pull-down;
+                                };
+
+                                l25 {
+                                        regulator-always-on;
+                                        regulator-min-microvolt = <1250000>;
+                                        regulator-max-microvolt = <1250000>;
+                                        bias-pull-down;
+                                };
+
+                                l27 {
+                                        regulator-min-microvolt = <1100000>;
+                                        regulator-max-microvolt = <1100000>;
+                                };
+
+                                l28 {
+                                        regulator-min-microvolt = <1050000>;
+                                        regulator-max-microvolt = <1050000>;
+                                        bias-pull-down;
+                                };
+
+                                l29 {
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        bias-pull-down;
+                                };
+
+                                /* Low Voltage Switch */
+                                lvs1 {
+                                        bias-pull-down;
+                                };
+
+                                lvs2 {
+                                        bias-pull-down;
+                                };
+
+                                lvs3 {
+                                        bias-pull-down;
+                                };
+
+                                lvs4 {
+                                        bias-pull-down;
+                                };
+
+                                lvs5 {
+                                        bias-pull-down;
+                                };
+
+                                lvs6 {
+                                        bias-pull-down;
+                                };
+
+                                lvs7 {
+                                        bias-pull-down;
+                                };
+
+                                usb-switch {};
+
+                                hdmi-switch {};
+
+                                ncp {
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        qcom,switch-mode-frequency = <1600000>;
+                                };
+                        };
+                };
+
+                qcom,ssbi@500000 {
+                        pmic@0 {
+                                gpio@150 {
+                                        gpio_keys_pin_a: gpio-keys-pin-active {
+                                                pins = "gpio3", "gpio4", "gpio29", "gpio35";
+                                                function = "normal";
+
+                                                bias-pull-up;
+                                                drive-push-pull;
+                                                input-enable;
+                                                power-source = <2>;
+                                                qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
+                                                qcom,pull-up-strength = <0>;
+                                        };
+                                };
+                        };
+                };
+
+                phy@12500000 {
+                        status          = "okay";
+                        vddcx-supply    = <&pm8921_s3>;
+                        v3p3-supply     = <&pm8921_l3>;
+                        v1p8-supply     = <&pm8921_l4>;
+                };
+
+                gadget@12500000 {
+                        status = "okay";
+                };
+
+                gsbi@1a200000 {
+                        status = "ok";
+                        qcom,mode = <GSBI_PROT_I2C_UART>;
+
+                        serial@1a240000 {
+                                status = "ok";
+
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&gsbi5_uart_pin_a>;
+                        };
+                };
+
+                amba {
+                        sdcc1: sdcc@12400000 {
+                                status = "okay";
+
+                                vmmc-supply = <&pm8921_l5>;
+                                vqmmc-supply = <&pm8921_s4>;
+
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&sdcc1_pin_a>;
+                        };
+
+                        sdcc3: sdcc@12180000 {
+                                status = "okay";
+
+                                vmmc-supply = <&pm8921_l6>;
+                                cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
+
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&sdcc3_pin_a>, <&sdcc3_cd_pin_a>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index a4c1762b53ea..edfc6ee56ea1 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -11,6 +11,17 @@
         compatible = "qcom,apq8064";
         interrupt-parent = <&intc>;
 
+        reserved-memory {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                smem_region: smem@80000000 {
+                        reg = <0x80000000 0x200000>;
+                        no-map;
+                };
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -80,6 +91,39 @@
                 interrupts = <1 10 0x304>;
         };
 
+        clocks {
+                cxo_board {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <19200000>;
+                };
+
+                pxo_board {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
+
+                sleep_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <32768>;
+                };
+        };
+
+        sfpb_mutex: hwmutex {
+                compatible = "qcom,sfpb-mutex";
+                syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
+                #hwlock-cells = <1>;
+        };
+
+        smem {
+                compatible = "qcom,smem";
+                memory-region = <&smem_region>;
+
+                hwlocks = <&sfpb_mutex 3>;
+        };
+
         soc: soc {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -156,6 +200,11 @@
                         };
                 };
 
+                sfpb_wrapper_mutex: syscon@1200000 {
+                        compatible = "syscon";
+                        reg = <0x01200000 0x8000>;
+                };
+
                 intc: interrupt-controller@2000000 {
                         compatible = "qcom,msm-qgic2";
                         interrupt-controller;
@@ -291,6 +340,28 @@
                         };
                 };
 
+                gsbi5: gsbi@1a200000 {
+                        status = "disabled";
+                        compatible = "qcom,gsbi-v1.0.0";
+                        cell-index = <5>;
+                        reg = <0x1a200000 0x03>;
+                        clocks = <&gcc GSBI5_H_CLK>;
+                        clock-names = "iface";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        gsbi5_serial: serial@1a240000 {
+                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+                                reg = <0x1a240000 0x100>,
+                                      <0x1a200000 0x03>;
+                                interrupts = <0 154 0x0>;
+                                clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
+                                clock-names = "core", "iface";
+                                status = "disabled";
+                        };
+                };
+
                 gsbi6: gsbi@16500000 {
                         status = "disabled";
                         compatible = "qcom,gsbi-v1.0.0";
@@ -336,6 +407,13 @@
                         };
                 };
 
+                rng@1a500000 {
+                        compatible = "qcom,prng";
+                        reg = <0x1a500000 0x200>;
+                        clocks = <&gcc PRNG_CLK>;
+                        clock-names = "core";
+                };
+
                 qcom,ssbi@500000 {
                         compatible = "qcom,ssbi";
                         reg = <0x00500000 0x1000>;
@@ -352,7 +430,8 @@
 
                                 pm8921_gpio: gpio@150 {
 
-                                        compatible = "qcom,pm8921-gpio";
+                                        compatible = "qcom,pm8921-gpio",
+                                                     "qcom,ssbi-gpio";
                                         reg = <0x150>;
                                         interrupts = <192 1>, <193 1>, <194 1>,
                                                      <195 1>, <196 1>, <197 1>,
@@ -376,7 +455,8 @@
                                 };
 
                                 pm8921_mpps: mpps@50 {
-                                        compatible = "qcom,pm8921-mpp";
+                                        compatible = "qcom,pm8921-mpp",
+                                                     "qcom,ssbi-mpp";
                                         reg = <0x50>;
                                         gpio-controller;
                                         #gpio-cells = <2>;
@@ -444,9 +524,55 @@
                         regulators {
                                 compatible = "qcom,rpm-pm8921-regulators";
 
+                                pm8921_s1: s1 {};
+                                pm8921_s2: s2 {};
+                                pm8921_s3: s3 {};
+                                pm8921_s4: s4 {};
+                                pm8921_s7: s7 {};
+                                pm8921_s8: s8 {};
+
+                                pm8921_l1: l1 {};
+                                pm8921_l2: l2 {};
+                                pm8921_l3: l3 {};
+                                pm8921_l4: l4 {};
+                                pm8921_l5: l5 {};
+                                pm8921_l6: l6 {};
+                                pm8921_l7: l7 {};
+                                pm8921_l8: l8 {};
+                                pm8921_l9: l9 {};
+                                pm8921_l10: l10 {};
+                                pm8921_l11: l11 {};
+                                pm8921_l12: l12 {};
+                                pm8921_l14: l14 {};
+                                pm8921_l15: l15 {};
+                                pm8921_l16: l16 {};
+                                pm8921_l17: l17 {};
+                                pm8921_l18: l18 {};
+                                pm8921_l21: l21 {};
+                                pm8921_l22: l22 {};
+                                pm8921_l23: l23 {};
+                                pm8921_l24: l24 {};
+                                pm8921_l25: l25 {};
+                                pm8921_l26: l26 {};
+                                pm8921_l27: l27 {};
+                                pm8921_l28: l28 {};
+                                pm8921_l29: l29 {};
+
+                                pm8921_lvs1: lvs1 {};
+                                pm8921_lvs2: lvs2 {};
+                                pm8921_lvs3: lvs3 {};
+                                pm8921_lvs4: lvs4 {};
+                                pm8921_lvs5: lvs5 {};
+                                pm8921_lvs6: lvs6 {};
+                                pm8921_lvs7: lvs7 {};
+
+                                pm8921_usb_switch: usb-switch {};
+
                                 pm8921_hdmi_switch: hdmi-switch {
                                         bias-pull-down;
                                 };
+
+                                pm8921_ncp: ncp {};
                         };
                 };
 
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
index 835bdc71c5ba..c0e205315042 100644
--- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -8,6 +8,8 @@
 
         aliases {
                 serial0 = &blsp1_uart2;
+                usid0 = &pm8941_0;
+                usid4 = &pm8841_0;
         };
 
         chosen {
diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
index c9c2b769554f..2052b84a77c6 100644
--- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
+++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
@@ -3,10 +3,11 @@
 
 / {
         model = "Qualcomm APQ8084/IFC6540";
-        compatible = "qcom,apq8084-ifc6540", "qcom,apq8084";
+        compatible = "qcom,apq8084-sbc", "qcom,apq8084";
 
         aliases {
                 serial0 = &blsp2_uart2;
+                usid0 = &pma8084_0;
         };
 
         chosen {
diff --git a/arch/arm/boot/dts/qcom-apq8084-mtp.dts b/arch/arm/boot/dts/qcom-apq8084-mtp.dts
index 3016c7048d44..d174d15bcf70 100644
--- a/arch/arm/boot/dts/qcom-apq8084-mtp.dts
+++ b/arch/arm/boot/dts/qcom-apq8084-mtp.dts
@@ -7,6 +7,7 @@
 
         aliases {
                 serial0 = &blsp2_uart2;
+                usid0 = &pma8084_0;
         };
 
         chosen {
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index fcffecae3e67..08214cbae16d 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -10,6 +10,17 @@
         compatible = "qcom,apq8084";
         interrupt-parent = <&intc>;
 
+        reserved-memory {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                smem_mem: smem_region@fa00000 {
+                        reg = <0xfa00000 0x200000>;
+                        no-map;
+                };
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -89,6 +100,15 @@
                 clock-frequency = <19200000>;
         };
 
+        smem {
+                compatible = "qcom,smem";
+
+                qcom,rpm-msg-ram = <&rpm_msg_ram>;
+                memory-region = <&smem_mem>;
+
+                hwlocks = <&tcsr_mutex 3>;
+        };
+
         soc: soc {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -103,6 +123,11 @@
                               <0xf9002000 0x1000>;
                 };
 
+                apcs: syscon@f9011000 {
+                        compatible = "syscon";
+                        reg = <0xf9011000 0x1000>;
+                };
+
                 timer@f9020000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -225,6 +250,22 @@
                         reg = <0xfc400000 0x4000>;
                 };
 
+                tcsr_mutex_regs: syscon@fd484000 {
+                        compatible = "syscon";
+                        reg = <0xfd484000 0x2000>;
+                };
+
+                tcsr_mutex: hwlock {
+                        compatible = "qcom,tcsr-mutex";
+                        syscon = <&tcsr_mutex_regs 0 0x80>;
+                        #hwlock-cells = <1>;
+                };
+
+                rpm_msg_ram: memory@fc428000 {
+                        compatible = "qcom,rpm-msg-ram";
+                        reg = <0xfc428000 0x4000>;
+                };
+
                 tlmm: pinctrl@fd510000 {
                         compatible = "qcom,apq8084-pinctrl";
                         reg = <0xfd510000 0x4000>;
@@ -282,4 +323,71 @@
                         #interrupt-cells = <4>;
                 };
         };
+
+        smd {
+                compatible = "qcom,smd";
+
+                rpm {
+                        interrupts = <0 168 1>;
+                        qcom,ipc = <&apcs 8 0>;
+                        qcom,smd-edge = <15>;
+
+                        rpm_requests {
+                                compatible = "qcom,rpm-apq8084";
+                                qcom,smd-channels = "rpm_requests";
+
+                                pma8084-regulators {
+                                        compatible = "qcom,rpm-pma8084-regulators";
+
+                                        pma8084_s1: s1 {};
+                                        pma8084_s2: s2 {};
+                                        pma8084_s3: s3 {};
+                                        pma8084_s4: s4 {};
+                                        pma8084_s5: s5 {};
+                                        pma8084_s6: s6 {};
+                                        pma8084_s7: s7 {};
+                                        pma8084_s8: s8 {};
+                                        pma8084_s9: s9 {};
+                                        pma8084_s10: s10 {};
+                                        pma8084_s11: s11 {};
+                                        pma8084_s12: s12 {};
+
+                                        pma8084_l1: l1 {};
+                                        pma8084_l2: l2 {};
+                                        pma8084_l3: l3 {};
+                                        pma8084_l4: l4 {};
+                                        pma8084_l5: l5 {};
+                                        pma8084_l6: l6 {};
+                                        pma8084_l7: l7 {};
+                                        pma8084_l8: l8 {};
+                                        pma8084_l9: l9 {};
+                                        pma8084_l10: l10 {};
+                                        pma8084_l11: l11 {};
+                                        pma8084_l12: l12 {};
+                                        pma8084_l13: l13 {};
+                                        pma8084_l14: l14 {};
+                                        pma8084_l15: l15 {};
+                                        pma8084_l16: l16 {};
+                                        pma8084_l17: l17 {};
+                                        pma8084_l18: l18 {};
+                                        pma8084_l19: l19 {};
+                                        pma8084_l20: l20 {};
+                                        pma8084_l21: l21 {};
+                                        pma8084_l22: l22 {};
+                                        pma8084_l23: l23 {};
+                                        pma8084_l24: l24 {};
+                                        pma8084_l25: l25 {};
+                                        pma8084_l26: l26 {};
+                                        pma8084_l27: l27 {};
+
+                                        pma8084_lvs1: lvs1 {};
+                                        pma8084_lvs2: lvs2 {};
+                                        pma8084_lvs3: lvs3 {};
+                                        pma8084_lvs4: lvs4 {};
+
+                                        pma8084_5vs1: 5vs1 {};
+                                };
+                        };
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index 134cd91d68ec..51a40d84145c 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -49,6 +49,29 @@
                 qcom,no-pc-write;
         };
 
+        clocks {
+                cxo_board {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <19200000>;
+                        clock-output-names = "cxo_board";
+                };
+
+                pxo_board {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                        clock-output-names = "pxo_board";
+                };
+
+                sleep_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <32768>;
+                        clock-output-names = "sleep_clk";
+                };
+        };
+
         soc: soc {
                 #address-cells = <1>;
                 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
index 016f9ad9392a..a0398b69f4f2 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
@@ -1,6 +1,9 @@
 #include "qcom-msm8974.dtsi"
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
         model = "Sony Xperia Z1";
@@ -14,24 +17,403 @@
                 stdout-path = "serial0:115200n8";
         };
 
+        gpio-keys {
+                compatible = "gpio-keys";
+                input-name = "gpio-keys";
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&gpio_keys_pin_a>;
+
+                volume-down {
+                        label = "volume_down";
+                        gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_VOLUMEDOWN>;
+                };
+
+                camera-snapshot {
+                        label = "camera_snapshot";
+                        gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_CAMERA>;
+                };
+
+                camera-focus {
+                        label = "camera_focus";
+                        gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_CAMERA_FOCUS>;
+                };
+
+                volume-up {
+                        label = "volume_up";
+                        gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
+                        linux,input-type = <1>;
+                        linux,code = <KEY_VOLUMEUP>;
+                };
+        };
+
         memory@0 {
                 reg = <0 0x40000000>, <0x40000000 0x40000000>;
                 device_type = "memory";
         };
+
+        smd {
+                rpm {
+                        rpm_requests {
+                                pm8841-regulators {
+                                        s1 {
+                                                regulator-min-microvolt = <675000>;
+                                                regulator-max-microvolt = <1050000>;
+                                        };
+
+                                        s2 {
+                                                regulator-min-microvolt = <500000>;
+                                                regulator-max-microvolt = <1050000>;
+                                        };
+
+                                        s3 {
+                                                regulator-min-microvolt = <500000>;
+                                                regulator-max-microvolt = <1050000>;
+                                        };
+
+                                        s4 {
+                                                regulator-min-microvolt = <500000>;
+                                                regulator-max-microvolt = <1050000>;
+                                        };
+                                };
+
+                                pm8941-regulators {
+                                        vdd_l1_l3-supply = <&pm8941_s1>;
+                                        vdd_l2_lvs1_2_3-supply = <&pm8941_s3>;
+                                        vdd_l4_l11-supply = <&pm8941_s1>;
+                                        vdd_l5_l7-supply = <&pm8941_s2>;
+                                        vdd_l6_l12_l14_l15-supply = <&pm8941_s2>;
+                                        vdd_l9_l10_l17_l22-supply = <&vreg_boost>;
+                                        vdd_l13_l20_l23_l24-supply = <&vreg_boost>;
+                                        vdd_l21-supply = <&vreg_boost>;
+                                        vin_5vs-supply = <&pm8941_5v>;
+
+                                        s1 {
+                                                regulator-min-microvolt = <1300000>;
+                                                regulator-max-microvolt = <1300000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+
+                                        s2 {
+                                                regulator-min-microvolt = <2150000>;
+                                                regulator-max-microvolt = <2150000>;
+                                                regulator-boot-on;
+                                        };
+
+                                        s3 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+
+                                        s4 {
+                                                regulator-min-microvolt = <5000000>;
+                                                regulator-max-microvolt = <5000000>;
+                                        };
+
+                                        l1 {
+                                                regulator-min-microvolt = <1225000>;
+                                                regulator-max-microvolt = <1225000>;
+
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+
+                                        l2 {
+                                                regulator-min-microvolt = <1200000>;
+                                                regulator-max-microvolt = <1200000>;
+                                        };
+
+                                        l3 {
+                                                regulator-min-microvolt = <1200000>;
+                                                regulator-max-microvolt = <1200000>;
+                                        };
+
+                                        l4 {
+                                                regulator-min-microvolt = <1225000>;
+                                                regulator-max-microvolt = <1225000>;
+                                        };
+
+                                        l5 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                        };
+
+                                        l6 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+
+                                                regulator-boot-on;
+                                        };
+
+                                        l7 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+
+                                                regulator-boot-on;
+                                        };
+
+                                        l8 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                        };
+
+                                        l9 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <2950000>;
+                                        };
+
+                                        l11 {
+                                                regulator-min-microvolt = <1300000>;
+                                                regulator-max-microvolt = <1350000>;
+                                        };
+
+                                        l12 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+
+                                        l13 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <2950000>;
+
+                                                regulator-boot-on;
+                                        };
+
+                                        l14 {
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                        };
+
+                                        l15 {
+                                                regulator-min-microvolt = <2050000>;
+                                                regulator-max-microvolt = <2050000>;
+                                        };
+
+                                        l16 {
+                                                regulator-min-microvolt = <2700000>;
+                                                regulator-max-microvolt = <2700000>;
+                                        };
+
+                                        l17 {
+                                                regulator-min-microvolt = <2700000>;
+                                                regulator-max-microvolt = <2700000>;
+                                        };
+
+                                        l18 {
+                                                regulator-min-microvolt = <2850000>;
+                                                regulator-max-microvolt = <2850000>;
+                                        };
+
+                                        l19 {
+                                                regulator-min-microvolt = <3300000>;
+                                                regulator-max-microvolt = <3300000>;
+                                        };
+
+                                        l20 {
+                                                regulator-min-microvolt = <2950000>;
+                                                regulator-max-microvolt = <2950000>;
+
+                                                regulator-allow-set-load;
+                                                regulator-boot-on;
+                                                regulator-system-load = <200000>;
+                                        };
+
+                                        l21 {
+                                                regulator-min-microvolt = <2950000>;
+                                                regulator-max-microvolt = <2950000>;
+
+                                                regulator-boot-on;
+                                        };
+
+                                        l22 {
+                                                regulator-min-microvolt = <3000000>;
+                                                regulator-max-microvolt = <3000000>;
+                                        };
+
+                                        l23 {
+                                                regulator-min-microvolt = <2800000>;
+                                                regulator-max-microvolt = <2800000>;
+                                        };
+
+                                        l24 {
+                                                regulator-min-microvolt = <3075000>;
+                                                regulator-max-microvolt = <3075000>;
+
+                                                regulator-boot-on;
+                                        };
+                                };
+                        };
+                };
+        };
+
+        vreg_boost: vreg-boost {
+                compatible = "regulator-fixed";
+
+                regulator-name = "vreg-boost";
+                regulator-min-microvolt = <3150000>;
+                regulator-max-microvolt = <3150000>;
+
+                regulator-always-on;
+                regulator-boot-on;
+
+                gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&boost_bypass_n_pin>;
+     };
 };
 
 &soc {
+        sdhci@f9824900 {
+                status = "ok";
+
+                vmmc-supply = <&pm8941_l20>;
+                vqmmc-supply = <&pm8941_s3>;
+
+                bus-width = <8>;
+                non-removable;
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&sdhc1_pin_a>;
+        };
+
+        sdhci@f98a4900 {
+                status = "ok";
+
+                bus-width = <4>;
+
+                vmmc-supply = <&pm8941_l21>;
+                vqmmc-supply = <&pm8941_l13>;
+
+                cd-gpios = <&msmgpio 62 GPIO_ACTIVE_LOW>;
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&sdhc2_pin_a>, <&sdhc2_cd_pin_a>;
+        };
+
         serial@f991e000 {
                 status = "ok";
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&blsp1_uart2_pin_a>;
+        };
+
+        pinctrl@fd510000 {
+                blsp1_uart2_pin_a: blsp1-uart2-pin-active {
+                        rx {
+                                pins = "gpio5";
+                                function = "blsp_uart2";
+
+                                drive-strength = <2>;
+                                bias-pull-up;
+                        };
+
+                        tx {
+                                pins = "gpio4";
+                                function = "blsp_uart2";
+
+                                drive-strength = <4>;
+                                bias-disable;
+                        };
+                };
+
+                sdhc1_pin_a: sdhc1-pin-active {
+                        clk {
+                                pins = "sdc1_clk";
+                                drive-strength = <16>;
+                                bias-disable;
+                        };
+
+                        cmd-data {
+                                pins = "sdc1_cmd", "sdc1_data";
+                                drive-strength = <10>;
+                                bias-pull-up;
+                        };
+                };
+
+                sdhc2_cd_pin_a: sdhc2-cd-pin-active {
+                        pins = "gpio62";
+                        function = "gpio";
+
+                        drive-strength = <2>;
+                        bias-disable;
+                 };
+
+                sdhc2_pin_a: sdhc2-pin-active {
+                        clk {
+                                pins = "sdc2_clk";
+                                drive-strength = <10>;
+                                bias-disable;
+                        };
+
+                        cmd-data {
+                                pins = "sdc2_cmd", "sdc2_data";
+                                drive-strength = <6>;
+                                bias-pull-up;
+                        };
+                };
+
         };
 };
 
 &spmi_bus {
         pm8941@0 {
+                charger@1000 {
+                        qcom,fast-charge-safe-current = <1500000>;
+                        qcom,fast-charge-current-limit = <1500000>;
+                        qcom,dc-current-limit = <1800000>;
+                        qcom,fast-charge-safe-voltage = <4400000>;
+                        qcom,fast-charge-high-threshold-voltage = <4350000>;
+                        qcom,fast-charge-low-threshold-voltage = <3400000>;
+                        qcom,auto-recharge-threshold-voltage = <4200000>;
+                        qcom,minimum-input-voltage = <4300000>;
+                };
+
+                gpios@c000 {
+                        boost_bypass_n_pin: boost-bypass {
+                                pins = "gpio21";
+                                function = "normal";
+                        };
+
+                        gpio_keys_pin_a: gpio-keys-active {
+                                pins = "gpio2", "gpio3", "gpio4", "gpio5";
+                                function = "normal";
+
+                                bias-pull-up;
+                                power-source = <PM8941_GPIO_S3>;
+                        };
+                };
+
                 coincell@2800 {
                         status = "ok";
                         qcom,rset-ohms = <2100>;
                         qcom,vset-millivolts = <3000>;
                 };
         };
+
+        pm8941@1 {
+                wled@d800 {
+                        status = "ok";
+
+                        qcom,cs-out;
+                        qcom,current-limit = <20>;
+                        qcom,current-boost-limit = <805>;
+                        qcom,switching-freq = <1600>;
+                        qcom,ovp = <29>;
+                        qcom,num-strings = <2>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 753bdfddd46e..dfdafdcb8aae 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -319,6 +319,17 @@
                         interrupts = <0 208 0>;
                 };
 
+                blsp_i2c8: i2c@f9964000 {
+                        status = "disabled";
+                        compatible = "qcom,i2c-qup-v2.1.1";
+                        reg = <0xf9964000 0x1000>;
+                        interrupts = <0 102 IRQ_TYPE_NONE>;
+                        clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
+                        clock-names = "core", "iface";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
                 blsp_i2c11: i2c@f9967000 {
                         status = "disabled";
                         compatible = "qcom,i2c-qup-v2.1.1";
diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi
index 8f1a0b162017..9f357f68713c 100644
--- a/arch/arm/boot/dts/qcom-pm8841.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8841.dtsi
@@ -3,14 +3,14 @@
 
 &spmi_bus {
 
-        usid4: pm8841@4 {
-                compatible = "qcom,spmi-pmic";
+        pm8841_0: pm8841@4 {
+                compatible = "qcom,pm8841", "qcom,spmi-pmic";
                 reg = <0x4 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
 
                 pm8841_mpps: mpps@a000 {
-                        compatible = "qcom,pm8841-mpp";
+                        compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
                         reg = <0xa000 0x400>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -27,8 +27,8 @@
                 };
         };
 
-        usid5: pm8841@5 {
-                compatible = "qcom,spmi-pmic";
+        pm8841_1: pm8841@5 {
+                compatible = "qcom,pm8841", "qcom,spmi-pmic";
                 reg = <0x5 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index b0d443999fcc..ca53a5947437 100644
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -4,8 +4,8 @@
 
 &spmi_bus {
 
-        usid0: pm8941@0 {
-                compatible ="qcom,spmi-pmic";
+        pm8941_0: pm8941@0 {
+                compatible = "qcom,pm8941", "qcom,spmi-pmic";
                 reg = <0x0 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -48,7 +48,7 @@
                 };
 
                 pm8941_gpios: gpios@c000 {
-                        compatible = "qcom,pm8941-gpio";
+                        compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio";
                         reg = <0xc000 0x2400>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -91,7 +91,7 @@
                 };
 
                 pm8941_mpps: mpps@a000 {
-                        compatible = "qcom,pm8941-mpp";
+                        compatible = "qcom,pm8941-mpp", "qcom,spmi-mpp";
                         reg = <0xa000 0x800>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -153,23 +153,18 @@
                 };
         };
 
-        usid1: pm8941@1 {
-                compatible = "qcom,spmi-pmic";
+        pm8941_1: pm8941@1 {
+                compatible = "qcom,pm8941", "qcom,spmi-pmic";
                 reg = <0x1 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
 
-                wled@d800 {
+                pm8941_wled: wled@d800 {
                         compatible = "qcom,pm8941-wled";
                         reg = <0xd800 0x100>;
                         label = "backlight";
 
-                        qcom,cs-out;
-                        qcom,current-limit = <20>;
-                        qcom,current-boost-limit = <805>;
-                        qcom,switching-freq = <1600>;
-                        qcom,ovp = <29>;
-                        qcom,num-strings = <2>;
+                        status = "disabled";
                 };
         };
 };
diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi
index 5e240ccc08b7..4e9bd3f88473 100644
--- a/arch/arm/boot/dts/qcom-pma8084.dtsi
+++ b/arch/arm/boot/dts/qcom-pma8084.dtsi
@@ -4,8 +4,8 @@
 
 &spmi_bus {
 
-        usid0: pma8084@0 {
-                compatible = "qcom,spmi-pmic";
+        pma8084_0: pma8084@0 {
+                compatible = "qcom,pma8084", "qcom,spmi-pmic";
                 reg = <0x0 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -19,7 +19,7 @@
                 };
 
                 pma8084_gpios: gpios@c000 {
-                        compatible = "qcom,pma8084-gpio";
+                        compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio";
                         reg = <0xc000 0x1600>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -48,7 +48,7 @@
                 };
 
                 pma8084_mpps: mpps@a000 {
-                        compatible = "qcom,pma8084-mpp";
+                        compatible = "qcom,pma8084-mpp", "qcom,spmi-mpp";
                         reg = <0xa000 0x800>;
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -101,8 +101,8 @@
                 };
         };
 
-        usid1: pma8084@1 {
-                compatible = "qcom,spmi-pmic";
+        pma8084_1: pma8084@1 {
+                compatible = "qcom,pma8084", "qcom,spmi-pmic";
                 reg = <0x1 SPMI_USID>;
                 #address-cells = <1>;
                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index a4c425923c05..590257095700 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
@@ -23,7 +23,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
-                stdout-path = &scifa0;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -110,7 +110,7 @@
                         gpios = <&pfc 324 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_0>;
                         label = "S16";
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 menu-key {
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index 105d9c95de4a..78a21f2828df 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -85,7 +85,7 @@
                         gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         label = "SW3";
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
 
                 back-key {
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 20d20f67620b..6ef954766eef 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -26,6 +26,7 @@
                         reg = <0x0>;
                         clock-frequency = <800000000>;
                         power-domains = <&pd_a3sm>;
+                        next-level-cache = <&L2>;
                 };
         };
 
@@ -37,6 +38,18 @@
                       <0xc2000000 0x1000>;
         };
 
+        L2: cache-controller {
+                compatible = "arm,pl310-cache";
+                reg = <0xf0100000 0x1000>;
+                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+                power-domains = <&pd_a3sm>;
+                arm,data-latency = <3 3 3>;
+                arm,tag-latency = <2 2 2>;
+                arm,shared-override;
+                cache-unified;
+                cache-level = <2>;
+        };
+
         dbsc3: memory-controller@fe400000 {
                 compatible = "renesas,dbsc3-r8a7740";
                 reg = <0xfe400000 0x400>;
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
index 90543b12d7e2..a52b359e2ae2 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -28,8 +28,8 @@
         };
 
         chosen {
-                bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
-                stdout-path = &scif0;
+                bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw";
+                stdout-path = "serial0:115200n8";
         };
 
         memory {
@@ -137,10 +137,14 @@
         };
 
         sdhi0_pins: sd0 {
-                renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
-                                  "sdhi0_cd";
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
                 renesas,function = "sdhi0";
         };
+        sdhi0_pup_pins: sd0_pup {
+                renesas,groups = "sdhi0_cd", "sdhi0_wp";
+                renesas,function = "sdhi0";
+                bias-pull-up;
+        };
 
         hspi0_pins: hspi0 {
                 renesas,groups = "hspi0_a";
@@ -168,8 +172,13 @@
         };
 };
 
+&rcar_sound {
+        /* Single DAI */
+        #sound-dai-cells = <0>;
+};
+
 &sdhi0 {
-        pinctrl-0 = <&sdhi0_pins>;
+        pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
         pinctrl-names = "default";
 
         vmmc-supply = <&fixedregulator3v3>;
@@ -184,16 +193,20 @@
         status = "okay";
 
         flash: flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
                 compatible = "spansion,s25fl008k", "jedec,spi-nor";
                 reg = <0>;
                 spi-max-frequency = <104000000>;
                 m25p,fast-read;
 
-                partition@0 {
-                        label = "data(spi)";
-                        reg = <0x00000000 0x00100000>;
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "data(spi)";
+                                reg = <0x00000000 0x00100000>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 757c6ff319df..791aafd310a5 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -236,7 +236,12 @@
         };
 
         rcar_sound: sound@ffd90000 {
-                #sound-dai-cells = <1>;
+                /*
+                 * #sound-dai-cells is required
+                 *
+                 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
+                 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
+                 */
                 compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
                 reg =   <0xffd90000 0x1000>,    /* SRU */
                         <0xffd91000 0x240>,     /* SSI */
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index c553abd711ee..052dcee4790d 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -47,13 +47,13 @@
         compatible = "renesas,lager", "renesas,r8a7790";
 
         aliases {
-                serial0 = &scifa0;
+                serial0 = &scif0;
                 serial1 = &scifa1;
         };
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scifa0;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -77,28 +77,28 @@
                 button@1 {
                         linux,code = <KEY_1>;
                         label = "SW2-1";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         linux,code = <KEY_2>;
                         label = "SW2-2";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                         gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
                 };
                 button@3 {
                         linux,code = <KEY_3>;
                         label = "SW2-3";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                         gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
                 };
                 button@4 {
                         linux,code = <KEY_4>;
                         label = "SW2-4";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                         gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
                 };
@@ -296,9 +296,9 @@
                 renesas,function = "du";
         };
 
-        scifa0_pins: serial0 {
-                renesas,groups = "scifa0_data";
-                renesas,function = "scifa0";
+        scif0_pins: serial0 {
+                renesas,groups = "scif0_data";
+                renesas,function = "scif0";
         };
 
         ether_pins: ether {
@@ -439,8 +439,6 @@
         status = "okay";
 
         flash: flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
                 reg = <0>;
                 spi-max-frequency = <30000000>;
@@ -450,25 +448,31 @@
                 spi-cpol;
                 m25p,fast-read;
 
-                partition@0 {
-                        label = "loader";
-                        reg = <0x00000000 0x00040000>;
-                        read-only;
-                };
-                partition@40000 {
-                        label = "user";
-                        reg = <0x00040000 0x00400000>;
-                        read-only;
-                };
-                partition@440000 {
-                        label = "flash";
-                        reg = <0x00440000 0x03bc0000>;
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "loader";
+                                reg = <0x00000000 0x00040000>;
+                                read-only;
+                        };
+                        partition@40000 {
+                                label = "user";
+                                reg = <0x00040000 0x00400000>;
+                                read-only;
+                        };
+                        partition@440000 {
+                                label = "flash";
+                                reg = <0x00440000 0x03bc0000>;
+                        };
                 };
         };
 };
 
-&scifa0 {
-        pinctrl-0 = <&scifa0_pins>;
+&scif0 {
+        pinctrl-0 = <&scif0_pins>;
         pinctrl-names = "default";
 
         status = "okay";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e07ae5d45e19..7dfd393bfc7e 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -143,7 +143,7 @@
                 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
-                gpio-ranges = <&pfc 0 32 32>;
+                gpio-ranges = <&pfc 0 32 30>;
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
@@ -156,7 +156,7 @@
                 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
-                gpio-ranges = <&pfc 0 64 32>;
+                gpio-ranges = <&pfc 0 64 30>;
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
@@ -266,7 +266,7 @@
         };
 
         dmac0: dma-controller@e6700000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
                 reg = <0 0xe6700000 0 0x20000>;
                 interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
                               0 200 IRQ_TYPE_LEVEL_HIGH
@@ -297,7 +297,7 @@
         };
 
         dmac1: dma-controller@e6720000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
                 reg = <0 0xe6720000 0 0x20000>;
                 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
                               0 216 IRQ_TYPE_LEVEL_HIGH
@@ -328,7 +328,7 @@
         };
 
         audma0: dma-controller@ec700000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
                 reg = <0 0xec700000 0 0x10000>;
                 interrupts =    <0 346 IRQ_TYPE_LEVEL_HIGH
                                  0 320 IRQ_TYPE_LEVEL_HIGH
@@ -357,7 +357,7 @@
         };
 
         audma1: dma-controller@ec720000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
                 reg = <0 0xec720000 0 0x10000>;
                 interrupts =    <0 347 IRQ_TYPE_LEVEL_HIGH
                                  0 333 IRQ_TYPE_LEVEL_HIGH
@@ -386,7 +386,7 @@
         };
 
         usb_dmac0: dma-controller@e65a0000 {
-                compatible = "renesas,usb-dmac";
+                compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
                 reg = <0 0xe65a0000 0 0x100>;
                 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
                               0 109 IRQ_TYPE_LEVEL_HIGH>;
@@ -398,7 +398,7 @@
         };
 
         usb_dmac1: dma-controller@e65b0000 {
-                compatible = "renesas,usb-dmac";
+                compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
                 reg = <0 0xe65b0000 0 0x100>;
                 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
                               0 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -417,6 +417,7 @@
                 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <110>;
                 status = "disabled";
         };
 
@@ -428,6 +429,7 @@
                 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -439,6 +441,7 @@
                 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -450,6 +453,7 @@
                 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <110>;
                 status = "disabled";
         };
 
@@ -1766,7 +1770,7 @@
         };
 
         ipmmu_sy0: mmu@e6280000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6280000 0 0x1000>;
                 interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
                              <0 224 IRQ_TYPE_LEVEL_HIGH>;
@@ -1775,7 +1779,7 @@
         };
 
         ipmmu_sy1: mmu@e6290000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6290000 0 0x1000>;
                 interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1783,7 +1787,7 @@
         };
 
         ipmmu_ds: mmu@e6740000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6740000 0 0x1000>;
                 interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
                              <0 199 IRQ_TYPE_LEVEL_HIGH>;
@@ -1792,7 +1796,7 @@
         };
 
         ipmmu_mp: mmu@ec680000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xec680000 0 0x1000>;
                 interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1800,7 +1804,7 @@
         };
 
         ipmmu_mx: mmu@fe951000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xfe951000 0 0x1000>;
                 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                              <0 221 IRQ_TYPE_LEVEL_HIGH>;
@@ -1809,7 +1813,7 @@
         };
 
         ipmmu_rt: mmu@ffc80000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
                 reg = <0 0xffc80000 0 0x1000>;
                 interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
deleted file mode 100644
index 655d1804e5e9..000000000000
--- a/arch/arm/boot/dts/r8a7791-henninger.dts
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * Device Tree Source for the Henninger board
- *
- * Copyright (C) 2014 Renesas Solutions Corp.
- * Copyright (C) 2014 Cogent Embedded, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/dts-v1/;
-#include "r8a7791.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-        model = "Henninger";
-        compatible = "renesas,henninger", "renesas,r8a7791";
-
-        aliases {
-                serial0 = &scif0;
-        };
-
-        chosen {
-                bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif0;
-        };
-
-        memory@40000000 {
-                device_type = "memory";
-                reg = <0 0x40000000 0 0x40000000>;
-        };
-
-        memory@200000000 {
-                device_type = "memory";
-                reg = <2 0x00000000 0 0x40000000>;
-        };
-
-        vcc_sdhi0: regulator@0 {
-                compatible = "regulator-fixed";
-
-                regulator-name = "SDHI0 Vcc";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                regulator-always-on;
-        };
-
-        vccq_sdhi0: regulator@1 {
-                compatible = "regulator-gpio";
-
-                regulator-name = "SDHI0 VccQ";
-                regulator-min-microvolt = <1800000>;
-                regulator-max-microvolt = <3300000>;
-
-                gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
-                gpios-states = <1>;
-                states = <3300000 1
-                          1800000 0>;
-        };
-
-        vcc_sdhi2: regulator@2 {
-                compatible = "regulator-fixed";
-
-                regulator-name = "SDHI2 Vcc";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                regulator-always-on;
-        };
-
-        vccq_sdhi2: regulator@3 {
-                compatible = "regulator-gpio";
-
-                regulator-name = "SDHI2 VccQ";
-                regulator-min-microvolt = <1800000>;
-                regulator-max-microvolt = <3300000>;
-
-                gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
-                gpios-states = <1>;
-                states = <3300000 1
-                          1800000 0>;
-        };
-};
-
-&extal_clk {
-        clock-frequency = <20000000>;
-};
-
-&pfc {
-        scif0_pins: serial0 {
-                renesas,groups = "scif0_data_d";
-                renesas,function = "scif0";
-        };
-
-        ether_pins: ether {
-                renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
-                renesas,function = "eth";
-        };
-
-        phy1_pins: phy1 {
-                renesas,groups = "intc_irq0";
-                renesas,function = "intc";
-        };
-
-        sdhi0_pins: sd0 {
-                renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
-                renesas,function = "sdhi0";
-        };
-
-        sdhi2_pins: sd2 {
-                renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
-                renesas,function = "sdhi2";
-        };
-
-        i2c2_pins: i2c2 {
-                renesas,groups = "i2c2";
-                renesas,function = "i2c2";
-        };
-
-        qspi_pins: spi0 {
-                renesas,groups = "qspi_ctrl", "qspi_data4";
-                renesas,function = "qspi";
-        };
-
-        msiof0_pins: spi1 {
-                renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
-                                 "msiof0_tx";
-                renesas,function = "msiof0";
-        };
-
-        usb0_pins: usb0 {
-                renesas,groups = "usb0";
-                renesas,function = "usb0";
-        };
-
-        usb1_pins: usb1 {
-                renesas,groups = "usb1";
-                renesas,function = "usb1";
-        };
-
-        vin0_pins: vin0 {
-                renesas,groups = "vin0_data8", "vin0_clk";
-                renesas,function = "vin0";
-        };
-
-        can0_pins: can0 {
-                renesas,groups = "can0_data";
-                renesas,function = "can0";
-        };
-};
-
-&scif0 {
-        pinctrl-0 = <&scif0_pins>;
-        pinctrl-names = "default";
-
-        status = "okay";
-};
-
-&ether {
-        pinctrl-0 = <&ether_pins &phy1_pins>;
-        pinctrl-names = "default";
-
-        phy-handle = <&phy1>;
-        renesas,ether-link-active-low;
-        status = "okay";
-
-        phy1: ethernet-phy@1 {
-                reg = <1>;
-                interrupt-parent = <&irqc0>;
-                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-                micrel,led-mode = <1>;
-        };
-};
-
-&sata0 {
-        status = "okay";
-};
-
-&sdhi0 {
-        pinctrl-0 = <&sdhi0_pins>;
-        pinctrl-names = "default";
-
-        vmmc-supply = <&vcc_sdhi0>;
-        vqmmc-supply = <&vccq_sdhi0>;
-        cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
-        wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
-        status = "okay";
-};
-
-&sdhi2 {
-        pinctrl-0 = <&sdhi2_pins>;
-        pinctrl-names = "default";
-
-        vmmc-supply = <&vcc_sdhi2>;
-        vqmmc-supply = <&vccq_sdhi2>;
-        cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
-        status = "okay";
-};
-
-&i2c2 {
-        pinctrl-0 = <&i2c2_pins>;
-        pinctrl-names = "default";
-
-        status = "okay";
-        clock-frequency = <400000>;
-
-        composite-in@20 {
-                compatible = "adi,adv7180";
-                reg = <0x20>;
-                remote = <&vin0>;
-
-                port {
-                        adv7180: endpoint {
-                                bus-width = <8>;
-                                remote-endpoint = <&vin0ep>;
-                        };
-                };
-        };
-};
-
-&qspi {
-        pinctrl-0 = <&qspi_pins>;
-        pinctrl-names = "default";
-
-        status = "okay";
-
-        flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "spansion,s25fl512s", "jedec,spi-nor";
-                reg = <0>;
-                spi-max-frequency = <30000000>;
-                spi-tx-bus-width = <4>;
-                spi-rx-bus-width = <4>;
-                m25p,fast-read;
-
-                partition@0 {
-                        label = "loader_prg";
-                        reg = <0x00000000 0x00040000>;
-                        read-only;
-                };
-                partition@40000 {
-                        label = "user_prg";
-                        reg = <0x00040000 0x00400000>;
-                        read-only;
-                };
-                partition@440000 {
-                        label = "flash_fs";
-                        reg = <0x00440000 0x03bc0000>;
-                };
-        };
-};
-
-&msiof0 {
-        pinctrl-0 = <&msiof0_pins>;
-        pinctrl-names = "default";
-
-        status = "okay";
-
-        pmic@0 {
-                compatible = "renesas,r2a11302ft";
-                reg = <0>;
-                spi-max-frequency = <6000000>;
-                spi-cpol;
-                spi-cpha;
-        };
-};
-
-&pci0 {
-        status = "okay";
-        pinctrl-0 = <&usb0_pins>;
-        pinctrl-names = "default";
-};
-
-&pci1 {
-        status = "okay";
-        pinctrl-0 = <&usb1_pins>;
-        pinctrl-names = "default";
-};
-
-&hsusb {
-        status = "okay";
-        pinctrl-0 = <&usb0_pins>;
-        pinctrl-names = "default";
-        renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
-};
-
-&usbphy {
-        status = "okay";
-};
-
-&pcie_bus_clk {
-        status = "okay";
-};
-
-&pciec {
-        status = "okay";
-};
-
-/* composite video input */
-&vin0 {
-        status = "okay";
-        pinctrl-0 = <&vin0_pins>;
-        pinctrl-names = "default";
-
-        port {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                vin0ep: endpoint {
-                        remote-endpoint = <&adv7180>;
-                        bus-width = <8>;
-                };
-        };
-};
-
-&can0 {
-        pinctrl-0 = <&can0_pins>;
-        pinctrl-names = "default";
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index fc44ea361a4b..45256f3cc835 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -54,7 +54,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif0;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -79,77 +79,77 @@
                         gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_1>;
                         label = "SW2-1";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-2 {
                         gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_2>;
                         label = "SW2-2";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-3 {
                         gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_3>;
                         label = "SW2-3";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-4 {
                         gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_4>;
                         label = "SW2-4";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-a {
                         gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_A>;
                         label = "SW30";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-b {
                         gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_B>;
                         label = "SW31";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-c {
                         gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_C>;
                         label = "SW32";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-d {
                         gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_D>;
                         label = "SW33";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-e {
                         gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_E>;
                         label = "SW34";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-f {
                         gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_F>;
                         label = "SW35";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
                 key-g {
                         gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_G>;
                         label = "SW36";
-                        gpio-key,wakeup;
+                        wakeup-source;
                         debounce-interval = <20>;
                 };
         };
@@ -326,7 +326,7 @@
         };
 
         du_pins: du {
-                renesas,groups = "du_rgb666", "du_sync", "du_disp", "du_clk_out_0";
+                renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
                 renesas,function = "du";
         };
 
@@ -479,8 +479,6 @@
         status = "okay";
 
         flash: flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
                 reg = <0>;
                 spi-max-frequency = <30000000>;
@@ -490,19 +488,25 @@
                 spi-cpol;
                 m25p,fast-read;
 
-                partition@0 {
-                        label = "loader";
-                        reg = <0x00000000 0x00080000>;
-                        read-only;
-                };
-                partition@80000 {
-                        label = "user";
-                        reg = <0x00080000 0x00580000>;
-                        read-only;
-                };
-                partition@600000 {
-                        label = "flash";
-                        reg = <0x00600000 0x03a00000>;
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "loader";
+                                reg = <0x00000000 0x00080000>;
+                                read-only;
+                        };
+                        partition@80000 {
+                                label = "user";
+                                reg = <0x00080000 0x00580000>;
+                                read-only;
+                        };
+                        partition@600000 {
+                                label = "flash";
+                                reg = <0x00600000 0x03a00000>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index fe0f12fc02a1..6713b1ea732b 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -22,7 +22,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif0;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -134,6 +134,11 @@
                 renesas,groups = "vin0_data8", "vin0_clk";
                 renesas,function = "vin0";
         };
+
+        can0_pins: can0 {
+                renesas,groups = "can0_data";
+                renesas,function = "can0";
+        };
 };
 
 &scif0 {
@@ -187,8 +192,6 @@
         status = "okay";
 
         flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
                 reg = <0>;
                 spi-max-frequency = <30000000>;
@@ -196,19 +199,25 @@
                 spi-rx-bus-width = <4>;
                 m25p,fast-read;
 
-                partition@0 {
-                        label = "loader_prg";
-                        reg = <0x00000000 0x00040000>;
-                        read-only;
-                };
-                partition@40000 {
-                        label = "user_prg";
-                        reg = <0x00040000 0x00400000>;
-                        read-only;
-                };
-                partition@440000 {
-                        label = "flash_fs";
-                        reg = <0x00440000 0x03bc0000>;
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "loader_prg";
+                                reg = <0x00000000 0x00040000>;
+                                read-only;
+                        };
+                        partition@40000 {
+                                label = "user_prg";
+                                reg = <0x00040000 0x00400000>;
+                                read-only;
+                        };
+                        partition@440000 {
+                                label = "flash_fs";
+                                reg = <0x00440000 0x03bc0000>;
+                        };
                 };
         };
 };
@@ -269,6 +278,14 @@
         status = "okay";
 };
 
+&hsusb {
+        pinctrl-0 = <&usb0_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+        renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
+};
+
 &usbphy {
         status = "okay";
 };
@@ -280,3 +297,10 @@
 &pciec {
         status = "okay";
 };
+
+&can0 {
+        pinctrl-0 = <&can0_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 328f48bd15e7..2a369ddcb6fd 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -100,7 +100,7 @@
                 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
-                gpio-ranges = <&pfc 0 32 32>;
+                gpio-ranges = <&pfc 0 32 26>;
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
@@ -255,7 +255,7 @@
         };
 
         dmac0: dma-controller@e6700000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
                 reg = <0 0xe6700000 0 0x20000>;
                 interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
                               0 200 IRQ_TYPE_LEVEL_HIGH
@@ -286,7 +286,7 @@
         };
 
         dmac1: dma-controller@e6720000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
                 reg = <0 0xe6720000 0 0x20000>;
                 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
                               0 216 IRQ_TYPE_LEVEL_HIGH
@@ -317,7 +317,7 @@
         };
 
         audma0: dma-controller@ec700000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
                 reg = <0 0xec700000 0 0x10000>;
                 interrupts =    <0 346 IRQ_TYPE_LEVEL_HIGH
                                  0 320 IRQ_TYPE_LEVEL_HIGH
@@ -346,7 +346,7 @@
         };
 
         audma1: dma-controller@ec720000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
                 reg = <0 0xec720000 0 0x10000>;
                 interrupts =    <0 347 IRQ_TYPE_LEVEL_HIGH
                                  0 333 IRQ_TYPE_LEVEL_HIGH
@@ -375,7 +375,7 @@
         };
 
         usb_dmac0: dma-controller@e65a0000 {
-                compatible = "renesas,usb-dmac";
+                compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
                 reg = <0 0xe65a0000 0 0x100>;
                 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
                               0 109 IRQ_TYPE_LEVEL_HIGH>;
@@ -387,7 +387,7 @@
         };
 
         usb_dmac1: dma-controller@e65b0000 {
-                compatible = "renesas,usb-dmac";
+                compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
                 reg = <0 0xe65b0000 0 0x100>;
                 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
                               0 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -407,6 +407,7 @@
                 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -418,6 +419,7 @@
                 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -429,6 +431,7 @@
                 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -440,6 +443,7 @@
                 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -451,6 +455,7 @@
                 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -463,6 +468,7 @@
                 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
                 power-domains = <&cpg_clocks>;
+                i2c-scl-internal-delay-ns = <110>;
                 status = "disabled";
         };
 
@@ -509,7 +515,6 @@
         pfc: pfc@e6060000 {
                 compatible = "renesas,pfc-r8a7791";
                 reg = <0 0xe6060000 0 0x250>;
-                #gpio-range-cells = <3>;
         };
 
         mmcif0: mmc@ee200000 {
@@ -786,6 +791,18 @@
                 status = "disabled";
         };
 
+        avb: ethernet@e6800000 {
+                compatible = "renesas,etheravb-r8a7791",
+                             "renesas,etheravb-rcar-gen2";
+                reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+                interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
+                power-domains = <&cpg_clocks>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         sata0: sata@ee300000 {
                 compatible = "renesas,sata-r8a7791";
                 reg = <0 0xee300000 0 0x2000>;
@@ -1163,14 +1180,6 @@
                         clock-mult = <1>;
                         clock-output-names = "m2";
                 };
-                imp_clk: imp_clk {
-                        compatible = "fixed-factor-clock";
-                        clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-                        #clock-cells = <0>;
-                        clock-div = <4>;
-                        clock-mult = <1>;
-                        clock-output-names = "imp";
-                };
                 rclk_clk: rclk_clk {
                         compatible = "fixed-factor-clock";
                         clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
@@ -1338,16 +1347,18 @@
                         compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
                         clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
-                                 <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
+                                 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
+                                 <&zs_clk>;
                         #clock-cells = <1>;
                         clock-indices = <
                                 R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
                                 R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
-                                R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
+                                R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
+                                R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
                         >;
                         clock-output-names =
-                                "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether",
-                                "sata1", "sata0";
+                                "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
+                                "etheravb", "ether", "sata1", "sata0";
                 };
                 mstp9_clks: mstp9_clks@e6150994 {
                         compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1579,7 +1590,7 @@
         };
 
         ipmmu_sy0: mmu@e6280000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6280000 0 0x1000>;
                 interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
                              <0 224 IRQ_TYPE_LEVEL_HIGH>;
@@ -1588,7 +1599,7 @@
         };
 
         ipmmu_sy1: mmu@e6290000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6290000 0 0x1000>;
                 interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1596,7 +1607,7 @@
         };
 
         ipmmu_ds: mmu@e6740000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6740000 0 0x1000>;
                 interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
                              <0 199 IRQ_TYPE_LEVEL_HIGH>;
@@ -1605,7 +1616,7 @@
         };
 
         ipmmu_mp: mmu@ec680000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xec680000 0 0x1000>;
                 interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1613,7 +1624,7 @@
         };
 
         ipmmu_mx: mmu@fe951000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xfe951000 0 0x1000>;
                 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                              <0 221 IRQ_TYPE_LEVEL_HIGH>;
@@ -1622,7 +1633,7 @@
         };
 
         ipmmu_rt: mmu@ffc80000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xffc80000 0 0x1000>;
                 interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1630,7 +1641,7 @@
         };
 
         ipmmu_gp: mmu@e62a0000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
                 reg = <0 0xe62a0000 0 0x1000>;
                 interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
                              <0 261 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 96443ec5f6ab..baa59fe84298 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -24,7 +24,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif0;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -37,7 +37,37 @@
         clock-frequency = <20000000>;
 };
 
+&pfc {
+        scif0_pins: serial0 {
+                renesas,groups = "scif0_data_d";
+                renesas,function = "scif0";
+        };
+
+        scif1_pins: serial1 {
+                renesas,groups = "scif1_data_d";
+                renesas,function = "scif1";
+        };
+
+        ether_pins: ether {
+                renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+                renesas,function = "eth";
+        };
+
+        phy1_pins: phy1 {
+                renesas,groups = "intc_irq0";
+                renesas,function = "intc";
+        };
+
+        qspi_pins: spi0 {
+                renesas,groups = "qspi_ctrl", "qspi_data4";
+                renesas,function = "qspi";
+        };
+};
+
 &ether {
+        pinctrl-0 = <&ether_pins &phy1_pins>;
+        pinctrl-names = "default";
+
         phy-handle = <&phy1>;
         renesas,ether-link-active-low;
         status = "okay";
@@ -55,9 +85,54 @@
 };
 
 &scif0 {
+        pinctrl-0 = <&scif0_pins>;
+        pinctrl-names = "default";
+
         status = "okay";
 };
 
 &scif1 {
+        pinctrl-0 = <&scif1_pins>;
+        pinctrl-names = "default";
+
         status = "okay";
 };
+
+&qspi {
+        pinctrl-0 = <&qspi_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+
+        flash@0 {
+                compatible = "spansion,s25fl512s", "jedec,spi-nor";
+                reg = <0>;
+                spi-max-frequency = <30000000>;
+                spi-tx-bus-width = <4>;
+                spi-rx-bus-width = <4>;
+                spi-cpol;
+                spi-cpha;
+                m25p,fast-read;
+
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "loader";
+                                reg = <0x00000000 0x00040000>;
+                                read-only;
+                        };
+                        partition@40000 {
+                                label = "user";
+                                reg = <0x00040000 0x00400000>;
+                                read-only;
+                        };
+                        partition@440000 {
+                                label = "flash";
+                                reg = <0x00440000 0x03bc0000>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index c4654047e684..aef9e69d6c26 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -18,6 +18,10 @@
         #address-cells = <2>;
         #size-cells = <2>;
 
+        aliases {
+                spi0 = &qspi;
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -53,6 +57,118 @@
                 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
         };
 
+        gpio0: gpio@e6050000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6050000 0 0x50>;
+                interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 0 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio1: gpio@e6051000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6051000 0 0x50>;
+                interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 32 26>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio2: gpio@e6052000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6052000 0 0x50>;
+                interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 64 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio3: gpio@e6053000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6053000 0 0x50>;
+                interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 96 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio4: gpio@e6054000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6054000 0 0x50>;
+                interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 128 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio5: gpio@e6055000 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6055000 0 0x50>;
+                interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 160 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio6: gpio@e6055400 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6055400 0 0x50>;
+                interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 192 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        gpio7: gpio@e6055800 {
+                compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
+                reg = <0 0xe6055800 0 0x50>;
+                interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 224 26>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
+                power-domains = <&cpg_clocks>;
+        };
+
+        thermal@e61f0000 {
+                compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal";
+                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
+                power-domains = <&cpg_clocks>;
+        };
+
         timer {
                 compatible = "arm,armv7-timer";
                 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
@@ -114,12 +230,189 @@
                 power-domains = <&cpg_clocks>;
         };
 
+        pfc: pfc@e6060000 {
+                compatible = "renesas,pfc-r8a7793";
+                reg = <0 0xe6060000 0 0x250>;
+        };
+
+        dmac0: dma-controller@e6700000 {
+                compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
+                reg = <0 0xe6700000 0 0x20000>;
+                interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
+                              0 200 IRQ_TYPE_LEVEL_HIGH
+                              0 201 IRQ_TYPE_LEVEL_HIGH
+                              0 202 IRQ_TYPE_LEVEL_HIGH
+                              0 203 IRQ_TYPE_LEVEL_HIGH
+                              0 204 IRQ_TYPE_LEVEL_HIGH
+                              0 205 IRQ_TYPE_LEVEL_HIGH
+                              0 206 IRQ_TYPE_LEVEL_HIGH
+                              0 207 IRQ_TYPE_LEVEL_HIGH
+                              0 208 IRQ_TYPE_LEVEL_HIGH
+                              0 209 IRQ_TYPE_LEVEL_HIGH
+                              0 210 IRQ_TYPE_LEVEL_HIGH
+                              0 211 IRQ_TYPE_LEVEL_HIGH
+                              0 212 IRQ_TYPE_LEVEL_HIGH
+                              0 213 IRQ_TYPE_LEVEL_HIGH
+                              0 214 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-names = "error",
+                                "ch0", "ch1", "ch2", "ch3",
+                                "ch4", "ch5", "ch6", "ch7",
+                                "ch8", "ch9", "ch10", "ch11",
+                                "ch12", "ch13", "ch14";
+                clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
+                clock-names = "fck";
+                power-domains = <&cpg_clocks>;
+                #dma-cells = <1>;
+                dma-channels = <15>;
+        };
+
+        dmac1: dma-controller@e6720000 {
+                compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
+                reg = <0 0xe6720000 0 0x20000>;
+                interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
+                              0 216 IRQ_TYPE_LEVEL_HIGH
+                              0 217 IRQ_TYPE_LEVEL_HIGH
+                              0 218 IRQ_TYPE_LEVEL_HIGH
+                              0 219 IRQ_TYPE_LEVEL_HIGH
+                              0 308 IRQ_TYPE_LEVEL_HIGH
+                              0 309 IRQ_TYPE_LEVEL_HIGH
+                              0 310 IRQ_TYPE_LEVEL_HIGH
+                              0 311 IRQ_TYPE_LEVEL_HIGH
+                              0 312 IRQ_TYPE_LEVEL_HIGH
+                              0 313 IRQ_TYPE_LEVEL_HIGH
+                              0 314 IRQ_TYPE_LEVEL_HIGH
+                              0 315 IRQ_TYPE_LEVEL_HIGH
+                              0 316 IRQ_TYPE_LEVEL_HIGH
+                              0 317 IRQ_TYPE_LEVEL_HIGH
+                              0 318 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-names = "error",
+                                "ch0", "ch1", "ch2", "ch3",
+                                "ch4", "ch5", "ch6", "ch7",
+                                "ch8", "ch9", "ch10", "ch11",
+                                "ch12", "ch13", "ch14";
+                clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
+                clock-names = "fck";
+                power-domains = <&cpg_clocks>;
+                #dma-cells = <1>;
+                dma-channels = <15>;
+        };
+
+        scifa0: serial@e6c40000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c40000 0 64>;
+                interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x21>, <&dmac0 0x22>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifa1: serial@e6c50000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c50000 0 64>;
+                interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x25>, <&dmac0 0x26>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifa2: serial@e6c60000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c60000 0 64>;
+                interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x27>, <&dmac0 0x28>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifa3: serial@e6c70000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c70000 0 64>;
+                interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifa4: serial@e6c78000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c78000 0 64>;
+                interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifa5: serial@e6c80000 {
+                compatible = "renesas,scifa-r8a7793", "renesas,scifa";
+                reg = <0 0xe6c80000 0 64>;
+                interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x23>, <&dmac0 0x24>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifb0: serial@e6c20000 {
+                compatible = "renesas,scifb-r8a7793", "renesas,scifb";
+                reg = <0 0xe6c20000 0 64>;
+                interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifb1: serial@e6c30000 {
+                compatible = "renesas,scifb-r8a7793", "renesas,scifb";
+                reg = <0 0xe6c30000 0 64>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scifb2: serial@e6ce0000 {
+                compatible = "renesas,scifb-r8a7793", "renesas,scifb";
+                reg = <0 0xe6ce0000 0 64>;
+                interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
         scif0: serial@e6e60000 {
                 compatible = "renesas,scif-r8a7793", "renesas,scif";
                 reg = <0 0xe6e60000 0 64>;
                 interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp7_clks R8A7793_CLK_SCIF0>;
                 clock-names = "sci_ick";
+                dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
+                dma-names = "tx", "rx";
                 power-domains = <&cpg_clocks>;
                 status = "disabled";
         };
@@ -130,6 +423,92 @@
                 interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp7_clks R8A7793_CLK_SCIF1>;
                 clock-names = "sci_ick";
+                dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scif2: serial@e6e58000 {
+                compatible = "renesas,scif-r8a7793", "renesas,scif";
+                reg = <0 0xe6e58000 0 64>;
+                interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_SCIF2>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scif3: serial@e6ea8000 {
+                compatible = "renesas,scif-r8a7793", "renesas,scif";
+                reg = <0 0xe6ea8000 0 64>;
+                interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_SCIF3>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scif4: serial@e6ee0000 {
+                compatible = "renesas,scif-r8a7793", "renesas,scif";
+                reg = <0 0xe6ee0000 0 64>;
+                interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_SCIF4>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        scif5: serial@e6ee8000 {
+                compatible = "renesas,scif-r8a7793", "renesas,scif";
+                reg = <0 0xe6ee8000 0 64>;
+                interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_SCIF5>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        hscif0: serial@e62c0000 {
+                compatible = "renesas,hscif-r8a7793", "renesas,hscif";
+                reg = <0 0xe62c0000 0 96>;
+                interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        hscif1: serial@e62c8000 {
+                compatible = "renesas,hscif-r8a7793", "renesas,hscif";
+                reg = <0 0xe62c8000 0 96>;
+                interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        hscif2: serial@e62d0000 {
+                compatible = "renesas,hscif-r8a7793", "renesas,hscif";
+                reg = <0 0xe62d0000 0 96>;
+                interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>;
+                clock-names = "sci_ick";
+                dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
+                dma-names = "tx", "rx";
                 power-domains = <&cpg_clocks>;
                 status = "disabled";
         };
@@ -146,6 +525,50 @@
                 status = "disabled";
         };
 
+        qspi: spi@e6b10000 {
+                compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+                reg = <0 0xe6b10000 0 0x2c>;
+                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
+                dmas = <&dmac0 0x17>, <&dmac0 0x18>;
+                dma-names = "tx", "rx";
+                power-domains = <&cpg_clocks>;
+                num-cs = <1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        du: display@feb00000 {
+                compatible = "renesas,du-r8a7793";
+                reg = <0 0xfeb00000 0 0x40000>,
+                      <0 0xfeb90000 0 0x1c>;
+                reg-names = "du", "lvds.0";
+                interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 268 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7793_CLK_DU0>,
+                         <&mstp7_clks R8A7793_CLK_DU1>,
+                         <&mstp7_clks R8A7793_CLK_LVDS0>;
+                clock-names = "du.0", "du.1", "lvds.0";
+                status = "disabled";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                du_out_rgb: endpoint {
+                                };
+                        };
+                        port@1 {
+                                reg = <1>;
+                                du_out_lvds0: endpoint {
+                                };
+                        };
+                };
+        };
+
         clocks {
                 #address-cells = <2>;
                 #size-cells = <2>;
@@ -299,6 +722,21 @@
                                 "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
                                 "vsp1-du0", "vsps";
                 };
+                mstp2_clks: mstp2_clks@e6150138 {
+                        compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+                        clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
+                                 <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>;
+                        #clock-cells = <1>;
+                        clock-indices = <
+                                R8A7793_CLK_SCIFA2 R8A7793_CLK_SCIFA1 R8A7793_CLK_SCIFA0
+                                R8A7793_CLK_SCIFB0 R8A7793_CLK_SCIFB1 R8A7793_CLK_SCIFB2
+                                R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
+                        >;
+                        clock-output-names =
+                                "scifa2", "scifa1", "scifa0", "scifb0",
+                                "scifb1", "scifb2", "sys-dmac1", "sys-dmac0";
+                };
                 mstp3_clks: mstp3_clks@e615013c {
                         compatible = "renesas,r8a7793-mstp-clocks",
                                      "renesas,cpg-mstp-clocks";
@@ -329,6 +767,14 @@
                         clock-indices = <R8A7793_CLK_IRQC>;
                         clock-output-names = "irqc";
                 };
+                mstp5_clks: mstp5_clks@e6150144 {
+                        compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+                        clocks = <&extal_clk>;
+                        #clock-cells = <1>;
+                        clock-indices = <R8A7793_CLK_THERMAL>;
+                        clock-output-names = "thermal";
+                };
                 mstp7_clks: mstp7_clks@e615014c {
                         compatible = "renesas,r8a7793-mstp-clocks",
                                      "renesas,cpg-mstp-clocks";
@@ -369,6 +815,94 @@
                                 "ipmmu_sgx", "vin2", "vin1", "vin0", "ether",
                                 "sata1", "sata0";
                 };
+                mstp9_clks: mstp9_clks@e6150994 {
+                        compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+                        clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                 <&cpg_clocks R8A7793_CLK_QSPI>;
+                        #clock-cells = <1>;
+                        clock-indices = <
+                                R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
+                                R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
+                                R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
+                                R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
+                                R8A7793_CLK_QSPI_MOD
+                        >;
+                        clock-output-names =
+                                "gpio7", "gpio6", "gpio5", "gpio4",
+                                "gpio3", "gpio2", "gpio1", "gpio0",
+                                "qspi_mod";
+                };
+                mstp11_clks: mstp11_clks@e615099c {
+                        compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
+                        clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
+                        #clock-cells = <1>;
+                        clock-indices = <
+                                R8A7793_CLK_SCIFA3 R8A7793_CLK_SCIFA4 R8A7793_CLK_SCIFA5
+                        >;
+                        clock-output-names = "scifa3", "scifa4", "scifa5";
+                };
+        };
+
+        ipmmu_sy0: mmu@e6280000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xe6280000 0 0x1000>;
+                interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 224 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
+
+        ipmmu_sy1: mmu@e6290000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xe6290000 0 0x1000>;
+                interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
+
+        ipmmu_ds: mmu@e6740000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xe6740000 0 0x1000>;
+                interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 199 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
+
+        ipmmu_mp: mmu@ec680000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xec680000 0 0x1000>;
+                interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
+
+        ipmmu_mx: mmu@fe951000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xfe951000 0 0x1000>;
+                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 221 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
+
+        ipmmu_rt: mmu@ffc80000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xffc80000 0 0x1000>;
+                interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
         };
 
+        ipmmu_gp: mmu@e62a0000 {
+                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
+                reg = <0 0xe62a0000 0 0x1000>;
+                interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 261 IRQ_TYPE_LEVEL_HIGH>;
+                #iommu-cells = <1>;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index 928cfa641475..2394e4883786 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -21,7 +21,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif2;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -33,17 +33,115 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
         };
+
+        vga-encoder {
+                compatible = "adi,adv7123";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                adv7123_in: endpoint {
+                                        remote-endpoint = <&du_out_rgb1>;
+                                };
+                        };
+                        port@1 {
+                                reg = <1>;
+                                adv7123_out: endpoint {
+                                        remote-endpoint = <&vga_in>;
+                                };
+                        };
+                };
+        };
+
+        vga {
+                compatible = "vga-connector";
+
+                port {
+                        vga_in: endpoint {
+                                remote-endpoint = <&adv7123_out>;
+                        };
+                };
+        };
+
+        x2_clk: x2-clock {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency = <74250000>;
+        };
+
+        x13_clk: x13-clock {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency = <148500000>;
+        };
+};
+
+&du {
+        pinctrl-0 = <&du_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+
+        clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+                 <&mstp7_clks R8A7794_CLK_DU0>,
+                 <&x13_clk>, <&x2_clk>;
+        clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+
+        ports {
+                port@1 {
+                        endpoint {
+                                remote-endpoint = <&adv7123_in>;
+                        };
+                };
+        };
 };
 
 &extal_clk {
         clock-frequency = <20000000>;
 };
 
+&pfc {
+        du_pins: du {
+                renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
+                renesas,function = "du";
+        };
+
+        scif2_pins: serial2 {
+                renesas,groups = "scif2_data";
+                renesas,function = "scif2";
+        };
+
+        ether_pins: ether {
+                renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+                renesas,function = "eth";
+        };
+
+        phy1_pins: phy1 {
+                renesas,groups = "intc_irq8";
+                renesas,function = "intc";
+        };
+
+        i2c1_pins: i2c1 {
+                renesas,groups = "i2c1";
+                renesas,function = "i2c1";
+        };
+
+        vin0_pins: vin0 {
+                renesas,groups = "vin0_data8", "vin0_clk";
+                renesas,function = "vin0";
+        };
+};
+
 &cmt0 {
         status = "okay";
 };
 
 &ether {
+        pinctrl-0 = <&ether_pins &phy1_pins>;
+        pinctrl-names = "default";
+
         phy-handle = <&phy1>;
         renesas,ether-link-active-low;
         status = "okay";
@@ -56,6 +154,46 @@
         };
 };
 
+&i2c1 {
+        pinctrl-0 = <&i2c1_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+        clock-frequency = <400000>;
+
+        composite-in@20 {
+                compatible = "adi,adv7180";
+                reg = <0x20>;
+                remote = <&vin0>;
+
+                port {
+                        adv7180: endpoint {
+                                bus-width = <8>;
+                                remote-endpoint = <&vin0ep>;
+                        };
+                };
+        };
+};
+
+&vin0 {
+        status = "okay";
+        pinctrl-0 = <&vin0_pins>;
+        pinctrl-names = "default";
+
+        port {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                vin0ep: endpoint {
+                        remote-endpoint = <&adv7180>;
+                        bus-width = <8>;
+                };
+        };
+};
+
 &scif2 {
+        pinctrl-0 = <&scif2_pins>;
+        pinctrl-names = "default";
+
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 48ff3e2958ae..5153e3af25d9 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 #include "r8a7794.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
         model = "SILK";
@@ -23,7 +24,7 @@
 
         chosen {
                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-                stdout-path = &scif2;
+                stdout-path = "serial0:115200n8";
         };
 
         memory@40000000 {
@@ -39,6 +40,30 @@
                 regulator-boot-on;
                 regulator-always-on;
         };
+
+        vcc_sdhi1: regulator@3 {
+                compatible = "regulator-fixed";
+
+                regulator-name = "SDHI1 Vcc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+
+                gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        vccq_sdhi1: regulator@4 {
+                compatible = "regulator-gpio";
+
+                regulator-name = "SDHI1 VccQ";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <3300000>;
+
+                gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+                gpios-states = <1>;
+                states = <3300000 1
+                          1800000 0>;
+        };
 };
 
 &extal_clk {
@@ -71,6 +96,11 @@
                 renesas,function = "mmc";
         };
 
+        sdhi1_pins: sd1 {
+                renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+                renesas,function = "sdhi1";
+        };
+
         qspi_pins: spi0 {
                 renesas,groups = "qspi_ctrl", "qspi_data4";
                 renesas,function = "qspi";
@@ -147,6 +177,16 @@
         status = "okay";
 };
 
+&sdhi1 {
+        pinctrl-0 = <&sdhi1_pins>;
+        pinctrl-names = "default";
+
+        vmmc-supply = <&vcc_sdhi1>;
+        vqmmc-supply = <&vccq_sdhi1>;
+        cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+        status = "okay";
+};
+
 &qspi {
         pinctrl-0 = <&qspi_pins>;
         pinctrl-names = "default";
@@ -154,8 +194,6 @@
         status = "okay";
 
         flash@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
                 reg = <0>;
                 spi-max-frequency = <30000000>;
@@ -165,19 +203,25 @@
                 spi-cpha;
                 m25p,fast-read;
 
-                partition@0 {
-                        label = "loader";
-                        reg = <0x00000000 0x00040000>;
-                        read-only;
-                };
-                partition@40000 {
-                        label = "user";
-                        reg = <0x00040000 0x00400000>;
-                        read-only;
-                };
-                partition@440000 {
-                        label = "flash";
-                        reg = <0x00440000 0x03bc0000>;
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "loader";
+                                reg = <0x00000000 0x00040000>;
+                                read-only;
+                        };
+                        partition@40000 {
+                                label = "user";
+                                reg = <0x00040000 0x00400000>;
+                                read-only;
+                        };
+                        partition@440000 {
+                                label = "flash";
+                                reg = <0x00440000 0x03bc0000>;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index a9977d6ee81a..6c78f1fae90f 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -217,11 +217,10 @@
         pfc: pin-controller@e6060000 {
                 compatible = "renesas,pfc-r8a7794";
                 reg = <0 0xe6060000 0 0x11c>;
-                #gpio-range-cells = <3>;
         };
 
         dmac0: dma-controller@e6700000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
                 reg = <0 0xe6700000 0 0x20000>;
                 interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
                               0 200 IRQ_TYPE_LEVEL_HIGH
@@ -252,7 +251,7 @@
         };
 
         dmac1: dma-controller@e6720000 {
-                compatible = "renesas,rcar-dmac";
+                compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
                 reg = <0 0xe6720000 0 0x20000>;
                 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
                               0 216 IRQ_TYPE_LEVEL_HIGH
@@ -519,6 +518,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -530,6 +530,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -541,6 +542,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -552,6 +554,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -563,6 +566,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -574,6 +578,7 @@
                 power-domains = <&cpg_clocks>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                i2c-scl-internal-delay-ns = <6>;
                 status = "disabled";
         };
 
@@ -750,6 +755,34 @@
                 };
         };
 
+        du: display@feb00000 {
+                compatible = "renesas,du-r8a7794";
+                reg = <0 0xfeb00000 0 0x40000>;
+                reg-names = "du";
+                interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 268 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+                         <&mstp7_clks R8A7794_CLK_DU0>;
+                clock-names = "du.0", "du.1";
+                status = "disabled";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                du_out_rgb0: endpoint {
+                                };
+                        };
+                        port@1 {
+                                reg = <1>;
+                                du_out_rgb1: endpoint {
+                                };
+                        };
+                };
+        };
+
         clocks {
                 #address-cells = <2>;
                 #size-cells = <2>;
@@ -879,14 +912,6 @@
                         clock-mult = <1>;
                         clock-output-names = "m2";
                 };
-                imp_clk: imp_clk {
-                        compatible = "fixed-factor-clock";
-                        clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
-                        #clock-cells = <0>;
-                        clock-div = <4>;
-                        clock-mult = <1>;
-                        clock-output-names = "imp";
-                };
                 rclk_clk: rclk_clk {
                         compatible = "fixed-factor-clock";
                         clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
@@ -1025,19 +1050,20 @@
                         reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
                         clocks = <&mp_clk>, <&mp_clk>,
                                  <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
-                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
+                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+                                 <&zx_clk>;
                         #clock-cells = <1>;
                         clock-indices = <
                                 R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
                                 R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
                                 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
                                 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
-                                R8A7794_CLK_SCIF0
+                                R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
                         >;
                         clock-output-names =
                                 "ehci", "hsusb",
                                 "hscif2", "scif5", "scif4", "hscif1", "hscif0",
-                                "scif3", "scif2", "scif1", "scif0";
+                                "scif3", "scif2", "scif1", "scif0", "du0";
                 };
                 mstp8_clks: mstp8_clks@e6150990 {
                         compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1083,7 +1109,7 @@
         };
 
         ipmmu_sy0: mmu@e6280000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6280000 0 0x1000>;
                 interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
                              <0 224 IRQ_TYPE_LEVEL_HIGH>;
@@ -1092,7 +1118,7 @@
         };
 
         ipmmu_sy1: mmu@e6290000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6290000 0 0x1000>;
                 interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1100,15 +1126,16 @@
         };
 
         ipmmu_ds: mmu@e6740000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xe6740000 0 0x1000>;
                 interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
                              <0 199 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
+                status = "disabled";
         };
 
         ipmmu_mp: mmu@ec680000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xec680000 0 0x1000>;
                 interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
@@ -1116,15 +1143,16 @@
         };
 
         ipmmu_mx: mmu@fe951000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xfe951000 0 0x1000>;
                 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                              <0 221 IRQ_TYPE_LEVEL_HIGH>;
                 #iommu-cells = <1>;
+                status = "disabled";
         };
 
         ipmmu_gp: mmu@e62a0000 {
-                compatible = "renesas,ipmmu-vmsa";
+                compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                 reg = <0 0xe62a0000 0 0x1000>;
                 interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
                              <0 261 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts
new file mode 100644
index 000000000000..28a033666017
--- /dev/null
+++ b/arch/arm/boot/dts/rk3036-evb.dts
@@ -0,0 +1,64 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3036.dtsi"
+
+/ {
+        model = "Rockchip RK3036 Evaluation board";
+        compatible = "rockchip,rk3036-evb", "rockchip,rk3036";
+};
+
+&i2c1 {
+        status = "okay";
+
+        hym8563: hym8563@51 {
+                compatible = "haoyu,hym8563";
+                reg = <0x51>;
+                #clock-cells = <0>;
+                clock-frequency = <32768>;
+                clock-output-names = "xin32k";
+        };
+};
+
+&uart2 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
new file mode 100644
index 000000000000..992f9cadbc04
--- /dev/null
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -0,0 +1,300 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3036.dtsi"
+
+/ {
+        model = "Rockchip RK3036 KylinBoard";
+        compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
+
+        vcc_sys: vsys-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "vcc_sys";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-always-on;
+                regulator-boot-on;
+        };
+};
+
+&acodec {
+        status = "okay";
+};
+
+&emmc {
+        status = "okay";
+};
+
+&i2c1 {
+        clock-frequency = <400000>;
+
+        status = "okay";
+
+        rk808: pmic@1b {
+                compatible = "rockchip,rk808";
+                reg = <0x1b>;
+                interrupt-parent = <&gpio2>;
+                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pmic_int &global_pwroff>;
+                rockchip,system-power-controller;
+                wakeup-source;
+                #clock-cells = <1>;
+                clock-output-names = "xin32k", "rk808-clkout2";
+
+                vcc1-supply = <&vcc_sys>;
+                vcc2-supply = <&vcc_sys>;
+                vcc3-supply = <&vcc_sys>;
+                vcc4-supply = <&vcc_sys>;
+                vcc6-supply = <&vcc_sys>;
+                vcc7-supply = <&vcc_sys>;
+                vcc8-supply = <&vcc_18>;
+                vcc9-supply = <&vcc_io>;
+                vcc10-supply = <&vcc_io>;
+                vcc11-supply = <&vcc_sys>;
+                vcc12-supply = <&vcc_io>;
+                vddio-supply = <&vccio_pmu>;
+
+                regulators {
+                        vdd_cpu: DCDC_REG1 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <750000>;
+                                regulator-max-microvolt = <1350000>;
+                                regulator-name = "vdd_arm";
+                                regulator-state-mem {
+                                        regulator-off-in-suspend;
+                                };
+                        };
+
+                        vdd_gpu: DCDC_REG2 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <850000>;
+                                regulator-max-microvolt = <1250000>;
+                                regulator-name = "vdd_gpu";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1000000>;
+                                };
+                        };
+
+                        vcc_ddr: DCDC_REG3 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-name = "vcc_ddr";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                };
+                        };
+
+                        vcc_io: DCDC_REG4 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <3300000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-name = "vcc_io";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <3300000>;
+                                };
+                        };
+
+                        vccio_pmu: LDO_REG1 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <3300000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-name = "vccio_pmu";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <3300000>;
+                                };
+                        };
+
+                        vcc_tp: LDO_REG2 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <3300000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-name = "vcc_tp";
+                                regulator-state-mem {
+                                        regulator-off-in-suspend;
+                                };
+                        };
+
+                        vdd_10: LDO_REG3 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <1000000>;
+                                regulator-name = "vdd_10";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1000000>;
+                                };
+                        };
+
+                        vcc18_lcd: LDO_REG4 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-name = "vcc18_lcd";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1800000>;
+                                };
+                        };
+
+                        vccio_sd: LDO_REG5 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-name = "vccio_sd";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <3300000>;
+                                };
+                        };
+
+                        vout5: LDO_REG6 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <2500000>;
+                                regulator-name = "vout5";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1800000>;
+                                };
+                        };
+
+                        vcc_18: LDO_REG7 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-name = "vcc_18";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1800000>;
+                                };
+                        };
+
+                        vcca_codec: LDO_REG8 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-name = "vcca_codec";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                        regulator-suspend-microvolt = <1800000>;
+                                };
+                        };
+
+                        vcc_wl: SWITCH_REG1 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-name = "vcc_wl";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                };
+                        };
+
+                        vcc_lcd: SWITCH_REG2 {
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-name = "vcc_lcd";
+                                regulator-state-mem {
+                                        regulator-on-in-suspend;
+                                };
+                        };
+                };
+        };
+};
+
+&i2c2 {
+        status = "okay";
+};
+
+&sdio {
+        status = "okay";
+
+        broken-cd;
+        bus-width = <4>;
+        cap-sdio-irq;
+        default-sample-phase = <90>;
+        keep-power-in-suspend;
+        non-removable;
+        num-slots = <1>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+};
+
+&uart2 {
+        status = "okay";
+};
+
+&usb_host {
+        status = "okay";
+};
+
+&usb_otg {
+        status = "okay";
+};
+
+&pinctrl {
+        pmic {
+                pmic_int: pmic-int {
+                        rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>;
+                };
+        };
+
+        sleep {
+                global_pwroff: global-pwroff {
+                        rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
new file mode 100644
index 000000000000..b9567c1e0687
--- /dev/null
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -0,0 +1,622 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3036-cru.h>
+#include "skeleton.dtsi"
+
+/ {
+        compatible = "rockchip,rk3036";
+
+        interrupt-parent = <&gic>;
+
+        aliases {
+                i2c0 = &i2c0;
+                i2c1 = &i2c1;
+                i2c2 = &i2c2;
+                mshc0 = &emmc;
+                mshc1 = &sdmmc;
+                mshc2 = &sdio;
+                serial0 = &uart0;
+                serial1 = &uart1;
+                serial2 = &uart2;
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x60000000 0x40000000>;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                enable-method = "rockchip,rk3036-smp";
+
+                cpu0: cpu@f00 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf00>;
+                        resets = <&cru SRST_CORE0>;
+                        operating-points = <
+                                /* KHz    uV */
+                                 816000 1000000
+                        >;
+                        clock-latency = <40000>;
+                        clocks = <&cru ARMCLK>;
+                };
+
+                cpu1: cpu@f01 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf01>;
+                        resets = <&cru SRST_CORE1>;
+                };
+        };
+
+        amba {
+                compatible = "arm,amba-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                pdma: pdma@20078000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x20078000 0x4000>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        #dma-cells = <1>;
+                        clocks = <&cru ACLK_DMAC2>;
+                        clock-names = "apb_pclk";
+                };
+        };
+
+        arm-pmu {
+                compatible = "arm,cortex-a7-pmu";
+                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-affinity = <&cpu0>, <&cpu1>;
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                arm,cpu-registers-not-fw-configured;
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+                clock-frequency = <24000000>;
+        };
+
+        xin24m: oscillator {
+                compatible = "fixed-clock";
+                clock-frequency = <24000000>;
+                clock-output-names = "xin24m";
+                #clock-cells = <0>;
+        };
+
+        bus_intmem@10080000 {
+                compatible = "mmio-sram";
+                reg = <0x10080000 0x2000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0 0x10080000 0x2000>;
+
+                smp-sram@0 {
+                        compatible = "rockchip,rk3066-smp-sram";
+                        reg = <0x00 0x10>;
+                };
+        };
+
+        gic: interrupt-controller@10139000 {
+                compatible = "arm,gic-400";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+
+                reg = <0x10139000 0x1000>,
+                      <0x1013a000 0x1000>,
+                      <0x1013c000 0x2000>,
+                      <0x1013e000 0x2000>;
+                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        usb_otg: usb@10180000 {
+                compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+                                "snps,dwc2";
+                reg = <0x10180000 0x40000>;
+                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru HCLK_OTG0>;
+                clock-names = "otg";
+                dr_mode = "otg";
+                g-np-tx-fifo-size = <16>;
+                g-rx-fifo-size = <275>;
+                g-tx-fifo-size = <256 128 128 64 64 32>;
+                g-use-dma;
+                status = "disabled";
+        };
+
+        usb_host: usb@101c0000 {
+                compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+                                "snps,dwc2";
+                reg = <0x101c0000 0x40000>;
+                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru HCLK_OTG1>;
+                clock-names = "otg";
+                dr_mode = "host";
+                status = "disabled";
+        };
+
+        sdmmc: dwmmc@10214000 {
+                compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
+                reg = <0x10214000 0x4000>;
+                clock-frequency = <37500000>;
+                clock-freq-min-max = <400000 37500000>;
+                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
+                clock-names = "biu", "ciu";
+                fifo-depth = <0x100>;
+                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        sdio: dwmmc@10218000 {
+                compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
+                reg = <0x10218000 0x4000>;
+                clock-freq-min-max = <400000 37500000>;
+                clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+                         <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                fifo-depth = <0x100>;
+                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        emmc: dwmmc@1021c000 {
+                compatible = "rockchip,rk3288-dw-mshc";
+                reg = <0x1021c000 0x4000>;
+                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                broken-cd;
+                bus-width = <8>;
+                cap-mmc-highspeed;
+                clock-frequency = <37500000>;
+                clock-freq-min-max = <400000 37500000>;
+                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                default-sample-phase = <158>;
+                disable-wp;
+                dmas = <&pdma 12>;
+                dma-names = "rx-tx";
+                fifo-depth = <0x100>;
+                mmc-ddr-1_8v;
+                non-removable;
+                num-slots = <1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+                status = "disabled";
+        };
+
+        i2s: i2s@10220000 {
+                compatible = "rockchip,rk3036-i2s", "rockchip,rk3066-i2s";
+                reg = <0x10220000 0x4000>;
+                interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clock-names = "i2s_hclk", "i2s_clk";
+                clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
+                dmas = <&pdma 0>, <&pdma 1>;
+                dma-names = "tx", "rx";
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2s_bus>;
+                status = "disabled";
+        };
+
+        cru: clock-controller@20000000 {
+                compatible = "rockchip,rk3036-cru";
+                reg = <0x20000000 0x1000>;
+                rockchip,grf = <&grf>;
+                #clock-cells = <1>;
+                #reset-cells = <1>;
+                assigned-clocks = <&cru PLL_GPLL>;
+                assigned-clock-rates = <594000000>;
+        };
+
+        grf: syscon@20008000 {
+                compatible = "rockchip,rk3036-grf", "syscon";
+                reg = <0x20008000 0x1000>;
+        };
+
+        acodec: acodec-ana@20030000 {
+                compatible = "rk3036-codec";
+                reg = <0x20030000 0x4000>;
+                rockchip,grf = <&grf>;
+                clock-names = "acodec_pclk";
+                clocks = <&cru PCLK_ACODEC>;
+                status = "disabled";
+        };
+
+        timer: timer@20044000 {
+                compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";
+                reg = <0x20044000 0x20>;
+                interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&xin24m>, <&cru PCLK_TIMER>;
+                clock-names = "timer", "pclk";
+        };
+
+        pwm0: pwm@20050000 {
+                compatible = "rockchip,rk3036-pwm", "rockchip,rk2928-pwm";
+                reg = <0x20050000 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm0_pin>;
+                status = "disabled";
+        };
+
+        pwm1: pwm@20050010 {
+                compatible = "rockchip,rk3036-pwm", "rockchip,rk2928-pwm";
+                reg = <0x20050010 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm1_pin>;
+                status = "disabled";
+        };
+
+        pwm2: pwm@20050020 {
+                compatible = "rockchip,rk3036-pwm", "rockchip,rk2928-pwm";
+                reg = <0x20050020 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm2_pin>;
+                status = "disabled";
+        };
+
+        pwm3: pwm@20050030 {
+                compatible = "rockchip,rk3036-pwm", "rockchip,rk2928-pwm";
+                reg = <0x20050030 0x10>;
+                #pwm-cells = <2>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm3_pin>;
+                status = "disabled";
+        };
+
+        i2c1: i2c@20056000 {
+                compatible = "rockchip,rk3288-i2c";
+                reg = <0x20056000 0x1000>;
+                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clock-names = "i2c";
+                clocks = <&cru PCLK_I2C1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c1_xfer>;
+                status = "disabled";
+        };
+
+        i2c2: i2c@2005a000 {
+                compatible = "rockchip,rk3288-i2c";
+                reg = <0x2005a000 0x1000>;
+                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clock-names = "i2c";
+                clocks = <&cru PCLK_I2C2>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c2_xfer>;
+                status = "disabled";
+        };
+
+        uart0: serial@20060000 {
+                compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
+                reg = <0x20060000 0x100>;
+                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+                status = "disabled";
+        };
+
+        uart1: serial@20064000 {
+                compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
+                reg = <0x20064000 0x100>;
+                interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart1_xfer>;
+                status = "disabled";
+        };
+
+        uart2: serial@20068000 {
+                compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
+                reg = <0x20068000 0x100>;
+                interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart2_xfer>;
+                status = "disabled";
+        };
+
+        i2c0: i2c@20072000 {
+                compatible = "rockchip,rk3288-i2c";
+                reg = <0x20072000 0x1000>;
+                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clock-names = "i2c";
+                clocks = <&cru PCLK_I2C0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c0_xfer>;
+                status = "disabled";
+        };
+
+        pinctrl: pinctrl {
+                compatible = "rockchip,rk3036-pinctrl";
+                rockchip,grf = <&grf>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                gpio0: gpio0@2007c000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x2007c000 0x100>;
+                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO0>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio1: gpio1@20080000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x20080000 0x100>;
+                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO1>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio2: gpio2@20084000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x20084000 0x100>;
+                        interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO2>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                pcfg_pull_default: pcfg_pull_default {
+                        bias-pull-pin-default;
+                };
+
+                pcfg_pull_none: pcfg-pull-none {
+                        bias-disable;
+                };
+
+                pwm0 {
+                        pwm0_pin: pwm0-pin {
+                                rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm1 {
+                        pwm1_pin: pwm1-pin {
+                                rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm2 {
+                        pwm2_pin: pwm2-pin {
+                                rockchip,pins = <0 1 2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm3 {
+                        pwm3_pin: pwm3-pin {
+                                rockchip,pins = <0 27 1 &pcfg_pull_none>;
+                        };
+                };
+
+                sdmmc {
+                        sdmmc_clk: sdmmc-clk {
+                                rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        sdmmc_cmd: sdmmc-cmd {
+                                rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdmmc_cd: sdmcc-cd {
+                                rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdmmc_bus1: sdmmc-bus1 {
+                                rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdmmc_bus4: sdmmc-bus4 {
+                                rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>,
+                                                <1 19 RK_FUNC_1 &pcfg_pull_default>,
+                                                <1 20 RK_FUNC_1 &pcfg_pull_default>,
+                                                <1 21 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+                };
+
+                sdio {
+                        sdio_bus1: sdio-bus1 {
+                                rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdio_bus4: sdio-bus4 {
+                                rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>,
+                                                <0 12 RK_FUNC_1 &pcfg_pull_default>,
+                                                <0 13 RK_FUNC_1 &pcfg_pull_default>,
+                                                <0 14 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdio_cmd: sdio-cmd {
+                                rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        sdio_clk: sdio-clk {
+                                rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                emmc {
+                        /*
+                         * We run eMMC at max speed; bump up drive strength.
+                         * We also have external pulls, so disable the internal ones.
+                         */
+                        emmc_clk: emmc-clk {
+                                rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+
+                        emmc_cmd: emmc-cmd {
+                                rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>;
+                        };
+
+                        emmc_bus8: emmc-bus8 {
+                                rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 25 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 26 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 27 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 28 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 29 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 30 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 31 RK_FUNC_2 &pcfg_pull_default>;
+                        };
+                };
+
+                i2c0 {
+                        i2c0_xfer: i2c0-xfer {
+                                rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
+                                                <0 1 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                i2c1 {
+                        i2c1_xfer: i2c1-xfer {
+                                rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+                                                <0 3 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                i2c2 {
+                        i2c2_xfer: i2c2-xfer {
+                                rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
+                                                <2 21 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                i2s {
+                        i2s_bus: i2s-bus {
+                                rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 1 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 2 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 3 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 4 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 5 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                uart0 {
+                        uart0_xfer: uart0-xfer {
+                                rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_default>,
+                                                <0 17 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart0_cts: uart0-cts {
+                                rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_default>;
+                        };
+
+                        uart0_rts: uart0-rts {
+                                rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                uart1 {
+                        uart1_xfer: uart1-xfer {
+                                rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_default>,
+                                                <2 23 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                        /* no rts / cts for uart1 */
+                };
+
+                uart2 {
+                        uart2_xfer: uart2-xfer {
+                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_default>,
+                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                        /* no rts / cts for uart2 */
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 946f18705e96..58bac5053858 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -103,6 +103,8 @@
                 dma-names = "tx", "rx";
                 clock-names = "i2s_hclk", "i2s_clk";
                 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+                rockchip,playback-channels = <8>;
+                rockchip,capture-channels = <2>;
                 status = "disabled";
         };
 
@@ -118,6 +120,8 @@
                 dma-names = "tx", "rx";
                 clock-names = "i2s_hclk", "i2s_clk";
                 clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
+                rockchip,playback-channels = <2>;
+                rockchip,capture-channels = <2>;
                 status = "disabled";
         };
 
@@ -133,6 +137,8 @@
                 dma-names = "tx", "rx";
                 clock-names = "i2s_hclk", "i2s_clk";
                 clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
+                rockchip,playback-channels = <2>;
+                rockchip,capture-channels = <2>;
                 status = "disabled";
         };
 
@@ -153,6 +159,19 @@
                 clock-names = "timer", "pclk";
         };
 
+        efuse: efuse@20010000 {
+                compatible = "rockchip,rockchip-efuse";
+                reg = <0x20010000 0x4000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                clocks = <&cru PCLK_EFUSE>;
+                clock-names = "pclk_efuse";
+
+                cpu_leakage: cpu_leakage {
+                        reg = <0x17 0x1>;
+                };
+        };
+
         timer@20038000 {
                 compatible = "snps,dw-apb-timer-osc";
                 reg = <0x20038000 0x100>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 6399942f1840..348d46b7ada5 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -118,6 +118,8 @@
                 dma-names = "tx", "rx";
                 clock-names = "i2s_hclk", "i2s_clk";
                 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+                rockchip,playback-channels = <2>;
+                rockchip,capture-channels = <2>;
                 status = "disabled";
         };
 
@@ -144,6 +146,19 @@
                 #reset-cells = <1>;
         };
 
+        efuse: efuse@20010000 {
+                compatible = "rockchip,rockchip-efuse";
+                reg = <0x20010000 0x4000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                clocks = <&cru PCLK_EFUSE>;
+                clock-names = "pclk_efuse";
+
+                cpu_leakage: cpu_leakage {
+                        reg = <0x17 0x1>;
+                };
+        };
+
         usbphy: phy {
                 compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
                 rockchip,grf = <&grf>;
diff --git a/arch/arm/boot/dts/rk3228-evb.dts b/arch/arm/boot/dts/rk3228-evb.dts
new file mode 100644
index 000000000000..e3898b810150
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228-evb.dts
@@ -0,0 +1,66 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3228.dtsi"
+
+/ {
+        model = "Rockchip RK3228 Evaluation board";
+        compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
+
+        memory {
+                device_type = "memory";
+                reg = <0x60000000 0x40000000>;
+        };
+};
+
+&emmc {
+        broken-cd;
+        cap-mmc-highspeed;
+        mmc-ddr-1_8v;
+        disable-wp;
+        non-removable;
+        status = "okay";
+};
+
+&uart2 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi
new file mode 100644
index 000000000000..119ff12ab440
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228.dtsi
@@ -0,0 +1,442 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3228-cru.h>
+#include "skeleton.dtsi"
+
+/ {
+        compatible = "rockchip,rk3228";
+
+        interrupt-parent = <&gic>;
+
+        aliases {
+                serial0 = &uart0;
+                serial1 = &uart1;
+                serial2 = &uart2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: cpu@f00 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf00>;
+                        resets = <&cru SRST_CORE0>;
+                        operating-points = <
+                                /* KHz    uV */
+                                 816000 1000000
+                        >;
+                        clock-latency = <40000>;
+                        clocks = <&cru ARMCLK>;
+                };
+
+                cpu1: cpu@f01 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf01>;
+                        resets = <&cru SRST_CORE1>;
+                };
+
+                cpu2: cpu@f02 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf02>;
+                        resets = <&cru SRST_CORE2>;
+                };
+
+                cpu3: cpu@f03 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0xf03>;
+                        resets = <&cru SRST_CORE3>;
+                };
+        };
+
+        amba {
+                compatible = "arm,amba-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                pdma: pdma@110f0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x110f0000 0x4000>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        #dma-cells = <1>;
+                        clocks = <&cru ACLK_DMAC>;
+                        clock-names = "apb_pclk";
+                };
+        };
+
+        arm-pmu {
+                compatible = "arm,cortex-a7-pmu";
+                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                arm,cpu-registers-not-fw-configured;
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                clock-frequency = <24000000>;
+        };
+
+        xin24m: oscillator {
+                compatible = "fixed-clock";
+                clock-frequency = <24000000>;
+                clock-output-names = "xin24m";
+                #clock-cells = <0>;
+        };
+
+        grf: syscon@11000000 {
+                compatible = "syscon";
+                reg = <0x11000000 0x1000>;
+        };
+
+        uart0: serial@11010000 {
+                compatible = "snps,dw-apb-uart";
+                reg = <0x11010000 0x100>;
+                interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+
+        uart1: serial@11020000 {
+                compatible = "snps,dw-apb-uart";
+                reg = <0x11020000 0x100>;
+                interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart1_xfer>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+
+        uart2: serial@11030000 {
+                compatible = "snps,dw-apb-uart";
+                reg = <0x11030000 0x100>;
+                interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+                clock-frequency = <24000000>;
+                clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+                clock-names = "baudclk", "apb_pclk";
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart2_xfer>;
+                reg-shift = <2>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+
+        pwm0: pwm@110b0000 {
+                compatible = "rockchip,rk3288-pwm";
+                reg = <0x110b0000 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm0_pin>;
+                status = "disabled";
+        };
+
+        pwm1: pwm@110b0010 {
+                compatible = "rockchip,rk3288-pwm";
+                reg = <0x110b0010 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm1_pin>;
+                status = "disabled";
+        };
+
+        pwm2: pwm@110b0020 {
+                compatible = "rockchip,rk3288-pwm";
+                reg = <0x110b0020 0x10>;
+                #pwm-cells = <3>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm2_pin>;
+                status = "disabled";
+        };
+
+        pwm3: pwm@110b0030 {
+                compatible = "rockchip,rk3288-pwm";
+                reg = <0x110b0030 0x10>;
+                #pwm-cells = <2>;
+                clocks = <&cru PCLK_PWM>;
+                clock-names = "pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm3_pin>;
+                status = "disabled";
+        };
+
+        timer: timer@110c0000 {
+                compatible = "rockchip,rk3288-timer";
+                reg = <0x110c0000 0x20>;
+                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&xin24m>, <&cru PCLK_TIMER>;
+                clock-names = "timer", "pclk";
+        };
+
+        cru: clock-controller@110e0000 {
+                compatible = "rockchip,rk3228-cru";
+                reg = <0x110e0000 0x1000>;
+                rockchip,grf = <&grf>;
+                #clock-cells = <1>;
+                #reset-cells = <1>;
+                assigned-clocks = <&cru PLL_GPLL>;
+                assigned-clock-rates = <594000000>;
+        };
+
+        emmc: dwmmc@30020000 {
+                compatible = "rockchip,rk3288-dw-mshc";
+                reg = <0x30020000 0x4000>;
+                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                clock-frequency = <37500000>;
+                clock-freq-min-max = <400000 37500000>;
+                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                bus-width = <8>;
+                default-sample-phase = <158>;
+                num-slots = <1>;
+                fifo-depth = <0x100>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+                status = "disabled";
+        };
+
+        gic: interrupt-controller@32010000 {
+                compatible = "arm,gic-400";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                #address-cells = <0>;
+
+                reg = <0x32011000 0x1000>,
+                      <0x32012000 0x1000>,
+                      <0x32014000 0x2000>,
+                      <0x32016000 0x2000>;
+                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        pinctrl: pinctrl {
+                compatible = "rockchip,rk3228-pinctrl";
+                rockchip,grf = <&grf>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                gpio0: gpio0@11110000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x11110000 0x100>;
+                        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO0>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio1: gpio1@11120000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x11120000 0x100>;
+                        interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO1>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio2: gpio2@11130000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x11130000 0x100>;
+                        interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO2>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio3: gpio3@11140000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x11140000 0x100>;
+                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cru PCLK_GPIO3>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                pcfg_pull_up: pcfg-pull-up {
+                        bias-pull-up;
+                };
+
+                pcfg_pull_down: pcfg-pull-down {
+                        bias-pull-down;
+                };
+
+                pcfg_pull_none: pcfg-pull-none {
+                        bias-disable;
+                };
+
+                emmc {
+                        emmc_clk: emmc-clk {
+                                rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+
+                        emmc_cmd: emmc-cmd {
+                                rockchip,pins = <1 22 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+
+                        emmc_bus8: emmc-bus8 {
+                                rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 25 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 26 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 27 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 28 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 29 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 30 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 31 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm0 {
+                        pwm0_pin: pwm0-pin {
+                                rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm1 {
+                        pwm1_pin: pwm1-pin {
+                                rockchip,pins = <0 30 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm2 {
+                        pwm2_pin: pwm2-pin {
+                                rockchip,pins = <1 12 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                pwm3 {
+                        pwm3_pin: pwm3-pin {
+                                rockchip,pins = <1 11 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+                uart0 {
+                        uart0_xfer: uart0-xfer {
+                                rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,
+                                                <2 27 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart0_cts: uart0-cts {
+                                rockchip,pins = <2 29 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart0_rts: uart0-rts {
+                                rockchip,pins = <0 17 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                uart1 {
+                        uart1_xfer: uart1-xfer {
+                                rockchip,pins = <1 9 RK_FUNC_1 &pcfg_pull_none>,
+                                                <1 10 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart1_cts: uart1-cts {
+                                rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart1_rts: uart1-rts {
+                                rockchip,pins = <1 11 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+
+                uart2 {
+                        uart2_xfer: uart2-xfer {
+                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+
+                        uart2_cts: uart2-cts {
+                                rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+
+                        uart2_rts: uart2-rts {
+                                rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 43949a6771f0..452ca2441e84 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -43,10 +43,26 @@
 
 / {
         compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
-};
 
-&cpu0 {
-        cpu0-supply = <&vdd_cpu>;
+        vcc_lcd: vcc-lcd {
+                compatible = "regulator-fixed";
+                enable-active-high;
+                gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&lcd_en>;
+                regulator-name = "vcc_lcd";
+                vin-supply = <&vcc_io>;
+        };
+
+        vcc_wl: vcc-wl {
+                compatible = "regulator-fixed";
+                enable-active-high;
+                gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&wifi_pwr>;
+                regulator-name = "vcc_wl";
+                vin-supply = <&vcc_18>;
+        };
 };
 
 &i2c0 {
@@ -119,8 +135,8 @@
 
                         vdd_log: REG3 {
                                 regulator-name = "VDD_LOG";
-                                regulator-min-microvolt = <1000000>;
-                                regulator-max-microvolt = <1000000>;
+                                regulator-min-microvolt = <700000>;
+                                regulator-max-microvolt = <1500000>;
                                 regulator-always-on;
                         };
 
@@ -133,7 +149,7 @@
 
                         vccio_sd: REG5 {
                                 regulator-name = "VCCIO_SD";
-                                regulator-min-microvolt = <3300000>;
+                                regulator-min-microvolt = <1800000>;
                                 regulator-max-microvolt = <3300000>;
                                 regulator-always-on;
                         };
@@ -152,7 +168,7 @@
                                 regulator-always-on;
                         };
 
-                        vcca_tp: REG8 {
+                        vcc_tp: REG8 {
                                 regulator-name = "VCCA_TP";
                                 regulator-min-microvolt = <3300000>;
                                 regulator-max-microvolt = <3300000>;
@@ -189,3 +205,17 @@
                 };
         };
 };
+
+&pinctrl {
+        lcd {
+                lcd_en: lcd-en  {
+                        rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+
+        wifi {
+                wifi_pwr: wifi-pwr {
+                        rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index 18eb6cb495f4..736b08b0bfdd 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -43,17 +43,6 @@
 
 / {
         compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
-
-        ext_gmac: external-gmac-clock {
-                compatible = "fixed-clock";
-                clock-frequency = <125000000>;
-                clock-output-names = "ext_gmac";
-                #clock-cells = <0>;
-        };
-};
-
-&cpu0 {
-        cpu0-supply = <&vdd_cpu>;
 };
 
 &i2c0 {
@@ -244,19 +233,3 @@
                 };
         };
 };
-
-&gmac {
-        phy-supply = <&vcc_phy>;
-        phy-mode = "rgmii";
-        clock_in_out = "input";
-        snps,reset-gpio = <&gpio4 7 0>;
-        snps,reset-active-low;
-        snps,reset-delays-us = <0 10000 1000000>;
-        assigned-clocks = <&cru SCLK_MAC>;
-        assigned-clock-parents = <&ext_gmac>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&rgmii_pins>;
-        tx_delay = <0x30>;
-        rx_delay = <0x10>;
-        status = "ok";
-};
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index f6d2e7894b05..4faabdb65868 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -89,6 +89,13 @@
                 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
         };
 
+        ext_gmac: external-gmac-clock {
+                compatible = "fixed-clock";
+                clock-frequency = <125000000>;
+                clock-output-names = "ext_gmac";
+                #clock-cells = <0>;
+        };
+
         gpio-keys {
                 compatible = "gpio-keys";
                 #address-cells = <1>;
@@ -160,6 +167,10 @@
         };
 };
 
+&cpu0 {
+        cpu0-supply = <&vdd_cpu>;
+};
+
 &emmc {
         broken-cd;
         bus-width = <8>;
@@ -172,11 +183,6 @@
         status = "okay";
 };
 
-&hdmi {
-        ddc-i2c-bus = <&i2c5>;
-        status = "okay";
-};
-
 &sdmmc {
         bus-width = <4>;
         cap-mmc-highspeed;
@@ -191,6 +197,27 @@
         vqmmc-supply = <&vccio_sd>;
 };
 
+&gmac {
+        phy-supply = <&vcc_phy>;
+        phy-mode = "rgmii";
+        clock_in_out = "input";
+        snps,reset-gpio = <&gpio4 7 0>;
+        snps,reset-active-low;
+        snps,reset-delays-us = <0 10000 1000000>;
+        assigned-clocks = <&cru SCLK_MAC>;
+        assigned-clock-parents = <&ext_gmac>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&rgmii_pins>;
+        tx_delay = <0x30>;
+        rx_delay = <0x10>;
+        status = "ok";
+};
+
+&hdmi {
+        ddc-i2c-bus = <&i2c5>;
+        status = "okay";
+};
+
 &i2c0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts
index 14b9fc73c8a4..17f13c73fe5e 100644
--- a/arch/arm/boot/dts/rk3288-r89.dts
+++ b/arch/arm/boot/dts/rk3288-r89.dts
@@ -78,6 +78,13 @@
                 };
         };
 
+        ir: ir-receiver {
+                compatible = "gpio-ir-receiver";
+                gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&ir_int>;
+        };
+
         vcc_host: vcc-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
@@ -310,6 +317,12 @@
                 };
         };
 
+        ir {
+                ir_int: ir-int {
+                        rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+                };
+        };
+
         pmic {
                 pmic_int: pmic-int {
                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
index 1813b7c36556..1ece66f3e162 100644
--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -109,6 +109,7 @@
         act8846: act8846@5a {
                 compatible = "active-semi,act8846";
                 reg = <0x5a>;
+                system-power-controller;
                 inl1-supply = <&vcc_io>;
                 inl2-supply = <&vcc_sys>;
                 inl3-supply = <&vcc_20>;
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
index 8af35c867a80..c5453a0b07fc 100644
--- a/arch/arm/boot/dts/rk3288-rock2-square.dts
+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
@@ -49,6 +49,13 @@
                 stdout-path = "serial2:115200n8";
         };
 
+        ir: ir-receiver {
+                compatible = "gpio-ir-receiver";
+                gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&ir_int>;
+        };
+
         sound {
                 compatible = "simple-audio-card";
                 simple-audio-card,name = "SPDIF";
@@ -131,6 +138,12 @@
 };
 
 &pinctrl {
+        ir {
+                ir_int: ir-int {
+                        rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
+                };
+        };
+
         pmic {
                 pmic_int: pmic-int {
                         rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
diff --git a/arch/arm/boot/dts/rk3288-thermal.dtsi b/arch/arm/boot/dts/rk3288-thermal.dtsi
index 340406652186..651b962e3d53 100644
--- a/arch/arm/boot/dts/rk3288-thermal.dtsi
+++ b/arch/arm/boot/dts/rk3288-thermal.dtsi
@@ -52,7 +52,7 @@ reserve_thermal: reserve_thermal {
 };
 
 cpu_thermal: cpu_thermal {
-        polling-delay-passive = <1000>; /* milliseconds */
+        polling-delay-passive = <100>; /* milliseconds */
         polling-delay = <5000>; /* milliseconds */
 
         thermal-sensors = <&tsadc 1>;
@@ -63,6 +63,11 @@ cpu_thermal: cpu_thermal {
                         hysteresis = <2000>; /* millicelsius */
                         type = "passive";
                 };
+                cpu_alert1: cpu_alert1 {
+                        temperature = <75000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
                 cpu_crit: cpu_crit {
                         temperature = <90000>; /* millicelsius */
                         hysteresis = <2000>; /* millicelsius */
@@ -74,13 +79,18 @@ cpu_thermal: cpu_thermal {
                 map0 {
                         trip = <&cpu_alert0>;
                         cooling-device =
+                                <&cpu0 THERMAL_NO_LIMIT 6>;
+                };
+                map1 {
+                        trip = <&cpu_alert1>;
+                        cooling-device =
                                 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                 };
         };
 };
 
 gpu_thermal: gpu_thermal {
-        polling-delay-passive = <1000>; /* milliseconds */
+        polling-delay-passive = <100>; /* milliseconds */
         polling-delay = <5000>; /* milliseconds */
 
         thermal-sensors = <&tsadc 2>;
diff --git a/arch/arm/boot/dts/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rk3288-veyron-brain.dts
new file mode 100644
index 000000000000..cf5311d2617c
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-brain.dts
@@ -0,0 +1,139 @@
+/*
+ * Google Veyron Brain Rev 0 board device tree source
+ *
+ * Copyright 2014 Google, Inc
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3288-veyron.dtsi"
+
+/ {
+        model = "Google Brain";
+        compatible = "google,veyron-brain-rev0", "google,veyron-brain",
+                     "google,veyron", "rockchip,rk3288";
+
+        vcc33_sys: vcc33-sys {
+                vin-supply = <&vcc_5v>;
+        };
+
+        vcc33_io: vcc33_io {
+                compatible = "regulator-fixed";
+                regulator-name = "vcc33_io";
+                regulator-always-on;
+                regulator-boot-on;
+                vin-supply = <&vcc33_sys>;
+                /* This is gated by vcc_18 too */
+        };
+
+        /* This turns on vbus for host2 and otg (dwc2) */
+        vcc5_host2: vcc5-host2-regulator {
+                compatible = "regulator-fixed";
+                enable-active-high;
+                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&usb2_pwr_en>;
+                regulator-name = "vcc5_host2";
+                regulator-always-on;
+                regulator-boot-on;
+        };
+};
+
+&pinctrl {
+        hdmi {
+                vcc50_hdmi_en: vcc50-hdmi-en {
+                        rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+
+        pmic {
+                dvs_1: dvs-1 {
+                        rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
+                };
+
+                dvs_2: dvs-2 {
+                        rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+                };
+        };
+
+        usb-host {
+                usb2_pwr_en: usb2-pwr-en {
+                        rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+};
+
+&rk808 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
+        dvs-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>,
+                    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+
+        /delete-property/ vcc6-supply;
+
+        regulators {
+                /* vcc33_io is sourced directly from vcc33_sys */
+                /delete-node/ LDO_REG1;
+
+                /* This is not a pwren anymore, but the real power supply */
+                vdd10_lcd: LDO_REG7 {
+                        regulator-always-on;
+                        regulator-boot-on;
+                        regulator-min-microvolt = <1000000>;
+                        regulator-max-microvolt = <1000000>;
+                        regulator-name = "vdd10_lcd";
+                        regulator-suspend-mem-disabled;
+                };
+
+                vcc18_hdmi: SWITCH_REG2 {
+                        regulator-always-on;
+                        regulator-boot-on;
+                        regulator-name = "vcc18_hdmi";
+                        regulator-suspend-mem-disabled;
+                };
+        };
+};
+
+&vcc50_hdmi {
+        enable-active-high;
+        gpio = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&vcc50_hdmi_en>;
+};
diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
new file mode 100644
index 000000000000..f36f6f459225
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
@@ -0,0 +1,250 @@
+/*
+ * Google Veyron Mickey Rev 0 board device tree source
+ *
+ * Copyright 2015 Google, Inc
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3288-veyron.dtsi"
+
+/ {
+        model = "Google Mickey";
+        compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
+                     "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
+                     "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
+                     "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
+                     "google,veyron-mickey-rev0", "google,veyron-mickey",
+                     "google,veyron", "rockchip,rk3288";
+
+        vcc_5v: vcc-5v {
+                vin-supply = <&vcc33_sys>;
+        };
+
+        vcc33_io: vcc33_io {
+                compatible = "regulator-fixed";
+                regulator-name = "vcc33_io";
+                regulator-always-on;
+                regulator-boot-on;
+                vin-supply = <&vcc33_sys>;
+        };
+};
+
+&cpu_thermal {
+        /delete-node/ trips;
+        /delete-node/ cooling-maps;
+
+        trips {
+                cpu_alert_almost_warm: cpu_alert_almost_warm {
+                        temperature = <63000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_alert_warm: cpu_alert_warm {
+                        temperature = <65000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_alert_almost_hot: cpu_alert_almost_hot {
+                        temperature = <80000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_alert_hot: cpu_alert_hot {
+                        temperature = <82000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_alert_hotter: cpu_alert_hotter {
+                        temperature = <84000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_alert_very_hot: cpu_alert_very_hot {
+                        temperature = <85000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "passive";
+                };
+                cpu_crit: cpu_crit {
+                        temperature = <90000>; /* millicelsius */
+                        hysteresis = <2000>; /* millicelsius */
+                        type = "critical";
+                };
+        };
+
+        cooling-maps {
+                /*
+                 * After 1st level, throttle the CPU down to as low as 1.4 GHz
+                 * and don't let the GPU go faster than 400 MHz.  Note that we
+                 * won't throttle the GPU lower than 400 MHz due to CPU
+                 * heat--we'll let the GPU do the rest itself.
+                 */
+                cpu_warm_limit_cpu {
+                        trip = <&cpu_alert_warm>;
+                        cooling-device =
+                                <&cpu0 THERMAL_NO_LIMIT 4>;
+                };
+
+                /*
+                 * Add some discrete steps to help throttling system deal
+                 * with the fact that there are two passive cooling devices:
+                 * the CPU and the GPU.
+                 *
+                 * - 1.2 GHz - 1.0 GHz (almost hot)
+                 * - 800 MHz           (hot)
+                 * - 800 MHz - 696 MHz (hotter)
+                 * - 696 MHz - min     (very hot)
+                 *
+                 * Note:
+                 * - 800 MHz appears to be a "sweet spot" for me.  I can run
+                 *   some pretty serious workload here and be happy.
+                 * - After 696 MHz we stop lowering voltage, so throttling
+                 *   past there is less effective.
+                 */
+                cpu_almost_hot_limit_cpu {
+                        trip = <&cpu_alert_almost_hot>;
+                        cooling-device =
+                                <&cpu0 5 6>;
+                };
+                cpu_hot_limit_cpu {
+                        trip = <&cpu_alert_hot>;
+                        cooling-device =
+                                <&cpu0 7 7>;
+                };
+                cpu_hotter_limit_cpu {
+                        trip = <&cpu_alert_hotter>;
+                        cooling-device =
+                                <&cpu0 7 8>;
+                };
+                cpu_very_hot_limit_cpu {
+                        trip = <&cpu_alert_very_hot>;
+                        cooling-device =
+                                <&cpu0 8 THERMAL_NO_LIMIT>;
+                };
+        };
+};
+
+&emmc {
+        /delete-property/mmc-hs200-1_8v;
+};
+
+&i2c2 {
+        status = "disabled";
+};
+
+&i2c4 {
+        status = "disabled";
+};
+
+&i2s {
+        status = "okay";
+        clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out";
+        clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
+};
+
+&rk808 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
+        dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
+                    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+
+        /delete-property/ vcc6-supply;
+        /delete-property/ vcc12-supply;
+
+        vcc11-supply = <&vcc33_sys>;
+
+        regulators {
+                /* vcc33_io is sourced directly from vcc33_sys */
+                /delete-node/ LDO_REG1;
+                /delete-node/ LDO_REG7;
+
+                /* This is not a pwren anymore, but the real power supply */
+                vdd10_lcd: LDO_REG7 {
+                        regulator-always-on;
+                        regulator-boot-on;
+                        regulator-min-microvolt = <1000000>;
+                        regulator-max-microvolt = <1000000>;
+                        regulator-name = "vdd10_lcd";
+                        regulator-suspend-mem-disabled;
+                };
+
+                vcc18_lcd: LDO_REG8 {
+                        regulator-always-on;
+                        regulator-boot-on;
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-name = "vcc18_lcd";
+                        regulator-suspend-mem-disabled;
+                };
+        };
+};
+
+&pinctrl {
+        hdmi {
+                power_hdmi_on: power-hdmi-on {
+                        rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+
+        pmic {
+                dvs_1: dvs-1 {
+                        rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+                };
+
+                dvs_2: dvs-2 {
+                        rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+                };
+        };
+};
+
+&usb_host0_ehci {
+        status = "disabled";
+};
+
+&usb_host1 {
+        status = "disabled";
+};
+
+&vcc50_hdmi {
+        enable-active-high;
+        gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&power_hdmi_on>;
+};
diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index 85f0373df498..699beb0a9481 100644
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -121,6 +121,18 @@
         clock-frequency = <400000>;
         i2c-scl-falling-time-ns = <50>;
         i2c-scl-rising-time-ns = <300>;
+
+        touchscreen@10 {
+                compatible = "elan,ekth3500";
+                reg = <0x10>;
+                interrupt-parent = <&gpio2>;
+                interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&touch_int &touch_rst>;
+                reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+                vcc33-supply = <&vcc33_touch>;
+                vccio-supply = <&vcc33_touch>;
+        };
 };
 
 &rk808 {
diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index a7ea7d06cf7f..b34a7b5b3f62 100644
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -88,6 +88,14 @@
         };
 };
 
+&cpu_alert0 {
+        temperature = <65000>;
+};
+
+&cpu_alert1 {
+        temperature = <70000>;
+};
+
 &rk808 {
         pinctrl-names = "default";
         pinctrl-0 = <&pmic_int_l>;
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 5e61f07724d4..9fce91ffff6f 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -340,6 +340,11 @@
         i2c-scl-rising-time-ns = <1000>;
 };
 
+&power {
+        assigned-clocks = <&cru SCLK_EDP_24M>;
+        assigned-clock-parents = <&xin24m>;
+};
+
 &pwm1 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 04ea209f1737..8ac49f3efc17 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -53,6 +53,7 @@
         interrupt-parent = <&gic>;
 
         aliases {
+                ethernet0 = &gmac;
                 i2c0 = &i2c0;
                 i2c1 = &i2c1;
                 i2c2 = &i2c2;
@@ -777,9 +778,23 @@
                 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2s0_bus>;
+                rockchip,playback-channels = <8>;
+                rockchip,capture-channels = <2>;
                 status = "disabled";
         };
 
+        crypto: cypto-controller@ff8a0000 {
+                compatible = "rockchip,rk3288-crypto";
+                reg = <0xff8a0000 0x4000>;
+                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
+                         <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
+                clock-names = "aclk", "hclk", "sclk", "apb_pclk";
+                resets = <&cru SRST_CRYPTO>;
+                reset-names = "crypto-rst";
+                status = "okay";
+        };
+
         vopb: vop@ff930000 {
                 compatible = "rockchip,rk3288-vop";
                 reg = <0xff930000 0x19c>;
@@ -886,6 +901,19 @@
                 interrupts = <GIC_PPI 9 0xf04>;
         };
 
+        efuse: efuse@ffb40000 {
+                compatible = "rockchip,rockchip-efuse";
+                reg = <0xffb40000 0x20>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                clocks = <&cru PCLK_EFUSE256>;
+                clock-names = "pclk_efuse";
+
+                cpu_leakage: cpu_leakage@17 {
+                        reg = <0x17 0x1>;
+                };
+        };
+
         usbphy: phy {
                 compatible = "rockchip,rk3288-usb-phy";
                 rockchip,grf = <&grf>;
@@ -1144,7 +1172,7 @@
                                 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up>;
                         };
 
-                        sdmmc_cd: sdmcc-cd {
+                        sdmmc_cd: sdmmc-cd {
                                 rockchip,pins = <6 22 RK_FUNC_1 &pcfg_pull_up>;
                         };
 
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 4497d288a7cb..99eeea70223b 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -49,6 +49,7 @@
         interrupt-parent = <&gic>;
 
         aliases {
+                ethernet0 = &emac;
                 i2c0 = &i2c0;
                 i2c1 = &i2c1;
                 i2c2 = &i2c2;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 4dfca8fc49b3..3f750f6170f2 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -637,6 +637,12 @@
                                                 atmel,clk-output-range = <0 83000000>;
                                         };
 
+                                        pdmic_clk: pdmic_clk {
+                                                #clock-cells = <0>;
+                                                reg = <48>;
+                                                atmel,clk-output-range = <0 83000000>;
+                                        };
+
                                         i2s0_clk: i2s0_clk {
                                                 #clock-cells = <0>;
                                                 reg = <54>;
@@ -763,6 +769,11 @@
                                                 atmel,clk-output-range = <0 83000000>;
                                         };
 
+                                        pdmic_gclk: pdmic_gclk {
+                                                #clock-cells = <0>;
+                                                reg = <48>;
+                                        };
+
                                         i2s0_gclk: i2s0_gclk {
                                                 #clock-cells = <0>;
                                                 reg = <54>;
@@ -852,6 +863,19 @@
                                 clock-names = "t0_clk", "slow_clk";
                         };
 
+                        pdmic: pdmic@f8018000 {
+                                compatible = "atmel,sama5d2-pdmic";
+                                reg = <0xf8018000 0x124>;
+                                interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
+                                dmas = <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                        | AT91_XDMAC_DT_PERID(50))>;
+                                dma-names = "rx";
+                                clocks = <&pdmic_clk>, <&pdmic_gclk>;
+                                clock-names = "pclk", "gclk";
+                                status = "disabled";
+                        };
+
                         uart0: serial@f801c000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xf801c000 0x100>;
@@ -929,6 +953,13 @@
                                 clocks = <&h32ck>;
                         };
 
+                        watchdog@f8048040 {
+                                compatible = "atmel,sama5d4-wdt";
+                                reg = <0xf8048040 0x10>;
+                                interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
+                                status = "disabled";
+                        };
+
                         sckc@f8048050 {
                                 compatible = "atmel,at91sam9x5-sckc";
                                 reg = <0xf8048050 0x4>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 2193637b9cd2..b8032bca4621 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -451,7 +451,7 @@
                                         interrupt-parent = <&pmc>;
                                         interrupts = <AT91_PMC_MCKRDY>;
                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
-                                        atmel,clk-output-range = <125000000 177000000>;
+                                        atmel,clk-output-range = <125000000 200000000>;
                                         atmel,clk-divisors = <1 2 4 3>;
                                 };
 
@@ -916,7 +916,7 @@
                         };
 
                         i2c0: i2c@f8014000 {
-                                compatible = "atmel,at91sam9x5-i2c";
+                                compatible = "atmel,sama5d4-i2c";
                                 reg = <0xf8014000 0x4000>;
                                 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
                                 dmas = <&dma1
@@ -935,7 +935,7 @@
                         };
 
                         i2c1: i2c@f8018000 {
-                                compatible = "atmel,at91sam9x5-i2c";
+                                compatible = "atmel,sama5d4-i2c";
                                 reg = <0xf8018000 0x4000>;
                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
                                 dmas = <&dma1
@@ -975,7 +975,7 @@
                         };
 
                         i2c2: i2c@f8024000 {
-                                compatible = "atmel,at91sam9x5-i2c";
+                                compatible = "atmel,sama5d4-i2c";
                                 reg = <0xf8024000 0x4000>;
                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
                                 dmas = <&dma1
@@ -1669,15 +1669,23 @@
                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
                                                 atmel,pins =
                                                         <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* MCI0_CK, conflict with PCK1(ISI_MCK) */
-                                                         AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDB, conflict with NAND_D0 */
-                                                         AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB0, conflict with NAND_D1 */
+                                                         AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
+                                                         AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
                                                         >;
                                         };
                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
                                                 atmel,pins =
-                                                        <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB1, conflict with NAND_D2 */
-                                                         AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB2, conflict with NAND_D3 */
-                                                         AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB3, conflict with NAND_D4 */
+                                                        <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
+                                                         AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
+                                                         AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
+                                                        >;
+                                        };
+                                        pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+                                                atmel,pins =
+                                                        <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA4, conflict with NAND_D5 */
+                                                         AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA5, conflict with NAND_D6 */
+                                                         AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA6, conflict with NAND_D7 */
+                                                         AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA7, conflict with NAND_OE */
                                                         >;
                                         };
                                 };
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index 7fc5602810ad..aa8bae3b8fcf 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -147,7 +147,7 @@
                         gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_HOME>;
                         label = "SW1";
-                        gpio-key,wakeup;
+                        wakeup-source;
                 };
         };
 
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index ff7c8f298f30..3a6056f9f0d2 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -28,6 +28,7 @@
                         reg = <0>;
                         clock-frequency = <1196000000>;
                         power-domains = <&pd_a2sl>;
+                        next-level-cache = <&L2>;
                 };
                 cpu@1 {
                         device_type = "cpu";
@@ -35,6 +36,7 @@
                         reg = <1>;
                         clock-frequency = <1196000000>;
                         power-domains = <&pd_a2sl>;
+                        next-level-cache = <&L2>;
                 };
         };
 
@@ -53,6 +55,18 @@
                       <0xf0000100 0x100>;
         };
 
+        L2: cache-controller {
+                compatible = "arm,pl310-cache";
+                reg = <0xf0100000 0x1000>;
+                interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
+                power-domains = <&pd_a3sm>;
+                arm,data-latency = <3 3 3>;
+                arm,tag-latency = <2 2 2>;
+                arm,shared-override;
+                cache-unified;
+                cache-level = <2>;
+        };
+
         sbsc2: memory-controller@fb400000 {
                 compatible = "renesas,sbsc-sh73a0";
                 reg = <0xfb400000 0x400>;
@@ -259,6 +273,50 @@
                 status = "disabled";
         };
 
+        msiof0: spi@e6e20000 {
+                compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
+                reg = <0xe6e20000 0x0064>;
+                interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp0_clks SH73A0_CLK_MSIOF0>;
+                power-domains = <&pd_a3sp>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        msiof1: spi@e6e10000 {
+                compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
+                reg = <0xe6e10000 0x0064>;
+                interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks SH73A0_CLK_MSIOF1>;
+                power-domains = <&pd_a3sp>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        msiof2: spi@e6e00000 {
+                compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
+                reg = <0xe6e00000 0x0064>;
+                interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks SH73A0_CLK_MSIOF2>;
+                power-domains = <&pd_a3sp>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        msiof3: spi@e6c90000 {
+                compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
+                reg = <0xe6c90000 0x0064>;
+                interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks SH73A0_CLK_MSIOF3>;
+                power-domains = <&pd_a3sp>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         sdhi0: sd@ee100000 {
                 compatible = "renesas,sdhi-sh73a0";
                 reg = <0xee100000 0x100>;
@@ -798,13 +856,13 @@
                 mstp0_clks: mstp0_clks@e6150130 {
                         compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0xe6150130 4>, <0xe6150030 4>;
-                        clocks = <&cpg_clocks SH73A0_CLK_HP>;
+                        clocks = <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>;
                         #clock-cells = <1>;
                         clock-indices = <
-                                SH73A0_CLK_IIC2
+                                SH73A0_CLK_IIC2 SH73A0_CLK_MSIOF0
                         >;
                         clock-output-names =
-                                "iic2";
+                                "iic2", "msiof0";
                 };
                 mstp1_clks: mstp1_clks@e6150134 {
                         compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -834,20 +892,24 @@
                         reg = <0xe6150138 4>, <0xe6150040 4>;
                         clocks = <&sub_clk>, <&cpg_clocks SH73A0_CLK_HP>,
                                  <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>,
-                                 <&sub_clk>, <&sub_clk>, <&sub_clk>, <&sub_clk>,
-                                 <&sub_clk>, <&sub_clk>;
+                                 <&sub_clk>, <&sub_clk>, <&sub_clk>,
+                                 <&sub_clk>, <&sub_clk>, <&sub_clk>,
+                                 <&sub_clk>, <&sub_clk>, <&sub_clk>;
                         #clock-cells = <1>;
                         clock-indices = <
                                 SH73A0_CLK_SCIFA7 SH73A0_CLK_SY_DMAC
-                                SH73A0_CLK_MP_DMAC SH73A0_CLK_SCIFA5
-                                SH73A0_CLK_SCIFB SH73A0_CLK_SCIFA0
-                                SH73A0_CLK_SCIFA1 SH73A0_CLK_SCIFA2
-                                SH73A0_CLK_SCIFA3 SH73A0_CLK_SCIFA4
+                                SH73A0_CLK_MP_DMAC SH73A0_CLK_MSIOF3
+                                SH73A0_CLK_MSIOF1 SH73A0_CLK_SCIFA5
+                                SH73A0_CLK_SCIFB SH73A0_CLK_MSIOF2
+                                SH73A0_CLK_SCIFA0 SH73A0_CLK_SCIFA1
+                                SH73A0_CLK_SCIFA2 SH73A0_CLK_SCIFA3
+                                SH73A0_CLK_SCIFA4
                         >;
                         clock-output-names =
-                                "scifa7", "sy_dmac", "mp_dmac", "scifa5",
-                                "scifb", "scifa0", "scifa1", "scifa2",
-                                "scifa3", "scifa4";
+                                "scifa7", "sy_dmac", "mp_dmac", "msiof3",
+                                "msiof1", "scifa5", "scifb", "msiof2",
+                                "scifa0", "scifa1", "scifa2", "scifa3",
+                                "scifa4";
                 };
                 mstp3_clks: mstp3_clks@e615013c {
                         compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 39c470e291f9..3ed4abdaaa9c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -677,6 +677,7 @@
                         #size-cells = <0>;
                         clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
                         clock-names = "biu", "ciu";
+                        status = "disabled";
                 };
 
                 ocram: sram@ffff0000 {
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index a75a666032b2..3c8867862b0d 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -79,6 +79,7 @@
 &mmc0 {
         vmmc-supply = <&regulator_3_3v>;
         vqmmc-supply = <&regulator_3_3v>;
+        status = "okay";
 };
 
 &usb1 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
index 555e9caf21e1..afea3645ada4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
@@ -100,6 +100,7 @@
 &mmc0 {
         vmmc-supply = <&regulator_3_3v>;
         vqmmc-supply = <&regulator_3_3v>;
+        status = "okay";
 };
 
 &uart0 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
new file mode 100644
index 000000000000..f86f9c060d7a
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+        model = "DENX MCV";
+        compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+        memory {
+                name = "memory";
+                device_type = "memory";
+                reg = <0x0 0x40000000>; /* 1 GiB */
+        };
+};
+
+&mmc0 { /* On-SoM eMMC */
+        bus-width = <8>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
new file mode 100644
index 000000000000..7186a29b8b86
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5_mcv.dtsi"
+
+/ {
+        model = "DENX MCV EVK";
+        compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+        aliases {
+                ethernet0 = &gmac0;
+                stmpe-i2c0 = &stmpe1;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+};
+
+&can0 {
+        status = "okay";
+};
+
+&can1 {
+        status = "okay";
+};
+
+&gmac0 {
+        phy-mode = "rgmii";
+        status = "okay";
+};
+
+&gpio0 {        /* GPIO  0 ... 28 */
+        status = "okay";
+};
+
+&gpio1 {        /* GPIO 29 ... 57 */
+        status = "okay";
+};
+
+&gpio2 {        /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+        status = "okay";
+};
+
+&i2c0 {
+        status = "okay";
+        speed-mode = <0>;
+
+        stmpe1: stmpe811@41 {
+                compatible = "st,stmpe811";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x41>;
+                id = <0>;
+                blocks = <0x5>;
+                irq-gpio = <&portb 28 0x4>;     /* GPIO 57, trig. level HI */
+
+                stmpe_touchscreen {
+                        compatible = "st,stmpe-ts";
+                        reg = <0>;
+                        ts,sample-time = <4>;
+                        ts,mod-12b = <1>;
+                        ts,ref-sel = <0>;
+                        ts,adc-freq = <1>;
+                        ts,ave-ctrl = <1>;
+                        ts,touch-det-delay = <3>;
+                        ts,settling = <4>;
+                        ts,fraction-z = <7>;
+                        ts,i-drive = <1>;
+                };
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
+
+&usb1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index d4d0a28fb331..15e43f43f244 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -84,6 +84,7 @@
         cd-gpios = <&portb 18 0>;
         vmmc-supply = <&regulator_3_3v>;
         vqmmc-supply = <&regulator_3_3v>;
+        status = "okay";
 };
 
 &usb1 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index 48bf651bd762..b61f22f9ac9f 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -80,6 +80,7 @@
 &mmc0 {
         vmmc-supply = <&regulator_3_3v>;
         vqmmc-supply = <&regulator_3_3v>;
+        status = "okay";
 };
 
 &usb1 {
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 50f5e9d09203..341f5b7ed242 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -512,63 +512,51 @@
 
                                 // DB8500_REGULATOR_VAPE
                                 db8500_vape_reg: db8500_vape {
-                                        regulator-compatible = "db8500_vape";
                                         regulator-always-on;
                                 };
 
                                 // DB8500_REGULATOR_VARM
                                 db8500_varm_reg: db8500_varm {
-                                        regulator-compatible = "db8500_varm";
                                 };
 
                                 // DB8500_REGULATOR_VMODEM
                                 db8500_vmodem_reg: db8500_vmodem {
-                                        regulator-compatible = "db8500_vmodem";
                                 };
 
                                 // DB8500_REGULATOR_VPLL
                                 db8500_vpll_reg: db8500_vpll {
-                                        regulator-compatible = "db8500_vpll";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS1
                                 db8500_vsmps1_reg: db8500_vsmps1 {
-                                        regulator-compatible = "db8500_vsmps1";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS2
                                 db8500_vsmps2_reg: db8500_vsmps2 {
-                                        regulator-compatible = "db8500_vsmps2";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS3
                                 db8500_vsmps3_reg: db8500_vsmps3 {
-                                        regulator-compatible = "db8500_vsmps3";
                                 };
 
                                 // DB8500_REGULATOR_VRF1
                                 db8500_vrf1_reg: db8500_vrf1 {
-                                        regulator-compatible = "db8500_vrf1";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSP
                                 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
-                                        regulator-compatible = "db8500_sva_mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
                                 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
-                                        regulator-compatible = "db8500_sva_mmdsp_ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAPIPE
                                 db8500_sva_pipe_reg: db8500_sva_pipe {
-                                        regulator-compatible = "db8500_sva_pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSP
                                 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
-                                        regulator-compatible = "db8500_sia_mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
@@ -577,39 +565,32 @@
 
                                 // DB8500_REGULATOR_SWITCH_SIAPIPE
                                 db8500_sia_pipe_reg: db8500_sia_pipe {
-                                        regulator-compatible = "db8500_sia_pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SGA
                                 db8500_sga_reg: db8500_sga {
-                                        regulator-compatible = "db8500_sga";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
                                 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
-                                        regulator-compatible = "db8500_b2r2_mcde";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12
                                 db8500_esram12_reg: db8500_esram12 {
-                                        regulator-compatible = "db8500_esram12";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12RET
                                 db8500_esram12_ret_reg: db8500_esram12_ret {
-                                        regulator-compatible = "db8500_esram12_ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34
                                 db8500_esram34_reg: db8500_esram34 {
-                                        regulator-compatible = "db8500_esram34";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34RET
                                 db8500_esram34_ret_reg: db8500_esram34_ret {
-                                        regulator-compatible = "db8500_esram34_ret";
                                 };
                         };
 
@@ -721,7 +702,6 @@
                                         compatible = "stericsson,ab8500-ext-regulator";
 
                                         ab8500_ext1_reg: ab8500_ext1 {
-                                                regulator-compatible = "ab8500_ext1";
                                                 regulator-min-microvolt = <1800000>;
                                                 regulator-max-microvolt = <1800000>;
                                                 regulator-boot-on;
@@ -729,7 +709,6 @@
                                         };
 
                                         ab8500_ext2_reg: ab8500_ext2 {
-                                                regulator-compatible = "ab8500_ext2";
                                                 regulator-min-microvolt = <1360000>;
                                                 regulator-max-microvolt = <1360000>;
                                                 regulator-boot-on;
@@ -737,7 +716,6 @@
                                         };
 
                                         ab8500_ext3_reg: ab8500_ext3 {
-                                                regulator-compatible = "ab8500_ext3";
                                                 regulator-min-microvolt = <3400000>;
                                                 regulator-max-microvolt = <3400000>;
                                                 regulator-boot-on;
@@ -750,7 +728,6 @@
 
                                         // supplies to the display/camera
                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
-                                                regulator-compatible = "ab8500_ldo_aux1";
                                                 regulator-min-microvolt = <2500000>;
                                                 regulator-max-microvolt = <2900000>;
                                                 regulator-boot-on;
@@ -760,56 +737,46 @@
 
                                         // supplies to the on-board eMMC
                                         ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
-                                                regulator-compatible = "ab8500_ldo_aux2";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
 
                                         // supply for VAUX3; SDcard slots
                                         ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
-                                                regulator-compatible = "ab8500_ldo_aux3";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
 
                                         // supply for v-intcore12; VINTCORE12 LDO
                                         ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
-                                                regulator-compatible = "ab8500_ldo_intcore";
                                         };
 
                                         // supply for tvout; gpadc; TVOUT LDO
                                         ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
-                                                regulator-compatible = "ab8500_ldo_tvout";
                                         };
 
                                         // supply for ab8500-usb; USB LDO
                                         ab8500_ldo_usb_reg: ab8500_ldo_usb {
-                                                regulator-compatible = "ab8500_ldo_usb";
                                         };
 
                                         // supply for ab8500-vaudio; VAUDIO LDO
                                         ab8500_ldo_audio_reg: ab8500_ldo_audio {
-                                                regulator-compatible = "ab8500_ldo_audio";
                                         };
 
                                         // supply for v-anamic1 VAMIC1 LDO
                                         ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
-                                                regulator-compatible = "ab8500_ldo_anamic1";
                                         };
 
                                         // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
                                         ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
-                                                regulator-compatible = "ab8500_ldo_anamic2";
                                         };
 
                                         // supply for v-dmic; VDMIC LDO
                                         ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
-                                                regulator-compatible = "ab8500_ldo_dmic";
                                         };
 
                                         // supply for U8500 CSI/DSI; VANA LDO
                                         ab8500_ldo_ana_reg: ab8500_ldo_ana {
-                                                regulator-compatible = "ab8500_ldo_ana";
                                         };
                                 };
                         };
diff --git a/arch/arm/boot/dts/ste-href-stuib.dtsi b/arch/arm/boot/dts/ste-href-stuib.dtsi
index 78b75256c638..c3987ad06d79 100644
--- a/arch/arm/boot/dts/ste-href-stuib.dtsi
+++ b/arch/arm/boot/dts/ste-href-stuib.dtsi
@@ -114,6 +114,8 @@
                                 rohm,touch-max-x = <384>;
                                 rohm,touch-max-y = <704>;
                                 rohm,flip-y;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&touch_rohm_mode>;
                         };
 
                         bu21013_tp@5d {
@@ -124,6 +126,8 @@
                                 rohm,touch-max-x = <384>;
                                 rohm,touch-max-y = <704>;
                                 rohm,flip-y;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&touch_rohm_mode>;
                         };
                 };
 
@@ -166,6 +170,25 @@
                                         };
                                 };
                         };
+                        touch {
+                                touch_rohm_mode: touch_rohm {
+                                        /*
+                                         * ROHM touch screen uses GPIO 143 for
+                                         * RST1, GPIO 146 for RST2 and
+                                         * GPIO 67 for interrupts. Pull-up
+                                         * the IRQ line and drive both
+                                         * reset signals low.
+                                         */
+                                        stuib_cfg1 {
+                                                pins = "GPIO143_D12", "GPIO146_D13";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        stuib_cfg2 {
+                                                pins = "GPIO67_G2";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
index 0e1c96943d47..b7b4211c5353 100644
--- a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
+++ b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
@@ -66,7 +66,7 @@
                                         keypad,num-columns = <8>;
                                         keypad,num-rows = <8>;
                                         linux,no-autorepeat;
-                                        linux,wakeup;
+                                        wakeup-source;
                                         linux,keymap = <0x0301006b
                                                         0x04010066
                                                         0x06040072
@@ -104,13 +104,40 @@
                                              <19 IRQ_TYPE_EDGE_RISING>;
                         };
                         lsm303dlh@1e {
-                                /* Magnetometer */
+                                /*
+                                 * This magnetometer is packaged with
+                                 * the accelerometer, and has a DRDY line,
+                                 * however it is not connected on this
+                                 * board so it can not generate interrupts.
+                                 */
                                 compatible = "st,lsm303dlh-magn";
                                 reg = <0x1e>;
                                 vdd-supply = <&ab8500_ldo_aux1_reg>;
                                 vddio-supply = <&db8500_vsmps2_reg>;
+                        };
+                        lis331dl@1c {
+                                /* Accelerometer */
+                                compatible = "st,lis331dl-accel";
+                                st,drdy-int-pin = <1>;
+                                reg = <0x1c>;
+                                vdd-supply = <&ab8500_ldo_aux1_reg>;
+                                vddio-supply = <&db8500_vsmps2_reg>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&accel_tvk_mode>;
+                                interrupt-parent = <&gpio2>;
+                                interrupts = <18 IRQ_TYPE_EDGE_RISING>,
+                                             <19 IRQ_TYPE_EDGE_RISING>;
+                        };
+                        ak8974@0f {
+                                /* Magnetometer */
+                                compatible = "asahi-kasei,ak8974";
+                                reg = <0x0f>;
+                                vdd-supply = <&ab8500_ldo_aux1_reg>;
+                                vddio-supply = <&db8500_vsmps2_reg>;
                                 pinctrl-names = "default";
-                                pinctrl-0 = <&magneto_tvk_mode>;
+                                pinctrl-0 = <&gyro_magn_tvk_mode>;
+                                interrupt-parent = <&gpio1>;
+                                interrupts = <0 IRQ_TYPE_EDGE_RISING>;
                         };
                         l3g4200d@68 {
                                 /* Gyroscope */
@@ -119,6 +146,10 @@
                                 reg = <0x68>;
                                 vdd-supply = <&ab8500_ldo_aux1_reg>;
                                 vddio-supply = <&db8500_vsmps2_reg>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&gyro_magn_tvk_mode>;
+                                interrupt-parent = <&gpio1>;
+                                interrupts = <0 IRQ_TYPE_EDGE_RISING>;
                         };
                         lsp001wm@5c {
                                 /* Barometer/pressure sensor */
@@ -159,17 +190,22 @@
                                         /* Accelerometer interrupt lines 1 & 2 */
                                         tvk_cfg {
                                                 pins = "GPIO82_C1", "GPIO83_D3";
-                                                ste,config = <&gpio_in_pu>;
+                                                ste,config = <&gpio_in_pd>;
                                         };
                                 };
                         };
-                        magnetometer {
-                                magneto_tvk_mode: magneto_tvk {
-                                        /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
+                        gyroscope {
+                                /*
+                                 * These lines are shared between Gyroscope l3g400dh
+                                 * and AK8974 magnetometer.
+                                 */
+                                gyro_magn_tvk_mode: gyro_magn_tvk {
+                                         /* GPIO 31 used for INT pull down the line */
                                         tvk_cfg1 {
                                                 pins = "GPIO31_V3";
-                                                ste,config = <&gpio_in_pu>;
+                                                ste,config = <&gpio_in_pd>;
                                         };
+                                        /* GPIO 32 used for DRDY, pull this down */
                                         tvk_cfg2 {
                                                 pins = "GPIO32_V2";
                                                 ste,config = <&gpio_in_pd>;
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index 9c2387b34d0c..149a72e7e37a 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -43,7 +43,6 @@
                                   <&vaudio_hf_hrefv60_mode>,
                                   <&gbf_hrefv60_mode>,
                                   <&hdtv_hrefv60_mode>,
-                                  <&touch_hrefv60_mode>,
                                   <&gpios_hrefv60_mode>;
 
                         sdi0 {
@@ -190,23 +189,6 @@
                                         };
                                  };
                         };
-                        touch {
-                                touch_hrefv60_mode: touch_hrefv60 {
-                                        /*
-                                         * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
-                                         * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
-                                         * reset signals low.
-                                         */
-                                        hrefv60_cfg1 {
-                                                pins = "GPIO143_D12", "GPIO146_D13";
-                                                ste,config = <&gpio_out_lo>;
-                                        };
-                                        hrefv60_cfg2 {
-                                                pins = "GPIO67_G2";
-                                                ste,config = <&gpio_in_pu>;
-                                        };
-                                };
-                        };
                         mcde {
                                 lcd_hrefv60_mode: lcd_hrefv60 {
                                         /*
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
index 35282c0105c6..789329030658 100644
--- a/arch/arm/boot/dts/ste-nomadik-s8815.dts
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -163,7 +163,7 @@
                         label = "user_button";
                         gpios = <&gpio0 3 0x1>;
                         linux,code = <1>; /* KEY_ESC */
-                        gpio-key,wakeup;
+                        wakeup-source;
                         pinctrl-names = "default";
                         pinctrl-0 = <&user_button_default_mode>;
                 };
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index e80e42163883..08f82077b64d 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -281,7 +281,8 @@
                                 vddio-supply = <&db8500_vsmps2_reg>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&magneto_snowball_mode>;
-                                gpios = <&gpio5 5 0x4>; /* DRDY line */
+                                interrupt-parent = <&gpio5>;
+                                interrupts = <5 IRQ_TYPE_EDGE_RISING>; /* DRDY line */
                         };
                         l3g4200d@68 {
                                 /* Gyroscope */
@@ -292,9 +293,9 @@
                                 vddio-supply = <&db8500_vsmps2_reg>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&gyro_snowball_mode>;
-                                gpios = <&gpio5 6 0x4>; /* DRDY line */
                                 interrupt-parent = <&gpio5>;
-                                interrupts = <9 IRQ_TYPE_EDGE_RISING>; /* INT1 */
+                                interrupts = <6 IRQ_TYPE_EDGE_RISING>, /* DRDY line */
+                                             <9 IRQ_TYPE_EDGE_RISING>; /* INT1 */
                         };
                         lsp001wm@5c {
                                 /* Barometer/pressure sensor */
diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index 82a661677e97..9c73ac2842ad 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -315,21 +315,17 @@
                         ab3100-regulators {
                                 compatible = "stericsson,ab3100-regulators";
                                 ab3100_ldo_a_reg: ab3100_ldo_a {
-                                        regulator-compatible = "ab3100_ldo_a";
                                         startup-delay-us = <200>;
                                         regulator-always-on;
                                         regulator-boot-on;
                                 };
                                 ab3100_ldo_c_reg: ab3100_ldo_c {
-                                        regulator-compatible = "ab3100_ldo_c";
                                         startup-delay-us = <200>;
                                 };
                                 ab3100_ldo_d_reg: ab3100_ldo_d {
-                                        regulator-compatible = "ab3100_ldo_d";
                                         startup-delay-us = <200>;
                                 };
                                 ab3100_ldo_e_reg: ab3100_ldo_e {
-                                        regulator-compatible = "ab3100_ldo_e";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         startup-delay-us = <200>;
@@ -337,7 +333,6 @@
                                         regulator-boot-on;
                                 };
                                 ab3100_ldo_f_reg: ab3100_ldo_f {
-                                        regulator-compatible = "ab3100_ldo_f";
                                         regulator-min-microvolt = <2500000>;
                                         regulator-max-microvolt = <2500000>;
                                         startup-delay-us = <600>;
@@ -345,28 +340,23 @@
                                         regulator-boot-on;
                                 };
                                 ab3100_ldo_g_reg: ab3100_ldo_g {
-                                        regulator-compatible = "ab3100_ldo_g";
                                         regulator-min-microvolt = <1500000>;
                                         regulator-max-microvolt = <2850000>;
                                         startup-delay-us = <400>;
                                 };
                                 ab3100_ldo_h_reg: ab3100_ldo_h {
-                                        regulator-compatible = "ab3100_ldo_h";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <2750000>;
                                         startup-delay-us = <200>;
                                 };
                                 ab3100_ldo_k_reg: ab3100_ldo_k {
-                                        regulator-compatible = "ab3100_ldo_k";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <2750000>;
                                         startup-delay-us = <200>;
                                 };
                                 ab3100_ext_reg: ab3100_ext {
-                                        regulator-compatible = "ab3100_ext";
                                 };
                                 ab3100_buck_reg: ab3100_buck {
-                                        regulator-compatible = "ab3100_buck";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1800000>;
                                         startup-delay-us = <1000>;
diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
index 3f0aeb8288cd..ac64781a0a9c 100644
--- a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
@@ -65,12 +65,22 @@
 /*
  * TODO:
  *   2x cameras via CSI
- *   audio
  *   AXP battery management
  *   NAND
  *   OTG
  *   Touchscreen - gt801_2plus1 @ i2c adapter 2 @ 0x48
  */
+&codec {
+        /* PH15 controls power to external amplifier (ft2012q) */
+        pinctrl-names = "default";
+        pinctrl-0 = <&codec_pa_pin>;
+        allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
 
 &ehci0 {
         status = "okay";
@@ -86,15 +96,13 @@
         status = "okay";
 
         axp209: pmic@34 {
-                compatible = "x-powers,axp209";
                 reg = <0x34>;
                 interrupts = <0>;
-
-                interrupt-controller;
-                #interrupt-cells = <1>;
         };
 };
 
+#include "axp209.dtsi"
+
 &i2c1 {
         pinctrl-names = "default";
         pinctrl-0 = <&i2c1_pins_a>;
@@ -110,7 +118,7 @@
 };
 
 &lradc {
-        vref-supply = <&reg_vcc3v0>;
+        vref-supply = <&reg_ldo2>;
 
         status = "okay";
 
@@ -146,6 +154,40 @@
         status = "okay";
 };
 
+&pio {
+        codec_pa_pin: codec_pa_pin@0 {
+                allwinner,pins = "PH15";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+};
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1250000>;
+        regulator-max-microvolt = <1250000>;
+        regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
 &reg_usb1_vbus {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-inet1.dts b/arch/arm/boot/dts/sun4i-a10-inet1.dts
index 487ce63519dc..e09053bf5e1f 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet1.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet1.dts
@@ -47,6 +47,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
         model = "iNet-1";
@@ -56,11 +57,25 @@
                 serial0 = &uart0;
         };
 
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pinctrl-names = "default";
+                pinctrl-0 = <&bl_en_pin_inet>;
+                pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+                brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+                default-brightness-level = <8>;
+                enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+        };
+
         chosen {
                 stdout-path = "serial0:115200n8";
         };
 };
 
+&codec {
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
@@ -104,6 +119,19 @@
         pinctrl-names = "default";
         pinctrl-0 = <&i2c2_pins_a>;
         status = "okay";
+
+        ft5x: touchscreen@38 {
+                compatible = "edt,edt-ft5406";
+                reg = <0x38>;
+                interrupt-parent = <&pio>;
+                interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&touchscreen_wake_pin>;
+                wake-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* PB13 */
+                touchscreen-size-x = <600>;
+                touchscreen-size-y = <1024>;
+                touchscreen-swapped-x-y;
+        };
 };
 
 &lradc {
@@ -151,6 +179,20 @@
 };
 
 &pio {
+        bl_en_pin_inet: bl_en_pin@0 {
+                allwinner,pins = "PH7";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
+        touchscreen_wake_pin: touchscreen_wake_pin@0 {
+                allwinner,pins = "PB13";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
                 allwinner,pins = "PH4";
                 allwinner,function = "gpio_in";
@@ -166,6 +208,12 @@
         };
 };
 
+&pwm {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins_a>;
+        status = "okay";
+};
+
 &reg_dcdc2 {
         regulator-always-on;
         regulator-min-microvolt = <1000000>;
diff --git a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
index 2fffc0434075..ca49b0d0ce1e 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
@@ -59,6 +59,159 @@
         chosen {
                 stdout-path = "serial0:115200n8";
         };
+
+        gpio_keys {
+                compatible = "gpio-keys-polled";
+                pinctrl-names = "default";
+                pinctrl-0 = <&key_pins_inet9f>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                poll-interval = <20>;
+
+                button@0 {
+                        label = "Left Joystick Left";
+                        linux,code = <ABS_X>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
+                };
+
+                button@1 {
+                        label = "Left Joystick Right";
+                        linux,code = <ABS_X>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */
+                };
+
+                button@2 {
+                        label = "Left Joystick Up";
+                        linux,code = <ABS_Y>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
+                };
+
+                button@3 {
+                        label = "Left Joystick Down";
+                        linux,code = <ABS_Y>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
+                };
+
+                button@4 {
+                        label = "Right Joystick Left";
+                        linux,code = <ABS_Z>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */
+                };
+
+                button@5 {
+                        label = "Right Joystick Right";
+                        linux,code = <ABS_Z>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
+                };
+
+                button@6 {
+                        label = "Right Joystick Up";
+                        linux,code = <ABS_RZ>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */
+                };
+
+                button@7 {
+                        label = "Right Joystick Down";
+                        linux,code = <ABS_RZ>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
+                };
+
+                button@8 {
+                        label = "DPad Left";
+                        linux,code = <ABS_HAT0X>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 7 23 GPIO_ACTIVE_LOW>; /* PH23 */
+                };
+
+                button@9 {
+                        label = "DPad Right";
+                        linux,code = <ABS_HAT0X>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 7 24 GPIO_ACTIVE_LOW>; /* PH24 */
+                };
+
+                button@10 {
+                        label = "DPad Up";
+                        linux,code = <ABS_HAT0Y>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <0xffffffff>; /* -1 */
+                        gpios = <&pio 7 25 GPIO_ACTIVE_LOW>; /* PH25 */
+                };
+
+                button@11 {
+                        label = "DPad Down";
+                        linux,code = <ABS_HAT0Y>;
+                        linux,input-type = <EV_ABS>;
+                        linux,input-value = <1>;
+                        gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */
+                };
+
+                button@12 {
+                        label = "Button X";
+                        linux,code = <BTN_X>;
+                        gpios = <&pio 0 16 GPIO_ACTIVE_LOW>; /* PA16 */
+                };
+
+                button@13 {
+                        label = "Button Y";
+                        linux,code = <BTN_Y>;
+                        gpios = <&pio 0 14 GPIO_ACTIVE_LOW>; /* PA14 */
+                };
+
+                button@14 {
+                        label = "Button A";
+                        linux,code = <BTN_A>;
+                        gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+                };
+
+                button@15 {
+                        label = "Button B";
+                        linux,code = <BTN_B>;
+                        gpios = <&pio 0 15 GPIO_ACTIVE_LOW>; /* PA15 */
+                };
+
+                button@16 {
+                        label = "Select Button";
+                        linux,code = <BTN_SELECT>;
+                        gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */
+                };
+
+                button@17 {
+                        label = "Start Button";
+                        linux,code = <BTN_START>;
+                        gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */
+                };
+
+                button@18 {
+                        label = "Top Left Button";
+                        linux,code = <BTN_TL>;
+                        gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
+                };
+
+                button@19 {
+                        label = "Top Right Button";
+                        linux,code = <BTN_TR>;
+                        gpios = <&pio 0 13 GPIO_ACTIVE_LOW>; /* PA13 */
+                };
+        };
 };
 
 &cpu0 {
@@ -157,6 +310,17 @@
 };
 
 &pio {
+        key_pins_inet9f: key_pins@0 {
+                allwinner,pins = "PA0", "PA1", "PA3", "PA4",
+                                 "PA5", "PA6", "PA8", "PA9",
+                                 "PA11", "PA12", "PA13",
+                                 "PA14", "PA15", "PA16", "PA17",
+                                 "PH22", "PH23", "PH24", "PH25", "PH26";
+                allwinner,function = "gpio_in";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        };
+
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
                 allwinner,pins = "PH4";
                 allwinner,function = "gpio_in";
diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts
index 3c7eebe17088..ddf0683cbc6a 100644
--- a/arch/arm/boot/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mk802.dts
@@ -58,6 +58,10 @@
         };
 };
 
+&codec {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
index 82e69c3820a2..918f97294b33 100644
--- a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
@@ -47,6 +47,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
         model = "Point of View Protab2-IPS9";
@@ -56,11 +57,28 @@
                 serial0 = &uart0;
         };
 
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pinctrl-names = "default";
+                pinctrl-0 = <&bl_en_pin_protab>;
+                pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+                brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+                default-brightness-level = <8>;
+                enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+        };
+
         chosen {
                 stdout-path = "serial0:115200n8";
         };
 };
 
+&codec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&codec_pa_pin>;
+        allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
@@ -93,6 +111,22 @@
         pinctrl-names = "default";
         pinctrl-0 = <&i2c2_pins_a>;
         status = "okay";
+
+        pixcir_ts@5c {
+                pinctrl-names = "default";
+                pinctrl-0 = <&touchscreen_pins>;
+                compatible = "pixcir,pixcir_tangoc";
+                reg = <0x5c>;
+                interrupt-parent = <&pio>;
+                interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */
+                attb-gpio = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
+                enable-gpios = <&pio 0 5 GPIO_ACTIVE_LOW>;
+                wake-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>;
+                touchscreen-size-x = <1024>;
+                touchscreen-size-y = <768>;
+                touchscreen-inverted-x;
+                touchscreen-inverted-y;
+        };
 };
 
 &lradc {
@@ -129,6 +163,27 @@
 };
 
 &pio {
+        bl_en_pin_protab: bl_en_pin@0 {
+                allwinner,pins = "PH7";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
+        codec_pa_pin: codec_pa_pin@0 {
+                allwinner,pins = "PH15";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
+        touchscreen_pins: touchscreen_pins@0 {
+                allwinner,pins = "PA5", "PB13";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
                 allwinner,pins = "PH4";
                 allwinner,function = "gpio_in";
@@ -144,6 +199,12 @@
         };
 };
 
+&pwm {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins_a>;
+        status = "okay";
+};
+
 &reg_dcdc2 {
         regulator-always-on;
         regulator-min-microvolt = <1000000>;
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index aa90f319309b..2c8f5e6ad905 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -66,7 +66,7 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_be0-lcd0-hdmi";
                         clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
-                                 <&ahb_gates 44>;
+                                 <&ahb_gates 44>, <&dram_gates 26>;
                         status = "disabled";
                 };
 
@@ -75,7 +75,8 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
                         clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
-                                 <&ahb_gates 44>, <&ahb_gates 46>;
+                                 <&ahb_gates 44>, <&ahb_gates 46>,
+                                 <&dram_gates 25>, <&dram_gates 26>;
                         status = "disabled";
                 };
 
@@ -84,7 +85,8 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_fe0-de_be0-lcd0";
                         clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
-                                 <&ahb_gates 46>;
+                                 <&ahb_gates 46>, <&dram_gates 25>,
+                                 <&dram_gates 26>;
                         status = "disabled";
                 };
 
@@ -93,7 +95,8 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
                         clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
-                                 <&ahb_gates 44>, <&ahb_gates 46>;
+                                 <&ahb_gates 44>, <&ahb_gates 46>,
+                                 <&dram_gates 25>, <&dram_gates 26>;
                         status = "disabled";
                 };
         };
@@ -492,6 +495,40 @@
                         clock-output-names = "spi3";
                 };
 
+                dram_gates: clk@01c20100 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun4i-a10-dram-gates-clk";
+                        reg = <0x01c20100 0x4>;
+                        clocks = <&pll5 0>;
+                        clock-indices = <0>,
+                                        <1>, <2>,
+                                        <3>,
+                                        <4>,
+                                        <5>, <6>,
+                                        <15>,
+                                        <24>, <25>,
+                                        <26>, <27>,
+                                        <28>, <29>;
+                        clock-output-names = "dram_ve",
+                                             "dram_csi0", "dram_csi1",
+                                             "dram_ts",
+                                             "dram_tvd",
+                                             "dram_tve0", "dram_tve1",
+                                             "dram_output",
+                                             "dram_de_fe1", "dram_de_fe0",
+                                             "dram_de_be0", "dram_de_be1",
+                                             "dram_de_mp", "dram_ace";
+                };
+
+                ve_clk: clk@01c2013c {
+                        #clock-cells = <0>;
+                        #reset-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-ve-clk";
+                        reg = <0x01c2013c 0x4>;
+                        clocks = <&pll4>;
+                        clock-output-names = "ve";
+                };
+
                 codec_clk: clk@01c20140 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-codec-clk";
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
index 2b3511ea2e5d..a790ec8adb75 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
@@ -86,6 +86,20 @@
         status = "okay";
 };
 
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins_a>;
+        status = "okay";
+
+        axp152: pmic@30 {
+                compatible = "x-powers,axp152";
+                reg = <0x30>;
+                interrupts = <0>;
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+};
+
 &mmc0 {
         pinctrl-names = "default";
         pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>;
diff --git a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
new file mode 100644
index 000000000000..7fbb0b0558a9
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
@@ -0,0 +1,241 @@
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+        model = "Empire Electronix D709 tablet";
+        compatible = "empire-electronix,d709", "allwinner,sun5i-a13";
+
+        aliases {
+                serial0 = &uart1;
+        };
+
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+                brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+                default-brightness-level = <8>;
+                /* TODO: backlight uses axp gpio1 as enable pin */
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+};
+
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
+
+&ehci0 {
+        status = "okay";
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins_a>;
+        status = "okay";
+
+        axp209: pmic@34 {
+                reg = <0x34>;
+                interrupts = <0>;
+        };
+};
+
+#include "axp209.dtsi"
+
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins_a>;
+        status = "okay";
+
+        pcf8563: rtc@51 {
+                compatible = "nxp,pcf8563";
+                reg = <0x51>;
+        };
+};
+
+&lradc {
+        vref-supply = <&reg_ldo2>;
+        status = "okay";
+
+        button@200 {
+                label = "Volume Up";
+                linux,code = <KEY_VOLUMEUP>;
+                channel = <0>;
+                voltage = <200000>;
+        };
+
+        button@400 {
+                label = "Volume Down";
+                linux,code = <KEY_VOLUMEDOWN>;
+                channel = <0>;
+                voltage = <400000>;
+        };
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
+        cd-inverted;
+        status = "okay";
+};
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins_a>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <8>;
+        non-removable;
+        status = "okay";
+
+        mmccard: mmccard@0 {
+                reg = <0>;
+                compatible = "mmc-card";
+                broken-hpi;
+        };
+};
+
+&otg_sram {
+        status = "okay";
+};
+
+&pio {
+        mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 {
+                allwinner,pins = "PG0";
+                allwinner,function = "gpio_in";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        };
+
+        usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
+                allwinner,pins = "PG1";
+                allwinner,function = "gpio_in";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+        };
+
+        usb0_id_detect_pin: usb0_id_detect_pin@0 {
+                allwinner,pins = "PG2";
+                allwinner,function = "gpio_in";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        };
+};
+
+&pwm {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins>;
+        status = "okay";
+};
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1250000>;
+        regulator-max-microvolt = <1250000>;
+        regulator-name = "vdd-int-pll";
+};
+
+&reg_ldo1 {
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        regulator-name = "vcc-wifi";
+};
+
+&reg_usb0_vbus {
+        gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins_b>;
+        status = "okay";
+};
+
+&usb_otg {
+        dr_mode = "otg";
+        status = "okay";
+};
+
+&usb0_vbus_pin_a {
+        allwinner,pins = "PG12";
+};
+
+&usbphy {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
+        usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+        usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+        usb0_vbus-supply = <&reg_usb0_vbus>;
+        usb1_vbus-supply = <&reg_ldo3>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
index eb793d5a2bd6..fa9ddfdcfe96 100644
--- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
@@ -47,11 +47,21 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
         model = "Utoo P66";
         compatible = "utoo,p66", "allwinner,sun5i-a13";
 
+        backlight: backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+                /* Note levels of 10 / 20% result in backlight off */
+                brightness-levels = <0 30 40 50 60 70 80 90 100>;
+                default-brightness-level = <6>;
+                /* TODO: backlight uses axp gpio1 as enable pin */
+        };
+
         i2c_lcd: i2c@0 {
                 /* The lcd panel i2c interface is hooked up via gpios */
                 compatible = "i2c-gpio";
@@ -63,6 +73,13 @@
         };
 };
 
+&codec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&codec_pa_pin>;
+        allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
@@ -158,6 +175,13 @@
 };
 
 &pio {
+        codec_pa_pin: codec_pa_pin@0 {
+                allwinner,pins = "PG3";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
         mmc0_cd_pin_p66: mmc0_cd_pin@0 {
                 allwinner,pins = "PG0";
                 allwinner,function = "gpio_in";
@@ -201,6 +225,12 @@
         };
 };
 
+&pwm {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins>;
+        status = "okay";
+};
+
 &reg_dcdc2 {
         regulator-always-on;
         regulator-min-microvolt = <1000000>;
diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
index b199020733d3..360adfb1e9ca 100644
--- a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
@@ -113,18 +113,83 @@
         allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 };
 
-&reg_usb1_vbus {
-        gpio = <&pio 7 27 GPIO_ACTIVE_HIGH>;
+&p2wi {
         status = "okay";
+
+        axp22x: pmic@68 {
+                compatible = "x-powers,axp221";
+                reg = <0x68>;
+                interrupt-parent = <&nmi_intc>;
+                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+        };
 };
 
-&usb1_vbus_pin_a {
-        allwinner,pins = "PH27";
+#include "axp22x.dtsi"
+
+&reg_aldo3 {
+        regulator-always-on;
+        regulator-min-microvolt = <2700000>;
+        regulator-max-microvolt = <3300000>;
+        regulator-name = "avcc";
 };
 
-&usbphy {
-        usb1_vbus-supply = <&reg_usb1_vbus>;
-        status = "okay";
+&reg_dc1sw {
+        regulator-name = "vcc-lcd-usb2";
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+};
+
+&reg_dc5ldo {
+        regulator-min-microvolt = <700000>;
+        regulator-max-microvolt = <1320000>;
+        regulator-name = "vdd-cpus";
+};
+
+&reg_dcdc1 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+        regulator-min-microvolt = <700000>;
+        regulator-max-microvolt = <1320000>;
+        regulator-name = "vdd-gpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <700000>;
+        regulator-max-microvolt = <1320000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc4 {
+        regulator-always-on;
+        regulator-min-microvolt = <700000>;
+        regulator-max-microvolt = <1320000>;
+        regulator-name = "vdd-sys-dll";
+};
+
+&reg_dcdc5 {
+        regulator-always-on;
+        regulator-min-microvolt = <1500000>;
+        regulator-max-microvolt = <1500000>;
+        regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        regulator-name = "vcc-wifi";
+};
+
+/* Voltage source for I2C pullup resistors for I2C Bus 0 */
+&reg_dldo3 {
+        regulator-min-microvolt = <2800000>;
+        regulator-max-microvolt = <2800000>;
+        regulator-name = "vddio-csi";
 };
 
 &uart0 {
@@ -132,3 +197,9 @@
         pinctrl-0 = <&uart0_pins_a>;
         status = "okay";
 };
+
+&usbphy {
+        usb1_vbus-supply = <&reg_dldo1>;
+        usb2_vbus-supply = <&reg_dc1sw>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index fd7594ff90d5..67c8a7644b99 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -92,6 +92,10 @@
         status = "okay";
 };
 
+&codec {
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
         operating-points = <
diff --git a/arch/arm/boot/dts/sun7i-a20-icnova-swac.dts b/arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
new file mode 100644
index 000000000000..f5b5325a70e2
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
@@ -0,0 +1,169 @@
+/*
+ * Copyright 2015 Stefan Roese <sr@denx.de>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        model = "ICnova-A20 SWAC";
+        compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20";
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+};
+
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
+
+&ehci0 {
+        status = "okay";
+};
+
+&ehci1 {
+        status = "okay";
+};
+
+&gmac {
+        pinctrl-names = "default";
+        pinctrl-0 = <&gmac_pins_mii_a>;
+        phy = <&phy1>;
+        phy-mode = "mii";
+        status = "okay";
+
+        phy1: ethernet-phy@1 {
+                reg = <1>;
+        };
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins_a>;
+        status = "okay";
+
+        axp209: pmic@34 {
+                reg = <0x34>;
+                interrupt-parent = <&nmi_intc>;
+                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+        };
+};
+
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins_a>;
+        status = "okay";
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */
+        cd-inverted;
+        status = "okay";
+};
+
+&ohci0 {
+        status = "okay";
+};
+
+&ohci1 {
+        status = "okay";
+};
+
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
+&reg_usb1_vbus {
+        status = "okay";
+};
+
+&reg_usb2_vbus {
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_a>;
+        status = "okay";
+};
+
+&usbphy {
+        usb1_vbus-supply = <&reg_usb1_vbus>;
+        usb2_vbus-supply = <&reg_usb2_vbus>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun7i-a20-mk808c.dts b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
index 4f432f8ade77..c9e648d17a1e 100644
--- a/arch/arm/boot/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
@@ -68,6 +68,10 @@
         };
 };
 
+&codec {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index b7fe102475e7..c3c626b2cfa2 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -1,5 +1,6 @@
 /*
  * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>
+ * Copyright 2015 - Karsten Merker <merker@debian.org>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,6 +46,7 @@
 #include "sunxi-common-regulators.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
 
@@ -86,6 +88,10 @@
         status = "okay";
 };
 
+&codec {
+        status = "okay";
+};
+
 &gmac {
         pinctrl-names = "default";
         pinctrl-0 = <&gmac_pins_rgmii_a>;
@@ -110,6 +116,60 @@
         };
 };
 
+&lradc {
+        vref-supply = <&reg_vcc3v0>;
+        status = "okay";
+
+        button@190 {
+                label = "Volume Up";
+                linux,code = <KEY_VOLUMEUP>;
+                channel = <0>;
+                voltage = <190000>;
+        };
+
+        button@390 {
+                label = "Volume Down";
+                linux,code = <KEY_VOLUMEDOWN>;
+                channel = <0>;
+                voltage = <390000>;
+        };
+
+        button@600 {
+                label = "Menu";
+                linux,code = <KEY_MENU>;
+                channel = <0>;
+                voltage = <600000>;
+        };
+
+        button@800 {
+                label = "Search";
+                linux,code = <KEY_SEARCH>;
+                channel = <0>;
+                voltage = <800000>;
+        };
+
+        button@980 {
+                label = "Home";
+                linux,code = <KEY_HOMEPAGE>;
+                channel = <0>;
+                voltage = <980000>;
+        };
+
+        button@1180 {
+                label = "Esc";
+                linux,code = <KEY_ESC>;
+                channel = <0>;
+                voltage = <1180000>;
+        };
+
+        button@1400 {
+                label = "Enter";
+                linux,code = <KEY_ENTER>;
+                channel = <0>;
+                voltage = <1400000>;
+        };
+};
+
 &mmc0 {
         pinctrl-names = "default";
         pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
@@ -120,6 +180,16 @@
         status = "okay";
 };
 
+&mmc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olimex_som_evb>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */
+        cd-inverted;
+        status = "okay";
+};
+
 &ohci0 {
         status = "okay";
 };
@@ -142,6 +212,13 @@
                 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
         };
+
+        mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin@0 {
+                allwinner,pins = "PH0";
+                allwinner,function = "gpio_in";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        };
 };
 
 &reg_ahci_5v {
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 4f65664e5dfe..2be04c438b1e 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -95,6 +95,10 @@
         status = "okay";
 };
 
+&codec {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index 1757a6ad74e9..ddac7328b852 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -82,6 +82,10 @@
         status = "okay";
 };
 
+&codec {
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
index 861a4a66fb19..1a8b39be1d61 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
@@ -111,6 +111,10 @@
         allwinner,pins = "PH2";
 };
 
+&codec {
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
index 78239ad988e7..2f6b21adddd9 100644
--- a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
@@ -48,6 +48,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
         model = "Wexler TAB7200";
@@ -57,11 +58,28 @@
                 serial0 = &uart0;
         };
 
+        backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+                brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+                default-brightness-level = <8>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&bl_enable_pin>;
+                enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+        };
+
         chosen {
                 stdout-path = "serial0:115200n8";
         };
 };
 
+&codec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&codec_pa_pin>;
+        allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
+        status = "okay";
+};
+
 &cpu0 {
         cpu-supply = <&reg_dcdc2>;
 };
@@ -98,6 +116,18 @@
         pinctrl-names = "default";
         pinctrl-0 = <&i2c2_pins_a>;
         status = "okay";
+
+        gt911: touchscreen@5d {
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&pio>;
+                interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */
+                pinctrl-names = "default";
+                pinctrl-0 = <&ts_reset_pin>;
+                irq-gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* INT (PH21) */
+                reset-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* RST (PB13) */
+                touchscreen-swapped-x-y;
+        };
 };
 
 &lradc {
@@ -142,6 +172,27 @@
 };
 
 &pio {
+        bl_enable_pin: bl_enable_pin@0 {
+                allwinner,pins = "PH7";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
+        codec_pa_pin: codec_pa_pin@0 {
+                allwinner,pins = "PH15";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
+        ts_reset_pin: ts_reset_pin@0 {
+                allwinner,pins = "PB13";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
                 allwinner,pins = "PH4";
                 allwinner,function = "gpio_in";
@@ -150,6 +201,12 @@
         };
 };
 
+&pwm {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins_a>;
+        status = "okay";
+};
+
 &reg_dcdc2 {
         regulator-always-on;
         regulator-min-microvolt = <1000000>;
diff --git a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
index 85b500d8cc4c..dc31d476ef81 100644
--- a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -80,6 +80,18 @@
         status = "okay";
 };
 
+&gmac {
+        pinctrl-names = "default";
+        pinctrl-0 = <&gmac_pins_rgmii_a>;
+        phy = <&phy1>;
+        phy-mode = "rgmii";
+        status = "okay";
+
+        phy1: ethernet-phy@1 {
+                reg = <1>;
+        };
+};
+
 &i2c0 {
         pinctrl-names = "default";
         pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e02eb720c4fc..0940a788f824 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -68,7 +68,7 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_be0-lcd0-hdmi";
                         clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
-                                 <&ahb_gates 44>;
+                                 <&ahb_gates 44>, <&dram_gates 26>;
                         status = "disabled";
                 };
 
@@ -76,7 +76,8 @@
                         compatible = "allwinner,simple-framebuffer",
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_be0-lcd0";
-                        clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+                        clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
+                                 <&dram_gates 26>;
                         status = "disabled";
                 };
 
@@ -85,7 +86,7 @@
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_be0-lcd0-tve0";
                         clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
-                                 <&ahb_gates 44>;
+                                 <&ahb_gates 44>, <&dram_gates 26>;
                         status = "disabled";
                 };
         };
@@ -501,6 +502,40 @@
                         clock-output-names = "spi3";
                 };
 
+                dram_gates: clk@01c20100 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun4i-a10-dram-gates-clk";
+                        reg = <0x01c20100 0x4>;
+                        clocks = <&pll5 0>;
+                        clock-indices = <0>,
+                                        <1>, <2>,
+                                        <3>,
+                                        <4>,
+                                        <5>, <6>,
+                                        <15>,
+                                        <24>, <25>,
+                                        <26>, <27>,
+                                        <28>, <29>;
+                        clock-output-names = "dram_ve",
+                                             "dram_csi0", "dram_csi1",
+                                             "dram_ts",
+                                             "dram_tvd",
+                                             "dram_tve0", "dram_tve1",
+                                             "dram_output",
+                                             "dram_de_fe1", "dram_de_fe0",
+                                             "dram_de_be0", "dram_de_be1",
+                                             "dram_de_mp", "dram_ace";
+                };
+
+                ve_clk: clk@01c2013c {
+                        #clock-cells = <0>;
+                        #reset-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-ve-clk";
+                        reg = <0x01c2013c 0x4>;
+                        clocks = <&pll4>;
+                        clock-output-names = "ve";
+                };
+
                 codec_clk: clk@01c20140 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-codec-clk";
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 0c0964d4fa1f..6f88fb0ddbc7 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -56,7 +56,7 @@
                 #size-cells = <1>;
                 ranges;
 
-                framebuffer@0 {
+                simplefb_lcd: framebuffer@0 {
                         compatible = "allwinner,simple-framebuffer",
                                      "simple-framebuffer";
                         allwinner,pipeline = "de_be0-lcd0";
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
new file mode 100644
index 000000000000..e67df590535f
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        model = "Xunlong Orange Pi Plus";
+        compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+        cd-inverted;
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_a>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
new file mode 100644
index 000000000000..1524130e43c9
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -0,0 +1,497 @@
+/*
+ * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "skeleton.dtsi"
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        interrupt-parent = <&gic>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+
+                cpu@2 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <2>;
+                };
+
+                cpu@3 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <3>;
+                };
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                osc24M: osc24M_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <24000000>;
+                        clock-output-names = "osc24M";
+                };
+
+                osc32k: osc32k_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <32768>;
+                        clock-output-names = "osc32k";
+                };
+
+                pll1: clk@01c20000 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun8i-a23-pll1-clk";
+                        reg = <0x01c20000 0x4>;
+                        clocks = <&osc24M>;
+                        clock-output-names = "pll1";
+                };
+
+                /* dummy clock until actually implemented */
+                pll5: pll5_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <0>;
+                        clock-output-names = "pll5";
+                };
+
+                pll6: clk@01c20028 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun6i-a31-pll6-clk";
+                        reg = <0x01c20028 0x4>;
+                        clocks = <&osc24M>;
+                        clock-output-names = "pll6", "pll6x2";
+                };
+
+                pll6d2: pll6d2_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-factor-clock";
+                        clock-div = <2>;
+                        clock-mult = <1>;
+                        clocks = <&pll6 0>;
+                        clock-output-names = "pll6d2";
+                };
+
+                /* dummy clock until pll6 can be reused */
+                pll8: pll8_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <1>;
+                        clock-output-names = "pll8";
+                };
+
+                cpu: cpu_clk@01c20050 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-cpu-clk";
+                        reg = <0x01c20050 0x4>;
+                        clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
+                        clock-output-names = "cpu";
+                };
+
+                axi: axi_clk@01c20050 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-axi-clk";
+                        reg = <0x01c20050 0x4>;
+                        clocks = <&cpu>;
+                        clock-output-names = "axi";
+                };
+
+                ahb1: ahb1_clk@01c20054 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun6i-a31-ahb1-clk";
+                        reg = <0x01c20054 0x4>;
+                        clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
+                        clock-output-names = "ahb1";
+                };
+
+                ahb2: ahb2_clk@01c2005c {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun8i-h3-ahb2-clk";
+                        reg = <0x01c2005c 0x4>;
+                        clocks = <&ahb1>, <&pll6d2>;
+                        clock-output-names = "ahb2";
+                };
+
+                apb1: apb1_clk@01c20054 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-apb0-clk";
+                        reg = <0x01c20054 0x4>;
+                        clocks = <&ahb1>;
+                        clock-output-names = "apb1";
+                };
+
+                apb2: apb2_clk@01c20058 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-apb1-clk";
+                        reg = <0x01c20058 0x4>;
+                        clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
+                        clock-output-names = "apb2";
+                };
+
+                bus_gates: clk@01c20060 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun8i-h3-bus-gates-clk";
+                        reg = <0x01c20060 0x14>;
+                        clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>;
+                        clock-names = "ahb1", "ahb2", "apb1", "apb2";
+                        clock-indices = <5>, <6>, <8>,
+                                        <9>, <10>, <13>,
+                                        <14>, <17>, <18>,
+                                        <19>, <20>,
+                                        <21>, <23>,
+                                        <24>, <25>,
+                                        <26>, <27>,
+                                        <28>, <29>,
+                                        <30>, <31>, <32>,
+                                        <35>, <36>, <37>,
+                                        <40>, <41>, <43>,
+                                        <44>, <52>, <53>,
+                                        <54>, <64>,
+                                        <65>, <69>, <72>,
+                                        <76>, <77>, <78>,
+                                        <96>, <97>, <98>,
+                                        <112>, <113>,
+                                        <114>, <115>,
+                                        <116>, <128>, <135>;
+                        clock-output-names = "bus_ce", "bus_dma", "bus_mmc0",
+                                             "bus_mmc1", "bus_mmc2", "bus_nand",
+                                             "bus_sdram", "bus_gmac", "bus_ts",
+                                             "bus_hstimer", "bus_spi0",
+                                             "bus_spi1", "bus_otg",
+                                             "bus_otg_ehci0", "bus_ehci1",
+                                             "bus_ehci2", "bus_ehci3",
+                                             "bus_otg_ohci0", "bus_ohci1",
+                                             "bus_ohci2", "bus_ohci3", "bus_ve",
+                                             "bus_lcd0", "bus_lcd1", "bus_deint",
+                                             "bus_csi", "bus_tve", "bus_hdmi",
+                                             "bus_de", "bus_gpu", "bus_msgbox",
+                                             "bus_spinlock", "bus_codec",
+                                             "bus_spdif", "bus_pio", "bus_ths",
+                                             "bus_i2s0", "bus_i2s1", "bus_i2s2",
+                                             "bus_i2c0", "bus_i2c1", "bus_i2c2",
+                                             "bus_uart0", "bus_uart1",
+                                             "bus_uart2", "bus_uart3",
+                                             "bus_scr", "bus_ephy", "bus_dbg";
+                };
+
+                mmc0_clk: clk@01c20088 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun4i-a10-mmc-clk";
+                        reg = <0x01c20088 0x4>;
+                        clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                        clock-output-names = "mmc0",
+                                             "mmc0_output",
+                                             "mmc0_sample";
+                };
+
+                mmc1_clk: clk@01c2008c {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun4i-a10-mmc-clk";
+                        reg = <0x01c2008c 0x4>;
+                        clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                        clock-output-names = "mmc1",
+                                             "mmc1_output",
+                                             "mmc1_sample";
+                };
+
+                mmc2_clk: clk@01c20090 {
+                        #clock-cells = <1>;
+                        compatible = "allwinner,sun4i-a10-mmc-clk";
+                        reg = <0x01c20090 0x4>;
+                        clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                        clock-output-names = "mmc2",
+                                             "mmc2_output",
+                                             "mmc2_sample";
+                };
+
+                mbus_clk: clk@01c2015c {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun8i-a23-mbus-clk";
+                        reg = <0x01c2015c 0x4>;
+                        clocks = <&osc24M>, <&pll6 1>, <&pll5>;
+                        clock-output-names = "mbus";
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                dma: dma-controller@01c02000 {
+                        compatible = "allwinner,sun8i-h3-dma";
+                        reg = <0x01c02000 0x1000>;
+                        interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&bus_gates 6>;
+                        resets = <&ahb_rst 6>;
+                        #dma-cells = <1>;
+                };
+
+                mmc0: mmc@01c0f000 {
+                        compatible = "allwinner,sun5i-a13-mmc";
+                        reg = <0x01c0f000 0x1000>;
+                        clocks = <&bus_gates 8>,
+                                 <&mmc0_clk 0>,
+                                 <&mmc0_clk 1>,
+                                 <&mmc0_clk 2>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ahb_rst 8>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                mmc1: mmc@01c10000 {
+                        compatible = "allwinner,sun5i-a13-mmc";
+                        reg = <0x01c10000 0x1000>;
+                        clocks = <&bus_gates 9>,
+                                 <&mmc1_clk 0>,
+                                 <&mmc1_clk 1>,
+                                 <&mmc1_clk 2>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ahb_rst 9>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                mmc2: mmc@01c11000 {
+                        compatible = "allwinner,sun5i-a13-mmc";
+                        reg = <0x01c11000 0x1000>;
+                        clocks = <&bus_gates 10>,
+                                 <&mmc2_clk 0>,
+                                 <&mmc2_clk 1>,
+                                 <&mmc2_clk 2>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ahb_rst 10>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                pio: pinctrl@01c20800 {
+                        compatible = "allwinner,sun8i-h3-pinctrl";
+                        reg = <0x01c20800 0x400>;
+                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&bus_gates 69>;
+                        gpio-controller;
+                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+
+                        uart0_pins_a: uart0@0 {
+                                allwinner,pins = "PA4", "PA5";
+                                allwinner,function = "uart0";
+                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                        };
+
+                        mmc0_pins_a: mmc0@0 {
+                                allwinner,pins = "PF0", "PF1", "PF2", "PF3",
+                                                 "PF4", "PF5";
+                                allwinner,function = "mmc0";
+                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                        };
+
+                        mmc0_cd_pin: mmc0_cd_pin@0 {
+                                allwinner,pins = "PF6";
+                                allwinner,function = "gpio_in";
+                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                        };
+
+                        mmc1_pins_a: mmc1@0 {
+                                allwinner,pins = "PG0", "PG1", "PG2", "PG3",
+                                                 "PG4", "PG5";
+                                allwinner,function = "mmc1";
+                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                        };
+                };
+
+                ahb_rst: reset@01c202c0 {
+                        #reset-cells = <1>;
+                        compatible = "allwinner,sun6i-a31-ahb1-reset";
+                        reg = <0x01c202c0 0xc>;
+                };
+
+                apb1_rst: reset@01c202d0 {
+                        #reset-cells = <1>;
+                        compatible = "allwinner,sun6i-a31-clock-reset";
+                        reg = <0x01c202d0 0x4>;
+                };
+
+                apb2_rst: reset@01c202d8 {
+                        #reset-cells = <1>;
+                        compatible = "allwinner,sun6i-a31-clock-reset";
+                        reg = <0x01c202d8 0x4>;
+                };
+
+                timer@01c20c00 {
+                        compatible = "allwinner,sun4i-a10-timer";
+                        reg = <0x01c20c00 0xa0>;
+                        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&osc24M>;
+                };
+
+                wdt0: watchdog@01c20ca0 {
+                        compatible = "allwinner,sun6i-a31-wdt";
+                        reg = <0x01c20ca0 0x20>;
+                        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                uart0: serial@01c28000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28000 0x400>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&bus_gates 112>;
+                        resets = <&apb2_rst 16>;
+                        dmas = <&dma 6>, <&dma 6>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                uart1: serial@01c28400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28400 0x400>;
+                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&bus_gates 113>;
+                        resets = <&apb2_rst 17>;
+                        dmas = <&dma 7>, <&dma 7>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                uart2: serial@01c28800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28800 0x400>;
+                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&bus_gates 114>;
+                        resets = <&apb2_rst 18>;
+                        dmas = <&dma 8>, <&dma 8>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                uart3: serial@01c28c00 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28c00 0x400>;
+                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&bus_gates 115>;
+                        resets = <&apb2_rst 19>;
+                        dmas = <&dma 9>, <&dma 9>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                gic: interrupt-controller@01c81000 {
+                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                        reg = <0x01c81000 0x1000>,
+                              <0x01c82000 0x1000>,
+                              <0x01c84000 0x2000>,
+                              <0x01c86000 0x2000>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                };
+
+                rtc: rtc@01f00000 {
+                        compatible = "allwinner,sun6i-a31-rtc";
+                        reg = <0x01f00000 0x54>;
+                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 6484dcf69873..382bd9fc5647 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -62,9 +62,31 @@
                 stdout-path = "serial0:115200n8";
         };
 
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pins_cubieboard4>;
+
+                green {
+                        label = "cubieboard4:green:usr";
+                        gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
+                };
+
+                red {
+                        label = "cubieboard4:red:usr";
+                        gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+                };
+        };
 };
 
 &pio {
+        led_pins_cubieboard4: led-pins@0 {
+                allwinner,pins = "PH6", "PH17";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+
         mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
                 allwinner,pins = "PH18";
                 allwinner,function = "gpio_in";
@@ -92,6 +114,14 @@
         status = "okay";
 };
 
+&r_ir {
+        status = "okay";
+};
+
+&r_rsb {
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 6ce4b5e8b615..c0060e4f7379 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -65,7 +65,7 @@
         leds {
                 compatible = "gpio-leds";
                 pinctrl-names = "default";
-                pinctrl-0 = <&led_pins_optimus>;
+                pinctrl-0 = <&led_pins_optimus>, <&led_r_pins_optimus>;
 
                 /* The LED names match those found on the board */
 
@@ -74,7 +74,10 @@
                         gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
                 };
 
-                /* led3 is on PM15, in R_PIO */
+                led3 {
+                        label = "optimus:led3:usr";
+                        gpios = <&r_pio 1 15 GPIO_ACTIVE_HIGH>; /* PM15 */
+                };
 
                 led4 {
                         label = "optimus:led4:usr";
@@ -180,6 +183,23 @@
         status = "okay";
 };
 
+&r_ir {
+        status = "okay";
+};
+
+&r_pio {
+        led_r_pins_optimus: led-pins@1 {
+                allwinner,pins = "PM15";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+};
+
+&r_rsb {
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 1118bf5cc4fb..e838f206f2a0 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -128,6 +128,17 @@
                  */
                 ranges = <0 0 0 0x20000000>;
 
+                /*
+                 * This clock is actually configurable from the PRCM address
+                 * space. The external 24M oscillator can be turned off, and
+                 * the clock switched to an internal 16M RC oscillator. Under
+                 * normal operation there's no reason to do this, and the
+                 * default is to use the external good one, so just model this
+                 * as a fixed clock. Also it is not entirely clear if the
+                 * osc24M mux in the PRCM affects the entire clock tree, which
+                 * would also throw all the PLL clock rates off, or just the
+                 * downstream clocks in the PRCM.
+                 */
                 osc24M: osc24M_clk {
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
@@ -135,6 +146,13 @@
                         clock-output-names = "osc24M";
                 };
 
+                /*
+                 * The 32k clock is from an external source, normally the
+                 * AC100 codec/RTC chip. This clock is by default enabled
+                 * and clocked at 32768 Hz, from the oscillator connected
+                 * to the AC100. It is configurable, but no such driver or
+                 * bindings exist yet.
+                 */
                 osc32k: osc32k_clk {
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
@@ -164,6 +182,14 @@
                                              "usb_phy2", "usb_hsic_12M";
                 };
 
+                pll3: clk@06000008 {
+                        /* placeholder until implemented */
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-rate = <0>;
+                        clock-output-names = "pll3";
+                };
+
                 pll4: clk@0600000c {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun9i-a80-pll4-clk";
@@ -350,6 +376,68 @@
                                         "apb1_uart2", "apb1_uart3",
                                         "apb1_uart4", "apb1_uart5";
                 };
+
+                cpus_clk: clk@08001410 {
+                        compatible = "allwinner,sun9i-a80-cpus-clk";
+                        reg = <0x08001410 0x4>;
+                        #clock-cells = <0>;
+                        clocks = <&osc32k>, <&osc24M>, <&pll4>, <&pll3>;
+                        clock-output-names = "cpus";
+                };
+
+                ahbs: ahbs_clk {
+                        compatible = "fixed-factor-clock";
+                        #clock-cells = <0>;
+                        clock-div = <1>;
+                        clock-mult = <1>;
+                        clocks = <&cpus_clk>;
+                        clock-output-names = "ahbs";
+                };
+
+                apbs: clk@0800141c {
+                        compatible = "allwinner,sun8i-a23-apb0-clk";
+                        reg = <0x0800141c 0x4>;
+                        #clock-cells = <0>;
+                        clocks = <&ahbs>;
+                        clock-output-names = "apbs";
+                };
+
+                apbs_gates: clk@08001428 {
+                        compatible = "allwinner,sun9i-a80-apbs-gates-clk";
+                        reg = <0x08001428 0x4>;
+                        #clock-cells = <1>;
+                        clocks = <&apbs>;
+                        clock-indices = <0>, <1>,
+                                        <2>, <3>,
+                                        <4>, <5>,
+                                        <6>, <7>,
+                                        <12>, <13>,
+                                        <16>, <17>,
+                                        <18>, <20>;
+                        clock-output-names = "apbs_pio", "apbs_ir",
+                                        "apbs_timer", "apbs_rsb",
+                                        "apbs_uart", "apbs_1wire",
+                                        "apbs_i2c0", "apbs_i2c1",
+                                        "apbs_ps2_0", "apbs_ps2_1",
+                                        "apbs_dma", "apbs_i2s0",
+                                        "apbs_i2s1", "apbs_twd";
+                };
+
+                r_1wire_clk: clk@08001450 {
+                        reg = <0x08001450 0x4>;
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-mod0-clk";
+                        clocks = <&osc32k>, <&osc24M>;
+                        clock-output-names = "r_1wire";
+                };
+
+                r_ir_clk: clk@08001454 {
+                        reg = <0x08001454 0x4>;
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-a10-mod0-clk";
+                        clocks = <&osc32k>, <&osc24M>;
+                        clock-output-names = "r_ir";
+                };
         };
 
         soc {
@@ -764,14 +852,83 @@
                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                 };
 
+                apbs_rst: reset@080014b0 {
+                        reg = <0x080014b0 0x4>;
+                        compatible = "allwinner,sun6i-a31-clock-reset";
+                        #reset-cells = <1>;
+                };
+
+                nmi_intc: interrupt-controller@080015a0 {
+                        compatible = "allwinner,sun9i-a80-nmi";
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        reg = <0x080015a0 0xc>;
+                        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                r_ir: ir@08002000 {
+                        compatible = "allwinner,sun5i-a13-ir";
+                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&r_ir_pins>;
+                        clocks = <&apbs_gates 1>, <&r_ir_clk>;
+                        clock-names = "apb", "ir";
+                        resets = <&apbs_rst 1>;
+                        reg = <0x08002000 0x40>;
+                        status = "disabled";
+                };
+
                 r_uart: serial@08002800 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x08002800 0x400>;
                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
-                        clocks = <&osc24M>;
+                        clocks = <&apbs_gates 4>;
+                        resets = <&apbs_rst 4>;
+                        status = "disabled";
+                };
+
+                r_pio: pinctrl@08002c00 {
+                        compatible = "allwinner,sun9i-a80-r-pinctrl";
+                        reg = <0x08002c00 0x400>;
+                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&apbs_gates 0>;
+                        resets = <&apbs_rst 0>;
+                        gpio-controller;
+                        interrupt-controller;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        #gpio-cells = <3>;
+
+                        r_ir_pins: r_ir {
+                                allwinner,pins = "PL6";
+                                allwinner,function = "s_cir_rx";
+                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                        };
+
+                        r_rsb_pins: r_rsb {
+                                allwinner,pins = "PN0", "PN1";
+                                allwinner,function = "s_rsb";
+                                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
+                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                        };
+                };
+
+                r_rsb: i2c@08003400 {
+                        compatible = "allwinner,sun8i-a23-rsb";
+                        reg = <0x08003400 0x400>;
+                        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&apbs_gates 3>;
+                        clock-frequency = <3000000>;
+                        resets = <&apbs_rst 3>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&r_rsb_pins>;
                         status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi
new file mode 100644
index 000000000000..ef665d21d317
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-common.dtsi
@@ -0,0 +1,130 @@
+/*
+ * Based on Mans Rullgard's Tango3 DT
+ * https://github.com/mansr/linux-tangox
+ */
+
+#define CPU_CLK 0
+#define SYS_CLK 1
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        periph_clk: periph_clk {
+                compatible = "fixed-factor-clock";
+                clocks = <&clkgen CPU_CLK>;
+                clock-mult = <1>;
+                clock-div  = <2>;
+                #clock-cells = <0>;
+        };
+
+        mpcore {
+                compatible = "simple-bus";
+                ranges = <0x00000000 0x20000000 0x2000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                scu@0 {
+                        compatible = "arm,cortex-a9-scu";
+                        reg = <0x0 0x100>;
+                };
+
+                twd@600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0x600 0x10>;
+                        interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
+                        clocks = <&periph_clk>;
+                        always-on;
+                };
+
+                gic: interrupt-controller@1000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        interrupt-controller;
+                        reg = <0x1000 0x1000>, <0x100 0x100>;
+                };
+        };
+
+        l2cc: l2-cache-controller@20100000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x20100000 0x1000>;
+                cache-level = <2>;
+                cache-unified;
+        };
+
+        soc {
+                compatible = "simple-bus";
+                interrupt-parent = <&irq0>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                xtal: xtal {
+                        compatible = "fixed-clock";
+                        clock-frequency = <27000000>;
+                        #clock-cells = <0>;
+                };
+
+                clkgen: clkgen@10000 {
+                        compatible = "sigma,tango4-clkgen";
+                        reg = <0x10000 0x40>;
+                        clocks = <&xtal>;
+                        #clock-cells = <1>;
+                };
+
+                tick-counter@10048 {
+                        compatible = "sigma,tick-counter";
+                        reg = <0x10048 0x4>;
+                        clocks = <&xtal>;
+                };
+
+                uart: serial@10700 {
+                        compatible = "ralink,rt2880-uart";
+                        reg = <0x10700 0x30>;
+                        interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+                        clock-frequency = <7372800>;
+                        reg-shift = <2>;
+                };
+
+                eth0: ethernet@26000 {
+                        compatible = "sigma,smp8734-ethernet";
+                        reg = <0x26000 0x800>;
+                        interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clkgen SYS_CLK>;
+                };
+
+                intc: interrupt-controller@6e000 {
+                        compatible = "sigma,smp8642-intc";
+                        reg = <0x6e000 0x400>;
+                        ranges = <0 0x6e000 0x400>;
+                        interrupt-parent = <&gic>;
+                        interrupt-controller;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        irq0: irq0@000 {
+                                reg = <0x000 0x100>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+
+                        irq1: irq1@100 {
+                                reg = <0x100 0x100>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+
+                        irq2: irq2@300 {
+                                reg = <0x300 0x100>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tango4-smp8758.dtsi b/arch/arm/boot/dts/tango4-smp8758.dtsi
new file mode 100644
index 000000000000..7ed88ee629fb
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-smp8758.dtsi
@@ -0,0 +1,31 @@
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                enable-method = "sigma,tango4-smp";
+
+                cpu0: cpu@0 {
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&l2cc>;
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu1: cpu@1 {
+                        compatible = "arm,cortex-a9";
+                        next-level-cache = <&l2cc>;
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+        };
+
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupt-affinity = <&cpu0>, <&cpu1>;
+                interrupts =
+                        <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                        <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+        };
+};
diff --git a/arch/arm/boot/dts/tango4-vantage-1172.dts b/arch/arm/boot/dts/tango4-vantage-1172.dts
new file mode 100644
index 000000000000..3e5b9c81a51c
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-vantage-1172.dts
@@ -0,0 +1,37 @@
+/dts-v1/;
+
+#include "tango4-smp8758.dtsi"
+#include "tango4-common.dtsi"
+
+/ {
+        model = "Sigma Designs SMP8758 Vantage-1172 Rev E1";
+        compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4";
+
+        aliases {
+                serial = &uart;
+        };
+
+        memory@80000000 {
+                device_type = "memory";
+                reg = <0x80000000 0x80000000>; /* 2 GB */
+        };
+
+        chosen {
+                stdout-path = "serial:115200n8";
+        };
+};
+
+&eth0 {
+        phy-connection-type = "rgmii";
+        phy-handle = <&eth0_phy>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        /* Atheros AR8035 */
+        eth0_phy: ethernet-phy@4 {
+                compatible = "ethernet-phy-id004d.d072",
+                             "ethernet-phy-ieee802.3-c22";
+                interrupts = <37 IRQ_TYPE_EDGE_RISING>;
+                reg = <4>;
+        };
+};
diff --git a/arch/arm/boot/dts/tps65217.dtsi b/arch/arm/boot/dts/tps65217.dtsi
deleted file mode 100644
index a63272422d76..000000000000
--- a/arch/arm/boot/dts/tps65217.dtsi
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/*
- * Integrated Power Management Chip
- * http://www.ti.com/lit/ds/symlink/tps65217.pdf
- */
-
-&tps {
-        compatible = "ti,tps65217";
-
-        regulators {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                dcdc1_reg: regulator@0 {
-                        reg = <0>;
-                        regulator-compatible = "dcdc1";
-                };
-
-                dcdc2_reg: regulator@1 {
-                        reg = <1>;
-                        regulator-compatible = "dcdc2";
-                };
-
-                dcdc3_reg: regulator@2 {
-                        reg = <2>;
-                        regulator-compatible = "dcdc3";
-                };
-
-                ldo1_reg: regulator@3 {
-                        reg = <3>;
-                        regulator-compatible = "ldo1";
-                };
-
-                ldo2_reg: regulator@4 {
-                        reg = <4>;
-                        regulator-compatible = "ldo2";
-                };
-
-                ldo3_reg: regulator@5 {
-                        reg = <5>;
-                        regulator-compatible = "ldo3";
-                };
-
-                ldo4_reg: regulator@6 {
-                        reg = <6>;
-                        regulator-compatible = "ldo4";
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/twl4030_omap3.dtsi b/arch/arm/boot/dts/twl4030_omap3.dtsi
index 3537ae5b2146..5288e6dffef7 100644
--- a/arch/arm/boot/dts/twl4030_omap3.dtsi
+++ b/arch/arm/boot/dts/twl4030_omap3.dtsi
@@ -19,7 +19,7 @@
          */
         twl4030_pins: pinmux_twl4030_pins {
                 pinctrl-single,pins = <
-                        0x1b0 (PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
+                        OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/twl6030_omap4.dtsi b/arch/arm/boot/dts/twl6030_omap4.dtsi
index a4fa5703c42b..e373f59cea9c 100644
--- a/arch/arm/boot/dts/twl6030_omap4.dtsi
+++ b/arch/arm/boot/dts/twl6030_omap4.dtsi
@@ -24,7 +24,7 @@
 &omap4_pmx_wkup {
         twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
                 pinctrl-single,pins = <
-                        0x14 (PIN_OUTPUT | MUX_MODE2)           /* fref_clk0_out.sys_drm_msecure */
+                        OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2)              /* fref_clk0_out.sys_drm_msecure */
                 >;
         };
 };
@@ -32,7 +32,7 @@
 &omap4_pmx_core {
         twl6030_pins: pinmux_twl6030_pins {
                 pinctrl-single,pins = <
-                        0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0)        /* sys_nirq1.sys_nirq1 */
+                        OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0)    /* sys_nirq1.sys_nirq1 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
new file mode 100644
index 000000000000..ea9301aaa461
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -0,0 +1,135 @@
+/*
+ * Device Tree Source commonly used by UniPhier ARM SoCs
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        soc: soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                interrupt-parent = <&intc>;
+
+                extbus: extbus {
+                        compatible = "simple-bus";
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+                };
+
+                serial0: serial@54006800 {
+                        compatible = "socionext,uniphier-uart";
+                        status = "disabled";
+                        reg = <0x54006800 0x40>;
+                        interrupts = <0 33 4>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_uart0>;
+                        clocks = <&uart_clk>;
+                };
+
+                serial1: serial@54006900 {
+                        compatible = "socionext,uniphier-uart";
+                        status = "disabled";
+                        reg = <0x54006900 0x40>;
+                        interrupts = <0 35 4>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_uart1>;
+                        clocks = <&uart_clk>;
+                };
+
+                serial2: serial@54006a00 {
+                        compatible = "socionext,uniphier-uart";
+                        status = "disabled";
+                        reg = <0x54006a00 0x40>;
+                        interrupts = <0 37 4>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_uart2>;
+                        clocks = <&uart_clk>;
+                };
+
+                serial3: serial@54006b00 {
+                        compatible = "socionext,uniphier-uart";
+                        status = "disabled";
+                        reg = <0x54006b00 0x40>;
+                        interrupts = <0 177 4>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_uart3>;
+                        clocks = <&uart_clk>;
+                };
+
+                system-bus-controller@58c00000 {
+                        compatible = "socionext,uniphier-system-bus-controller";
+                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
+                };
+
+                timer@60000200 {
+                        compatible = "arm,cortex-a9-global-timer";
+                        reg = <0x60000200 0x20>;
+                        interrupts = <1 11 0x104>;
+                        clocks = <&arm_timer_clk>;
+                };
+
+                timer@60000600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0x60000600 0x20>;
+                        interrupts = <1 13 0x104>;
+                        clocks = <&arm_timer_clk>;
+                };
+
+                intc: interrupt-controller@60001000 {
+                        compatible = "arm,cortex-a9-gic";
+                        reg = <0x60001000 0x1000>,
+                              <0x60000100 0x100>;
+                        #interrupt-cells = <3>;
+                        interrupt-controller;
+                };
+
+                pinctrl: pinctrl@5f801000 {
+                        /* specify compatible in each SoC DTSI */
+                        reg = <0x5f801000 0xe00>;
+                };
+        };
+};
+
+/include/ "uniphier-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index af493819548d..34f0d8dcd814 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
         compatible = "socionext,ph1-ld4";
@@ -78,188 +78,105 @@
                         clock-frequency = <100000000>;
                 };
         };
+};
 
-        soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-                interrupt-parent = <&intc>;
-
-                extbus: extbus {
-                        compatible = "simple-bus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                };
-
-                l2: l2-cache@500c0000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
-                              <0x506c0000 0x400>;
-                        interrupts = <0 174 4>, <0 175 4>;
-                        cache-unified;
-                        cache-size = <(512 * 1024)>;
-                        cache-sets = <256>;
-                        cache-line-size = <128>;
-                        cache-level = <2>;
-                };
-
-                serial0: serial@54006800 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006800 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart0>;
-                        interrupts = <0 33 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial1: serial@54006900 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006900 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart1>;
-                        interrupts = <0 35 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial2: serial@54006a00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006a00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart2>;
-                        interrupts = <0 37 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial3: serial@54006b00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006b00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart3>;
-                        interrupts = <0 29 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                i2c0: i2c@58400000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58400000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c0>;
-                        interrupts = <0 41 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c1: i2c@58480000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58480000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c1>;
-                        interrupts = <0 42 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                /* chip-internal connection for DMD */
-                i2c2: i2c@58500000 {
-                        compatible = "socionext,uniphier-i2c";
-                        reg = <0x58500000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c2>;
-                        interrupts = <0 43 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <400000>;
-                };
+&soc {
+        l2: l2-cache@500c0000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+                interrupts = <0 174 4>, <0 175 4>;
+                cache-unified;
+                cache-size = <(512 * 1024)>;
+                cache-sets = <256>;
+                cache-line-size = <128>;
+                cache-level = <2>;
+        };
 
-                i2c3: i2c@58580000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58580000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c3>;
-                        interrupts = <0 44 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
+        i2c0: i2c@58400000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58400000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 41 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c0>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                system-bus-controller@58c00000 {
-                        compatible = "socionext,uniphier-system-bus-controller";
-                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
-                };
+        i2c1: i2c@58480000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58480000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 42 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c1>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb0: usb@5a800100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a800100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb0>;
-                        interrupts = <0 80 4>;
-                };
+        /* chip-internal connection for DMD */
+        i2c2: i2c@58500000 {
+                compatible = "socionext,uniphier-i2c";
+                reg = <0x58500000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 43 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c2>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <400000>;
+        };
 
-                usb1: usb@5a810100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a810100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb1>;
-                        interrupts = <0 81 4>;
-                };
+        i2c3: i2c@58580000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58580000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 44 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c3>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb2: usb@5a820100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a820100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb2>;
-                        interrupts = <0 82 4>;
-                };
+        usb0: usb@5a800100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a800100 0x100>;
+                interrupts = <0 80 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb0>;
+        };
 
-                pinctrl: pinctrl@5f801000 {
-                        compatible = "socionext,ph1-ld4-pinctrl",
-                                     "syscon";
-                        reg = <0x5f801000 0xe00>;
-                };
+        usb1: usb@5a810100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a810100 0x100>;
+                interrupts = <0 81 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb1>;
+        };
 
-                timer@60000200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x60000200 0x20>;
-                        interrupts = <1 11 0x104>;
-                        clocks = <&arm_timer_clk>;
-                };
+        usb2: usb@5a820100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a820100 0x100>;
+                interrupts = <0 82 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb2>;
+        };
 
-                timer@60000600 {
-                        compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x60000600 0x20>;
-                        interrupts = <1 13 0x104>;
-                        clocks = <&arm_timer_clk>;
-                };
+};
 
-                intc: interrupt-controller@60001000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        interrupt-controller;
-                        reg = <0x60001000 0x1000>,
-                              <0x60000100 0x100>;
-                };
-        };
+&serial3 {
+        interrupts = <0 29 4>;
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+&pinctrl {
+        compatible = "socionext,ph1-ld4-pinctrl", "syscon";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi
index c6499ee65bc6..532115234025 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi
@@ -53,7 +53,7 @@
         compatible = "socionext,ph1-ld6b";
 };
 
-/* UART3 unavilable: the pads are not wired to the package balls */
+/* UART3 unavailable: the pads are not wired to the package balls */
 &serial3 {
         status = "disabled";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index 254642fe0e71..d78142fb35c4 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
         compatible = "socionext,ph1-pro4";
@@ -86,203 +86,115 @@
                         clock-frequency = <50000000>;
                 };
         };
+};
 
-        soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-                interrupt-parent = <&intc>;
-
-                extbus: extbus {
-                        compatible = "simple-bus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                };
-
-                l2: l2-cache@500c0000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
-                              <0x506c0000 0x400>;
-                        interrupts = <0 174 4>, <0 175 4>;
-                        cache-unified;
-                        cache-size = <(768 * 1024)>;
-                        cache-sets = <256>;
-                        cache-line-size = <128>;
-                        cache-level = <2>;
-                };
-
-                serial0: serial@54006800 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006800 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart0>;
-                        interrupts = <0 33 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial1: serial@54006900 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006900 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart1>;
-                        interrupts = <0 35 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial2: serial@54006a00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006a00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart2>;
-                        interrupts = <0 37 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial3: serial@54006b00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006b00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart3>;
-                        interrupts = <0 29 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                i2c0: i2c@58780000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58780000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c0>;
-                        interrupts = <0 41 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c1: i2c@58781000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58781000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c1>;
-                        interrupts = <0 42 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c2: i2c@58782000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58782000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c2>;
-                        interrupts = <0 43 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c3: i2c@58783000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58783000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c3>;
-                        interrupts = <0 44 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                /* i2c4 does not exist */
+&soc {
+        l2: l2-cache@500c0000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+                interrupts = <0 174 4>, <0 175 4>;
+                cache-unified;
+                cache-size = <(768 * 1024)>;
+                cache-sets = <256>;
+                cache-line-size = <128>;
+                cache-level = <2>;
+        };
 
-                /* chip-internal connection for DMD */
-                i2c5: i2c@58785000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58785000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 25 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c0: i2c@58780000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58780000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 41 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c0>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                /* chip-internal connection for HDMI */
-                i2c6: i2c@58786000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58786000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 26 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c1: i2c@58781000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58781000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 42 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c1>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                system-bus-controller@58c00000 {
-                        compatible = "socionext,uniphier-system-bus-controller";
-                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
-                };
+        i2c2: i2c@58782000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58782000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 43 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c2>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb2: usb@5a800100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a800100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb2>;
-                        interrupts = <0 80 4>;
-                };
+        i2c3: i2c@58783000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58783000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 44 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c3>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb3: usb@5a810100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a810100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb3>;
-                        interrupts = <0 81 4>;
-                };
+        /* i2c4 does not exist */
 
-                pinctrl: pinctrl@5f801000 {
-                        compatible = "socionext,ph1-pro4-pinctrl",
-                                     "syscon";
-                        reg = <0x5f801000 0xe00>;
-                };
+        /* chip-internal connection for DMD */
+        i2c5: i2c@58785000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58785000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 25 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
+        };
 
-                timer@60000200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x60000200 0x20>;
-                        interrupts = <1 11 0x304>;
-                        clocks = <&arm_timer_clk>;
-                };
+        /* chip-internal connection for HDMI */
+        i2c6: i2c@58786000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58786000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 26 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
+        };
 
-                timer@60000600 {
-                        compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x60000600 0x20>;
-                        interrupts = <1 13 0x304>;
-                        clocks = <&arm_timer_clk>;
-                };
+        usb2: usb@5a800100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a800100 0x100>;
+                interrupts = <0 80 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb2>;
+        };
 
-                intc: interrupt-controller@60001000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        interrupt-controller;
-                        reg = <0x60001000 0x1000>,
-                              <0x60000100 0x100>;
-                };
+        usb3: usb@5a810100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a810100 0x100>;
+                interrupts = <0 81 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb3>;
         };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+&pinctrl {
+        compatible = "socionext,ph1-pro4-pinctrl", "syscon";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
index 11eb76239feb..2f389ea75e01 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
         compatible = "socionext,ph1-pro5";
@@ -86,193 +86,109 @@
                         clock-frequency = <50000000>;
                 };
         };
+};
 
-        soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-                interrupt-parent = <&intc>;
-
-                extbus: extbus {
-                        compatible = "simple-bus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                };
-
-                l2: l2-cache@500c0000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
-                              <0x506c0000 0x400>;
-                        interrupts = <0 190 4>, <0 191 4>;
-                        cache-unified;
-                        cache-size = <(2 * 1024 * 1024)>;
-                        cache-sets = <512>;
-                        cache-line-size = <128>;
-                        cache-level = <2>;
-                        next-level-cache = <&l3>;
-                };
-
-                l3: l3-cache@500c8000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
-                              <0x506c8000 0x400>;
-                        interrupts = <0 174 4>, <0 175 4>;
-                        cache-unified;
-                        cache-size = <(2 * 1024 * 1024)>;
-                        cache-sets = <512>;
-                        cache-line-size = <256>;
-                        cache-level = <3>;
-                };
-
-                serial0: serial@54006800 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006800 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart0>;
-                        interrupts = <0 33 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial1: serial@54006900 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006900 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart1>;
-                        interrupts = <0 35 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial2: serial@54006a00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006a00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart2>;
-                        interrupts = <0 37 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial3: serial@54006b00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006b00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart3>;
-                        interrupts = <0 177 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                i2c0: i2c@58780000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58780000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c0>;
-                        interrupts = <0 41 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c1: i2c@58781000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58781000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c1>;
-                        interrupts = <0 42 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c2: i2c@58782000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58782000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c2>;
-                        interrupts = <0 43 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c3: i2c@58783000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58783000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c3>;
-                        interrupts = <0 44 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
+&soc {
+        l2: l2-cache@500c0000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>;
+                interrupts = <0 190 4>, <0 191 4>;
+                cache-unified;
+                cache-size = <(2 * 1024 * 1024)>;
+                cache-sets = <512>;
+                cache-line-size = <128>;
+                cache-level = <2>;
+                next-level-cache = <&l3>;
+        };
 
-                /* i2c4 does not exist */
+        l3: l3-cache@500c8000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>;
+                interrupts = <0 174 4>, <0 175 4>;
+                cache-unified;
+                cache-size = <(2 * 1024 * 1024)>;
+                cache-sets = <512>;
+                cache-line-size = <256>;
+                cache-level = <3>;
+        };
 
-                /* chip-internal connection for DMD */
-                i2c5: i2c@58785000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58785000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 25 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c0: i2c@58780000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58780000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 41 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c0>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                /* chip-internal connection for HDMI */
-                i2c6: i2c@58786000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58786000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 26 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c1: i2c@58781000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58781000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 42 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c1>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                system-bus-controller@58c00000 {
-                        compatible = "socionext,uniphier-system-bus-controller";
-                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
-                };
+        i2c2: i2c@58782000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58782000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 43 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c2>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                pinctrl: pinctrl@5f801000 {
-                        compatible = "socionext,ph1-pro5-pinctrl", "syscon";
-                        reg = <0x5f801000 0xe00>;
-                };
+        i2c3: i2c@58783000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58783000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 44 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c3>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                timer@60000200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x60000200 0x20>;
-                        interrupts = <1 11 0x304>;
-                        clocks = <&arm_timer_clk>;
-                };
+        /* i2c4 does not exist */
 
-                timer@60000600 {
-                        compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x60000600 0x20>;
-                        interrupts = <1 13 0x304>;
-                        clocks = <&arm_timer_clk>;
-                };
+        /* chip-internal connection for DMD */
+        i2c5: i2c@58785000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58785000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 25 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
+        };
 
-                intc: interrupt-controller@60001000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        interrupt-controller;
-                        reg = <0x60001000 0x1000>,
-                              <0x60000100 0x100>;
-                };
+        /* chip-internal connection for HDMI */
+        i2c6: i2c@58786000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58786000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 26 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
         };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+&pinctrl {
+        compatible = "socionext,ph1-pro5-pinctrl", "syscon";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index e88559b66be7..7d06a1c487d8 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
         compatible = "socionext,ph1-sld8";
@@ -78,188 +78,104 @@
                         clock-frequency = <100000000>;
                 };
         };
+};
 
-        soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-                interrupt-parent = <&intc>;
-
-                extbus: extbus {
-                        compatible = "simple-bus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                };
-
-                l2: l2-cache@500c0000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
-                              <0x506c0000 0x400>;
-                        interrupts = <0 174 4>, <0 175 4>;
-                        cache-unified;
-                        cache-size = <(256 * 1024)>;
-                        cache-sets = <256>;
-                        cache-line-size = <128>;
-                        cache-level = <2>;
-                };
-
-                serial0: serial@54006800 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006800 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart0>;
-                        interrupts = <0 33 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial1: serial@54006900 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006900 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart1>;
-                        interrupts = <0 35 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial2: serial@54006a00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006a00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart2>;
-                        interrupts = <0 37 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                serial3: serial@54006b00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006b00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart3>;
-                        interrupts = <0 29 4>;
-                        clocks = <&uart_clk>;
-                        fifo-size = <64>;
-                };
-
-                i2c0: i2c@58400000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58400000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c0>;
-                        interrupts = <0 41 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c1: i2c@58480000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58480000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c1>;
-                        interrupts = <0 42 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                /* chip-internal connection for DMD */
-                i2c2: i2c@58500000 {
-                        compatible = "socionext,uniphier-i2c";
-                        reg = <0x58500000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c2>;
-                        interrupts = <0 43 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <400000>;
-                };
-
-                i2c3: i2c@58580000 {
-                        compatible = "socionext,uniphier-i2c";
-                        status = "disabled";
-                        reg = <0x58580000 0x40>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c3>;
-                        interrupts = <0 44 1>;
-                        clocks = <&iobus_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                system-bus-controller@58c00000 {
-                        compatible = "socionext,uniphier-system-bus-controller";
-                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
-                };
+&soc {
+        l2: l2-cache@500c0000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+                interrupts = <0 174 4>, <0 175 4>;
+                cache-unified;
+                cache-size = <(256 * 1024)>;
+                cache-sets = <256>;
+                cache-line-size = <128>;
+                cache-level = <2>;
+        };
 
-                usb0: usb@5a800100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a800100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb0>;
-                        interrupts = <0 80 4>;
-                };
+        i2c0: i2c@58400000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58400000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 41 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c0>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb1: usb@5a810100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a810100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb1>;
-                        interrupts = <0 81 4>;
-                };
+        i2c1: i2c@58480000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58480000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 42 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c1>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                usb2: usb@5a820100 {
-                        compatible = "socionext,uniphier-ehci", "generic-ehci";
-                        status = "disabled";
-                        reg = <0x5a820100 0x100>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_usb2>;
-                        interrupts = <0 82 4>;
-                };
+        /* chip-internal connection for DMD */
+        i2c2: i2c@58500000 {
+                compatible = "socionext,uniphier-i2c";
+                reg = <0x58500000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 43 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c2>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <400000>;
+        };
 
-                pinctrl: pinctrl@5f801000 {
-                        compatible = "socionext,ph1-sld8-pinctrl",
-                                     "syscon";
-                        reg = <0x5f801000 0xe00>;
-                };
+        i2c3: i2c@58580000 {
+                compatible = "socionext,uniphier-i2c";
+                status = "disabled";
+                reg = <0x58580000 0x40>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 44 1>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c3>;
+                clocks = <&iobus_clk>;
+                clock-frequency = <100000>;
+        };
 
-                timer@60000200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x60000200 0x20>;
-                        interrupts = <1 11 0x104>;
-                        clocks = <&arm_timer_clk>;
-                };
+        usb0: usb@5a800100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a800100 0x100>;
+                interrupts = <0 80 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb0>;
+        };
 
-                timer@60000600 {
-                        compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x60000600 0x20>;
-                        interrupts = <1 13 0x104>;
-                        clocks = <&arm_timer_clk>;
-                };
+        usb1: usb@5a810100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a810100 0x100>;
+                interrupts = <0 81 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb1>;
+        };
 
-                intc: interrupt-controller@60001000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        interrupt-controller;
-                        reg = <0x60001000 0x1000>,
-                              <0x60000100 0x100>;
-                };
+        usb2: usb@5a820100 {
+                compatible = "socionext,uniphier-ehci", "generic-ehci";
+                status = "disabled";
+                reg = <0x5a820100 0x100>;
+                interrupts = <0 82 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usb2>;
         };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+&serial3 {
+        interrupts = <0 29 4>;
+};
+
+&pinctrl {
+        compatible = "socionext,ph1-sld8-pinctrl", "syscon";
+};
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
index 259f1a909e24..6bd353f2d77e 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
         compatible = "socionext,proxstream2";
@@ -100,189 +100,106 @@
                         clock-frequency = <50000000>;
                 };
         };
+};
 
-        soc {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-                interrupt-parent = <&intc>;
-
-                extbus: extbus {
-                        compatible = "simple-bus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                };
-
-                l2: l2-cache@500c0000 {
-                        compatible = "socionext,uniphier-system-cache";
-                        reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
-                              <0x506c0000 0x400>;
-                        interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
-                        cache-unified;
-                        cache-size = <(1280 * 1024)>;
-                        cache-sets = <512>;
-                        cache-line-size = <128>;
-                        cache-level = <2>;
-                };
-
-                serial0: serial@54006800 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006800 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart0>;
-                        interrupts = <0 33 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial1: serial@54006900 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006900 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart1>;
-                        interrupts = <0 35 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial2: serial@54006a00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006a00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart2>;
-                        interrupts = <0 37 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                serial3: serial@54006b00 {
-                        compatible = "socionext,uniphier-uart";
-                        status = "disabled";
-                        reg = <0x54006b00 0x40>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_uart3>;
-                        interrupts = <0 177 4>;
-                        clocks = <&uart_clk>;
-                };
-
-                i2c0: i2c@58780000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58780000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c0>;
-                        interrupts = <0 41 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c1: i2c@58781000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58781000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c1>;
-                        interrupts = <0 42 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c2: i2c@58782000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58782000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c2>;
-                        interrupts = <0 43 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                i2c3: i2c@58783000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        status = "disabled";
-                        reg = <0x58783000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&pinctrl_i2c3>;
-                        interrupts = <0 44 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <100000>;
-                };
-
-                /* chip-internal connection for DMD */
-                i2c4: i2c@58784000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58784000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 45 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+&soc {
+        l2: l2-cache@500c0000 {
+                compatible = "socionext,uniphier-system-cache";
+                reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+                interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
+                cache-unified;
+                cache-size = <(1280 * 1024)>;
+                cache-sets = <512>;
+                cache-line-size = <128>;
+                cache-level = <2>;
+        };
 
-                /* chip-internal connection for STM */
-                i2c5: i2c@58785000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58785000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 25 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c0: i2c@58780000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58780000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 41 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c0>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                /* chip-internal connection for HDMI */
-                i2c6: i2c@58786000 {
-                        compatible = "socionext,uniphier-fi2c";
-                        reg = <0x58786000 0x80>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <0 26 4>;
-                        clocks = <&i2c_clk>;
-                        clock-frequency = <400000>;
-                };
+        i2c1: i2c@58781000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58781000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 42 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c1>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                system-bus-controller@58c00000 {
-                        compatible = "socionext,uniphier-system-bus-controller";
-                        reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
-                };
+        i2c2: i2c@58782000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58782000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c2>;
+                interrupts = <0 43 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                pinctrl: pinctrl@5f801000 {
-                        compatible = "socionext,proxstream2-pinctrl", "syscon";
-                        reg = <0x5f801000 0xe00>;
-                };
+        i2c3: i2c@58783000 {
+                compatible = "socionext,uniphier-fi2c";
+                status = "disabled";
+                reg = <0x58783000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 44 4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_i2c3>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <100000>;
+        };
 
-                timer@60000200 {
-                        compatible = "arm,cortex-a9-global-timer";
-                        reg = <0x60000200 0x20>;
-                        interrupts = <1 11 0xf04>;
-                        clocks = <&arm_timer_clk>;
-                };
+        /* chip-internal connection for DMD */
+        i2c4: i2c@58784000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58784000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 45 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
+        };
 
-                timer@60000600 {
-                        compatible = "arm,cortex-a9-twd-timer";
-                        reg = <0x60000600 0x20>;
-                        interrupts = <1 13 0xf04>;
-                        clocks = <&arm_timer_clk>;
-                };
+        /* chip-internal connection for STM */
+        i2c5: i2c@58785000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58785000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 25 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
+        };
 
-                intc: interrupt-controller@60001000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        interrupt-controller;
-                        reg = <0x60001000 0x1000>,
-                              <0x60000100 0x100>;
-                };
+        /* chip-internal connection for HDMI */
+        i2c6: i2c@58786000 {
+                compatible = "socionext,uniphier-fi2c";
+                reg = <0x58786000 0x80>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <0 26 4>;
+                clocks = <&i2c_clk>;
+                clock-frequency = <400000>;
         };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+&pinctrl {
+        compatible = "socionext,proxstream2-pinctrl", "syscon";
+};
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 3279bf1a17a1..6fd7efbead34 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -30,9 +30,69 @@
         };
 
         core-module@10000000 {
-                compatible = "arm,core-module-versatile", "syscon";
+                compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
                 reg = <0x10000000 0x200>;
 
+                led@08.0 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x01>;
+                        label = "versatile:0";
+                        linux,default-trigger = "heartbeat";
+                        default-state = "on";
+                };
+                led@08.1 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x02>;
+                        label = "versatile:1";
+                        linux,default-trigger = "mmc0";
+                        default-state = "off";
+                };
+                led@08.2 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x04>;
+                        label = "versatile:2";
+                        linux,default-trigger = "cpu0";
+                        default-state = "off";
+                };
+                led@08.3 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x08>;
+                        label = "versatile:3";
+                        default-state = "off";
+                };
+                led@08.4 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x10>;
+                        label = "versatile:4";
+                        default-state = "off";
+                };
+                led@08.5 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x20>;
+                        label = "versatile:5";
+                        default-state = "off";
+                };
+                led@08.6 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x40>;
+                        label = "versatile:6";
+                        default-state = "off";
+                };
+                led@08.7 {
+                        compatible = "register-bit-led";
+                        offset = <0x08>;
+                        mask = <0x80>;
+                        label = "versatile:7";
+                        default-state = "off";
+                };
+
                 /* OSC1 on AB, OSC4 on PB */
                 osc1: cm_aux_osc@24M {
                         #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index e5949b934945..6e556be42ccd 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -23,6 +23,18 @@
         status = "okay";
 };
 
+&can0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan0>;
+        status = "disabled";
+};
+
+&can1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan1>;
+        status = "disabled";
+};
+
 &dspi1 {
         bus-num = <1>;
         pinctrl-names = "default";
@@ -125,6 +137,20 @@
 
 &iomuxc {
         vf610-colibri {
+                pinctrl_flexcan0: can0grp {
+                        fsl,pins = <
+                                VF610_PAD_PTB14__CAN0_RX        0x31F1
+                                VF610_PAD_PTB15__CAN0_TX        0x31F2
+                        >;
+                };
+
+                pinctrl_flexcan1: can1grp {
+                        fsl,pins = <
+                                VF610_PAD_PTB16__CAN1_RX        0x31F1
+                                VF610_PAD_PTB17__CAN1_TX        0x31F2
+                        >;
+                };
+
                 pinctrl_gpio_ext: gpio_ext {
                         fsl,pins = <
                                 VF610_PAD_PTD10__GPIO_89        0x22ed /* EXT_IO_0 */
diff --git a/arch/arm/boot/dts/vf610m4-cosmic.dts b/arch/arm/boot/dts/vf610m4-cosmic.dts
new file mode 100644
index 000000000000..8944a2d2054c
--- /dev/null
+++ b/arch/arm/boot/dts/vf610m4-cosmic.dts
@@ -0,0 +1,90 @@
+/*
+ * Device tree for Cosmic+ VF6xx Cortex-M4 support
+ *
+ * Copyright (C) 2015
+ *
+ * Based on vf610m4 Colibri
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "vf610m4.dtsi"
+
+/ {
+        model = "VF610 Cortex-M4";
+        compatible = "fsl,vf610m4";
+};
+
+&gpio0 {
+        status = "disabled";
+};
+
+&gpio1 {
+        status = "disabled";
+};
+
+&gpio2 {
+        status = "disabled";
+};
+
+&gpio3 {
+        status = "disabled";
+};
+
+&gpio4 {
+        status = "disabled";
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart3>;
+        status = "okay";
+};
+
+&iomuxc {
+        vf610-cosmic {
+                pinctrl_uart3: uart3grp {
+                        fsl,pins = <
+                                VF610_PAD_PTA20__UART3_TX               0x21a2
+                                VF610_PAD_PTA21__UART3_RX               0x21a1
+                        >;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 3cd1b27f2697..a9ceb5bac40e 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -455,6 +455,30 @@
                                 status = "disabled";
                         };
 
+                        dspi2: dspi2@400ac000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,vf610-dspi";
+                                reg = <0x400ac000 0x1000>;
+                                interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks VF610_CLK_DSPI2>;
+                                clock-names = "dspi";
+                                spi-num-chipselects = <2>;
+                                status = "disabled";
+                        };
+
+                        dspi3: dspi3@400ad000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,vf610-dspi";
+                                reg = <0x400ad000 0x1000>;
+                                interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&clks VF610_CLK_DSPI3>;
+                                clock-names = "dspi";
+                                spi-num-chipselects = <2>;
+                                status = "disabled";
+                        };
+
                         adc1: adc@400bb000 {
                                 compatible = "fsl,vf610-adc";
                                 reg = <0x400bb000 0x1000>;
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index a1a854b8a454..e9ef539e13d3 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -281,8 +281,8 @@
 
                 sdhc@d800a000 {
                         compatible = "wm,wm8505-sdhc";
-                        reg = <0xd800a000 0x1000>;
-                        interrupts = <20 21>;
+                        reg = <0xd800a000 0x400>;
+                        interrupts = <20>, <21>;
                         clocks = <&clksdhc>;
                         bus-width = <4>;
                 };
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 1a5220e05109..f283ff08381c 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -19,7 +19,7 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu@0 {
+                cpu0: cpu@0 {
                         compatible = "arm,cortex-a9";
                         device_type = "cpu";
                         reg = <0>;
@@ -33,7 +33,7 @@
                         >;
                 };
 
-                cpu@1 {
+                cpu1: cpu@1 {
                         compatible = "arm,cortex-a9";
                         device_type = "cpu";
                         reg = <1>;
@@ -101,6 +101,8 @@
                         #gpio-cells = <2>;
                         clocks = <&clkc 42>;
                         gpio-controller;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
                         interrupt-parent = <&intc>;
                         interrupts = <0 20 4>;
                         reg = <0xe000a000 0x1000>;
@@ -238,7 +240,7 @@
                 slcr: slcr@f8000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+                        compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
                         reg = <0xF8000000 0x1000>;
                         ranges;
                         clkc: clkc@100 {
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 5df8f81f4217..cb64209bca08 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -43,14 +43,14 @@
                         label = "sw14";
                         gpios = <&gpio0 12 0>;
                         linux,code = <108>; /* down */
-                        gpio-key,wakeup;
+                        wakeup-source;
                         autorepeat;
                 };
                 sw13 {
                         label = "sw13";
                         gpios = <&gpio0 14 0>;
                         linux,code = <103>; /* up */
-                        gpio-key,wakeup;
+                        wakeup-source;
                         autorepeat;
                 };
         };
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
index d019a080a559..2f9f09ac51bd 100644
--- a/arch/arm/mach-mediatek/mediatek.c
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -44,6 +44,7 @@ static void __init mediatek_timer_init(void)
 };
 
 static const char * const mediatek_board_dt_compat[] = {
+        "mediatek,mt2701",
         "mediatek,mt6589",
         "mediatek,mt6592",
         "mediatek,mt8127",
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index e097055398de..e781e4fae13a 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -150,6 +150,21 @@ static struct platform_device wl18xx_device = {
         }
 };
 
+static struct ti_st_plat_data wilink7_pdata = {
+        .nshutdown_gpio = 162,
+        .dev_name = "/dev/ttyO1",
+        .flow_cntrl = 1,
+        .baud_rate = 300000,
+};
+
+static struct platform_device wl128x_device = {
+        .name   = "kim",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &wilink7_pdata,
+        }
+};
+
 static struct platform_device btwilink_device = {
         .name   = "btwilink",
         .id     = -1,
@@ -276,6 +291,13 @@ static void __init omap3_tao3530_legacy_init(void)
         hsmmc2_internal_input_clk();
 }
 
+static void __init omap3_logicpd_torpedo_init(void)
+{
+        omap3_gpio126_127_129();
+        platform_device_register(&wl128x_device);
+        platform_device_register(&btwilink_device);
+}
+
 /* omap3pandora legacy devices */
 #define PANDORA_WIFI_IRQ_GPIO           21
 #define PANDORA_WIFI_NRESET_GPIO        23
@@ -503,7 +525,7 @@ static struct pdata_init pdata_quirks[] __initdata = {
         { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
         { "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, },
         { "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, },
-        { "logicpd,dm3730-torpedo-devkit", omap3_gpio126_127_129, },
+        { "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, },
         { "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
         { "ti,am3517-evm", am3517_evm_legacy_init, },
         { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index c1fd2757f8e4..424a4939c1b4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -16,7 +16,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/power/mt8173-power.h>
-#include <dt-bindings/reset-controller/mt8173-resets.h>
+#include <dt-bindings/reset/mt8173-resets.h>
 #include "mt8173-pinfunc.h"
 
 / {
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 7f370d3e0983..ac03e4fe2871 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -1024,6 +1024,7 @@ static struct samsung_gate_clock exynos4_gate_clks[] __initdata = {
                         0, 0),
         GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27,
                         0, 0),
+        GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0),
         GATE(CLK_PPMUDMC0, "ppmudmc0", "aclk133", GATE_IP_DMC, 8, 0, 0),
         GATE(CLK_PPMUDMC1, "ppmudmc1", "aclk133", GATE_IP_DMC, 9, 0, 0),
         GATE(CLK_PPMUCPU, "ppmucpu", "aclk133", GATE_IP_DMC, 10, 0, 0),
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index c4b1676ea674..c40111f36d5e 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -93,6 +93,7 @@
 #define CLK_SCLK_FIMG2D         177
 
 /* gate clocks */
+#define CLK_SSS                 255
 #define CLK_FIMC0               256
 #define CLK_FIMC1               257
 #define CLK_FIMC2               258
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index dd09b73c4aaf..ffa11379b3f0 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -102,6 +102,7 @@
 #define R8A7791_CLK_VIN2                9
 #define R8A7791_CLK_VIN1                10
 #define R8A7791_CLK_VIN0                11
+#define R8A7791_CLK_ETHERAVB            12
 #define R8A7791_CLK_ETHER               13
 #define R8A7791_CLK_SATA1               14
 #define R8A7791_CLK_SATA0               15
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 09da38a58776..a7a7e0370968 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -79,6 +79,7 @@
 #define R8A7794_CLK_SCIF2               19
 #define R8A7794_CLK_SCIF1               20
 #define R8A7794_CLK_SCIF0               21
+#define R8A7794_CLK_DU0                 24
 
 /* MSTP8 */
 #define R8A7794_CLK_VIN1                10
diff --git a/include/dt-bindings/clock/sh73a0-clock.h b/include/dt-bindings/clock/sh73a0-clock.h
index 53369568c24c..2eca353a29d7 100644
--- a/include/dt-bindings/clock/sh73a0-clock.h
+++ b/include/dt-bindings/clock/sh73a0-clock.h
@@ -28,7 +28,8 @@
 #define SH73A0_CLK_HP           14
 
 /* MSTP0 */
-#define SH73A0_CLK_IIC2 1
+#define SH73A0_CLK_IIC2         1
+#define SH73A0_CLK_MSIOF0       0
 
 /* MSTP1 */
 #define SH73A0_CLK_CEU1         29
@@ -45,8 +46,11 @@
 #define SH73A0_CLK_SCIFA7       19
 #define SH73A0_CLK_SY_DMAC      18
 #define SH73A0_CLK_MP_DMAC      17
+#define SH73A0_CLK_MSIOF3       15
+#define SH73A0_CLK_MSIOF1       8
 #define SH73A0_CLK_SCIFA5       7
 #define SH73A0_CLK_SCIFB        6
+#define SH73A0_CLK_MSIOF2       5
 #define SH73A0_CLK_SCIFA0       4
 #define SH73A0_CLK_SCIFA1       3
 #define SH73A0_CLK_SCIFA2       2
diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h
index 774dc1e843c5..344bd1eb3386 100644
--- a/include/dt-bindings/pinctrl/am43xx.h
+++ b/include/dt-bindings/pinctrl/am43xx.h
@@ -31,5 +31,11 @@
 #define PIN_INPUT_PULLUP        (INPUT_EN | PULL_UP)
 #define PIN_INPUT_PULLDOWN      (INPUT_EN)
 
+/*
+ * Macro to allow using the absolute physical address instead of the
+ * padconf registers instead of the offset from padconf base.
+ */
+#define AM4372_IOPAD(pa, val)   (((pa) & 0xffff) - 0x0800) (val)
+
 #endif
 
diff --git a/include/dt-bindings/pinctrl/dm814x.h b/include/dt-bindings/pinctrl/dm814x.h
new file mode 100644
index 000000000000..0f484273da0d
--- /dev/null
+++ b/include/dt-bindings/pinctrl/dm814x.h
@@ -0,0 +1,48 @@
+/*
+ * This header provides constants specific to DM814X pinctrl bindings.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_DM814X_H
+#define _DT_BINDINGS_PINCTRL_DM814X_H
+
+#include <dt-bindings/pinctrl/omap.h>
+
+#undef INPUT_EN
+#undef PULL_UP
+#undef PULL_ENA
+
+/*
+ * Note that dm814x silicon revision 2.1 and older require input enabled
+ * (bit 18 set) for all 3.3V I/Os to avoid cumulative hardware damage. For
+ * more info, see errata advisory 2.1.87. We leave bit 18 out of
+ * function-mask in dm814x.h and rely on the bootloader for it.
+ */
+#define INPUT_EN                (1 << 18)
+#define PULL_UP                 (1 << 17)
+#define PULL_DISABLE            (1 << 16)
+
+/* update macro depending on INPUT_EN and PULL_ENA */
+#undef PIN_OUTPUT
+#undef PIN_OUTPUT_PULLUP
+#undef PIN_OUTPUT_PULLDOWN
+#undef PIN_INPUT
+#undef PIN_INPUT_PULLUP
+#undef PIN_INPUT_PULLDOWN
+
+#define PIN_OUTPUT              (PULL_DISABLE)
+#define PIN_OUTPUT_PULLUP       (PULL_UP)
+#define PIN_OUTPUT_PULLDOWN     0
+#define PIN_INPUT               (INPUT_EN | PULL_DISABLE)
+#define PIN_INPUT_PULLUP        (INPUT_EN | PULL_UP)
+#define PIN_INPUT_PULLDOWN      (INPUT_EN)
+
+/* undef non-existing modes */
+#undef PIN_OFF_NONE
+#undef PIN_OFF_OUTPUT_HIGH
+#undef PIN_OFF_OUTPUT_LOW
+#undef PIN_OFF_INPUT_PULLUP
+#undef PIN_OFF_INPUT_PULLDOWN
+#undef PIN_OFF_WAKEUPENABLE
+
+#endif
+
diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h
index 4379e29f0460..5c75e80915fc 100644
--- a/include/dt-bindings/pinctrl/dra.h
+++ b/include/dt-bindings/pinctrl/dra.h
@@ -67,5 +67,11 @@
 #define PIN_INPUT_PULLUP        (PULL_ENA | INPUT_EN | PULL_UP)
 #define PIN_INPUT_PULLDOWN      (PULL_ENA | INPUT_EN)
 
+/*
+ * Macro to allow using the absolute physical address instead of the
+ * padconf registers instead of the offset from padconf base.
+ */
+#define DRA7XX_CORE_IOPAD(pa, val)      (((pa) & 0xffff) - 0x3400) (val)
+
 #endif
 
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
index 13949259705a..effadd05695b 100644
--- a/include/dt-bindings/pinctrl/omap.h
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -61,10 +61,9 @@
 #define OMAP3430_CORE2_IOPAD(pa, val)   OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
 #define OMAP3630_CORE2_IOPAD(pa, val)   OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
 #define OMAP3_WKUP_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
+#define DM814X_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
 #define DM816X_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
 #define AM33XX_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define AM4372_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define DRA7XX_CORE_IOPAD(pa, val)      OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
 
 /*
  * Macros to allow using the offset from the padconf physical address
diff --git a/include/dt-bindings/reset-controller/mt8135-resets.h b/include/dt-bindings/reset/mt8135-resets.h
index 1fb629508db2..1fb629508db2 100644
--- a/include/dt-bindings/reset-controller/mt8135-resets.h
+++ b/include/dt-bindings/reset/mt8135-resets.h
diff --git a/include/dt-bindings/reset-controller/mt8173-resets.h b/include/dt-bindings/reset/mt8173-resets.h
index 9464b37cf68c..9464b37cf68c 100644
--- a/include/dt-bindings/reset-controller/mt8173-resets.h
+++ b/include/dt-bindings/reset/mt8173-resets.h