PM / devfreq: update the name of EXYNOS clock register

According to replacing the name of EXYNOS clock registers,
this patch updates exynos4_bus.c file where it is used.

Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 112 insertions, 112 deletions

diff --git a/drivers/devfreq/exynos4_bus.c b/drivers/devfreq/exynos4_bus.c
index 6460577d6701..565aa98a4219 100644
--- a/drivers/devfreq/exynos4_bus.c
+++ b/drivers/devfreq/exynos4_bus.c
@@ -311,51 +311,51 @@ static int exynos4210_set_busclk(struct busfreq_data *data, struct opp *opp)
         /* Change Divider - DMC0 */
         tmp = data->dmc_divtable[index];
 
-        __raw_writel(tmp, S5P_CLKDIV_DMC0);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0);
         } while (tmp & 0x11111111);
 
         /* Change Divider - TOP */
         tmp = data->top_divtable[index];
 
-        __raw_writel(tmp, S5P_CLKDIV_TOP);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_TOP);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_TOP);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP);
         } while (tmp & 0x11111);
 
         /* Change Divider - LEFTBUS */
-        tmp = __raw_readl(S5P_CLKDIV_LEFTBUS);
+        tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS);
 
-        tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+        tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
 
         tmp |= ((exynos4210_clkdiv_lr_bus[index][0] <<
-                                S5P_CLKDIV_BUS_GDLR_SHIFT) |
+                                EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
                 (exynos4210_clkdiv_lr_bus[index][1] <<
-                                S5P_CLKDIV_BUS_GPLR_SHIFT));
+                                EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
 
-        __raw_writel(tmp, S5P_CLKDIV_LEFTBUS);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS);
         } while (tmp & 0x11);
 
         /* Change Divider - RIGHTBUS */
-        tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS);
+        tmp = __raw_readl(EXYNOS4_CLKDIV_RIGHTBUS);
 
-        tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+        tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
 
         tmp |= ((exynos4210_clkdiv_lr_bus[index][0] <<
-                                S5P_CLKDIV_BUS_GDLR_SHIFT) |
+                                EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
                 (exynos4210_clkdiv_lr_bus[index][1] <<
-                                S5P_CLKDIV_BUS_GPLR_SHIFT));
+                                EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
 
-        __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_RIGHTBUS);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_RIGHTBUS);
         } while (tmp & 0x11);
 
         return 0;
@@ -376,137 +376,137 @@ static int exynos4x12_set_busclk(struct busfreq_data *data, struct opp *opp)
         /* Change Divider - DMC0 */
         tmp = data->dmc_divtable[index];
 
-        __raw_writel(tmp, S5P_CLKDIV_DMC0);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0);
         } while (tmp & 0x11111111);
 
         /* Change Divider - DMC1 */
-        tmp = __raw_readl(S5P_CLKDIV_DMC1);
+        tmp = __raw_readl(EXYNOS4_CLKDIV_DMC1);
 
-        tmp &= ~(S5P_CLKDIV_DMC1_G2D_ACP_MASK |
-                S5P_CLKDIV_DMC1_C2C_MASK |
-                S5P_CLKDIV_DMC1_C2CACLK_MASK);
+        tmp &= ~(EXYNOS4_CLKDIV_DMC1_G2D_ACP_MASK |
+                EXYNOS4_CLKDIV_DMC1_C2C_MASK |
+                EXYNOS4_CLKDIV_DMC1_C2CACLK_MASK);
 
         tmp |= ((exynos4x12_clkdiv_dmc1[index][0] <<
-                                S5P_CLKDIV_DMC1_G2D_ACP_SHIFT) |
+                                EXYNOS4_CLKDIV_DMC1_G2D_ACP_SHIFT) |
                 (exynos4x12_clkdiv_dmc1[index][1] <<
-                                S5P_CLKDIV_DMC1_C2C_SHIFT) |
+                                EXYNOS4_CLKDIV_DMC1_C2C_SHIFT) |
                 (exynos4x12_clkdiv_dmc1[index][2] <<
-                                S5P_CLKDIV_DMC1_C2CACLK_SHIFT));
+                                EXYNOS4_CLKDIV_DMC1_C2CACLK_SHIFT));
 
-        __raw_writel(tmp, S5P_CLKDIV_DMC1);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_DMC1);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_DMC1);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC1);
         } while (tmp & 0x111111);
 
         /* Change Divider - TOP */
-        tmp = __raw_readl(S5P_CLKDIV_TOP);
+        tmp = __raw_readl(EXYNOS4_CLKDIV_TOP);
 
-        tmp &= ~(S5P_CLKDIV_TOP_ACLK266_GPS_MASK |
-                S5P_CLKDIV_TOP_ACLK100_MASK |
-                S5P_CLKDIV_TOP_ACLK160_MASK |
-                S5P_CLKDIV_TOP_ACLK133_MASK |
-                S5P_CLKDIV_TOP_ONENAND_MASK);
+        tmp &= ~(EXYNOS4_CLKDIV_TOP_ACLK266_GPS_MASK |
+                EXYNOS4_CLKDIV_TOP_ACLK100_MASK |
+                EXYNOS4_CLKDIV_TOP_ACLK160_MASK |
+                EXYNOS4_CLKDIV_TOP_ACLK133_MASK |
+                EXYNOS4_CLKDIV_TOP_ONENAND_MASK);
 
         tmp |= ((exynos4x12_clkdiv_top[index][0] <<
-                                S5P_CLKDIV_TOP_ACLK266_GPS_SHIFT) |
+                                EXYNOS4_CLKDIV_TOP_ACLK266_GPS_SHIFT) |
                 (exynos4x12_clkdiv_top[index][1] <<
-                                S5P_CLKDIV_TOP_ACLK100_SHIFT) |
+                                EXYNOS4_CLKDIV_TOP_ACLK100_SHIFT) |
                 (exynos4x12_clkdiv_top[index][2] <<
-                                S5P_CLKDIV_TOP_ACLK160_SHIFT) |
+                                EXYNOS4_CLKDIV_TOP_ACLK160_SHIFT) |
                 (exynos4x12_clkdiv_top[index][3] <<
-                                S5P_CLKDIV_TOP_ACLK133_SHIFT) |
+                                EXYNOS4_CLKDIV_TOP_ACLK133_SHIFT) |
                 (exynos4x12_clkdiv_top[index][4] <<
-                                S5P_CLKDIV_TOP_ONENAND_SHIFT));
+                                EXYNOS4_CLKDIV_TOP_ONENAND_SHIFT));
 
-        __raw_writel(tmp, S5P_CLKDIV_TOP);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_TOP);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_TOP);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP);
         } while (tmp & 0x11111);
 
         /* Change Divider - LEFTBUS */
-        tmp = __raw_readl(S5P_CLKDIV_LEFTBUS);
+        tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS);
 
-        tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+        tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
 
         tmp |= ((exynos4x12_clkdiv_lr_bus[index][0] <<
-                                S5P_CLKDIV_BUS_GDLR_SHIFT) |
+                                EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
                 (exynos4x12_clkdiv_lr_bus[index][1] <<
-                                S5P_CLKDIV_BUS_GPLR_SHIFT));
+                                EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
 
-        __raw_writel(tmp, S5P_CLKDIV_LEFTBUS);
+        __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS);
 
         do {
-                tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS);
+                tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS);
         } while (tmp & 0x11);