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authorHeiko Stuebner <heiko@sntech.de>2016-03-24 17:29:03 -0400
committerKishon Vijay Abraham I <kishon@ti.com>2016-04-13 09:03:05 -0400
commit5128de85124c728cdbb6b35bd9dc7410f02c0ca1 (patch)
treee123ae599fe5953242411a9e4b5ed1acf53b3dc1
parent332184adff50de9596f03735496c545e8bccc73e (diff)
phy: rockchip-emmc: adapt binding to specifiy register offset and length
The emmc-phy occupies a contiguous set of 8 registers inside the general register files, so the reg property should specify this. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r--Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt6
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
index 461e9580aa45..555cb0f40690 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
@@ -4,7 +4,7 @@ Rockchip EMMC PHY
4Required properties: 4Required properties:
5 - compatible: rockchip,rk3399-emmc-phy 5 - compatible: rockchip,rk3399-emmc-phy
6 - #phy-cells: must be 0 6 - #phy-cells: must be 0
7 - reg: PHY configure reg address offset in "general 7 - reg: PHY register address offset and length in "general
8 register files" 8 register files"
9 9
10Example: 10Example:
@@ -12,12 +12,14 @@ Example:
12 12
13grf: syscon@ff770000 { 13grf: syscon@ff770000 {
14 compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 14 compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
15 #address-cells = <1>;
16 #size-cells = <1>;
15 17
16... 18...
17 19
18 emmcphy: phy@f780 { 20 emmcphy: phy@f780 {
19 compatible = "rockchip,rk3399-emmc-phy"; 21 compatible = "rockchip,rk3399-emmc-phy";
20 reg = <0xf780>; 22 reg = <0xf780 0x20>;
21 #phy-cells = <0>; 23 #phy-cells = <0>;
22 }; 24 };
23}; 25};