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authorAndrew Banman <abanman@sgi.com>2016-09-21 12:09:21 -0400
committerIngo Molnar <mingo@kernel.org>2016-09-22 05:16:15 -0400
commit4f059d514f7119a4fdd9934189ff31f2c26b2647 (patch)
tree1e46b692085edfcbc617cd7815a30ef375ecde21
parent6d78059bbc0ace5461938aaea8cda95eb6719898 (diff)
x86/platform/uv/BAU: Add UV4-specific functions
Add the UV4-specific function definitions and define an operations struct to implement them in the BAU driver. Many BAU MMRs, although functionally the same, have new addresses on UV4 due to hardware changes. Each MMR requires new read/write functions, but their implementation in the driver does not change. Thus, it is enough to enumerate them in the operations struct for the changes to take effect. Signed-off-by: Andrew Banman <abanman@sgi.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Mike Travis <travis@sgi.com> Acked-by: Dimitri Sivanich <sivanich@sgi.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: akpm@linux-foundation.org Cc: rja@sgi.com Link: http://lkml.kernel.org/r/1474474161-265604-11-git-send-email-abanman@sgi.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h30
-rw-r--r--arch/x86/platform/uv/tlb_uv.c15
2 files changed, 44 insertions, 1 deletions
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index a7a93a5beb00..57ab86d94d64 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -664,6 +664,16 @@ static inline void write_gmmr_activation(int pnode, unsigned long mmr_image)
664 write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image); 664 write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
665} 665}
666 666
667static inline void write_mmr_proc_payload_first(int pnode, unsigned long mmr_image)
668{
669 write_gmmr(pnode, UV4H_LB_PROC_INTD_QUEUE_FIRST, mmr_image);
670}
671
672static inline void write_mmr_proc_payload_last(int pnode, unsigned long mmr_image)
673{
674 write_gmmr(pnode, UV4H_LB_PROC_INTD_QUEUE_LAST, mmr_image);
675}
676
667static inline void write_mmr_payload_first(int pnode, unsigned long mmr_image) 677static inline void write_mmr_payload_first(int pnode, unsigned long mmr_image)
668{ 678{
669 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image); 679 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
@@ -709,6 +719,26 @@ static inline unsigned long read_gmmr_sw_ack(int pnode)
709 return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE); 719 return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
710} 720}
711 721
722static inline void write_mmr_proc_sw_ack(unsigned long mr)
723{
724 uv_write_local_mmr(UV4H_LB_PROC_INTD_SOFT_ACK_CLEAR, mr);
725}
726
727static inline void write_gmmr_proc_sw_ack(int pnode, unsigned long mr)
728{
729 write_gmmr(pnode, UV4H_LB_PROC_INTD_SOFT_ACK_CLEAR, mr);
730}
731
732static inline unsigned long read_mmr_proc_sw_ack(void)
733{
734 return read_lmmr(UV4H_LB_PROC_INTD_SOFT_ACK_PENDING);
735}
736
737static inline unsigned long read_gmmr_proc_sw_ack(int pnode)
738{
739 return read_gmmr(pnode, UV4H_LB_PROC_INTD_SOFT_ACK_PENDING);
740}
741
712static inline void write_mmr_data_config(int pnode, unsigned long mr) 742static inline void write_mmr_data_config(int pnode, unsigned long mr)
713{ 743{
714 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr); 744 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 7ca0e5c31477..56c5a3a3884a 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -36,6 +36,17 @@ static struct bau_operations uv123_bau_ops = {
36 .write_payload_last = write_mmr_payload_last, 36 .write_payload_last = write_mmr_payload_last,
37}; 37};
38 38
39static struct bau_operations uv4_bau_ops = {
40 .bau_gpa_to_offset = uv_gpa_to_soc_phys_ram,
41 .read_l_sw_ack = read_mmr_proc_sw_ack,
42 .read_g_sw_ack = read_gmmr_proc_sw_ack,
43 .write_l_sw_ack = write_mmr_proc_sw_ack,
44 .write_g_sw_ack = write_gmmr_proc_sw_ack,
45 .write_payload_first = write_mmr_proc_payload_first,
46 .write_payload_last = write_mmr_proc_payload_last,
47};
48
49
39/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */ 50/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
40static int timeout_base_ns[] = { 51static int timeout_base_ns[] = {
41 20, 52 20,
@@ -2158,7 +2169,9 @@ static int __init uv_bau_init(void)
2158 if (!is_uv_system()) 2169 if (!is_uv_system())
2159 return 0; 2170 return 0;
2160 2171
2161 if (is_uv3_hub()) 2172 if (is_uv4_hub())
2173 ops = uv4_bau_ops;
2174 else if (is_uv3_hub())
2162 ops = uv123_bau_ops; 2175 ops = uv123_bau_ops;
2163 else if (is_uv2_hub()) 2176 else if (is_uv2_hub())
2164 ops = uv123_bau_ops; 2177 ops = uv123_bau_ops;