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authorRussell King - ARM Linux <linux@arm.linux.org.uk>2012-03-06 17:34:06 -0500
committerVinod Koul <vinod.koul@linux.intel.com>2012-03-13 02:06:06 -0400
commit4d4e58de32a192fea65ab84509d17d199bd291c8 (patch)
treebe35531778c9cc6bee73beb94d07e176a6f3599d
parent08714f60b0fc6ea3a060b69b32e77139f14e6045 (diff)
dmaengine: move last completed cookie into generic dma_chan structure
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
-rw-r--r--arch/arm/include/asm/hardware/iop_adma.h2
-rw-r--r--drivers/dma/amba-pl08x.c8
-rw-r--r--drivers/dma/at_hdmac.c10
-rw-r--r--drivers/dma/at_hdmac_regs.h2
-rw-r--r--drivers/dma/coh901318.c7
-rw-r--r--drivers/dma/dw_dmac.c10
-rw-r--r--drivers/dma/dw_dmac_regs.h1
-rw-r--r--drivers/dma/ep93xx_dma.c8
-rw-r--r--drivers/dma/fsldma.c4
-rw-r--r--drivers/dma/fsldma.h1
-rw-r--r--drivers/dma/imx-dma.c7
-rw-r--r--drivers/dma/imx-sdma.c5
-rw-r--r--drivers/dma/intel_mid_dma.c9
-rw-r--r--drivers/dma/intel_mid_dma_regs.h2
-rw-r--r--drivers/dma/ioat/dma.c2
-rw-r--r--drivers/dma/ioat/dma.h4
-rw-r--r--drivers/dma/ioat/dma_v2.c2
-rw-r--r--drivers/dma/ioat/dma_v3.c2
-rw-r--r--drivers/dma/iop-adma.c10
-rw-r--r--drivers/dma/ipu/ipu_idmac.c10
-rw-r--r--drivers/dma/mpc512x_dma.c7
-rw-r--r--drivers/dma/mv_xor.c6
-rw-r--r--drivers/dma/mv_xor.h2
-rw-r--r--drivers/dma/mxs-dma.c5
-rw-r--r--drivers/dma/pch_dma.c5
-rw-r--r--drivers/dma/pl330.c9
-rw-r--r--drivers/dma/ppc4xx/adma.c10
-rw-r--r--drivers/dma/ppc4xx/adma.h2
-rw-r--r--drivers/dma/shdma.c10
-rw-r--r--drivers/dma/shdma.h1
-rw-r--r--drivers/dma/sirf-dma.c7
-rw-r--r--drivers/dma/ste_dma40.c10
-rw-r--r--drivers/dma/timb_dma.c7
-rw-r--r--drivers/dma/txx9dmac.c10
-rw-r--r--drivers/dma/txx9dmac.h1
-rw-r--r--include/linux/amba/pl08x.h2
-rw-r--r--include/linux/dmaengine.h2
37 files changed, 83 insertions, 119 deletions
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 59b8c3892f76..122f86d8c991 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -49,7 +49,6 @@ struct iop_adma_device {
49/** 49/**
50 * struct iop_adma_chan - internal representation of an ADMA device 50 * struct iop_adma_chan - internal representation of an ADMA device
51 * @pending: allows batching of hardware operations 51 * @pending: allows batching of hardware operations
52 * @completed_cookie: identifier for the most recently completed operation
53 * @lock: serializes enqueue/dequeue operations to the slot pool 52 * @lock: serializes enqueue/dequeue operations to the slot pool
54 * @mmr_base: memory mapped register base 53 * @mmr_base: memory mapped register base
55 * @chain: device chain view of the descriptors 54 * @chain: device chain view of the descriptors
@@ -62,7 +61,6 @@ struct iop_adma_device {
62 */ 61 */
63struct iop_adma_chan { 62struct iop_adma_chan {
64 int pending; 63 int pending;
65 dma_cookie_t completed_cookie;
66 spinlock_t lock; /* protects the descriptor slot pool */ 64 spinlock_t lock; /* protects the descriptor slot pool */
67 void __iomem *mmr_base; 65 void __iomem *mmr_base;
68 struct list_head chain; 66 struct list_head chain;
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 513184b4fdd1..e510447a685a 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -971,7 +971,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
971 u32 bytesleft = 0; 971 u32 bytesleft = 0;
972 972
973 last_used = plchan->chan.cookie; 973 last_used = plchan->chan.cookie;
974 last_complete = plchan->lc; 974 last_complete = plchan->chan.completed_cookie;
975 975
976 ret = dma_async_is_complete(cookie, last_complete, last_used); 976 ret = dma_async_is_complete(cookie, last_complete, last_used);
977 if (ret == DMA_SUCCESS) { 977 if (ret == DMA_SUCCESS) {
@@ -983,7 +983,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
983 * This cookie not complete yet 983 * This cookie not complete yet
984 */ 984 */
985 last_used = plchan->chan.cookie; 985 last_used = plchan->chan.cookie;
986 last_complete = plchan->lc; 986 last_complete = plchan->chan.completed_cookie;
987 987
988 /* Get number of bytes left in the active transactions and queue */ 988 /* Get number of bytes left in the active transactions and queue */
989 bytesleft = pl08x_getbytes_chan(plchan); 989 bytesleft = pl08x_getbytes_chan(plchan);
@@ -1543,7 +1543,7 @@ static void pl08x_tasklet(unsigned long data)
1543 1543
1544 if (txd) { 1544 if (txd) {
1545 /* Update last completed */ 1545 /* Update last completed */
1546 plchan->lc = txd->tx.cookie; 1546 plchan->chan.completed_cookie = txd->tx.cookie;
1547 } 1547 }
1548 1548
1549 /* If a new descriptor is queued, set it up plchan->at is NULL here */ 1549 /* If a new descriptor is queued, set it up plchan->at is NULL here */
@@ -1725,7 +1725,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
1725 1725
1726 chan->chan.device = dmadev; 1726 chan->chan.device = dmadev;
1727 chan->chan.cookie = 0; 1727 chan->chan.cookie = 0;
1728 chan->lc = 0; 1728 chan->chan.completed_cookie = 0;
1729 1729
1730 spin_lock_init(&chan->lock); 1730 spin_lock_init(&chan->lock);
1731 INIT_LIST_HEAD(&chan->pend_list); 1731 INIT_LIST_HEAD(&chan->pend_list);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index f4aed5fc2cb6..6baf5d717262 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -269,7 +269,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
269 dev_vdbg(chan2dev(&atchan->chan_common), 269 dev_vdbg(chan2dev(&atchan->chan_common),
270 "descriptor %u complete\n", txd->cookie); 270 "descriptor %u complete\n", txd->cookie);
271 271
272 atchan->completed_cookie = txd->cookie; 272 atchan->chan_common.completed_cookie = txd->cookie;
273 273
274 /* move children to free_list */ 274 /* move children to free_list */
275 list_splice_init(&desc->tx_list, &atchan->free_list); 275 list_splice_init(&desc->tx_list, &atchan->free_list);
@@ -1016,14 +1016,14 @@ atc_tx_status(struct dma_chan *chan,
1016 1016
1017 spin_lock_irqsave(&atchan->lock, flags); 1017 spin_lock_irqsave(&atchan->lock, flags);
1018 1018
1019 last_complete = atchan->completed_cookie; 1019 last_complete = chan->completed_cookie;
1020 last_used = chan->cookie; 1020 last_used = chan->cookie;
1021 1021
1022 ret = dma_async_is_complete(cookie, last_complete, last_used); 1022 ret = dma_async_is_complete(cookie, last_complete, last_used);
1023 if (ret != DMA_SUCCESS) { 1023 if (ret != DMA_SUCCESS) {
1024 atc_cleanup_descriptors(atchan); 1024 atc_cleanup_descriptors(atchan);
1025 1025
1026 last_complete = atchan->completed_cookie; 1026 last_complete = chan->completed_cookie;
1027 last_used = chan->cookie; 1027 last_used = chan->cookie;
1028 1028
1029 ret = dma_async_is_complete(cookie, last_complete, last_used); 1029 ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1129,7 +1129,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
1129 spin_lock_irqsave(&atchan->lock, flags); 1129 spin_lock_irqsave(&atchan->lock, flags);
1130 atchan->descs_allocated = i; 1130 atchan->descs_allocated = i;
1131 list_splice(&tmp_list, &atchan->free_list); 1131 list_splice(&tmp_list, &atchan->free_list);
1132 atchan->completed_cookie = chan->cookie = 1; 1132 chan->completed_cookie = chan->cookie = 1;
1133 spin_unlock_irqrestore(&atchan->lock, flags); 1133 spin_unlock_irqrestore(&atchan->lock, flags);
1134 1134
1135 /* channel parameters */ 1135 /* channel parameters */
@@ -1329,7 +1329,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
1329 struct at_dma_chan *atchan = &atdma->chan[i]; 1329 struct at_dma_chan *atchan = &atdma->chan[i];
1330 1330
1331 atchan->chan_common.device = &atdma->dma_common; 1331 atchan->chan_common.device = &atdma->dma_common;
1332 atchan->chan_common.cookie = atchan->completed_cookie = 1; 1332 atchan->chan_common.cookie = atchan->chan_common.completed_cookie = 1;
1333 list_add_tail(&atchan->chan_common.device_node, 1333 list_add_tail(&atchan->chan_common.device_node,
1334 &atdma->dma_common.channels); 1334 &atdma->dma_common.channels);
1335 1335
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index a8d3277d60b5..08fd8a0ae797 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -208,7 +208,6 @@ enum atc_status {
208 * @save_dscr: for cyclic operations, preserve next descriptor address in 208 * @save_dscr: for cyclic operations, preserve next descriptor address in
209 * the cyclic list on suspend/resume cycle 209 * the cyclic list on suspend/resume cycle
210 * @lock: serializes enqueue/dequeue operations to descriptors lists 210 * @lock: serializes enqueue/dequeue operations to descriptors lists
211 * @completed_cookie: identifier for the most recently completed operation
212 * @active_list: list of descriptors dmaengine is being running on 211 * @active_list: list of descriptors dmaengine is being running on
213 * @queue: list of descriptors ready to be submitted to engine 212 * @queue: list of descriptors ready to be submitted to engine
214 * @free_list: list of descriptors usable by the channel 213 * @free_list: list of descriptors usable by the channel
@@ -227,7 +226,6 @@ struct at_dma_chan {
227 spinlock_t lock; 226 spinlock_t lock;
228 227
229 /* these other elements are all protected by lock */ 228 /* these other elements are all protected by lock */