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authorLinus Walleij <linus.walleij@linaro.org>2016-04-27 04:23:44 -0400
committerLinus Walleij <linus.walleij@linaro.org>2016-04-27 04:23:44 -0400
commit451938d52fe838c766687484fd9a69e35d8a68bc (patch)
tree361aee5bc66501fcc0d322f55503f85de7a4c065
parent0c0451e7634564052a045d4398a91ea4ef1f755b (diff)
gpio: clarify open drain/source docs
Make the text clearer, remove reference to confusing "positive" and "negative" and elaborate a bit. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--Documentation/gpio/driver.txt20
1 files changed, 14 insertions, 6 deletions
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt
index ae6e0299b16c..6cb35a78eff4 100644
--- a/Documentation/gpio/driver.txt
+++ b/Documentation/gpio/driver.txt
@@ -100,6 +100,10 @@ Both usecases require that the line be equipped with a pull-up resistor. This
100resistor will make the line tend to high level unless one of the transistors on 100resistor will make the line tend to high level unless one of the transistors on
101the rail actively pulls it down. 101the rail actively pulls it down.
102 102
103The level on the line will go as high as the VDD on the pull-up resistor, which
104may be higher than the level supported by the transistor, achieveing a
105level-shift to the higher VDD.
106
103Integrated electronics often have an output driver stage in the form of a CMOS 107Integrated electronics often have an output driver stage in the form of a CMOS
104"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives 108"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives
105the line high and one of them drives the line low. This is called a push-pull 109the line high and one of them drives the line low. This is called a push-pull
@@ -110,14 +114,18 @@ output. The "totem-pole" looks like so:
110 OD ||--+ 114 OD ||--+
111 +--/ ---o|| P-MOS-FET 115 +--/ ---o|| P-MOS-FET
112 | ||--+ 116 | ||--+
113in --+ +----- out 117IN --+ +----- out
114 | ||--+ 118 | ||--+
115 +--/ ----|| N-MOS-FET 119 +--/ ----|| N-MOS-FET
116 OS ||--+ 120 OS ||--+
117 | 121 |
118 GND 122 GND
119 123
120You see the little "switches" named "OD" and "OS" that enable/disable the 124The desired output signal (e.g. coming directly from some GPIO output register)
125arrives at IN. The switches named "OD" and "OS" are normally closed, creating
126a push-pull circuit.
127
128Consider the little "switches" named "OD" and "OS" that enable/disable the
121P-MOS or N-MOS transistor right after the split of the input. As you can see, 129P-MOS or N-MOS transistor right after the split of the input. As you can see,
122either transistor will go totally numb if this switch is open. The totem-pole 130either transistor will go totally numb if this switch is open. The totem-pole
123is then halved and give high impedance instead of actively driving the line 131is then halved and give high impedance instead of actively driving the line
@@ -128,8 +136,8 @@ Some GPIO hardware come in open drain / open source configuration. Some are
128hard-wired lines that will only support open drain or open source no matter 136hard-wired lines that will only support open drain or open source no matter
129what: there is only one transistor there. Some are software-configurable: 137what: there is only one transistor there. Some are software-configurable:
130by flipping a bit in a register the output can be configured as open drain 138by flipping a bit in a register the output can be configured as open drain
131or open source, by flicking open the switches labeled "OD" and "OS" in the 139or open source, in practice by flicking open the switches labeled "OD" and "OS"
132drawing above. 140in the drawing above.
133 141
134By disabling the P-MOS transistor, the output can be driven between GND and 142By disabling the P-MOS transistor, the output can be driven between GND and
135high impedance (open drain), and by disabling the N-MOS transistor, the output 143high impedance (open drain), and by disabling the N-MOS transistor, the output
@@ -146,8 +154,8 @@ set in the machine file, or coming from other hardware descriptions.
146If this state can not be configured in hardware, i.e. if the GPIO hardware does 154If this state can not be configured in hardware, i.e. if the GPIO hardware does
147not support open drain/open source in hardware, the GPIO library will instead 155not support open drain/open source in hardware, the GPIO library will instead
148use a trick: when a line is set as output, if the line is flagged as open 156use a trick: when a line is set as output, if the line is flagged as open
149drain, and the output value is negative, it will be driven low as usual. But 157drain, and the IN output value is low, it will be driven low as usual. But
150if the output value is set to positive, it will instead *NOT* be driven high, 158if the IN output value is set to high, it will instead *NOT* be driven high,
151instead it will be switched to input, as input mode is high impedance, thus 159instead it will be switched to input, as input mode is high impedance, thus
152achieveing an "open drain emulation" of sorts: electrically the behaviour will 160achieveing an "open drain emulation" of sorts: electrically the behaviour will
153be identical, with the exception of possible hardware glitches when switching 161be identical, with the exception of possible hardware glitches when switching