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authorLars-Peter Clausen <lars@metafoo.de>2015-08-20 11:39:12 -0400
committerVinod Koul <vinod.koul@intel.com>2015-08-23 09:25:10 -0400
commit43bcad2bb485f053661e5cfe306c34178c6651c7 (patch)
treee465a81b9a00f7b53a830b9882d3daf11cf00ab1
parentb2b48ac4c584ae31eb23ad1f86964cc6e52eaa54 (diff)
devicetree: Add bindings documentation for Analog Devices AXI-DMAC
Add the devicetree descriptor for the Analog Devices AXI-DMAC DMA controller. This is a soft peripheral used in FPGAs and the bindings describe how it is connected to the system (clock, interrupt, memory map) as well as the configuration options that were used when the peripheral was instantiated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--Documentation/devicetree/bindings/dma/adi,axi-dmac.txt61
-rw-r--r--include/dt-bindings/dma/axi-dmac.h48
2 files changed, 109 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt b/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt
new file mode 100644
index 000000000000..47cb1d14b690
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt
@@ -0,0 +1,61 @@
1Analog Device AXI-DMAC DMA controller
2
3Required properties:
4 - compatible: Must be "adi,axi-dmac-1.00.a".
5 - reg: Specification for the controllers memory mapped register map.
6 - interrupts: Specification for the controllers interrupt.
7 - clocks: Phandle and specifier to the controllers AXI interface clock
8 - #dma-cells: Must be 1.
9
10Required sub-nodes:
11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
12 the channel sub-nodes the following bindings apply. They must match the
13 configuration options of the peripheral as it was instantiated.
14
15Required properties for adi,channels sub-node:
16 - #size-cells: Must be 0
17 - #address-cells: Must be 1
18
19Required channel sub-node properties:
20 - reg: Which channel this node refers to.
21 - adi,length-width: Width of the DMA transfer length register.
22 - adi,source-bus-width,
23 adi,destination-bus-width: Width of the source or destination bus in bits.
24 - adi,source-bus-type,
25 adi,destination-bus-type: Type of the source or destination bus. Must be one
26 of the following:
27 0 (AXI_DMAC_TYPE_AXI_MM): Memory mapped AXI interface
28 1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface
29 2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface
30
31Optional channel properties:
32 - adi,cyclic: Must be set if the channel supports hardware cyclic DMA
33 transfers.
34 - adi,2d: Must be set if the channel supports hardware 2D DMA transfers.
35
36DMA clients connected to the AXI-DMAC DMA controller must use the format
37described in the dma.txt file using a one-cell specifier. The value of the
38specifier refers to the DMA channel index.
39
40Example:
41
42dma: dma@7c420000 {
43 compatible = "adi,axi-dmac-1.00.a";
44 reg = <0x7c420000 0x10000>;
45 interrupts = <0 57 0>;
46 clocks = <&clkc 16>;
47 #dma-cells = <1>;
48
49 adi,channels {
50 #size-cells = <0>;
51 #address-cells = <1>;
52
53 dma-channel@0 {
54 reg = <0>;
55 adi,source-bus-width = <32>;
56 adi,source-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>;
57 adi,destination-bus-width = <64>;
58 adi,destination-bus-type = <ADI_AXI_DMAC_TYPE_FIFO>;
59 };
60 };
61};
diff --git a/include/dt-bindings/dma/axi-dmac.h b/include/dt-bindings/dma/axi-dmac.h
new file mode 100644
index 000000000000..ad9e6ecb9c2f
--- /dev/null
+++ b/include/dt-bindings/dma/axi-dmac.h
@@ -0,0 +1,48 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41#ifndef __DT_BINDINGS_DMA_AXI_DMAC_H__
42#define __DT_BINDINGS_DMA_AXI_DMAC_H__
43
44#define AXI_DMAC_BUS_TYPE_AXI_MM 0
45#define AXI_DMAC_BUS_TYPE_AXI_STREAM 1
46#define AXI_DMAC_BUS_TYPE_FIFO 2
47
48#endif