diff options
author | Eric Huang <JinHuiEric.Huang@amd.com> | 2016-05-24 15:43:53 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 14:50:56 -0400 |
commit | 40899d5529fb9fbb68880616bbf679536079c92e (patch) | |
tree | 0d75701aa07df7c24db51abe19a098dea817b340 | |
parent | f2bdc05f773ea68d31e2d50b9e791b7c7dcd1dfa (diff) |
drm/amdgpu: add mclk OD(overdrive) support for CI
The maximum OD percentage is 20.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index 9b9be6bae616..9327a610338d 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c | |||
@@ -6564,6 +6564,40 @@ static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) | |||
6564 | return 0; | 6564 | return 0; |
6565 | } | 6565 | } |
6566 | 6566 | ||
6567 | static int ci_dpm_get_mclk_od(struct amdgpu_device *adev) | ||
6568 | { | ||
6569 | struct ci_power_info *pi = ci_get_pi(adev); | ||
6570 | struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table); | ||
6571 | struct ci_single_dpm_table *golden_mclk_table = | ||
6572 | &(pi->golden_dpm_table.mclk_table); | ||
6573 | int value; | ||
6574 | |||
6575 | value = (mclk_table->dpm_levels[mclk_table->count - 1].value - | ||
6576 | golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value) * | ||
6577 | 100 / | ||
6578 | golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value; | ||
6579 | |||
6580 | return value; | ||
6581 | } | ||
6582 | |||
6583 | static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) | ||
6584 | { | ||
6585 | struct ci_power_info *pi = ci_get_pi(adev); | ||
6586 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); | ||
6587 | struct ci_single_dpm_table *golden_mclk_table = | ||
6588 | &(pi->golden_dpm_table.mclk_table); | ||
6589 | |||
6590 | if (value > 20) | ||
6591 | value = 20; | ||
6592 | |||
6593 | ps->performance_levels[ps->performance_level_count - 1].mclk = | ||
6594 | golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value * | ||
6595 | value / 100 + | ||
6596 | golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value; | ||
6597 | |||
6598 | return 0; | ||
6599 | } | ||
6600 | |||
6567 | const struct amd_ip_funcs ci_dpm_ip_funcs = { | 6601 | const struct amd_ip_funcs ci_dpm_ip_funcs = { |
6568 | .name = "ci_dpm", | 6602 | .name = "ci_dpm", |
6569 | .early_init = ci_dpm_early_init, | 6603 | .early_init = ci_dpm_early_init, |
@@ -6602,6 +6636,8 @@ static const struct amdgpu_dpm_funcs ci_dpm_funcs = { | |||
6602 | .force_clock_level = ci_dpm_force_clock_level, | 6636 | .force_clock_level = ci_dpm_force_clock_level, |
6603 | .get_sclk_od = ci_dpm_get_sclk_od, | 6637 | .get_sclk_od = ci_dpm_get_sclk_od, |
6604 | .set_sclk_od = ci_dpm_set_sclk_od, | 6638 | .set_sclk_od = ci_dpm_set_sclk_od, |
6639 | .get_mclk_od = ci_dpm_get_mclk_od, | ||
6640 | .set_mclk_od = ci_dpm_set_mclk_od, | ||
6605 | }; | 6641 | }; |
6606 | 6642 | ||
6607 | static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev) | 6643 | static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev) |