diff options
author | James Hogan <james.hogan@imgtec.com> | 2015-07-15 11:17:43 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-09-03 06:07:45 -0400 |
commit | 3c865dd9c1d64046877112451f13db2cb46d4d28 (patch) | |
tree | a56689e5e3b8aa1296f81c1640fd71a02d471964 | |
parent | 0f6ce77538c3f0628acdeee30738e4c8fe08d7e2 (diff) |
MIPS: Refactor dumping of TLB registers for r3k/r4k
The TLB registers are dumped in a couble of places:
- sysrq_tlbdump_single() - when dumping TLB state.
- do_mcheck() - in response to a machine check error.
The main TLB registers also differ between r3k and r4k, but r4k appears
to be assumed.
Refactor this code into a dump_tlb_regs() function, implemented for both
r3k and r4k, and used by both of the above functions.
Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10721/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/tlbdebug.h | 1 | ||||
-rw-r--r-- | arch/mips/kernel/sysrq.c | 14 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 16 | ||||
-rw-r--r-- | arch/mips/lib/dump_tlb.c | 18 | ||||
-rw-r--r-- | arch/mips/lib/r3k_dump_tlb.c | 11 | ||||
-rw-r--r-- | arch/mips/mm/tlb-r3k.c | 2 |
6 files changed, 34 insertions, 28 deletions
diff --git a/arch/mips/include/asm/tlbdebug.h b/arch/mips/include/asm/tlbdebug.h index bb8f5c29c3d9..3a25a8780ac7 100644 --- a/arch/mips/include/asm/tlbdebug.h +++ b/arch/mips/include/asm/tlbdebug.h | |||
@@ -11,6 +11,7 @@ | |||
11 | /* | 11 | /* |
12 | * TLB debugging functions: | 12 | * TLB debugging functions: |
13 | */ | 13 | */ |
14 | extern void dump_tlb_regs(void); | ||
14 | extern void dump_tlb_all(void); | 15 | extern void dump_tlb_all(void); |
15 | 16 | ||
16 | #endif /* __ASM_TLBDEBUG_H */ | 17 | #endif /* __ASM_TLBDEBUG_H */ |
diff --git a/arch/mips/kernel/sysrq.c b/arch/mips/kernel/sysrq.c index 5b539f5fc9d9..5f055393092d 100644 --- a/arch/mips/kernel/sysrq.c +++ b/arch/mips/kernel/sysrq.c | |||
@@ -21,24 +21,12 @@ static DEFINE_SPINLOCK(show_lock); | |||
21 | 21 | ||
22 | static void sysrq_tlbdump_single(void *dummy) | 22 | static void sysrq_tlbdump_single(void *dummy) |
23 | { | 23 | { |
24 | const int field = 2 * sizeof(unsigned long); | ||
25 | unsigned long flags; | 24 | unsigned long flags; |
26 | 25 | ||
27 | spin_lock_irqsave(&show_lock, flags); | 26 | spin_lock_irqsave(&show_lock, flags); |
28 | 27 | ||
29 | pr_info("CPU%d:\n", smp_processor_id()); | 28 | pr_info("CPU%d:\n", smp_processor_id()); |
30 | pr_info("Index : %0x\n", read_c0_index()); | 29 | dump_tlb_regs(); |
31 | pr_info("Pagemask: %0x\n", read_c0_pagemask()); | ||
32 | pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi()); | ||
33 | pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); | ||
34 | pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1()); | ||
35 | pr_info("Wired : %0x\n", read_c0_wired()); | ||
36 | pr_info("Pagegrain: %0x\n", read_c0_pagegrain()); | ||
37 | if (cpu_has_htw) { | ||
38 | pr_info("PWField : %0*lx\n", field, read_c0_pwfield()); | ||
39 | pr_info("PWSize : %0*lx\n", field, read_c0_pwsize()); | ||
40 | pr_info("PWCtl : %0x\n", read_c0_pwctl()); | ||
41 | } | ||
42 | pr_info("\n"); | 30 | pr_info("\n"); |
43 | dump_tlb_all(); | 31 | dump_tlb_all(); |
44 | pr_info("\n"); | 32 | pr_info("\n"); |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 01da120d75c4..da0b3189fe88 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -1523,7 +1523,6 @@ asmlinkage void do_watch(struct pt_regs *regs) | |||
1523 | 1523 | ||
1524 | asmlinkage void do_mcheck(struct pt_regs *regs) | 1524 | asmlinkage void do_mcheck(struct pt_regs *regs) |
1525 | { | 1525 | { |
1526 | const int field = 2 * sizeof(unsigned long); | ||
1527 | int multi_match = regs->cp0_status & ST0_TS; | 1526 | int multi_match = regs->cp0_status & ST0_TS; |
1528 | enum ctx_state prev_state; | 1527 | enum ctx_state prev_state; |
1529 | mm_segment_t old_fs = get_fs(); | 1528 | mm_segment_t old_fs = get_fs(); |
@@ -1532,19 +1531,8 @@ asmlinkage void do_mcheck(struct pt_regs *regs) | |||
1532 | show_regs(regs); | 1531 | show_regs(regs); |
1533 | 1532 | ||
1534 | if (multi_match) { | 1533 | if (multi_match) { |
1535 | pr_err("Index : %0x\n", read_c0_index()); | 1534 | dump_tlb_regs(); |
1536 | pr_err("Pagemask: %0x\n", read_c0_pagemask()); | 1535 | pr_info("\n"); |
1537 | pr_err("EntryHi : %0*lx\n", field, read_c0_entryhi()); | ||
1538 | pr_err("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); | ||
1539 | pr_err("EntryLo1: %0*lx\n", field, read_c0_entrylo1()); | ||
1540 | pr_err("Wired : %0x\n", read_c0_wired()); | ||
1541 | pr_err("Pagegrain: %0x\n", read_c0_pagegrain()); | ||
1542 | if (cpu_has_htw) { | ||
1543 | pr_err("PWField : %0*lx\n", field, read_c0_pwfield()); | ||
1544 | pr_err("PWSize : %0*lx\n", field, read_c0_pwsize()); | ||
1545 | pr_err("PWCtl : %0x\n", read_c0_pwctl()); | ||
1546 | } | ||
1547 | pr_err("\n"); | ||
1548 | dump_tlb_all(); | 1536 | dump_tlb_all(); |
1549 | } | 1537 | } |
1550 | 1538 | ||
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 167f35634709..519ededbf9a4 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c | |||
@@ -13,6 +13,24 @@ | |||
13 | #include <asm/pgtable.h> | 13 | #include <asm/pgtable.h> |
14 | #include <asm/tlbdebug.h> | 14 | #include <asm/tlbdebug.h> |
15 | 15 | ||
16 | void dump_tlb_regs(void) | ||
17 | { | ||
18 | const int field = 2 * sizeof(unsigned long); | ||
19 | |||
20 | pr_info("Index : %0x\n", read_c0_index()); | ||
21 | pr_info("PageMask : %0x\n", read_c0_pagemask()); | ||
22 | pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi()); | ||
23 | pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0()); | ||
24 | pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1()); | ||
25 | pr_info("Wired : %0x\n", read_c0_wired()); | ||
26 | pr_info("PageGrain: %0x\n", read_c0_pagegrain()); | ||
27 | if (cpu_has_htw) { | ||
28 | pr_info("PWField : %0*lx\n", field, read_c0_pwfield()); | ||
29 | pr_info("PWSize : %0*lx\n", field, read_c0_pwsize()); | ||
30 | pr_info("PWCtl : %0x\n", read_c0_pwctl()); | ||
31 | } | ||
32 | } | ||
33 | |||
16 | static inline const char *msk2str(unsigned int mask) | 34 | static inline const char *msk2str(unsigned int mask) |
17 | { | 35 | { |
18 | switch (mask) { | 36 | switch (mask) { |
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c index 8e0d3cff8ae4..cfcbb5218b59 100644 --- a/arch/mips/lib/r3k_dump_tlb.c +++ b/arch/mips/lib/r3k_dump_tlb.c | |||
@@ -14,6 +14,17 @@ | |||
14 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
15 | #include <asm/tlbdebug.h> | 15 | #include <asm/tlbdebug.h> |
16 | 16 | ||
17 | extern int r3k_have_wired_reg; | ||
18 | |||
19 | void dump_tlb_regs(void) | ||
20 | { | ||
21 | pr_info("Index : %0x\n", read_c0_index()); | ||
22 | pr_info("EntryHi : %0lx\n", read_c0_entryhi()); | ||
23 | pr_info("EntryLo : %0lx\n", read_c0_entrylo0()); | ||
24 | if (r3k_have_wired_reg) | ||
25 | pr_info("Wired : %0x\n", read_c0_wired()); | ||
26 | } | ||
27 | |||
17 | static void dump_tlb(int first, int last) | 28 | static void dump_tlb(int first, int last) |
18 | { | 29 | { |
19 | int i; | 30 | int i; |
diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c index 2b75b8f880ed..b4f366f7c0f5 100644 --- a/arch/mips/mm/tlb-r3k.c +++ b/arch/mips/mm/tlb-r3k.c | |||
@@ -36,7 +36,7 @@ extern void build_tlb_refill_handler(void); | |||
36 | "nop\n\t" \ | 36 | "nop\n\t" \ |
37 | ".set pop\n\t") | 37 | ".set pop\n\t") |
38 | 38 | ||
39 | static int r3k_have_wired_reg; /* Should be in cpu_data? */ | 39 | int r3k_have_wired_reg; /* Should be in cpu_data? */ |
40 | 40 | ||
41 | /* TLB operations. */ | 41 | /* TLB operations. */ |
42 | static void local_flush_tlb_from(int entry) | 42 | static void local_flush_tlb_from(int entry) |