diff options
| author | Giedrius Statkevičius <giedrius.statkevicius@gmail.com> | 2015-03-13 09:56:34 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-03-24 10:41:00 -0400 |
| commit | 3b84f2d910ff918ef88e920c0d23b6b8d8fa48cd (patch) | |
| tree | 61f103d620d7a2e8d6d6924f90a2f48c5e56c1fd | |
| parent | 20dad752850cd2b512f3ba48a5d9a13b15dabdf9 (diff) | |
dgnc: remove unused stuff from dgnc_cls.h
Remove unused defines from dgnc_cls.h
Signed-off-by: Giedrius Statkevičius <giedrius.statkevicius@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/dgnc/dgnc_cls.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/staging/dgnc/dgnc_cls.h b/drivers/staging/dgnc/dgnc_cls.h index 85042bdf3a5f..2597e36d38c4 100644 --- a/drivers/staging/dgnc/dgnc_cls.h +++ b/drivers/staging/dgnc/dgnc_cls.h | |||
| @@ -51,15 +51,9 @@ struct cls_uart_struct { | |||
| 51 | 51 | ||
| 52 | #define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF | 52 | #define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF |
| 53 | 53 | ||
| 54 | #define UART_16654_FCR_TXTRIGGER_8 0x0 | ||
| 55 | #define UART_16654_FCR_TXTRIGGER_16 0x10 | 54 | #define UART_16654_FCR_TXTRIGGER_16 0x10 |
| 56 | #define UART_16654_FCR_TXTRIGGER_32 0x20 | ||
| 57 | #define UART_16654_FCR_TXTRIGGER_56 0x30 | ||
| 58 | |||
| 59 | #define UART_16654_FCR_RXTRIGGER_8 0x0 | ||
| 60 | #define UART_16654_FCR_RXTRIGGER_16 0x40 | 55 | #define UART_16654_FCR_RXTRIGGER_16 0x40 |
| 61 | #define UART_16654_FCR_RXTRIGGER_56 0x80 | 56 | #define UART_16654_FCR_RXTRIGGER_56 0x80 |
| 62 | #define UART_16654_FCR_RXTRIGGER_60 0xC0 | ||
| 63 | 57 | ||
| 64 | /* Received CTS/RTS change of state */ | 58 | /* Received CTS/RTS change of state */ |
| 65 | #define UART_IIR_CTSRTS 0x20 | 59 | #define UART_IIR_CTSRTS 0x20 |
| @@ -76,13 +70,6 @@ struct cls_uart_struct { | |||
| 76 | #define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */ | 70 | #define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */ |
| 77 | #define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */ | 71 | #define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */ |
| 78 | #define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */ | 72 | #define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */ |
| 79 | |||
| 80 | /* Indicates whether chip saw an incoming XOFF char */ | ||
| 81 | #define UART_EXAR654_XOFF_DETECT 0x1 | ||
| 82 | |||
| 83 | /* Indicates whether chip saw an incoming XON char */ | ||
| 84 | #define UART_EXAR654_XON_DETECT 0x2 | ||
| 85 | |||
| 86 | #define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */ | 73 | #define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */ |
| 87 | #define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */ | 74 | #define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */ |
| 88 | #define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */ | 75 | #define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */ |
