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authorHauke Mehrtens <hauke@hauke-m.de>2016-06-20 17:32:14 -0400
committerBoris Brezillon <boris.brezillon@free-electrons.com>2016-07-11 02:40:17 -0400
commit37987ba4d15f13082d9f3ea6802f6b8bce89695f (patch)
tree44e2dfcec7205e080d5184b67f6c729cb67f8ad7
parent250d45eb828a48bcfe0ef32ef861ea950e3483fc (diff)
mtd: nand: xway: add nandaddr to own struct
Instead of using IO_ADDR_W and IO_ADDR_R use an own pointer to the NAND controller memory area. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r--drivers/mtd/nand/xway_nand.c30
1 files changed, 14 insertions, 16 deletions
diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c
index 429ba02fc0f5..1f2948c0c458 100644
--- a/drivers/mtd/nand/xway_nand.c
+++ b/drivers/mtd/nand/xway_nand.c
@@ -66,22 +66,23 @@
66struct xway_nand_data { 66struct xway_nand_data {
67 struct nand_chip chip; 67 struct nand_chip chip;
68 unsigned long csflags; 68 unsigned long csflags;
69 void __iomem *nandaddr;
69}; 70};
70 71
71static u8 xway_readb(struct mtd_info *mtd, int op) 72static u8 xway_readb(struct mtd_info *mtd, int op)
72{ 73{
73 struct nand_chip *chip = mtd_to_nand(mtd); 74 struct nand_chip *chip = mtd_to_nand(mtd);
74 void __iomem *nandaddr = chip->IO_ADDR_R; 75 struct xway_nand_data *data = nand_get_controller_data(chip);
75 76
76 return readb(nandaddr + op); 77 return readb(data->nandaddr + op);
77} 78}
78 79
79static void xway_writeb(struct mtd_info *mtd, int op, u8 value) 80static void xway_writeb(struct mtd_info *mtd, int op, u8 value)
80{ 81{
81 struct nand_chip *chip = mtd_to_nand(mtd); 82 struct nand_chip *chip = mtd_to_nand(mtd);
82 void __iomem *nandaddr = chip->IO_ADDR_W; 83 struct xway_nand_data *data = nand_get_controller_data(chip);
83 84
84 writeb(value, nandaddr + op); 85 writeb(value, data->nandaddr + op);
85} 86}
86 87
87static void xway_select_chip(struct mtd_info *mtd, int select) 88static void xway_select_chip(struct mtd_info *mtd, int select)
@@ -154,7 +155,6 @@ static int xway_nand_probe(struct platform_device *pdev)
154 struct mtd_info *mtd; 155 struct mtd_info *mtd;
155 struct resource *res; 156 struct resource *res;
156 int err; 157 int err;
157 void __iomem *nandaddr;
158 u32 cs; 158 u32 cs;
159 u32 cs_flag = 0; 159 u32 cs_flag = 0;
160 160
@@ -165,16 +165,14 @@ static int xway_nand_probe(struct platform_device *pdev)
165 return -ENOMEM; 165 return -ENOMEM;
166 166
167 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 167 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
168 nandaddr = devm_ioremap_resource(&pdev->dev, res); 168 data->nandaddr = devm_ioremap_resource(&pdev->dev, res);
169 if (IS_ERR(nandaddr)) 169 if (IS_ERR(data->nandaddr))
170 return PTR_ERR(nandaddr); 170 return PTR_ERR(data->nandaddr);
171 171
172 nand_set_flash_node(&data->chip, pdev->dev.of_node); 172 nand_set_flash_node(&data->chip, pdev->dev.of_node);
173 mtd = nand_to_mtd(&data->chip); 173 mtd = nand_to_mtd(&data->chip);
174 mtd->dev.parent = &pdev->dev; 174 mtd->dev.parent = &pdev->dev;
175 175
176 data->chip.IO_ADDR_R = nandaddr;
177 data->chip.IO_ADDR_W = nandaddr;
178 data->chip.cmd_ctrl = xway_cmd_ctrl; 176 data->chip.cmd_ctrl = xway_cmd_ctrl;
179 data->chip.dev_ready = xway_dev_ready; 177 data->chip.dev_ready = xway_dev_ready;
180 data->chip.select_chip = xway_select_chip; 178 data->chip.select_chip = xway_select_chip;
@@ -195,16 +193,16 @@ static int xway_nand_probe(struct platform_device *pdev)
195 cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1; 193 cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1;
196 194
197 /* setup the EBU to run in NAND mode on our base addr */ 195 /* setup the EBU to run in NAND mode on our base addr */
198 ltq_ebu_w32(CPHYSADDR(nandaddr) 196 ltq_ebu_w32(CPHYSADDR(data->nandaddr)
199 | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1); 197 | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1);
200 198
201 ltq_ebu_w32(BUSCON1_SETUP | BUSCON1_BCGEN_RES | BUSCON1_WAITWRC2 199 ltq_ebu_w32(BUSCON1_SETUP | BUSCON1_BCGEN_RES | BUSCON1_WAITWRC2
202 | BUSCON1_WAITRDC2 | BUSCON1_HOLDC1 | BUSCON1_RECOVC1 200 | BUSCON1_WAITRDC2 | BUSCON1_HOLDC1 | BUSCON1_RECOVC1
203 | BUSCON1_CMULT4, LTQ_EBU_BUSCON1); 201 | BUSCON1_CMULT4, LTQ_EBU_BUSCON1);
204 202
205 ltq_ebu_w32(NAND_CON_NANDM | NAND_CON_CSMUX | NAND_CON_CS_P 203 ltq_ebu_w32(NAND_CON_NANDM | NAND_CON_CSMUX | NAND_CON_CS_P
206 | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P 204 | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P
207 | cs_flag, EBU_NAND_CON); 205 | cs_flag, EBU_NAND_CON);
208 206
209 /* Scan to find existence of the device */ 207 /* Scan to find existence of the device */
210 err = nand_scan(mtd, 1); 208 err = nand_scan(mtd, 1);